mlx4_en.h revision 257867
1219820Sjeff/* 2219820Sjeff * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3219820Sjeff * 4219820Sjeff * This software is available to you under a choice of one of two 5219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 6219820Sjeff * General Public License (GPL) Version 2, available from the file 7219820Sjeff * COPYING in the main directory of this source tree, or the 8219820Sjeff * OpenIB.org BSD license below: 9219820Sjeff * 10219820Sjeff * Redistribution and use in source and binary forms, with or 11219820Sjeff * without modification, are permitted provided that the following 12219820Sjeff * conditions are met: 13219820Sjeff * 14219820Sjeff * - Redistributions of source code must retain the above 15219820Sjeff * copyright notice, this list of conditions and the following 16219820Sjeff * disclaimer. 17219820Sjeff * 18219820Sjeff * - Redistributions in binary form must reproduce the above 19219820Sjeff * copyright notice, this list of conditions and the following 20219820Sjeff * disclaimer in the documentation and/or other materials 21219820Sjeff * provided with the distribution. 22219820Sjeff * 23219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30219820Sjeff * SOFTWARE. 31219820Sjeff * 32219820Sjeff */ 33219820Sjeff 34219820Sjeff#ifndef _MLX4_EN_H_ 35219820Sjeff#define _MLX4_EN_H_ 36219820Sjeff 37219820Sjeff#include <sys/cdefs.h> 38219820Sjeff 39219820Sjeff#include <linux/types.h> 40219820Sjeff#include <linux/compiler.h> 41219820Sjeff#include <linux/list.h> 42219820Sjeff#include <linux/mutex.h> 43219820Sjeff#include <linux/netdevice.h> 44219820Sjeff 45219820Sjeff#include <linux/mlx4/device.h> 46219820Sjeff#include <linux/mlx4/qp.h> 47219820Sjeff#include <linux/mlx4/cq.h> 48219820Sjeff#include <linux/mlx4/srq.h> 49219820Sjeff#include <linux/mlx4/doorbell.h> 50219820Sjeff#include <linux/mlx4/cmd.h> 51219820Sjeff 52219820Sjeff#include <net/if_media.h> 53219820Sjeff#include <netinet/tcp_lro.h> 54219820Sjeff 55219820Sjeff#include "en_port.h" 56219820Sjeff 57219820Sjeff#define DRV_NAME "mlx4_en" 58219820Sjeff#define DRV_VERSION "1.5.2" 59219820Sjeff#define DRV_RELDATE "July 2010" 60219820Sjeff 61219820Sjeff/* XXX */ 62219820Sjeff#define NETIF_MSG_LINK 0x1 63219820Sjeff#define NETIF_MSG_IFDOWN 0x2 64219820Sjeff#define NETIF_MSG_HW 0x4 65219820Sjeff#define NETIF_MSG_DRV 0x8 66219820Sjeff#define NETIF_MSG_INTR 0x10 67219820Sjeff#define NETIF_MSG_RX_ERR 0x20 68219820Sjeff 69219820Sjeff#define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN) 70219820Sjeff 71219820Sjeff#define en_print(level, priv, format, arg...) \ 72219820Sjeff { \ 73219820Sjeff if ((priv)->registered) \ 74219820Sjeff printk(level "%s: %s: " format, DRV_NAME, \ 75219820Sjeff (priv->dev)->if_xname, ## arg); \ 76219820Sjeff else \ 77219820Sjeff printk(level "%s: %s: Port %d: " format, \ 78219820Sjeff DRV_NAME, dev_name(&priv->mdev->pdev->dev), \ 79219820Sjeff (priv)->port, ## arg); \ 80219820Sjeff } 81219820Sjeff 82219820Sjeff#define en_dbg(mlevel, priv, format, arg...) \ 83219820Sjeff if (NETIF_MSG_##mlevel & priv->msg_enable) \ 84219820Sjeff en_print(KERN_DEBUG, priv, format, ## arg) 85219820Sjeff#define en_warn(priv, format, arg...) \ 86219820Sjeff en_print(KERN_WARNING, priv, format, ## arg) 87219820Sjeff#define en_err(priv, format, arg...) \ 88219820Sjeff en_print(KERN_ERR, priv, format, ## arg) 89219820Sjeff#define en_info(priv, format, arg...) \ 90219820Sjeff en_print(KERN_INFO, priv, format, ## arg) 91219820Sjeff 92219820Sjeff#define mlx4_err(mdev, format, arg...) \ 93219820Sjeff printk(KERN_ERR "%s %s: " format , DRV_NAME ,\ 94219820Sjeff dev_name(&mdev->pdev->dev) , ## arg) 95219820Sjeff#define mlx4_info(mdev, format, arg...) \ 96219820Sjeff printk(KERN_INFO "%s %s: " format , DRV_NAME ,\ 97219820Sjeff dev_name(&mdev->pdev->dev) , ## arg) 98219820Sjeff#define mlx4_warn(mdev, format, arg...) \ 99219820Sjeff printk(KERN_WARNING "%s %s: " format , DRV_NAME ,\ 100219820Sjeff dev_name(&mdev->pdev->dev) , ## arg) 101219820Sjeff 102219820Sjeff/* 103219820Sjeff * Device constants 104219820Sjeff */ 105219820Sjeff 106219820Sjeff 107219820Sjeff#define MLX4_EN_PAGE_SHIFT 12 108219820Sjeff#define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT) 109219820Sjeff#define MAX_TX_RINGS (MLX4_EN_NUM_HASH_RINGS + 1 + MLX4_EN_NUM_PPP_RINGS) 110219820Sjeff#define MAX_RX_RINGS 16 111219820Sjeff#define TXBB_SIZE 64 112219820Sjeff#define HEADROOM (2048 / TXBB_SIZE + 1) 113219820Sjeff#define STAMP_STRIDE 64 114219820Sjeff#define STAMP_DWORDS (STAMP_STRIDE / 4) 115219820Sjeff#define STAMP_SHIFT 31 116219820Sjeff#define STAMP_VAL 0x7fffffff 117219820Sjeff#define STATS_DELAY (HZ / 4) 118219820Sjeff 119219820Sjeff/* Typical TSO descriptor with 16 gather entries is 352 bytes... */ 120219820Sjeff#define MAX_DESC_SIZE 512 121219820Sjeff#define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE) 122219820Sjeff 123219820Sjeff/* 124219820Sjeff * OS related constants and tunables 125219820Sjeff */ 126219820Sjeff 127219820Sjeff#define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ) 128219820Sjeff 129219820Sjeff#define MLX4_EN_MAX_LRO_DESCRIPTORS 32 130219820Sjeff#define MLX4_EN_NUM_IPFRAG_SESSIONS 16 131219820Sjeff 132219820Sjeff/* Receive fragment sizes; we use at most 3 fragments (for 9600 byte MTU 133219820Sjeff * and 4K allocations) */ 134219820Sjeff#if MJUMPAGESIZE == 4096 135219820Sjeffenum { 136219820Sjeff FRAG_SZ0 = MCLBYTES, 137219820Sjeff FRAG_SZ1 = MJUMPAGESIZE, 138219820Sjeff FRAG_SZ2 = MJUMPAGESIZE, 139219820Sjeff}; 140219820Sjeff#define MLX4_EN_MAX_RX_FRAGS 3 141219820Sjeff#elif MJUMPAGESIZE == 8192 142219820Sjeffenum { 143219820Sjeff FRAG_SZ0 = MCLBYTES, 144219820Sjeff FRAG_SZ1 = MJUMPAGESIZE, 145219820Sjeff}; 146219820Sjeff#define MLX4_EN_MAX_RX_FRAGS 2 147219820Sjeff#elif MJUMPAGESIZE == 8192 148219820Sjeff#else 149219820Sjeff#error "Unknown PAGE_SIZE" 150219820Sjeff#endif 151219820Sjeff 152219820Sjeff/* Maximum ring sizes */ 153219820Sjeff#define MLX4_EN_MAX_TX_SIZE 8192 154219820Sjeff#define MLX4_EN_MAX_RX_SIZE 8192 155219820Sjeff 156219820Sjeff#define MLX4_EN_MIN_RX_SIZE (128) 157219820Sjeff#define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE) 158219820Sjeff 159219820Sjeff#define MLX4_EN_SMALL_PKT_SIZE 64 160219820Sjeff#define MLX4_EN_TX_HASH_SIZE 256 161219820Sjeff#define MLX4_EN_TX_HASH_MASK (MLX4_EN_TX_HASH_SIZE - 1) 162219820Sjeff#define MLX4_EN_NUM_HASH_RINGS 4 163219820Sjeff#define MLX4_EN_NUM_PPP_RINGS 8 164219820Sjeff#define MLX4_EN_DEF_TX_RING_SIZE 512 165219820Sjeff#define MLX4_EN_DEF_TX_QUEUE_SIZE 4096 166219820Sjeff#define MLX4_EN_DEF_RX_RING_SIZE 1024 167220016Sjeff#define MLX4_EN_MAX_RX_POLL 1024 168219820Sjeff 169219820Sjeff/* Target number of bytes to coalesce with interrupt moderation */ 170219820Sjeff#define MLX4_EN_RX_COAL_TARGET 0x20000 171219820Sjeff#define MLX4_EN_RX_COAL_TIME 0x10 172219820Sjeff 173219820Sjeff#define MLX4_EN_TX_COAL_PKTS 5 174219820Sjeff#define MLX4_EN_TX_COAL_TIME 0x80 175219820Sjeff 176219820Sjeff#define MLX4_EN_RX_RATE_LOW 400000 177219820Sjeff#define MLX4_EN_RX_COAL_TIME_LOW 0 178219820Sjeff#define MLX4_EN_RX_RATE_HIGH 450000 179219820Sjeff#define MLX4_EN_RX_COAL_TIME_HIGH 128 180219820Sjeff#define MLX4_EN_RX_SIZE_THRESH 1024 181219820Sjeff#define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH) 182219820Sjeff#define MLX4_EN_SAMPLE_INTERVAL 0 183219820Sjeff#define MLX4_EN_AVG_PKT_SMALL 256 184219820Sjeff 185219820Sjeff#define MLX4_EN_AUTO_CONF 0xffff 186219820Sjeff 187219820Sjeff#define MLX4_EN_DEF_RX_PAUSE 1 188219820Sjeff#define MLX4_EN_DEF_TX_PAUSE 1 189219820Sjeff 190219820Sjeff/* Interval between sucessive polls in the Tx routine when polling is used 191219820Sjeff instead of interrupts (in per-core Tx rings) - should be power of 2 */ 192219820Sjeff#define MLX4_EN_TX_POLL_MODER 16 193219820Sjeff#define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4) 194219820Sjeff 195219820Sjeff#define ETH_LLC_SNAP_SIZE 8 196219820Sjeff 197219820Sjeff#define SMALL_PACKET_SIZE (MHLEN) 198219820Sjeff#define HEADER_COPY_SIZE (128) 199219820Sjeff#define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETHER_HDR_LEN) 200219820Sjeff 201219820Sjeff#define MLX4_EN_MIN_MTU 46 202219820Sjeff#define ETH_BCAST 0xffffffffffffULL 203219820Sjeff 204219820Sjeff#define MLX4_EN_LOOPBACK_RETRIES 5 205219820Sjeff#define MLX4_EN_LOOPBACK_TIMEOUT 100 206219820Sjeff 207219820Sjeff#ifdef MLX4_EN_PERF_STAT 208219820Sjeff/* Number of samples to 'average' */ 209219820Sjeff#define AVG_SIZE 128 210219820Sjeff#define AVG_FACTOR 1024 211219820Sjeff#define NUM_PERF_STATS NUM_PERF_COUNTERS 212219820Sjeff 213219820Sjeff#define INC_PERF_COUNTER(cnt) (++(cnt)) 214219820Sjeff#define ADD_PERF_COUNTER(cnt, add) ((cnt) += (add)) 215219820Sjeff#define AVG_PERF_COUNTER(cnt, sample) \ 216219820Sjeff ((cnt) = ((cnt) * (AVG_SIZE - 1) + (sample) * AVG_FACTOR) / AVG_SIZE) 217219820Sjeff#define GET_PERF_COUNTER(cnt) (cnt) 218219820Sjeff#define GET_AVG_PERF_COUNTER(cnt) ((cnt) / AVG_FACTOR) 219219820Sjeff 220219820Sjeff#else 221219820Sjeff 222219820Sjeff#define NUM_PERF_STATS 0 223219820Sjeff#define INC_PERF_COUNTER(cnt) do {} while (0) 224219820Sjeff#define ADD_PERF_COUNTER(cnt, add) do {} while (0) 225219820Sjeff#define AVG_PERF_COUNTER(cnt, sample) do {} while (0) 226219820Sjeff#define GET_PERF_COUNTER(cnt) (0) 227219820Sjeff#define GET_AVG_PERF_COUNTER(cnt) (0) 228219820Sjeff#endif /* MLX4_EN_PERF_STAT */ 229219820Sjeff 230219820Sjeff/* 231219820Sjeff * Configurables 232219820Sjeff */ 233219820Sjeff 234219820Sjeffenum cq_type { 235219820Sjeff RX = 0, 236219820Sjeff TX = 1, 237219820Sjeff}; 238219820Sjeff 239219820Sjeff 240219820Sjeff/* 241219820Sjeff * Useful macros 242219820Sjeff */ 243219820Sjeff#define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x)) 244219820Sjeff#define XNOR(x, y) (!(x) == !(y)) 245219820Sjeff#define ILLEGAL_MAC(addr) (addr == 0xffffffffffffULL || addr == 0x0) 246219820Sjeff 247219820Sjeff 248219820Sjeffstruct mlx4_en_tx_info { 249219820Sjeff struct mbuf *mb; 250219820Sjeff u32 nr_txbb; 251219820Sjeff u8 nr_segs; 252219820Sjeff u8 data_offset; 253219820Sjeff u8 inl; 254219820Sjeff}; 255219820Sjeff 256219820Sjeff 257219820Sjeff#define MLX4_EN_BIT_DESC_OWN 0x80000000 258219820Sjeff#define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg) 259219820Sjeff#define MLX4_EN_MEMTYPE_PAD 0x100 260219820Sjeff#define DS_SIZE sizeof(struct mlx4_wqe_data_seg) 261219820Sjeff 262219820Sjeff 263219820Sjeffstruct mlx4_en_tx_desc { 264219820Sjeff struct mlx4_wqe_ctrl_seg ctrl; 265219820Sjeff union { 266219820Sjeff struct mlx4_wqe_data_seg data; /* at least one data segment */ 267219820Sjeff struct mlx4_wqe_lso_seg lso; 268219820Sjeff struct mlx4_wqe_inline_seg inl; 269219820Sjeff }; 270219820Sjeff}; 271219820Sjeff 272219820Sjeff#define MLX4_EN_USE_SRQ 0x01000000 273219820Sjeff 274219820Sjeffstruct mlx4_en_tx_ring { 275219820Sjeff spinlock_t tx_lock; 276219820Sjeff struct mlx4_hwq_resources wqres; 277219820Sjeff u32 size ; /* number of TXBBs */ 278219820Sjeff u32 size_mask; 279219820Sjeff u16 stride; 280219820Sjeff u16 cqn; /* index of port CQ associated with this ring */ 281219820Sjeff u32 prod; 282219820Sjeff u32 cons; 283219820Sjeff u32 buf_size; 284219820Sjeff u32 doorbell_qpn; 285219820Sjeff void *buf; 286219820Sjeff u16 poll_cnt; 287219820Sjeff int blocked; 288219820Sjeff struct buf_ring *br; 289219820Sjeff struct mlx4_en_tx_info *tx_info; 290219820Sjeff u8 *bounce_buf; 291219820Sjeff u32 last_nr_txbb; 292219820Sjeff struct mlx4_qp qp; 293219820Sjeff struct mlx4_qp_context context; 294219820Sjeff int qpn; 295219820Sjeff enum mlx4_qp_state qp_state; 296219820Sjeff struct mlx4_srq dummy; 297219820Sjeff unsigned long bytes; 298219820Sjeff unsigned long packets; 299219820Sjeff unsigned long errors; 300219820Sjeff spinlock_t comp_lock; 301219820Sjeff struct mlx4_bf bf; 302219820Sjeff bool bf_enabled; 303219820Sjeff u64 watchdog_time; 304219820Sjeff}; 305219820Sjeff 306219820Sjeffstruct mlx4_en_ipfrag { 307219820Sjeff struct mbuf *fragments; 308219820Sjeff struct mbuf *last; 309219820Sjeff __be32 saddr; 310219820Sjeff __be32 daddr; 311219820Sjeff __be16 id; 312219820Sjeff u8 protocol; 313219820Sjeff int total_len; 314219820Sjeff u16 offset; 315219820Sjeff}; 316219820Sjeff 317219820Sjeffstruct mlx4_en_rx_desc { 318219820Sjeff /* actual number of entries depends on rx ring stride */ 319219820Sjeff struct mlx4_wqe_data_seg data[0]; 320219820Sjeff}; 321219820Sjeff 322219820Sjeffstruct mlx4_en_rx_ring { 323219820Sjeff struct mlx4_hwq_resources wqres; 324219820Sjeff u32 size ; /* number of Rx descs*/ 325219820Sjeff u32 actual_size; 326219820Sjeff u32 size_mask; 327219820Sjeff u16 stride; 328219820Sjeff u16 log_stride; 329219820Sjeff u16 cqn; /* index of port CQ associated with this ring */ 330219820Sjeff u32 prod; 331219820Sjeff u32 cons; 332219820Sjeff u32 buf_size; 333219820Sjeff void *buf; 334219820Sjeff void *rx_info; 335219820Sjeff unsigned long bytes; 336219820Sjeff unsigned long packets; 337219820Sjeff unsigned long errors; 338219820Sjeff struct lro_ctrl lro; 339219820Sjeff struct mlx4_en_ipfrag ipfrag[MLX4_EN_NUM_IPFRAG_SESSIONS]; 340219820Sjeff}; 341219820Sjeff 342219820Sjeff 343219820Sjeffstatic inline int mlx4_en_can_lro(__be16 status) 344219820Sjeff{ 345219820Sjeff return (status & cpu_to_be16(MLX4_CQE_STATUS_IPV4 | 346219820Sjeff MLX4_CQE_STATUS_IPV4F | 347219820Sjeff MLX4_CQE_STATUS_IPV6 | 348219820Sjeff MLX4_CQE_STATUS_IPV4OPT | 349219820Sjeff MLX4_CQE_STATUS_TCP | 350219820Sjeff MLX4_CQE_STATUS_UDP | 351219820Sjeff MLX4_CQE_STATUS_IPOK)) == 352219820Sjeff cpu_to_be16(MLX4_CQE_STATUS_IPV4 | 353219820Sjeff MLX4_CQE_STATUS_IPOK | 354219820Sjeff MLX4_CQE_STATUS_TCP); 355219820Sjeff} 356219820Sjeff 357219820Sjeffstruct mlx4_en_cq { 358219820Sjeff struct mlx4_cq mcq; 359219820Sjeff struct mlx4_hwq_resources wqres; 360219820Sjeff int ring; 361219820Sjeff spinlock_t lock; 362219820Sjeff struct net_device *dev; 363219820Sjeff /* Per-core Tx cq processing support */ 364219820Sjeff struct timer_list timer; 365219820Sjeff int size; 366219820Sjeff int buf_size; 367219820Sjeff unsigned vector; 368219820Sjeff enum cq_type is_tx; 369219820Sjeff u16 moder_time; 370219820Sjeff u16 moder_cnt; 371219820Sjeff struct mlx4_cqe *buf; 372219820Sjeff struct task cq_task; 373219820Sjeff struct taskqueue *tq; 374219820Sjeff#define MLX4_EN_OPCODE_ERROR 0x1e 375219820Sjeff u32 tot_rx; 376219820Sjeff}; 377219820Sjeff 378219820Sjeffstruct mlx4_en_port_profile { 379219820Sjeff u32 flags; 380219820Sjeff u32 tx_ring_num; 381219820Sjeff u32 rx_ring_num; 382219820Sjeff u32 tx_ring_size; 383219820Sjeff u32 rx_ring_size; 384219820Sjeff u8 rx_pause; 385219820Sjeff u8 tx_pause; 386219859Sjeff u32 rx_ppp; 387219859Sjeff u32 tx_ppp; 388219820Sjeff}; 389219820Sjeff 390219820Sjeffstruct mlx4_en_profile { 391219820Sjeff int rss_xor; 392219820Sjeff int num_lro; 393219820Sjeff int ip_reasm; 394219820Sjeff int tcp_rss; 395219820Sjeff int udp_rss; 396219820Sjeff u8 rss_mask; 397219820Sjeff u32 active_ports; 398219820Sjeff u32 small_pkt_int; 399219820Sjeff u8 no_reset; 400219820Sjeff struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1]; 401219820Sjeff}; 402219820Sjeff 403219820Sjeffstruct mlx4_en_dev { 404219820Sjeff struct mlx4_dev *dev; 405219820Sjeff struct pci_dev *pdev; 406219820Sjeff struct mutex state_lock; 407219820Sjeff struct net_device *pndev[MLX4_MAX_PORTS + 1]; 408219820Sjeff u32 port_cnt; 409219820Sjeff bool device_up; 410219820Sjeff struct mlx4_en_profile profile; 411219820Sjeff u32 LSO_support; 412219820Sjeff struct workqueue_struct *workqueue; 413219820Sjeff struct device *dma_device; 414219820Sjeff void __iomem *uar_map; 415219820Sjeff struct mlx4_uar priv_uar; 416219820Sjeff struct mlx4_mr mr; 417219820Sjeff u32 priv_pdn; 418219820Sjeff spinlock_t uar_lock; 419219820Sjeff u8 mac_removed[MLX4_MAX_PORTS + 1]; 420219820Sjeff}; 421219820Sjeff 422219820Sjeff 423219820Sjeffstruct mlx4_en_rss_map { 424219820Sjeff int base_qpn; 425219820Sjeff struct mlx4_qp qps[MAX_RX_RINGS]; 426219820Sjeff enum mlx4_qp_state state[MAX_RX_RINGS]; 427219820Sjeff struct mlx4_qp indir_qp; 428219820Sjeff enum mlx4_qp_state indir_state; 429219820Sjeff}; 430219820Sjeff 431219820Sjeffstruct mlx4_en_rss_context { 432219820Sjeff __be32 base_qpn; 433219820Sjeff __be32 default_qpn; 434219820Sjeff u16 reserved; 435219820Sjeff u8 hash_fn; 436219820Sjeff u8 flags; 437219820Sjeff __be32 rss_key[10]; 438219820Sjeff __be32 base_qpn_udp; 439219820Sjeff}; 440219820Sjeff 441219820Sjeffstruct mlx4_en_port_state { 442219820Sjeff int link_state; 443219820Sjeff int link_speed; 444219820Sjeff int transciver; 445219820Sjeff}; 446219820Sjeff 447219820Sjeffstruct mlx4_en_pkt_stats { 448219820Sjeff unsigned long broadcast; 449219820Sjeff unsigned long rx_prio[8]; 450219820Sjeff unsigned long tx_prio[8]; 451219820Sjeff#define NUM_PKT_STATS 17 452219820Sjeff}; 453219820Sjeff 454219820Sjeffstruct mlx4_en_port_stats { 455219820Sjeff unsigned long tso_packets; 456219820Sjeff unsigned long queue_stopped; 457219820Sjeff unsigned long wake_queue; 458219820Sjeff unsigned long tx_timeout; 459219820Sjeff unsigned long rx_alloc_failed; 460219820Sjeff unsigned long rx_chksum_good; 461219820Sjeff unsigned long rx_chksum_none; 462219820Sjeff unsigned long tx_chksum_offload; 463219820Sjeff}; 464219820Sjeff 465219820Sjeffstruct mlx4_en_perf_stats { 466219820Sjeff u32 tx_poll; 467219820Sjeff u64 tx_pktsz_avg; 468219820Sjeff u32 inflight_avg; 469219820Sjeff u32 tx_coal_avg; 470219820Sjeff u32 rx_coal_avg; 471219820Sjeff}; 472219820Sjeff 473219820Sjeffstruct mlx4_en_frag_info { 474219820Sjeff u16 frag_size; 475219820Sjeff u16 frag_prefix_size; 476219820Sjeff}; 477219820Sjeff 478219820Sjeffstruct mlx4_en_tx_hash_entry { 479219820Sjeff u8 cnt; 480219820Sjeff unsigned int small_pkts; 481219820Sjeff unsigned int big_pkts; 482219820Sjeff unsigned int ring; 483219820Sjeff}; 484219820Sjeff 485219820Sjeffstruct mlx4_en_priv { 486219820Sjeff struct mlx4_en_dev *mdev; 487219820Sjeff struct mlx4_en_port_profile *prof; 488219820Sjeff struct net_device *dev; 489219820Sjeff bool vlgrp_modified; 490219820Sjeff u32 vlan_register[VLAN_FLTR_SIZE]; 491219820Sjeff u32 vlan_unregister[VLAN_FLTR_SIZE]; 492219820Sjeff u32 vlans[VLAN_FLTR_SIZE]; 493219820Sjeff spinlock_t vlan_lock; 494219820Sjeff struct mlx4_en_port_state port_state; 495219820Sjeff spinlock_t stats_lock; 496257867Salfred spinlock_t ioctl_lock; 497219820Sjeff 498257867Salfred unsigned long last_moder_packets[MAX_RX_RINGS]; 499219820Sjeff unsigned long last_moder_tx_packets; 500257867Salfred unsigned long last_moder_bytes[MAX_RX_RINGS]; 501219820Sjeff unsigned long last_moder_jiffies; 502257867Salfred int last_moder_time[MAX_RX_RINGS]; 503219820Sjeff u16 rx_usecs; 504219820Sjeff u16 rx_frames; 505219820Sjeff u16 tx_usecs; 506219820Sjeff u16 tx_frames; 507219820Sjeff u32 pkt_rate_low; 508219820Sjeff u16 rx_usecs_low; 509219820Sjeff u32 pkt_rate_high; 510219820Sjeff u16 rx_usecs_high; 511219820Sjeff u16 sample_interval; 512219820Sjeff u16 adaptive_rx_coal; 513219820Sjeff u32 msg_enable; 514219820Sjeff u32 loopback_ok; 515219820Sjeff u32 validate_loopback; 516219820Sjeff 517219820Sjeff struct mlx4_hwq_resources res; 518219820Sjeff int link_state; 519219820Sjeff int last_link_state; 520219820Sjeff bool port_up; 521219820Sjeff int port; 522219820Sjeff int registered; 523219820Sjeff int allocated; 524219820Sjeff int rx_csum; 525219820Sjeff u64 mac; 526219820Sjeff int mac_index; 527219820Sjeff unsigned max_mtu; 528219820Sjeff int base_qpn; 529219820Sjeff 530219820Sjeff struct mlx4_en_rss_map rss_map; 531219820Sjeff u16 tx_prio_map[8]; 532219820Sjeff u32 flags; 533219820Sjeff#define MLX4_EN_FLAG_PROMISC 0x1 534219820Sjeff u32 tx_ring_num; 535219820Sjeff u32 rx_ring_num; 536219820Sjeff u32 rx_mb_size; 537219820Sjeff struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS]; 538219820Sjeff u16 num_frags; 539219820Sjeff u16 log_rx_info; 540219859Sjeff int ip_reasm; 541220016Sjeff bool wol; 542219820Sjeff 543219820Sjeff struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS]; 544219820Sjeff struct mlx4_en_rx_ring rx_ring[MAX_RX_RINGS]; 545219820Sjeff struct mlx4_en_cq tx_cq[MAX_TX_RINGS]; 546219820Sjeff struct mlx4_en_cq rx_cq[MAX_RX_RINGS]; 547219820Sjeff struct mlx4_en_tx_hash_entry tx_hash[MLX4_EN_TX_HASH_SIZE]; 548219820Sjeff struct work_struct mcast_task; 549219820Sjeff struct work_struct watchdog_task; 550219820Sjeff struct work_struct linkstate_task; 551219820Sjeff struct delayed_work stats_task; 552219820Sjeff struct mlx4_en_perf_stats pstats; 553219820Sjeff struct mlx4_en_pkt_stats pkstats; 554219820Sjeff struct mlx4_en_port_stats port_stats; 555219820Sjeff struct mlx4_en_stat_out_mbox hw_stats; 556219820Sjeff struct ifmedia media; 557219820Sjeff eventhandler_tag vlan_attach; 558219820Sjeff eventhandler_tag vlan_detach; 559219820Sjeff struct callout watchdog_timer; 560219820Sjeff volatile int blocked; 561219820Sjeff struct sysctl_oid *sysctl; 562219820Sjeff struct sysctl_ctx_list conf_ctx; 563219820Sjeff struct sysctl_ctx_list stat_ctx; 564219820Sjeff}; 565219820Sjeff 566220016Sjeffenum mlx4_en_wol { 567220016Sjeff MLX4_EN_WOL_MAGIC = (1ULL << 61), 568220016Sjeff MLX4_EN_WOL_ENABLED = (1ULL << 62), 569220016Sjeff MLX4_EN_WOL_DO_MODIFY = (1ULL << 63), 570220016Sjeff}; 571219820Sjeff 572219820Sjeffint mlx4_en_transmit(struct net_device *dev, struct mbuf *mb); 573219820Sjeffvoid mlx4_en_qflush(struct net_device *dev); 574219820Sjeff 575219820Sjeffint mlx4_en_rx_frags(struct mlx4_en_priv *priv, struct mlx4_en_rx_ring *ring, 576219820Sjeff struct mbuf *mb, struct mlx4_cqe *cqe); 577219820Sjeffvoid mlx4_en_flush_frags(struct mlx4_en_priv *priv, 578219820Sjeff struct mlx4_en_rx_ring *ring); 579219820Sjeffvoid mlx4_en_destroy_netdev(struct net_device *dev); 580219820Sjeffint mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 581219820Sjeff struct mlx4_en_port_profile *prof); 582219820Sjeff 583219820Sjeffint mlx4_en_start_port(struct net_device *dev); 584219820Sjeffvoid mlx4_en_stop_port(struct net_device *dev); 585219820Sjeff 586219820Sjeffvoid mlx4_en_free_resources(struct mlx4_en_priv *priv); 587219820Sjeffint mlx4_en_alloc_resources(struct mlx4_en_priv *priv); 588219820Sjeff 589219820Sjeffint mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, 590219820Sjeff int entries, int ring, enum cq_type mode); 591219820Sjeffvoid mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 592219820Sjeffint mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 593219820Sjeffvoid mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 594219820Sjeffint mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 595219820Sjeffint mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 596219820Sjeff 597219820Sjeffvoid mlx4_en_poll_tx_cq(unsigned long data); 598219820Sjeffvoid mlx4_en_tx_irq(struct mlx4_cq *mcq); 599219820Sjeffu16 mlx4_en_select_queue(struct net_device *dev, struct mbuf *mb); 600219820Sjeff 601219820Sjeffint mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring, 602219820Sjeff u32 size, u16 stride); 603219820Sjeffvoid mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring); 604219820Sjeffint mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, 605219820Sjeff struct mlx4_en_tx_ring *ring, 606219820Sjeff int cq); 607219820Sjeffvoid mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv, 608219820Sjeff struct mlx4_en_tx_ring *ring); 609219820Sjeff 610219820Sjeffint mlx4_en_create_rx_ring(struct mlx4_en_priv *priv, 611219820Sjeff struct mlx4_en_rx_ring *ring, u32 size); 612219820Sjeffvoid mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv, 613219820Sjeff struct mlx4_en_rx_ring *ring); 614219820Sjeffint mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv); 615219820Sjeffvoid mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv, 616219820Sjeff struct mlx4_en_rx_ring *ring); 617219820Sjeffint mlx4_en_process_rx_cq(struct net_device *dev, 618219820Sjeff struct mlx4_en_cq *cq, 619219820Sjeff int budget); 620219820Sjeffint mlx4_en_process_rx_cq_mb(struct net_device *dev, 621219820Sjeff struct mlx4_en_cq *cq, 622219820Sjeff int budget); 623219820Sjeffvoid mlx4_en_tx_que(void *context, int pending); 624219820Sjeffvoid mlx4_en_rx_que(void *context, int pending); 625219820Sjeffvoid mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, 626219820Sjeff int is_tx, int rss, int qpn, int cqn, 627219820Sjeff struct mlx4_qp_context *context); 628219820Sjeffvoid mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event); 629219820Sjeffint mlx4_en_map_buffer(struct mlx4_buf *buf); 630219820Sjeffvoid mlx4_en_unmap_buffer(struct mlx4_buf *buf); 631219820Sjeff 632219820Sjeffvoid mlx4_en_calc_rx_buf(struct net_device *dev); 633219820Sjeffvoid mlx4_en_set_prio_map(struct mlx4_en_priv *priv, u16 *prio_map, u32 ring_num); 634219820Sjeffint mlx4_en_config_rss_steer(struct mlx4_en_priv *priv); 635219820Sjeffvoid mlx4_en_release_rss_steer(struct mlx4_en_priv *priv); 636219820Sjeffint mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring); 637219820Sjeffvoid mlx4_en_rx_irq(struct mlx4_cq *mcq); 638219820Sjeff 639255932Salfred//int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); 640219820Sjeffint mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, u8 port, u32 *vlans); 641255932Salfred//int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, 642255932Salfred// u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); 643255932Salfred//int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, 644255932Salfred// u8 promisc); 645219820Sjeff 646219820Sjeffint mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset); 647219820Sjeffint mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port); 648219820Sjeff 649219820Sjeff#define MLX4_EN_NUM_SELF_TEST 5 650219820Sjeffvoid mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf); 651219820Sjeffu64 mlx4_en_mac_to_u64(u8 *addr); 652219820Sjeff 653219820Sjeff/* 654219820Sjeff * Globals 655219820Sjeff */ 656219820Sjeffextern const struct ethtool_ops mlx4_en_ethtool_ops; 657219820Sjeff#endif 658