1219820Sjeff/* 2272407Shselasky * Copyright (c) 2007, 2014 Mellanox Technologies. All rights reserved. 3219820Sjeff * 4219820Sjeff * This software is available to you under a choice of one of two 5219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 6219820Sjeff * General Public License (GPL) Version 2, available from the file 7219820Sjeff * COPYING in the main directory of this source tree, or the 8219820Sjeff * OpenIB.org BSD license below: 9219820Sjeff * 10219820Sjeff * Redistribution and use in source and binary forms, with or 11219820Sjeff * without modification, are permitted provided that the following 12219820Sjeff * conditions are met: 13219820Sjeff * 14219820Sjeff * - Redistributions of source code must retain the above 15219820Sjeff * copyright notice, this list of conditions and the following 16219820Sjeff * disclaimer. 17219820Sjeff * 18219820Sjeff * - Redistributions in binary form must reproduce the above 19219820Sjeff * copyright notice, this list of conditions and the following 20219820Sjeff * disclaimer in the documentation and/or other materials 21219820Sjeff * provided with the distribution. 22219820Sjeff * 23219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30219820Sjeff * SOFTWARE. 31219820Sjeff * 32219820Sjeff */ 33219820Sjeff 34219820Sjeff#include <linux/module.h> 35219820Sjeff#include <linux/delay.h> 36219820Sjeff#include <linux/netdevice.h> 37272407Shselasky#include <linux/slab.h> 38219820Sjeff 39219820Sjeff#include <linux/mlx4/driver.h> 40219820Sjeff#include <linux/mlx4/device.h> 41219820Sjeff#include <linux/mlx4/cmd.h> 42219820Sjeff 43219820Sjeff#include "mlx4_en.h" 44219820Sjeff 45219820SjeffMODULE_AUTHOR("Liran Liss, Yevgeny Petrilin"); 46219820SjeffMODULE_DESCRIPTION("Mellanox ConnectX HCA Ethernet driver"); 47219820SjeffMODULE_LICENSE("Dual BSD/GPL"); 48219820SjeffMODULE_VERSION(DRV_VERSION " ("DRV_RELDATE")"); 49219820Sjeff 50219820Sjeffstatic const char mlx4_en_version[] = 51219820Sjeff DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v" 52219820Sjeff DRV_VERSION " (" DRV_RELDATE ")\n"; 53219820Sjeff 54219820Sjeff#define MLX4_EN_PARM_INT(X, def_val, desc) \ 55219820Sjeff static unsigned int X = def_val;\ 56219820Sjeff module_param(X , uint, 0444); \ 57219820Sjeff MODULE_PARM_DESC(X, desc); 58219820Sjeff 59219820Sjeff 60219820Sjeff/* 61219820Sjeff * Device scope module parameters 62219820Sjeff */ 63219820Sjeff 64219820Sjeff/* Enable RSS UDP traffic */ 65219820SjeffMLX4_EN_PARM_INT(udp_rss, 1, 66272407Shselasky "Enable RSS for incoming UDP traffic"); 67219820Sjeff 68219820Sjeff/* Priority pausing */ 69219820SjeffMLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." 70219820Sjeff " Per priority bit mask"); 71219820SjeffMLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." 72219820Sjeff " Per priority bit mask"); 73219820Sjeff 74272407Shselasky#define MAX_PFC_TX 0xff 75272407Shselasky#define MAX_PFC_RX 0xff 76272407Shselasky 77272407Shselasky 78219820Sjeffstatic int mlx4_en_get_profile(struct mlx4_en_dev *mdev) 79219820Sjeff{ 80219820Sjeff struct mlx4_en_profile *params = &mdev->profile; 81219820Sjeff int i; 82219820Sjeff 83219820Sjeff params->udp_rss = udp_rss; 84272407Shselasky params->num_tx_rings_p_up = min_t(int, mp_ncpus, 85272407Shselasky MLX4_EN_MAX_TX_RING_P_UP); 86272407Shselasky if (params->udp_rss && !(mdev->dev->caps.flags 87272407Shselasky & MLX4_DEV_CAP_FLAG_UDP_RSS)) { 88219820Sjeff mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); 89219820Sjeff params->udp_rss = 0; 90219820Sjeff } 91219820Sjeff for (i = 1; i <= MLX4_MAX_PORTS; i++) { 92219820Sjeff params->prof[i].rx_pause = 1; 93219820Sjeff params->prof[i].rx_ppp = pfcrx; 94219820Sjeff params->prof[i].tx_pause = 1; 95219820Sjeff params->prof[i].tx_ppp = pfctx; 96219820Sjeff params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE; 97219820Sjeff params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE; 98272407Shselasky params->prof[i].tx_ring_num = params->num_tx_rings_p_up * 99272407Shselasky MLX4_EN_NUM_UP; 100272407Shselasky params->prof[i].rss_rings = 0; 101219820Sjeff } 102219820Sjeff 103219820Sjeff return 0; 104219820Sjeff} 105219820Sjeff 106272407Shselaskystatic void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port) 107219820Sjeff{ 108219820Sjeff struct mlx4_en_dev *endev = ctx; 109219820Sjeff 110219820Sjeff return endev->pndev[port]; 111219820Sjeff} 112219820Sjeff 113219820Sjeffstatic void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, 114255932Salfred enum mlx4_dev_event event, unsigned long port) 115219820Sjeff{ 116219820Sjeff struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; 117219820Sjeff struct mlx4_en_priv *priv; 118219820Sjeff 119219820Sjeff switch (event) { 120219820Sjeff case MLX4_DEV_EVENT_PORT_UP: 121219820Sjeff case MLX4_DEV_EVENT_PORT_DOWN: 122255932Salfred if (!mdev->pndev[port]) 123255932Salfred return; 124255932Salfred priv = netdev_priv(mdev->pndev[port]); 125219820Sjeff /* To prevent races, we poll the link state in a separate 126219820Sjeff task rather than changing it here */ 127219820Sjeff priv->link_state = event; 128219820Sjeff queue_work(mdev->workqueue, &priv->linkstate_task); 129219820Sjeff break; 130219820Sjeff 131219820Sjeff case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 132219820Sjeff mlx4_err(mdev, "Internal error detected, restarting device\n"); 133219820Sjeff break; 134219820Sjeff 135272407Shselasky case MLX4_DEV_EVENT_SLAVE_INIT: 136272407Shselasky case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 137272407Shselasky break; 138219820Sjeff default: 139255932Salfred if (port < 1 || port > dev->caps.num_ports || 140255932Salfred !mdev->pndev[port]) 141255932Salfred return; 142255932Salfred mlx4_warn(mdev, "Unhandled event %d for port %d\n", event, 143255932Salfred (int) port); 144219820Sjeff } 145219820Sjeff} 146219820Sjeff 147219820Sjeffstatic void mlx4_en_remove(struct mlx4_dev *dev, void *endev_ptr) 148219820Sjeff{ 149219820Sjeff struct mlx4_en_dev *mdev = endev_ptr; 150272407Shselasky int i, ret; 151219820Sjeff 152219820Sjeff mutex_lock(&mdev->state_lock); 153219820Sjeff mdev->device_up = false; 154219820Sjeff mutex_unlock(&mdev->state_lock); 155219820Sjeff 156219820Sjeff mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 157219820Sjeff if (mdev->pndev[i]) 158219820Sjeff mlx4_en_destroy_netdev(mdev->pndev[i]); 159219820Sjeff 160219820Sjeff flush_workqueue(mdev->workqueue); 161219820Sjeff destroy_workqueue(mdev->workqueue); 162272407Shselasky ret = mlx4_mr_free(dev, &mdev->mr); 163272407Shselasky if (ret) 164272407Shselasky mlx4_err(mdev, "Error deregistering MR. The system may have become unstable."); 165272407Shselasky iounmap(mdev->uar_map); 166219820Sjeff mlx4_uar_free(dev, &mdev->priv_uar); 167219820Sjeff mlx4_pd_free(dev, mdev->priv_pdn); 168219820Sjeff kfree(mdev); 169219820Sjeff} 170219820Sjeff 171219820Sjeffstatic void *mlx4_en_add(struct mlx4_dev *dev) 172219820Sjeff{ 173219820Sjeff struct mlx4_en_dev *mdev; 174219820Sjeff int i; 175219820Sjeff int err; 176219820Sjeff 177272407Shselasky printk_once(KERN_INFO "%s", mlx4_en_version); 178219820Sjeff 179219820Sjeff mdev = kzalloc(sizeof *mdev, GFP_KERNEL); 180219820Sjeff if (!mdev) { 181219820Sjeff dev_err(&dev->pdev->dev, "Device struct alloc failed, " 182219820Sjeff "aborting.\n"); 183219820Sjeff err = -ENOMEM; 184219820Sjeff goto err_free_res; 185219820Sjeff } 186219820Sjeff 187219820Sjeff if (mlx4_pd_alloc(dev, &mdev->priv_pdn)) 188219820Sjeff goto err_free_dev; 189219820Sjeff 190219820Sjeff if (mlx4_uar_alloc(dev, &mdev->priv_uar)) 191219820Sjeff goto err_pd; 192219820Sjeff 193272407Shselasky mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT, 194272407Shselasky PAGE_SIZE); 195219820Sjeff if (!mdev->uar_map) 196219820Sjeff goto err_uar; 197272407Shselasky spin_lock_init(&mdev->uar_lock); 198219820Sjeff 199219820Sjeff mdev->dev = dev; 200219820Sjeff mdev->dma_device = &(dev->pdev->dev); 201219820Sjeff mdev->pdev = dev->pdev; 202219820Sjeff mdev->device_up = false; 203219820Sjeff 204219820Sjeff mdev->LSO_support = !!(dev->caps.flags & (1 << 15)); 205219820Sjeff if (!mdev->LSO_support) 206219820Sjeff mlx4_warn(mdev, "LSO not supported, please upgrade to later " 207219820Sjeff "FW version to enable LSO\n"); 208219820Sjeff 209219820Sjeff if (mlx4_mr_alloc(mdev->dev, mdev->priv_pdn, 0, ~0ull, 210219820Sjeff MLX4_PERM_LOCAL_WRITE | MLX4_PERM_LOCAL_READ, 211219820Sjeff 0, 0, &mdev->mr)) { 212219820Sjeff mlx4_err(mdev, "Failed allocating memory region\n"); 213272407Shselasky goto err_map; 214219820Sjeff } 215219820Sjeff if (mlx4_mr_enable(mdev->dev, &mdev->mr)) { 216219820Sjeff mlx4_err(mdev, "Failed enabling memory region\n"); 217219820Sjeff goto err_mr; 218219820Sjeff } 219219820Sjeff 220219820Sjeff /* Build device profile according to supplied module parameters */ 221219820Sjeff err = mlx4_en_get_profile(mdev); 222219820Sjeff if (err) { 223219820Sjeff mlx4_err(mdev, "Bad module parameters, aborting.\n"); 224219820Sjeff goto err_mr; 225219820Sjeff } 226219820Sjeff 227272407Shselasky /* Configure which ports to start according to module parameters */ 228219820Sjeff mdev->port_cnt = 0; 229219820Sjeff mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 230219820Sjeff mdev->port_cnt++; 231219820Sjeff 232272407Shselasky 233219820Sjeff mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 234272407Shselasky if (!dev->caps.comp_pool) { 235272407Shselasky mdev->profile.prof[i].rx_ring_num = 236272407Shselasky rounddown_pow_of_two(max_t(int, MIN_RX_RINGS, 237272407Shselasky min_t(int, 238272407Shselasky dev->caps.num_comp_vectors, 239272407Shselasky DEF_RX_RINGS))); 240272407Shselasky } else { 241272407Shselasky mdev->profile.prof[i].rx_ring_num = rounddown_pow_of_two( 242272407Shselasky min_t(int, dev->caps.comp_pool/ 243272407Shselasky dev->caps.num_ports - 1 , MAX_MSIX_P_PORT - 1)); 244272407Shselasky } 245219820Sjeff } 246219820Sjeff 247219820Sjeff /* Create our own workqueue for reset/multicast tasks 248219820Sjeff * Note: we cannot use the shared workqueue because of deadlocks caused 249219820Sjeff * by the rtnl lock */ 250219820Sjeff mdev->workqueue = create_singlethread_workqueue("mlx4_en"); 251219820Sjeff if (!mdev->workqueue) { 252219820Sjeff err = -ENOMEM; 253219820Sjeff goto err_mr; 254219820Sjeff } 255219820Sjeff 256219820Sjeff /* At this stage all non-port specific tasks are complete: 257219820Sjeff * mark the card state as up */ 258272407Shselasky mutex_init(&mdev->state_lock); 259219820Sjeff mdev->device_up = true; 260219820Sjeff 261219820Sjeff /* Setup ports */ 262219820Sjeff 263219820Sjeff /* Create a netdev for each port */ 264219820Sjeff mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 265219820Sjeff mlx4_info(mdev, "Activating port:%d\n", i); 266272407Shselasky if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i])) 267219820Sjeff mdev->pndev[i] = NULL; 268219820Sjeff } 269272407Shselasky 270219820Sjeff return mdev; 271219820Sjeff 272219820Sjefferr_mr: 273272407Shselasky err = mlx4_mr_free(dev, &mdev->mr); 274272407Shselasky if (err) 275272407Shselasky mlx4_err(mdev, "Error deregistering MR. The system may have become unstable."); 276272407Shselaskyerr_map: 277272407Shselasky if (mdev->uar_map) 278272407Shselasky iounmap(mdev->uar_map); 279219820Sjefferr_uar: 280219820Sjeff mlx4_uar_free(dev, &mdev->priv_uar); 281219820Sjefferr_pd: 282219820Sjeff mlx4_pd_free(dev, mdev->priv_pdn); 283219820Sjefferr_free_dev: 284219820Sjeff kfree(mdev); 285219820Sjefferr_free_res: 286219820Sjeff return NULL; 287219820Sjeff} 288219820Sjeff 289272407Shselaskystatic struct mlx4_interface mlx4_en_interface = { 290272407Shselasky .add = mlx4_en_add, 291272407Shselasky .remove = mlx4_en_remove, 292272407Shselasky .event = mlx4_en_event, 293272407Shselasky .get_dev = mlx4_en_get_netdev, 294272407Shselasky .protocol = MLX4_PROT_ETH, 295272407Shselasky}; 296272407Shselasky 297272407Shselaskystatic void mlx4_en_verify_params(void) 298219820Sjeff{ 299272407Shselasky if (pfctx > MAX_PFC_TX) { 300272407Shselasky pr_warn("mlx4_en: WARNING: illegal module parameter pfctx 0x%x - " 301272407Shselasky "should be in range 0-0x%x, will be changed to default (0)\n", 302272407Shselasky pfctx, MAX_PFC_TX); 303272407Shselasky pfctx = 0; 304272407Shselasky } 305219820Sjeff 306272407Shselasky if (pfcrx > MAX_PFC_RX) { 307272407Shselasky pr_warn("mlx4_en: WARNING: illegal module parameter pfcrx 0x%x - " 308272407Shselasky "should be in range 0-0x%x, will be changed to default (0)\n", 309272407Shselasky pfcrx, MAX_PFC_RX); 310272407Shselasky pfcrx = 0; 311272407Shselasky } 312219820Sjeff} 313219820Sjeff 314219820Sjeff 315219820Sjeffstatic int __init mlx4_en_init(void) 316219820Sjeff{ 317272407Shselasky mlx4_en_verify_params(); 318272407Shselasky 319272407Shselasky#ifdef CONFIG_DEBUG_FS 320272407Shselasky int err = 0; 321272407Shselasky err = mlx4_en_register_debugfs(); 322272407Shselasky if (err) 323272407Shselasky pr_err(KERN_ERR "Failed to register debugfs\n"); 324272407Shselasky#endif 325219820Sjeff return mlx4_register_interface(&mlx4_en_interface); 326219820Sjeff} 327219820Sjeff 328219820Sjeffstatic void __exit mlx4_en_cleanup(void) 329219820Sjeff{ 330219820Sjeff mlx4_unregister_interface(&mlx4_en_interface); 331272407Shselasky#ifdef CONFIG_DEBUG_FS 332272407Shselasky mlx4_en_unregister_debugfs(); 333272407Shselasky#endif 334219820Sjeff} 335219820Sjeff 336219820Sjeffmodule_init(mlx4_en_init); 337219820Sjeffmodule_exit(mlx4_en_cleanup); 338219820Sjeff 339219820Sjeff#undef MODULE_VERSION 340219820Sjeff#include <sys/module.h> 341219820Sjeffstatic int 342219820Sjeffmlxen_evhand(module_t mod, int event, void *arg) 343219820Sjeff{ 344219820Sjeff return (0); 345219820Sjeff} 346219820Sjeffstatic moduledata_t mlxen_mod = { 347219820Sjeff .name = "mlxen", 348219820Sjeff .evhand = mlxen_evhand, 349219820Sjeff}; 350269862ShselaskyDECLARE_MODULE(mlxen, mlxen_mod, SI_SUB_OFED_PREINIT, SI_ORDER_ANY); 351219820SjeffMODULE_DEPEND(mlxen, mlx4, 1, 1, 1); 352