1/*- 2 * Copyright (c) 2003-2009 RMI Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of RMI Corporation, nor the names of its contributors, 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * RMI_BSD 30 * $FreeBSD$ 31 */ 32#ifndef _RMI_BOARD_H_ 33#define _RMI_BOARD_H_ 34 35/* 36 * Engineering boards have a major/minor number in their EEPROM to 37 * identify their configuration 38 */ 39#define RMI_XLR_BOARD_ARIZONA_I 1 40#define RMI_XLR_BOARD_ARIZONA_II 2 41#define RMI_XLR_BOARD_ARIZONA_III 3 42#define RMI_XLR_BOARD_ARIZONA_IV 4 43#define RMI_XLR_BOARD_ARIZONA_V 5 44#define RMI_XLR_BOARD_ARIZONA_VI 6 45#define RMI_XLR_BOARD_ARIZONA_VII 7 46#define RMI_XLR_BOARD_ARIZONA_VIII 8 47#define RMI_XLR_BOARD_ARIZONA_XI 11 48#define RMI_XLR_BOARD_ARIZONA_XII 12 49 50/* 51 * RMI Chips - Values in Processor ID field 52 */ 53#define RMI_CHIP_XLR732 0x00 54#define RMI_CHIP_XLR716 0x02 55#define RMI_CHIP_XLR308 0x06 56#define RMI_CHIP_XLR532 0x09 57 58/* 59 * XLR C revisions 60 */ 61#define RMI_CHIP_XLR308_C 0x0F 62#define RMI_CHIP_XLR508_C 0x0b 63#define RMI_CHIP_XLR516_C 0x0a 64#define RMI_CHIP_XLR532_C 0x08 65 66/* 67 * XLS processors 68 */ 69#define RMI_CHIP_XLS408 0x88 /* Lite "Condor" */ 70#define RMI_CHIP_XLS608 0x80 /* Internal */ 71#define RMI_CHIP_XLS404 0x8c /* Lite "Condor" */ 72#define RMI_CHIP_XLS208 0x8e 73#define RMI_CHIP_XLS204 0x8f 74#define RMI_CHIP_XLS108 0xce 75#define RMI_CHIP_XLS104 0xcf 76 77/* 78 * XLS B revision chips 79 */ 80#define RMI_CHIP_XLS616_B0 0x40 81#define RMI_CHIP_XLS608_B0 0x4a 82#define RMI_CHIP_XLS416_B0 0x44 83#define RMI_CHIP_XLS412_B0 0x4c 84#define RMI_CHIP_XLS408_B0 0x4e 85#define RMI_CHIP_XLS404_B0 0x4f 86 87/* 88 * The XLS product line has chip versions 0x4x and 0x8x 89 */ 90static __inline unsigned int 91xlr_is_xls(void) 92{ 93 uint32_t prid = mips_rd_prid(); 94 95 return ((prid & 0xf000) == 0x8000 || (prid & 0xf000) == 0x4000 || 96 (prid & 0xf000) == 0xc000); 97} 98 99/* 100 * The last byte of the processor id field is revision 101 */ 102static __inline unsigned int 103xlr_revision(void) 104{ 105 106 return (mips_rd_prid() & 0xff); 107} 108 109/* 110 * The 15:8 byte of the PR Id register is the Processor ID 111 */ 112static __inline unsigned int 113xlr_processor_id(void) 114{ 115 116 return ((mips_rd_prid() & 0xff00) >> 8); 117} 118 119/* 120 * The processor is XLR and C-Series 121 */ 122static __inline unsigned int 123xlr_is_c_revision(void) 124{ 125 int processor_id = xlr_processor_id(); 126 int revision_id = xlr_revision(); 127 128 switch (processor_id) { 129 /* 130 * These are the relevant PIDs for XLR 131 * steppings (hawk and above). For these, 132 * PIDs, Rev-Ids of [5-9] indicate 'C'. 133 */ 134 case RMI_CHIP_XLR308_C: 135 case RMI_CHIP_XLR508_C: 136 case RMI_CHIP_XLR516_C: 137 case RMI_CHIP_XLR532_C: 138 case RMI_CHIP_XLR716: 139 case RMI_CHIP_XLR732: 140 if (revision_id >= 5 && revision_id <= 9) 141 return (1); 142 default: 143 return (0); 144 } 145 return (0); 146} 147 148/* 149 * RMI Engineering boards which are PCI cards 150 * These should come up in PCI device mode (not yet) 151 */ 152static __inline int 153xlr_board_pci(int board_major) 154{ 155 156 return ((board_major == RMI_XLR_BOARD_ARIZONA_III) || 157 (board_major == RMI_XLR_BOARD_ARIZONA_V)); 158} 159 160static __inline int 161xlr_is_xls1xx(void) 162{ 163 uint32_t chipid = xlr_processor_id(); 164 165 return (chipid == 0xce || chipid == 0xcf); 166} 167 168static __inline int 169xlr_is_xls2xx(void) 170{ 171 uint32_t chipid = xlr_processor_id(); 172 173 return (chipid == 0x8e || chipid == 0x8f); 174} 175 176static __inline int 177xlr_is_xls4xx_lite(void) 178{ 179 uint32_t chipid = xlr_processor_id(); 180 181 return (chipid == 0x88 || chipid == 0x8c); 182} 183 184static __inline unsigned int 185xlr_is_xls_b0(void) 186{ 187 uint32_t chipid = xlr_processor_id(); 188 189 return (chipid >= 0x40 && chipid <= 0x4f); 190} 191 192/* SPI-4 --> 8 ports, 1G MAC --> 4 ports and 10G MAC --> 1 port */ 193#define MAX_NA_PORTS 8 194 195/* all our knowledge of chip and board that cannot be detected run-time goes here */ 196enum gmac_block_types { XLR_GMAC, XLR_XGMAC, XLR_SPI4}; 197enum gmac_port_types { XLR_RGMII, XLR_SGMII, XLR_PORT0_RGMII, XLR_XGMII, XLR_XAUI }; 198enum i2c_dev_types { I2C_RTC, I2C_THERMAL, I2C_EEPROM }; 199 200struct xlr_board_info { 201 int is_xls; 202 int nr_cpus; 203 int usb; /* usb enabled ? */ 204 int cfi; /* compact flash driver for NOR? */ 205 int ata; /* ata driver */ 206 int pci_irq; 207 struct stn_cc **credit_configs; /* pointer to Core station credits */ 208 struct bucket_size *bucket_sizes; /* pointer to Core station bucket */ 209 int *msgmap; /* mapping of message station to devices */ 210 int gmacports; /* number of gmac ports on the board */ 211 struct xlr_i2c_dev_t { 212 uint32_t addr; 213 unsigned int enabled; /* mask of devs enabled */ 214 int type; 215 int unit; 216 char *dev_name; 217 } xlr_i2c_device[3]; 218 struct xlr_gmac_block_t { /* refers to the set of GMACs controlled by a 219 network accelarator */ 220 int type; /* see enum gmac_block_types */ 221 unsigned int enabled; /* mask of ports enabled */ 222 struct stn_cc *credit_config; /* credit configuration */ 223 int station_id; /* station id for sending msgs */ 224 int station_txbase; /* station id for tx */ 225 int station_rfr; /* free desc bucket */ 226 int mode; /* see gmac_block_modes */ 227 uint32_t baseaddr; /* IO base */ 228 int baseirq; /* first irq for this block, the rest are in sequence */ 229 int baseinst; /* the first rge unit for this block */ 230 int num_ports; 231 struct xlr_gmac_port { 232 int valid; 233 int type; /* see enum gmac_port_types */ 234 uint32_t instance; /* identifies the GMAC to which 235 this port is bound to. */ 236 uint32_t phy_addr; 237 uint32_t base_addr; 238 uint32_t mii_addr; 239 uint32_t pcs_addr; 240 uint32_t serdes_addr; 241 uint32_t tx_bucket_id; 242 uint32_t mdint_id; 243 } gmac_port[MAX_NA_PORTS]; 244 } gmac_block [3]; 245}; 246 247extern struct xlr_board_info xlr_board_info; 248int xlr_board_info_setup(void); 249 250#endif 251