board.c revision 202175
1/********************************************************************* 2 * 3 * Copyright 2003-2006 Raza Microelectronics, Inc. (RMI). All rights 4 * reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Raza Microelectronics, Inc. ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RMI OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES, LOSS OF USE, DATA, OR PROFITS, OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * *****************************RMI_2**********************************/ 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/lock.h> 35#include <sys/mutex.h> 36 37#include <machine/cpufunc.h> 38#include <mips/rmi/msgring.h> 39#include <mips/rmi/board.h> 40#include <mips/rmi/pic.h> 41#include <mips/rmi/shared_structs.h> 42 43static int xlr_rxstn_to_txstn_map[128] = { 44 [0 ... 7] = TX_STN_CPU_0, 45 [8 ... 15] = TX_STN_CPU_1, 46 [16 ... 23] = TX_STN_CPU_2, 47 [24 ... 31] = TX_STN_CPU_3, 48 [32 ... 39] = TX_STN_CPU_4, 49 [40 ... 47] = TX_STN_CPU_5, 50 [48 ... 55] = TX_STN_CPU_6, 51 [56 ... 63] = TX_STN_CPU_7, 52 [64 ... 95] = TX_STN_INVALID, 53 [96 ... 103] = TX_STN_GMAC, 54 [104 ... 107] = TX_STN_DMA, 55 [108 ... 111] = TX_STN_INVALID, 56 [112 ... 113] = TX_STN_XGS_0, 57 [114 ... 115] = TX_STN_XGS_1, 58 [116 ... 119] = TX_STN_INVALID, 59 [120 ... 127] = TX_STN_SAE 60}; 61 62static int xls_rxstn_to_txstn_map[128] = { 63 [0 ... 7] = TX_STN_CPU_0, 64 [8 ... 15] = TX_STN_CPU_1, 65 [16 ... 23] = TX_STN_CPU_2, 66 [24 ... 31] = TX_STN_CPU_3, 67 [32 ... 63] = TX_STN_INVALID, 68 [64 ... 71] = TX_STN_PCIE, 69 [72 ... 79] = TX_STN_INVALID, 70 [80 ... 87] = TX_STN_GMAC1, 71 [88 ... 95] = TX_STN_INVALID, 72 [96 ... 103] = TX_STN_GMAC0, 73 [104 ... 107] = TX_STN_DMA, 74 [108 ... 111] = TX_STN_CDE, 75 [112 ... 119] = TX_STN_INVALID, 76 [120 ... 127] = TX_STN_SAE 77}; 78 79struct stn_cc *xlr_core_cc_configs[] = {&cc_table_cpu_0, &cc_table_cpu_1, 80 &cc_table_cpu_2, &cc_table_cpu_3, 81 &cc_table_cpu_4, &cc_table_cpu_5, 82&cc_table_cpu_6, &cc_table_cpu_7}; 83 84struct stn_cc *xls_core_cc_configs[] = {&xls_cc_table_cpu_0, &xls_cc_table_cpu_1, 85&xls_cc_table_cpu_2, &xls_cc_table_cpu_3}; 86 87struct xlr_board_info xlr_board_info; 88 89/* 90 * All our knowledge of chip and board that cannot be detected by probing 91 * at run-time goes here 92 */ 93int 94xlr_board_info_setup() 95{ 96 if (xlr_is_xls()) { 97 xlr_board_info.is_xls = 1; 98 xlr_board_info.nr_cpus = 8; 99 xlr_board_info.usb = 1; 100 xlr_board_info.cfi = 101 (xlr_boot1_info.board_major_version != RMI_XLR_BOARD_ARIZONA_VIII); 102 xlr_board_info.pci_irq = 0; 103 xlr_board_info.credit_configs = xls_core_cc_configs; 104 xlr_board_info.bucket_sizes = &xls_bucket_sizes; 105 xlr_board_info.msgmap = xls_rxstn_to_txstn_map; 106 xlr_board_info.gmacports = 8; 107 108 /* network block 0 */ 109 xlr_board_info.gmac_block[0].type = XLR_GMAC; 110 xlr_board_info.gmac_block[0].enabled = 0xf; 111 xlr_board_info.gmac_block[0].credit_config = &xls_cc_table_gmac0; 112 xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0; 113 xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0; 114 if (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VI) 115 xlr_board_info.gmac_block[0].mode = XLR_PORT0_RGMII; 116 else 117 xlr_board_info.gmac_block[0].mode = XLR_SGMII; 118 xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET; 119 xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ; 120 xlr_board_info.gmac_block[0].baseinst = 0; 121 122 /* network block 1 */ 123 xlr_board_info.gmac_block[1].type = XLR_GMAC; 124 xlr_board_info.gmac_block[1].enabled = 0xf; 125 xlr_board_info.gmac_block[1].credit_config = &xls_cc_table_gmac1; 126 xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_GMAC1_TX0; 127 xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_GMAC1_FR_0; 128 xlr_board_info.gmac_block[1].mode = XLR_SGMII; 129 xlr_board_info.gmac_block[1].baseaddr = XLR_IO_GMAC_4_OFFSET; 130 xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ; 131 xlr_board_info.gmac_block[1].baseinst = 4; 132 133 /* network block 2 */ 134 xlr_board_info.gmac_block[2].enabled = 0; /* disabled on XLS */ 135 } else { 136 xlr_board_info.is_xls = 0; 137 xlr_board_info.nr_cpus = 32; 138 xlr_board_info.usb = 0; 139 xlr_board_info.cfi = 1; 140 xlr_board_info.pci_irq = 0; 141 xlr_board_info.credit_configs = xlr_core_cc_configs; 142 xlr_board_info.bucket_sizes = &bucket_sizes; 143 xlr_board_info.msgmap = xlr_rxstn_to_txstn_map; 144 xlr_board_info.gmacports = 4; 145 146 /* GMAC0 */ 147 xlr_board_info.gmac_block[0].type = XLR_GMAC; 148 xlr_board_info.gmac_block[0].enabled = 0xf; 149 xlr_board_info.gmac_block[0].credit_config = &cc_table_gmac; 150 xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0; 151 xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0; 152 xlr_board_info.gmac_block[0].mode = XLR_RGMII; 153 xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET; 154 xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ; 155 xlr_board_info.gmac_block[0].baseinst = 0; 156 157 /* XGMAC0 */ 158 xlr_board_info.gmac_block[1].type = XLR_XGMAC; 159 xlr_board_info.gmac_block[1].enabled = 1; 160 xlr_board_info.gmac_block[1].credit_config = &cc_table_xgs_0; 161 xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_XGS0_TX; 162 xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_XGS0FR; 163 xlr_board_info.gmac_block[1].mode = -1; 164 xlr_board_info.gmac_block[1].baseaddr = XLR_IO_XGMAC_0_OFFSET; 165 xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ; 166 xlr_board_info.gmac_block[1].baseinst = 4; 167 168 /* XGMAC1 */ 169 xlr_board_info.gmac_block[2].type = XLR_XGMAC; 170 xlr_board_info.gmac_block[2].enabled = 1; 171 xlr_board_info.gmac_block[2].credit_config = &cc_table_xgs_1; 172 xlr_board_info.gmac_block[2].station_txbase = MSGRNG_STNID_XGS1_TX; 173 xlr_board_info.gmac_block[2].station_rfr = MSGRNG_STNID_XGS1FR; 174 xlr_board_info.gmac_block[2].mode = -1; 175 xlr_board_info.gmac_block[2].baseaddr = XLR_IO_XGMAC_1_OFFSET; 176 xlr_board_info.gmac_block[2].baseirq = PIC_XGS_1_IRQ; 177 xlr_board_info.gmac_block[2].baseinst = 5; 178 } 179 return 0; 180} 181