__divdi3.S revision 66633
166633Sdfr.file "__divdi3.s"
266633Sdfr
366633Sdfr// $FreeBSD: head/sys/libkern/ia64/__divdi3.S 66633 2000-10-04 17:53:03Z dfr $
466633Sdfr//
566633Sdfr// Copyright (c) 2000, Intel Corporation
666633Sdfr// All rights reserved.
766633Sdfr//
866633Sdfr// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
966633Sdfr// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
1066633Sdfr// Intel Corporation.
1166633Sdfr//
1266633Sdfr// WARRANTY DISCLAIMER
1366633Sdfr//
1466633Sdfr// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1566633Sdfr// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1666633Sdfr// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1766633Sdfr// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
1866633Sdfr// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
1966633Sdfr// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
2066633Sdfr// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
2166633Sdfr// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
2266633Sdfr// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
2366633Sdfr// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2466633Sdfr// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2566633Sdfr//
2666633Sdfr// Intel Corporation is the author of this code, and requests that all
2766633Sdfr// problem reports or change requests be submitted to it directly at
2866633Sdfr// http://developer.intel.com/opensource.
2966633Sdfr//
3066633Sdfr
3166633Sdfr.section .text
3266633Sdfr.proc __divdi3#
3366633Sdfr.align 32
3466633Sdfr.global __divdi3#
3566633Sdfr.align 32
3666633Sdfr
3766633Sdfr// 64-bit signed integer divide
3866633Sdfr
3966633Sdfr__divdi3:
4066633Sdfr
4166633Sdfr{ .mii
4266633Sdfr  alloc r31=ar.pfs,2,0,0,0
4366633Sdfr  nop.i 0
4466633Sdfr  nop.i 0;;
4566633Sdfr} { .mmi
4666633Sdfr
4766633Sdfr  // 64-BIT SIGNED INTEGER DIVIDE BEGINS HERE
4866633Sdfr
4966633Sdfr  setf.sig f8=r32
5066633Sdfr  setf.sig f9=r33
5166633Sdfr  nop.i 0;;
5266633Sdfr} { .mfb
5366633Sdfr  nop.m 0
5466633Sdfr  fcvt.xf f6=f8
5566633Sdfr  nop.b 0
5666633Sdfr} { .mfb
5766633Sdfr  nop.m 0
5866633Sdfr  fcvt.xf f7=f9
5966633Sdfr  nop.b 0;;
6066633Sdfr} { .mfi
6166633Sdfr  nop.m 0
6266633Sdfr  // Step (1)
6366633Sdfr  // y0 = 1 / b in f8
6466633Sdfr  frcpa.s1 f8,p6=f6,f7
6566633Sdfr  nop.i 0;;
6666633Sdfr} { .mfi
6766633Sdfr  nop.m 0
6866633Sdfr  // Step (2)
6966633Sdfr  // e0 = 1 - b * y0 in f9
7066633Sdfr  (p6) fnma.s1 f9=f7,f8,f1
7166633Sdfr  nop.i 0
7266633Sdfr} { .mfi
7366633Sdfr  nop.m 0
7466633Sdfr  // Step (3)
7566633Sdfr  // q0 = a * y0 in f10
7666633Sdfr  (p6) fma.s1 f10=f6,f8,f0
7766633Sdfr  nop.i 0;;
7866633Sdfr} { .mfi
7966633Sdfr  nop.m 0
8066633Sdfr  // Step (4)
8166633Sdfr  // e1 = e0 * e0 in f11
8266633Sdfr  (p6) fma.s1 f11=f9,f9,f0
8366633Sdfr  nop.i 0
8466633Sdfr} { .mfi
8566633Sdfr  nop.m 0
8666633Sdfr  // Step (5)
8766633Sdfr  // q1 = q0 + e0 * q0 in f10
8866633Sdfr  (p6) fma.s1 f10=f9,f10,f10
8966633Sdfr  nop.i 0;;
9066633Sdfr} { .mfi
9166633Sdfr  nop.m 0
9266633Sdfr  // Step (6)
9366633Sdfr  // y1 = y0 + e0 * y0 in f8
9466633Sdfr  (p6) fma.s1 f8=f9,f8,f8
9566633Sdfr  nop.i 0;;
9666633Sdfr} { .mfi
9766633Sdfr  nop.m 0
9866633Sdfr  // Step (7)
9966633Sdfr  // q2 = q1 + e1 * q1 in f9
10066633Sdfr  (p6) fma.s1 f9=f11,f10,f10
10166633Sdfr  nop.i 0;;
10266633Sdfr} { .mfi
10366633Sdfr  nop.m 0
10466633Sdfr  // Step (8)
10566633Sdfr  // y2 = y1 + e1 * y1 in f8
10666633Sdfr  (p6) fma.s1 f8=f11,f8,f8
10766633Sdfr  nop.i 0;;
10866633Sdfr} { .mfi
10966633Sdfr  nop.m 0
11066633Sdfr  // Step (9)
11166633Sdfr  // r2 = a - b * q2 in f10
11266633Sdfr  (p6) fnma.s1 f10=f7,f9,f6
11366633Sdfr  nop.i 0;;
11466633Sdfr} { .mfi
11566633Sdfr  nop.m 0
11666633Sdfr  // Step (10)
11766633Sdfr  // q3 = q2 + r2 * y2 in f8
11866633Sdfr  (p6) fma.s1 f8=f10,f8,f9
11966633Sdfr  nop.i 0;;
12066633Sdfr} { .mfb
12166633Sdfr  nop.m 0
12266633Sdfr  // Step (11)
12366633Sdfr  // q = trunc (q3)
12466633Sdfr  fcvt.fx.trunc.s1 f8=f8
12566633Sdfr  nop.b 0;;
12666633Sdfr} { .mmi
12766633Sdfr  // quotient will be in r8 (if b != 0)
12866633Sdfr  getf.sig r8=f8
12966633Sdfr  nop.m 0
13066633Sdfr  nop.i 0;;
13166633Sdfr}
13266633Sdfr
13366633Sdfr  // 64-BIT SIGNED INTEGER DIVIDE ENDS HERE
13466633Sdfr
13566633Sdfr{ .mmb
13666633Sdfr  nop.m 0
13766633Sdfr  nop.m 0
13866633Sdfr  br.ret.sptk b0;;
13966633Sdfr}
14066633Sdfr
14166633Sdfr.endp __divdi3
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