pmap.c revision 202628
1169691Skan/*- 297403Sobrien * Copyright (c) 1991 Regents of the University of California. 3169691Skan * All rights reserved. 4169691Skan * Copyright (c) 1994 John S. Dyson 597403Sobrien * All rights reserved. 697403Sobrien * Copyright (c) 1994 David Greenman 797403Sobrien * All rights reserved. 897403Sobrien * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 997403Sobrien * All rights reserved. 1097403Sobrien * 1197403Sobrien * This code is derived from software contributed to Berkeley by 1297403Sobrien * the Systems Programming Group of the University of Utah Computer 1397403Sobrien * Science Department and William Jolitz of UUNET Technologies Inc. 1497403Sobrien * 1597403Sobrien * Redistribution and use in source and binary forms, with or without 1697403Sobrien * modification, are permitted provided that the following conditions 1797403Sobrien * are met: 1897403Sobrien * 1. Redistributions of source code must retain the above copyright 19169691Skan * notice, this list of conditions and the following disclaimer. 2097403Sobrien * 2. Redistributions in binary form must reproduce the above copyright 2197403Sobrien * notice, this list of conditions and the following disclaimer in the 2297403Sobrien * documentation and/or other materials provided with the distribution. 2397403Sobrien * 3. All advertising materials mentioning features or use of this software 2497403Sobrien * must display the following acknowledgement: 2597403Sobrien * This product includes software developed by the University of 2697403Sobrien * California, Berkeley and its contributors. 2797403Sobrien * 4. Neither the name of the University nor the names of its contributors 2897403Sobrien * may be used to endorse or promote products derived from this software 2997403Sobrien * without specific prior written permission. 3097403Sobrien * 31169691Skan * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32169691Skan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33169691Skan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34169691Skan * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35169691Skan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 3697403Sobrien * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3797403Sobrien * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38132720Skan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39132720Skan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 4097403Sobrien * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 4197403Sobrien * SUCH DAMAGE. 4297403Sobrien * 4397403Sobrien * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 4497403Sobrien */ 45169691Skan/*- 46169691Skan * Copyright (c) 2003 Networks Associates Technology, Inc. 4797403Sobrien * All rights reserved. 4897403Sobrien * 49132720Skan * This software was developed for the FreeBSD Project by Jake Burkholder, 5097403Sobrien * Safeport Network Services, and Network Associates Laboratories, the 5197403Sobrien * Security Research Division of Network Associates, Inc. under 52169691Skan * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 5397403Sobrien * CHATS research program. 54132720Skan * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/xen/pmap.c 202628 2010-01-19 15:31:18Z ed $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#define PMAP_DIAGNOSTIC 107 108#include "opt_cpu.h" 109#include "opt_pmap.h" 110#include "opt_msgbuf.h" 111#include "opt_smp.h" 112#include "opt_xbox.h" 113 114#include <sys/param.h> 115#include <sys/systm.h> 116#include <sys/kernel.h> 117#include <sys/ktr.h> 118#include <sys/lock.h> 119#include <sys/malloc.h> 120#include <sys/mman.h> 121#include <sys/msgbuf.h> 122#include <sys/mutex.h> 123#include <sys/proc.h> 124#include <sys/sf_buf.h> 125#include <sys/sx.h> 126#include <sys/vmmeter.h> 127#include <sys/sched.h> 128#include <sys/sysctl.h> 129#ifdef SMP 130#include <sys/smp.h> 131#endif 132 133#include <vm/vm.h> 134#include <vm/vm_param.h> 135#include <vm/vm_kern.h> 136#include <vm/vm_page.h> 137#include <vm/vm_map.h> 138#include <vm/vm_object.h> 139#include <vm/vm_extern.h> 140#include <vm/vm_pageout.h> 141#include <vm/vm_pager.h> 142#include <vm/uma.h> 143 144#include <machine/cpu.h> 145#include <machine/cputypes.h> 146#include <machine/md_var.h> 147#include <machine/pcb.h> 148#include <machine/specialreg.h> 149#ifdef SMP 150#include <machine/smp.h> 151#endif 152 153#ifdef XBOX 154#include <machine/xbox.h> 155#endif 156 157#include <xen/interface/xen.h> 158#include <xen/hypervisor.h> 159#include <machine/xen/hypercall.h> 160#include <machine/xen/xenvar.h> 161#include <machine/xen/xenfunc.h> 162 163#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 164#define CPU_ENABLE_SSE 165#endif 166 167#ifndef PMAP_SHPGPERPROC 168#define PMAP_SHPGPERPROC 200 169#endif 170 171#if defined(DIAGNOSTIC) 172#define PMAP_DIAGNOSTIC 173#endif 174 175#if !defined(PMAP_DIAGNOSTIC) 176#define PMAP_INLINE extern inline 177#else 178#define PMAP_INLINE 179#endif 180 181#define PV_STATS 182#ifdef PV_STATS 183#define PV_STAT(x) do { x ; } while (0) 184#else 185#define PV_STAT(x) do { } while (0) 186#endif 187 188#define pa_index(pa) ((pa) >> PDRSHIFT) 189#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 190 191/* 192 * Get PDEs and PTEs for user/kernel address space 193 */ 194#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 195#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 196 197#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 198#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 199#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 200#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 201#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 202 203#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 204 205struct pmap kernel_pmap_store; 206LIST_HEAD(pmaplist, pmap); 207static struct pmaplist allpmaps; 208static struct mtx allpmaps_lock; 209 210vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 211vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 212int pgeflag = 0; /* PG_G or-in */ 213int pseflag = 0; /* PG_PS or-in */ 214 215int nkpt; 216vm_offset_t kernel_vm_end; 217extern u_int32_t KERNend; 218 219#ifdef PAE 220pt_entry_t pg_nx; 221#if !defined(XEN) 222static uma_zone_t pdptzone; 223#endif 224#endif 225 226static int pat_works; /* Is page attribute table sane? */ 227 228/* 229 * Data for the pv entry allocation mechanism 230 */ 231static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 232static struct md_page *pv_table; 233static int shpgperproc = PMAP_SHPGPERPROC; 234 235struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 236int pv_maxchunks; /* How many chunks we have KVA for */ 237vm_offset_t pv_vafree; /* freelist stored in the PTE */ 238 239/* 240 * All those kernel PT submaps that BSD is so fond of 241 */ 242struct sysmaps { 243 struct mtx lock; 244 pt_entry_t *CMAP1; 245 pt_entry_t *CMAP2; 246 caddr_t CADDR1; 247 caddr_t CADDR2; 248}; 249static struct sysmaps sysmaps_pcpu[MAXCPU]; 250pt_entry_t *CMAP1 = 0; 251static pt_entry_t *CMAP3; 252caddr_t CADDR1 = 0, ptvmmap = 0; 253static caddr_t CADDR3; 254struct msgbuf *msgbufp = 0; 255 256/* 257 * Crashdump maps. 258 */ 259static caddr_t crashdumpmap; 260 261static pt_entry_t *PMAP1 = 0, *PMAP2; 262static pt_entry_t *PADDR1 = 0, *PADDR2; 263#ifdef SMP 264static int PMAP1cpu; 265static int PMAP1changedcpu; 266SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 267 &PMAP1changedcpu, 0, 268 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 269#endif 270static int PMAP1changed; 271SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 272 &PMAP1changed, 0, 273 "Number of times pmap_pte_quick changed PMAP1"); 274static int PMAP1unchanged; 275SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 276 &PMAP1unchanged, 0, 277 "Number of times pmap_pte_quick didn't change PMAP1"); 278static struct mtx PMAP2mutex; 279 280SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 281static int pg_ps_enabled; 282SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0, 283 "Are large page mappings enabled?"); 284 285SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 286 "Max number of PV entries"); 287SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 288 "Page share factor per proc"); 289 290static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 291static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 292 293static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 294 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 295static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 296 vm_page_t *free); 297static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 298 vm_page_t *free); 299static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 300 vm_offset_t va); 301static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 302static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 303 vm_page_t m); 304 305static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 306 307static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 308static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 309static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 310static void pmap_pte_release(pt_entry_t *pte); 311static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 312static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 313static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 314static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 315 316static __inline void pagezero(void *page); 317 318#if defined(PAE) && !defined(XEN) 319static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 320#endif 321#ifndef XEN 322static void pmap_set_pg(void); 323#endif 324 325CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 326CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 327 328/* 329 * If you get an error here, then you set KVA_PAGES wrong! See the 330 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 331 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 332 */ 333CTASSERT(KERNBASE % (1 << 24) == 0); 334 335 336 337void 338pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 339{ 340 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 341 342 switch (type) { 343 case SH_PD_SET_VA: 344#if 0 345 xen_queue_pt_update(shadow_pdir_ma, 346 xpmap_ptom(val & ~(PG_RW))); 347#endif 348 xen_queue_pt_update(pdir_ma, 349 xpmap_ptom(val)); 350 break; 351 case SH_PD_SET_VA_MA: 352#if 0 353 xen_queue_pt_update(shadow_pdir_ma, 354 val & ~(PG_RW)); 355#endif 356 xen_queue_pt_update(pdir_ma, val); 357 break; 358 case SH_PD_SET_VA_CLEAR: 359#if 0 360 xen_queue_pt_update(shadow_pdir_ma, 0); 361#endif 362 xen_queue_pt_update(pdir_ma, 0); 363 break; 364 } 365} 366 367/* 368 * Move the kernel virtual free pointer to the next 369 * 4MB. This is used to help improve performance 370 * by using a large (4MB) page for much of the kernel 371 * (.text, .data, .bss) 372 */ 373static vm_offset_t 374pmap_kmem_choose(vm_offset_t addr) 375{ 376 vm_offset_t newaddr = addr; 377 378#ifndef DISABLE_PSE 379 if (cpu_feature & CPUID_PSE) 380 newaddr = (addr + PDRMASK) & ~PDRMASK; 381#endif 382 return newaddr; 383} 384 385/* 386 * Bootstrap the system enough to run with virtual memory. 387 * 388 * On the i386 this is called after mapping has already been enabled 389 * and just syncs the pmap module with what has already been done. 390 * [We can't call it easily with mapping off since the kernel is not 391 * mapped with PA == VA, hence we would have to relocate every address 392 * from the linked base (virtual) address "KERNBASE" to the actual 393 * (physical) address starting relative to 0] 394 */ 395void 396pmap_bootstrap(vm_paddr_t firstaddr) 397{ 398 vm_offset_t va; 399 pt_entry_t *pte, *unused; 400 struct sysmaps *sysmaps; 401 int i; 402 403 /* 404 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 405 * large. It should instead be correctly calculated in locore.s and 406 * not based on 'first' (which is a physical address, not a virtual 407 * address, for the start of unused physical memory). The kernel 408 * page tables are NOT double mapped and thus should not be included 409 * in this calculation. 410 */ 411 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 412 virtual_avail = pmap_kmem_choose(virtual_avail); 413 414 virtual_end = VM_MAX_KERNEL_ADDRESS; 415 416 /* 417 * Initialize the kernel pmap (which is statically allocated). 418 */ 419 PMAP_LOCK_INIT(kernel_pmap); 420 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 421#ifdef PAE 422 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 423#endif 424 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 425 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 426 LIST_INIT(&allpmaps); 427 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 428 mtx_lock_spin(&allpmaps_lock); 429 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 430 mtx_unlock_spin(&allpmaps_lock); 431 if (nkpt == 0) 432 nkpt = NKPT; 433 434 /* 435 * Reserve some special page table entries/VA space for temporary 436 * mapping of pages. 437 */ 438#define SYSMAP(c, p, v, n) \ 439 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 440 441 va = virtual_avail; 442 pte = vtopte(va); 443 444 /* 445 * CMAP1/CMAP2 are used for zeroing and copying pages. 446 * CMAP3 is used for the idle process page zeroing. 447 */ 448 for (i = 0; i < MAXCPU; i++) { 449 sysmaps = &sysmaps_pcpu[i]; 450 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 451 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 452 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 453 } 454 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 455 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 456 PT_SET_MA(CADDR3, 0); 457 458 /* 459 * Crashdump maps. 460 */ 461 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 462 463 /* 464 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 465 */ 466 SYSMAP(caddr_t, unused, ptvmmap, 1) 467 468 /* 469 * msgbufp is used to map the system message buffer. 470 */ 471 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 472 473 /* 474 * ptemap is used for pmap_pte_quick 475 */ 476 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 477 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 478 479 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 480 481 virtual_avail = va; 482 PT_SET_MA(CADDR1, 0); 483 484 /* 485 * Leave in place an identity mapping (virt == phys) for the low 1 MB 486 * physical memory region that is used by the ACPI wakeup code. This 487 * mapping must not have PG_G set. 488 */ 489#ifndef XEN 490 /* 491 * leave here deliberately to show that this is not supported 492 */ 493#ifdef XBOX 494 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 495 * an early stadium, we cannot yet neatly map video memory ... :-( 496 * Better fixes are very welcome! */ 497 if (!arch_i386_is_xbox) 498#endif 499 for (i = 1; i < NKPT; i++) 500 PTD[i] = 0; 501 502 /* Initialize the PAT MSR if present. */ 503 pmap_init_pat(); 504 505 /* Turn on PG_G on kernel page(s) */ 506 pmap_set_pg(); 507#endif 508} 509 510/* 511 * Setup the PAT MSR. 512 */ 513void 514pmap_init_pat(void) 515{ 516 uint64_t pat_msr; 517 518 /* Bail if this CPU doesn't implement PAT. */ 519 if (!(cpu_feature & CPUID_PAT)) 520 return; 521 522 if (cpu_vendor_id != CPU_VENDOR_INTEL || 523 (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) { 524 /* 525 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 526 * Program 4 and 5 as WP and WC. 527 * Leave 6 and 7 as UC and UC-. 528 */ 529 pat_msr = rdmsr(MSR_PAT); 530 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 531 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 532 PAT_VALUE(5, PAT_WRITE_COMBINING); 533 pat_works = 1; 534 } else { 535 /* 536 * Due to some Intel errata, we can only safely use the lower 4 537 * PAT entries. Thus, just replace PAT Index 2 with WC instead 538 * of UC-. 539 * 540 * Intel Pentium III Processor Specification Update 541 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 542 * or Mode C Paging) 543 * 544 * Intel Pentium IV Processor Specification Update 545 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 546 */ 547 pat_msr = rdmsr(MSR_PAT); 548 pat_msr &= ~PAT_MASK(2); 549 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 550 pat_works = 0; 551 } 552 wrmsr(MSR_PAT, pat_msr); 553} 554 555#ifndef XEN 556/* 557 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 558 */ 559static void 560pmap_set_pg(void) 561{ 562 pd_entry_t pdir; 563 pt_entry_t *pte; 564 vm_offset_t va, endva; 565 int i; 566 567 if (pgeflag == 0) 568 return; 569 570 i = KERNLOAD/NBPDR; 571 endva = KERNBASE + KERNend; 572 573 if (pseflag) { 574 va = KERNBASE + KERNLOAD; 575 while (va < endva) { 576 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 577 pdir |= pgeflag; 578 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 579 invltlb(); /* Play it safe, invltlb() every time */ 580 i++; 581 va += NBPDR; 582 } 583 } else { 584 va = (vm_offset_t)btext; 585 while (va < endva) { 586 pte = vtopte(va); 587 if (*pte & PG_V) 588 *pte |= pgeflag; 589 invltlb(); /* Play it safe, invltlb() every time */ 590 va += PAGE_SIZE; 591 } 592 } 593} 594#endif 595 596/* 597 * Initialize a vm_page's machine-dependent fields. 598 */ 599void 600pmap_page_init(vm_page_t m) 601{ 602 603 TAILQ_INIT(&m->md.pv_list); 604 m->md.pat_mode = PAT_WRITE_BACK; 605} 606 607#if defined(PAE) && !defined(XEN) 608static void * 609pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 610{ 611 612 /* Inform UMA that this allocator uses kernel_map/object. */ 613 *flags = UMA_SLAB_KERNEL; 614 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL, 615 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT)); 616} 617#endif 618 619/* 620 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 621 * Requirements: 622 * - Must deal with pages in order to ensure that none of the PG_* bits 623 * are ever set, PG_V in particular. 624 * - Assumes we can write to ptes without pte_store() atomic ops, even 625 * on PAE systems. This should be ok. 626 * - Assumes nothing will ever test these addresses for 0 to indicate 627 * no mapping instead of correctly checking PG_V. 628 * - Assumes a vm_offset_t will fit in a pte (true for i386). 629 * Because PG_V is never set, there can be no mappings to invalidate. 630 */ 631static int ptelist_count = 0; 632static vm_offset_t 633pmap_ptelist_alloc(vm_offset_t *head) 634{ 635 vm_offset_t va; 636 vm_offset_t *phead = (vm_offset_t *)*head; 637 638 if (ptelist_count == 0) { 639 printf("out of memory!!!!!!\n"); 640 return (0); /* Out of memory */ 641 } 642 ptelist_count--; 643 va = phead[ptelist_count]; 644 return (va); 645} 646 647static void 648pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 649{ 650 vm_offset_t *phead = (vm_offset_t *)*head; 651 652 phead[ptelist_count++] = va; 653} 654 655static void 656pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 657{ 658 int i, nstackpages; 659 vm_offset_t va; 660 vm_page_t m; 661 662 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 663 for (i = 0; i < nstackpages; i++) { 664 va = (vm_offset_t)base + i * PAGE_SIZE; 665 m = vm_page_alloc(NULL, i, 666 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 667 VM_ALLOC_ZERO); 668 pmap_qenter(va, &m, 1); 669 } 670 671 *head = (vm_offset_t)base; 672 for (i = npages - 1; i >= nstackpages; i--) { 673 va = (vm_offset_t)base + i * PAGE_SIZE; 674 pmap_ptelist_free(head, va); 675 } 676} 677 678 679/* 680 * Initialize the pmap module. 681 * Called by vm_init, to initialize any structures that the pmap 682 * system needs to map virtual memory. 683 */ 684void 685pmap_init(void) 686{ 687 vm_page_t mpte; 688 vm_size_t s; 689 int i, pv_npg; 690 691 /* 692 * Initialize the vm page array entries for the kernel pmap's 693 * page table pages. 694 */ 695 for (i = 0; i < nkpt; i++) { 696 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME)); 697 KASSERT(mpte >= vm_page_array && 698 mpte < &vm_page_array[vm_page_array_size], 699 ("pmap_init: page table page is out of range")); 700 mpte->pindex = i + KPTDI; 701 mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME); 702 } 703 704 /* 705 * Initialize the address space (zone) for the pv entries. Set a 706 * high water mark so that the system can recover from excessive 707 * numbers of pv entries. 708 */ 709 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 710 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 711 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 712 pv_entry_max = roundup(pv_entry_max, _NPCPV); 713 pv_entry_high_water = 9 * (pv_entry_max / 10); 714 715 /* 716 * Are large page mappings enabled? 717 */ 718 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 719 720 /* 721 * Calculate the size of the pv head table for superpages. 722 */ 723 for (i = 0; phys_avail[i + 1]; i += 2); 724 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 725 726 /* 727 * Allocate memory for the pv head table for superpages. 728 */ 729 s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 730 s = round_page(s); 731 pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 732 for (i = 0; i < pv_npg; i++) 733 TAILQ_INIT(&pv_table[i].pv_list); 734 735 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 736 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 737 PAGE_SIZE * pv_maxchunks); 738 if (pv_chunkbase == NULL) 739 panic("pmap_init: not enough kvm for pv chunks"); 740 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 741#if defined(PAE) && !defined(XEN) 742 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 743 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 744 UMA_ZONE_VM | UMA_ZONE_NOFREE); 745 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 746#endif 747} 748 749 750/*************************************************** 751 * Low level helper routines..... 752 ***************************************************/ 753 754/* 755 * Determine the appropriate bits to set in a PTE or PDE for a specified 756 * caching mode. 757 */ 758int 759pmap_cache_bits(int mode, boolean_t is_pde) 760{ 761 int pat_flag, pat_index, cache_bits; 762 763 /* The PAT bit is different for PTE's and PDE's. */ 764 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 765 766 /* If we don't support PAT, map extended modes to older ones. */ 767 if (!(cpu_feature & CPUID_PAT)) { 768 switch (mode) { 769 case PAT_UNCACHEABLE: 770 case PAT_WRITE_THROUGH: 771 case PAT_WRITE_BACK: 772 break; 773 case PAT_UNCACHED: 774 case PAT_WRITE_COMBINING: 775 case PAT_WRITE_PROTECTED: 776 mode = PAT_UNCACHEABLE; 777 break; 778 } 779 } 780 781 /* Map the caching mode to a PAT index. */ 782 if (pat_works) { 783 switch (mode) { 784 case PAT_UNCACHEABLE: 785 pat_index = 3; 786 break; 787 case PAT_WRITE_THROUGH: 788 pat_index = 1; 789 break; 790 case PAT_WRITE_BACK: 791 pat_index = 0; 792 break; 793 case PAT_UNCACHED: 794 pat_index = 2; 795 break; 796 case PAT_WRITE_COMBINING: 797 pat_index = 5; 798 break; 799 case PAT_WRITE_PROTECTED: 800 pat_index = 4; 801 break; 802 default: 803 panic("Unknown caching mode %d\n", mode); 804 } 805 } else { 806 switch (mode) { 807 case PAT_UNCACHED: 808 case PAT_UNCACHEABLE: 809 case PAT_WRITE_PROTECTED: 810 pat_index = 3; 811 break; 812 case PAT_WRITE_THROUGH: 813 pat_index = 1; 814 break; 815 case PAT_WRITE_BACK: 816 pat_index = 0; 817 break; 818 case PAT_WRITE_COMBINING: 819 pat_index = 2; 820 break; 821 default: 822 panic("Unknown caching mode %d\n", mode); 823 } 824 } 825 826 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 827 cache_bits = 0; 828 if (pat_index & 0x4) 829 cache_bits |= pat_flag; 830 if (pat_index & 0x2) 831 cache_bits |= PG_NC_PCD; 832 if (pat_index & 0x1) 833 cache_bits |= PG_NC_PWT; 834 return (cache_bits); 835} 836#ifdef SMP 837/* 838 * For SMP, these functions have to use the IPI mechanism for coherence. 839 * 840 * N.B.: Before calling any of the following TLB invalidation functions, 841 * the calling processor must ensure that all stores updating a non- 842 * kernel page table are globally performed. Otherwise, another 843 * processor could cache an old, pre-update entry without being 844 * invalidated. This can happen one of two ways: (1) The pmap becomes 845 * active on another processor after its pm_active field is checked by 846 * one of the following functions but before a store updating the page 847 * table is globally performed. (2) The pmap becomes active on another 848 * processor before its pm_active field is checked but due to 849 * speculative loads one of the following functions stills reads the 850 * pmap as inactive on the other processor. 851 * 852 * The kernel page table is exempt because its pm_active field is 853 * immutable. The kernel page table is always active on every 854 * processor. 855 */ 856void 857pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 858{ 859 u_int cpumask; 860 u_int other_cpus; 861 862 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 863 pmap, va); 864 865 sched_pin(); 866 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 867 invlpg(va); 868 smp_invlpg(va); 869 } else { 870 cpumask = PCPU_GET(cpumask); 871 other_cpus = PCPU_GET(other_cpus); 872 if (pmap->pm_active & cpumask) 873 invlpg(va); 874 if (pmap->pm_active & other_cpus) 875 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 876 } 877 sched_unpin(); 878 PT_UPDATES_FLUSH(); 879} 880 881void 882pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 883{ 884 u_int cpumask; 885 u_int other_cpus; 886 vm_offset_t addr; 887 888 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 889 pmap, sva, eva); 890 891 sched_pin(); 892 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 893 for (addr = sva; addr < eva; addr += PAGE_SIZE) 894 invlpg(addr); 895 smp_invlpg_range(sva, eva); 896 } else { 897 cpumask = PCPU_GET(cpumask); 898 other_cpus = PCPU_GET(other_cpus); 899 if (pmap->pm_active & cpumask) 900 for (addr = sva; addr < eva; addr += PAGE_SIZE) 901 invlpg(addr); 902 if (pmap->pm_active & other_cpus) 903 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 904 sva, eva); 905 } 906 sched_unpin(); 907 PT_UPDATES_FLUSH(); 908} 909 910void 911pmap_invalidate_all(pmap_t pmap) 912{ 913 u_int cpumask; 914 u_int other_cpus; 915 916 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 917 918 sched_pin(); 919 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 920 invltlb(); 921 smp_invltlb(); 922 } else { 923 cpumask = PCPU_GET(cpumask); 924 other_cpus = PCPU_GET(other_cpus); 925 if (pmap->pm_active & cpumask) 926 invltlb(); 927 if (pmap->pm_active & other_cpus) 928 smp_masked_invltlb(pmap->pm_active & other_cpus); 929 } 930 sched_unpin(); 931} 932 933void 934pmap_invalidate_cache(void) 935{ 936 937 sched_pin(); 938 wbinvd(); 939 smp_cache_flush(); 940 sched_unpin(); 941} 942#else /* !SMP */ 943/* 944 * Normal, non-SMP, 486+ invalidation functions. 945 * We inline these within pmap.c for speed. 946 */ 947PMAP_INLINE void 948pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 949{ 950 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 951 pmap, va); 952 953 if (pmap == kernel_pmap || pmap->pm_active) 954 invlpg(va); 955 PT_UPDATES_FLUSH(); 956} 957 958PMAP_INLINE void 959pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 960{ 961 vm_offset_t addr; 962 963 if (eva - sva > PAGE_SIZE) 964 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 965 pmap, sva, eva); 966 967 if (pmap == kernel_pmap || pmap->pm_active) 968 for (addr = sva; addr < eva; addr += PAGE_SIZE) 969 invlpg(addr); 970 PT_UPDATES_FLUSH(); 971} 972 973PMAP_INLINE void 974pmap_invalidate_all(pmap_t pmap) 975{ 976 977 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 978 979 if (pmap == kernel_pmap || pmap->pm_active) 980 invltlb(); 981} 982 983PMAP_INLINE void 984pmap_invalidate_cache(void) 985{ 986 987 wbinvd(); 988} 989#endif /* !SMP */ 990 991void 992pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva) 993{ 994 995 KASSERT((sva & PAGE_MASK) == 0, 996 ("pmap_invalidate_cache_range: sva not page-aligned")); 997 KASSERT((eva & PAGE_MASK) == 0, 998 ("pmap_invalidate_cache_range: eva not page-aligned")); 999 1000 if (cpu_feature & CPUID_SS) 1001 ; /* If "Self Snoop" is supported, do nothing. */ 1002 else if (cpu_feature & CPUID_CLFSH) { 1003 1004 /* 1005 * Otherwise, do per-cache line flush. Use the mfence 1006 * instruction to insure that previous stores are 1007 * included in the write-back. The processor 1008 * propagates flush to other processors in the cache 1009 * coherence domain. 1010 */ 1011 mfence(); 1012 for (; sva < eva; sva += cpu_clflush_line_size) 1013 clflush(sva); 1014 mfence(); 1015 } else { 1016 1017 /* 1018 * No targeted cache flush methods are supported by CPU, 1019 * globally invalidate cache as a last resort. 1020 */ 1021 pmap_invalidate_cache(); 1022 } 1023} 1024 1025/* 1026 * Are we current address space or kernel? N.B. We return FALSE when 1027 * a pmap's page table is in use because a kernel thread is borrowing 1028 * it. The borrowed page table can change spontaneously, making any 1029 * dependence on its continued use subject to a race condition. 1030 */ 1031static __inline int 1032pmap_is_current(pmap_t pmap) 1033{ 1034 1035 return (pmap == kernel_pmap || 1036 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 1037 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 1038} 1039 1040/* 1041 * If the given pmap is not the current or kernel pmap, the returned pte must 1042 * be released by passing it to pmap_pte_release(). 1043 */ 1044pt_entry_t * 1045pmap_pte(pmap_t pmap, vm_offset_t va) 1046{ 1047 pd_entry_t newpf; 1048 pd_entry_t *pde; 1049 1050 pde = pmap_pde(pmap, va); 1051 if (*pde & PG_PS) 1052 return (pde); 1053 if (*pde != 0) { 1054 /* are we current address space or kernel? */ 1055 if (pmap_is_current(pmap)) 1056 return (vtopte(va)); 1057 mtx_lock(&PMAP2mutex); 1058 newpf = *pde & PG_FRAME; 1059 if ((*PMAP2 & PG_FRAME) != newpf) { 1060 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 1061 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 1062 pmap, va, (*PMAP2 & 0xffffffff)); 1063 } 1064 1065 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 1066 } 1067 return (0); 1068} 1069 1070/* 1071 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 1072 * being NULL. 1073 */ 1074static __inline void 1075pmap_pte_release(pt_entry_t *pte) 1076{ 1077 1078 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 1079 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 1080 *PMAP2); 1081 PT_SET_VA(PMAP2, 0, TRUE); 1082 mtx_unlock(&PMAP2mutex); 1083 } 1084} 1085 1086static __inline void 1087invlcaddr(void *caddr) 1088{ 1089 1090 invlpg((u_int)caddr); 1091 PT_UPDATES_FLUSH(); 1092} 1093 1094/* 1095 * Super fast pmap_pte routine best used when scanning 1096 * the pv lists. This eliminates many coarse-grained 1097 * invltlb calls. Note that many of the pv list 1098 * scans are across different pmaps. It is very wasteful 1099 * to do an entire invltlb for checking a single mapping. 1100 * 1101 * If the given pmap is not the current pmap, vm_page_queue_mtx 1102 * must be held and curthread pinned to a CPU. 1103 */ 1104static pt_entry_t * 1105pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1106{ 1107 pd_entry_t newpf; 1108 pd_entry_t *pde; 1109 1110 pde = pmap_pde(pmap, va); 1111 if (*pde & PG_PS) 1112 return (pde); 1113 if (*pde != 0) { 1114 /* are we current address space or kernel? */ 1115 if (pmap_is_current(pmap)) 1116 return (vtopte(va)); 1117 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1118 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1119 newpf = *pde & PG_FRAME; 1120 if ((*PMAP1 & PG_FRAME) != newpf) { 1121 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1122 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1123 pmap, va, (u_long)*PMAP1); 1124 1125#ifdef SMP 1126 PMAP1cpu = PCPU_GET(cpuid); 1127#endif 1128 PMAP1changed++; 1129 } else 1130#ifdef SMP 1131 if (PMAP1cpu != PCPU_GET(cpuid)) { 1132 PMAP1cpu = PCPU_GET(cpuid); 1133 invlcaddr(PADDR1); 1134 PMAP1changedcpu++; 1135 } else 1136#endif 1137 PMAP1unchanged++; 1138 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1139 } 1140 return (0); 1141} 1142 1143/* 1144 * Routine: pmap_extract 1145 * Function: 1146 * Extract the physical page address associated 1147 * with the given map/virtual_address pair. 1148 */ 1149vm_paddr_t 1150pmap_extract(pmap_t pmap, vm_offset_t va) 1151{ 1152 vm_paddr_t rtval; 1153 pt_entry_t *pte; 1154 pd_entry_t pde; 1155 pt_entry_t pteval; 1156 1157 rtval = 0; 1158 PMAP_LOCK(pmap); 1159 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1160 if (pde != 0) { 1161 if ((pde & PG_PS) != 0) { 1162 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1163 PMAP_UNLOCK(pmap); 1164 return rtval; 1165 } 1166 pte = pmap_pte(pmap, va); 1167 pteval = *pte ? xpmap_mtop(*pte) : 0; 1168 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1169 pmap_pte_release(pte); 1170 } 1171 PMAP_UNLOCK(pmap); 1172 return (rtval); 1173} 1174 1175/* 1176 * Routine: pmap_extract_ma 1177 * Function: 1178 * Like pmap_extract, but returns machine address 1179 */ 1180vm_paddr_t 1181pmap_extract_ma(pmap_t pmap, vm_offset_t va) 1182{ 1183 vm_paddr_t rtval; 1184 pt_entry_t *pte; 1185 pd_entry_t pde; 1186 1187 rtval = 0; 1188 PMAP_LOCK(pmap); 1189 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1190 if (pde != 0) { 1191 if ((pde & PG_PS) != 0) { 1192 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1193 PMAP_UNLOCK(pmap); 1194 return rtval; 1195 } 1196 pte = pmap_pte(pmap, va); 1197 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1198 pmap_pte_release(pte); 1199 } 1200 PMAP_UNLOCK(pmap); 1201 return (rtval); 1202} 1203 1204/* 1205 * Routine: pmap_extract_and_hold 1206 * Function: 1207 * Atomically extract and hold the physical page 1208 * with the given pmap and virtual address pair 1209 * if that mapping permits the given protection. 1210 */ 1211vm_page_t 1212pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1213{ 1214 pd_entry_t pde; 1215 pt_entry_t pte; 1216 vm_page_t m; 1217 1218 m = NULL; 1219 vm_page_lock_queues(); 1220 PMAP_LOCK(pmap); 1221 pde = PT_GET(pmap_pde(pmap, va)); 1222 if (pde != 0) { 1223 if (pde & PG_PS) { 1224 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1225 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1226 (va & PDRMASK)); 1227 vm_page_hold(m); 1228 } 1229 } else { 1230 sched_pin(); 1231 pte = PT_GET(pmap_pte_quick(pmap, va)); 1232 if (*PMAP1) 1233 PT_SET_MA(PADDR1, 0); 1234 if ((pte & PG_V) && 1235 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1236 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1237 vm_page_hold(m); 1238 } 1239 sched_unpin(); 1240 } 1241 } 1242 vm_page_unlock_queues(); 1243 PMAP_UNLOCK(pmap); 1244 return (m); 1245} 1246 1247/*************************************************** 1248 * Low level mapping routines..... 1249 ***************************************************/ 1250 1251/* 1252 * Add a wired page to the kva. 1253 * Note: not SMP coherent. 1254 */ 1255void 1256pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1257{ 1258 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1259} 1260 1261void 1262pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1263{ 1264 pt_entry_t *pte; 1265 1266 pte = vtopte(va); 1267 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1268} 1269 1270 1271static __inline void 1272pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1273{ 1274 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1275} 1276 1277/* 1278 * Remove a page from the kernel pagetables. 1279 * Note: not SMP coherent. 1280 */ 1281PMAP_INLINE void 1282pmap_kremove(vm_offset_t va) 1283{ 1284 pt_entry_t *pte; 1285 1286 pte = vtopte(va); 1287 PT_CLEAR_VA(pte, FALSE); 1288} 1289 1290/* 1291 * Used to map a range of physical addresses into kernel 1292 * virtual address space. 1293 * 1294 * The value passed in '*virt' is a suggested virtual address for 1295 * the mapping. Architectures which can support a direct-mapped 1296 * physical to virtual region can return the appropriate address 1297 * within that region, leaving '*virt' unchanged. Other 1298 * architectures should map the pages starting at '*virt' and 1299 * update '*virt' with the first usable address after the mapped 1300 * region. 1301 */ 1302vm_offset_t 1303pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1304{ 1305 vm_offset_t va, sva; 1306 1307 va = sva = *virt; 1308 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1309 va, start, end, prot); 1310 while (start < end) { 1311 pmap_kenter(va, start); 1312 va += PAGE_SIZE; 1313 start += PAGE_SIZE; 1314 } 1315 pmap_invalidate_range(kernel_pmap, sva, va); 1316 *virt = va; 1317 return (sva); 1318} 1319 1320 1321/* 1322 * Add a list of wired pages to the kva 1323 * this routine is only used for temporary 1324 * kernel mappings that do not need to have 1325 * page modification or references recorded. 1326 * Note that old mappings are simply written 1327 * over. The page *must* be wired. 1328 * Note: SMP coherent. Uses a ranged shootdown IPI. 1329 */ 1330void 1331pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1332{ 1333 pt_entry_t *endpte, *pte; 1334 vm_paddr_t pa; 1335 vm_offset_t va = sva; 1336 int mclcount = 0; 1337 multicall_entry_t mcl[16]; 1338 multicall_entry_t *mclp = mcl; 1339 int error; 1340 1341 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1342 pte = vtopte(sva); 1343 endpte = pte + count; 1344 while (pte < endpte) { 1345 pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1346 1347 mclp->op = __HYPERVISOR_update_va_mapping; 1348 mclp->args[0] = va; 1349 mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1350 mclp->args[2] = (uint32_t)(pa >> 32); 1351 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1352 1353 va += PAGE_SIZE; 1354 pte++; 1355 ma++; 1356 mclp++; 1357 mclcount++; 1358 if (mclcount == 16) { 1359 error = HYPERVISOR_multicall(mcl, mclcount); 1360 mclp = mcl; 1361 mclcount = 0; 1362 KASSERT(error == 0, ("bad multicall %d", error)); 1363 } 1364 } 1365 if (mclcount) { 1366 error = HYPERVISOR_multicall(mcl, mclcount); 1367 KASSERT(error == 0, ("bad multicall %d", error)); 1368 } 1369 1370#ifdef INVARIANTS 1371 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1372 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1373#endif 1374} 1375 1376 1377/* 1378 * This routine tears out page mappings from the 1379 * kernel -- it is meant only for temporary mappings. 1380 * Note: SMP coherent. Uses a ranged shootdown IPI. 1381 */ 1382void 1383pmap_qremove(vm_offset_t sva, int count) 1384{ 1385 vm_offset_t va; 1386 1387 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1388 va = sva; 1389 vm_page_lock_queues(); 1390 critical_enter(); 1391 while (count-- > 0) { 1392 pmap_kremove(va); 1393 va += PAGE_SIZE; 1394 } 1395 pmap_invalidate_range(kernel_pmap, sva, va); 1396 critical_exit(); 1397 vm_page_unlock_queues(); 1398} 1399 1400/*************************************************** 1401 * Page table page management routines..... 1402 ***************************************************/ 1403static __inline void 1404pmap_free_zero_pages(vm_page_t free) 1405{ 1406 vm_page_t m; 1407 1408 while (free != NULL) { 1409 m = free; 1410 free = m->right; 1411 vm_page_free_zero(m); 1412 } 1413} 1414 1415/* 1416 * This routine unholds page table pages, and if the hold count 1417 * drops to zero, then it decrements the wire count. 1418 */ 1419static __inline int 1420pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1421{ 1422 1423 --m->wire_count; 1424 if (m->wire_count == 0) 1425 return _pmap_unwire_pte_hold(pmap, m, free); 1426 else 1427 return 0; 1428} 1429 1430static int 1431_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1432{ 1433 vm_offset_t pteva; 1434 1435 PT_UPDATES_FLUSH(); 1436 /* 1437 * unmap the page table page 1438 */ 1439 xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1440 /* 1441 * page *might* contain residual mapping :-/ 1442 */ 1443 PD_CLEAR_VA(pmap, m->pindex, TRUE); 1444 pmap_zero_page(m); 1445 --pmap->pm_stats.resident_count; 1446 1447 /* 1448 * This is a release store so that the ordinary store unmapping 1449 * the page table page is globally performed before TLB shoot- 1450 * down is begun. 1451 */ 1452 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1453 1454 /* 1455 * Do an invltlb to make the invalidated mapping 1456 * take effect immediately. 1457 */ 1458 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1459 pmap_invalidate_page(pmap, pteva); 1460 1461 /* 1462 * Put page on a list so that it is released after 1463 * *ALL* TLB shootdown is done 1464 */ 1465 m->right = *free; 1466 *free = m; 1467 1468 return 1; 1469} 1470 1471/* 1472 * After removing a page table entry, this routine is used to 1473 * conditionally free the page, and manage the hold/wire counts. 1474 */ 1475static int 1476pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1477{ 1478 pd_entry_t ptepde; 1479 vm_page_t mpte; 1480 1481 if (va >= VM_MAXUSER_ADDRESS) 1482 return 0; 1483 ptepde = PT_GET(pmap_pde(pmap, va)); 1484 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1485 return pmap_unwire_pte_hold(pmap, mpte, free); 1486} 1487 1488void 1489pmap_pinit0(pmap_t pmap) 1490{ 1491 1492 PMAP_LOCK_INIT(pmap); 1493 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1494#ifdef PAE 1495 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1496#endif 1497 pmap->pm_active = 0; 1498 PCPU_SET(curpmap, pmap); 1499 TAILQ_INIT(&pmap->pm_pvchunk); 1500 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1501 mtx_lock_spin(&allpmaps_lock); 1502 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1503 mtx_unlock_spin(&allpmaps_lock); 1504} 1505 1506/* 1507 * Initialize a preallocated and zeroed pmap structure, 1508 * such as one in a vmspace structure. 1509 */ 1510int 1511pmap_pinit(pmap_t pmap) 1512{ 1513 vm_page_t m, ptdpg[NPGPTD + 1]; 1514 int npgptd = NPGPTD + 1; 1515 static int color; 1516 int i; 1517 1518 PMAP_LOCK_INIT(pmap); 1519 1520 /* 1521 * No need to allocate page table space yet but we do need a valid 1522 * page directory table. 1523 */ 1524 if (pmap->pm_pdir == NULL) { 1525 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1526 NBPTD); 1527 if (pmap->pm_pdir == NULL) { 1528 PMAP_LOCK_DESTROY(pmap); 1529 return (0); 1530 } 1531#if defined(XEN) && defined(PAE) 1532 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1533#endif 1534 1535#if defined(PAE) && !defined(XEN) 1536 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1537 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1538 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1539 ("pmap_pinit: pdpt misaligned")); 1540 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1541 ("pmap_pinit: pdpt above 4g")); 1542#endif 1543 } 1544 1545 /* 1546 * allocate the page directory page(s) 1547 */ 1548 for (i = 0; i < npgptd;) { 1549 m = vm_page_alloc(NULL, color++, 1550 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1551 VM_ALLOC_ZERO); 1552 if (m == NULL) 1553 VM_WAIT; 1554 else { 1555 ptdpg[i++] = m; 1556 } 1557 } 1558 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1559 for (i = 0; i < NPGPTD; i++) { 1560 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1561 pagezero(&pmap->pm_pdir[i*NPTEPG]); 1562 } 1563 1564 mtx_lock_spin(&allpmaps_lock); 1565 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1566 mtx_unlock_spin(&allpmaps_lock); 1567 /* Wire in kernel global address entries. */ 1568 1569 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1570#ifdef PAE 1571#ifdef XEN 1572 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1573 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1574 bzero(pmap->pm_pdpt, PAGE_SIZE); 1575#endif 1576 for (i = 0; i < NPGPTD; i++) { 1577 vm_paddr_t ma; 1578 1579 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1580 pmap->pm_pdpt[i] = ma | PG_V; 1581 1582 } 1583#endif 1584#ifdef XEN 1585 for (i = 0; i < NPGPTD; i++) { 1586 pt_entry_t *pd; 1587 vm_paddr_t ma; 1588 1589 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1590 pd = pmap->pm_pdir + (i * NPDEPG); 1591 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1592#if 0 1593 xen_pgd_pin(ma); 1594#endif 1595 } 1596 1597#ifdef PAE 1598 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1599#endif 1600 vm_page_lock_queues(); 1601 xen_flush_queue(); 1602 xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD]))); 1603 for (i = 0; i < NPGPTD; i++) { 1604 vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1605 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1606 } 1607 xen_flush_queue(); 1608 vm_page_unlock_queues(); 1609#endif 1610 pmap->pm_active = 0; 1611 TAILQ_INIT(&pmap->pm_pvchunk); 1612 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1613 1614 return (1); 1615} 1616 1617/* 1618 * this routine is called if the page table page is not 1619 * mapped correctly. 1620 */ 1621static vm_page_t 1622_pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1623{ 1624 vm_paddr_t ptema; 1625 vm_page_t m; 1626 1627 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1628 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1629 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1630 1631 /* 1632 * Allocate a page table page. 1633 */ 1634 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1635 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1636 if (flags & M_WAITOK) { 1637 PMAP_UNLOCK(pmap); 1638 vm_page_unlock_queues(); 1639 VM_WAIT; 1640 vm_page_lock_queues(); 1641 PMAP_LOCK(pmap); 1642 } 1643 1644 /* 1645 * Indicate the need to retry. While waiting, the page table 1646 * page may have been allocated. 1647 */ 1648 return (NULL); 1649 } 1650 if ((m->flags & PG_ZERO) == 0) 1651 pmap_zero_page(m); 1652 1653 /* 1654 * Map the pagetable page into the process address space, if 1655 * it isn't already there. 1656 */ 1657 pmap->pm_stats.resident_count++; 1658 1659 ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1660 xen_pt_pin(ptema); 1661 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1662 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1663 1664 KASSERT(pmap->pm_pdir[ptepindex], 1665 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1666 return (m); 1667} 1668 1669static vm_page_t 1670pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1671{ 1672 unsigned ptepindex; 1673 pd_entry_t ptema; 1674 vm_page_t m; 1675 1676 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1677 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1678 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1679 1680 /* 1681 * Calculate pagetable page index 1682 */ 1683 ptepindex = va >> PDRSHIFT; 1684retry: 1685 /* 1686 * Get the page directory entry 1687 */ 1688 ptema = pmap->pm_pdir[ptepindex]; 1689 1690 /* 1691 * This supports switching from a 4MB page to a 1692 * normal 4K page. 1693 */ 1694 if (ptema & PG_PS) { 1695 /* 1696 * XXX 1697 */ 1698 pmap->pm_pdir[ptepindex] = 0; 1699 ptema = 0; 1700 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1701 pmap_invalidate_all(kernel_pmap); 1702 } 1703 1704 /* 1705 * If the page table page is mapped, we just increment the 1706 * hold count, and activate it. 1707 */ 1708 if (ptema & PG_V) { 1709 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1710 m->wire_count++; 1711 } else { 1712 /* 1713 * Here if the pte page isn't mapped, or if it has 1714 * been deallocated. 1715 */ 1716 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1717 pmap, va, flags); 1718 m = _pmap_allocpte(pmap, ptepindex, flags); 1719 if (m == NULL && (flags & M_WAITOK)) 1720 goto retry; 1721 1722 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1723 } 1724 return (m); 1725} 1726 1727 1728/*************************************************** 1729* Pmap allocation/deallocation routines. 1730 ***************************************************/ 1731 1732#ifdef SMP 1733/* 1734 * Deal with a SMP shootdown of other users of the pmap that we are 1735 * trying to dispose of. This can be a bit hairy. 1736 */ 1737static cpumask_t *lazymask; 1738static u_int lazyptd; 1739static volatile u_int lazywait; 1740 1741void pmap_lazyfix_action(void); 1742 1743void 1744pmap_lazyfix_action(void) 1745{ 1746 cpumask_t mymask = PCPU_GET(cpumask); 1747 1748#ifdef COUNT_IPIS 1749 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1750#endif 1751 if (rcr3() == lazyptd) 1752 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1753 atomic_clear_int(lazymask, mymask); 1754 atomic_store_rel_int(&lazywait, 1); 1755} 1756 1757static void 1758pmap_lazyfix_self(cpumask_t mymask) 1759{ 1760 1761 if (rcr3() == lazyptd) 1762 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1763 atomic_clear_int(lazymask, mymask); 1764} 1765 1766 1767static void 1768pmap_lazyfix(pmap_t pmap) 1769{ 1770 cpumask_t mymask, mask; 1771 u_int spins; 1772 1773 while ((mask = pmap->pm_active) != 0) { 1774 spins = 50000000; 1775 mask = mask & -mask; /* Find least significant set bit */ 1776 mtx_lock_spin(&smp_ipi_mtx); 1777#ifdef PAE 1778 lazyptd = vtophys(pmap->pm_pdpt); 1779#else 1780 lazyptd = vtophys(pmap->pm_pdir); 1781#endif 1782 mymask = PCPU_GET(cpumask); 1783 if (mask == mymask) { 1784 lazymask = &pmap->pm_active; 1785 pmap_lazyfix_self(mymask); 1786 } else { 1787 atomic_store_rel_int((u_int *)&lazymask, 1788 (u_int)&pmap->pm_active); 1789 atomic_store_rel_int(&lazywait, 0); 1790 ipi_selected(mask, IPI_LAZYPMAP); 1791 while (lazywait == 0) { 1792 ia32_pause(); 1793 if (--spins == 0) 1794 break; 1795 } 1796 } 1797 mtx_unlock_spin(&smp_ipi_mtx); 1798 if (spins == 0) 1799 printf("pmap_lazyfix: spun for 50000000\n"); 1800 } 1801} 1802 1803#else /* SMP */ 1804 1805/* 1806 * Cleaning up on uniprocessor is easy. For various reasons, we're 1807 * unlikely to have to even execute this code, including the fact 1808 * that the cleanup is deferred until the parent does a wait(2), which 1809 * means that another userland process has run. 1810 */ 1811static void 1812pmap_lazyfix(pmap_t pmap) 1813{ 1814 u_int cr3; 1815 1816 cr3 = vtophys(pmap->pm_pdir); 1817 if (cr3 == rcr3()) { 1818 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1819 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1820 } 1821} 1822#endif /* SMP */ 1823 1824/* 1825 * Release any resources held by the given physical map. 1826 * Called when a pmap initialized by pmap_pinit is being released. 1827 * Should only be called if the map contains no valid mappings. 1828 */ 1829void 1830pmap_release(pmap_t pmap) 1831{ 1832 vm_page_t m, ptdpg[2*NPGPTD+1]; 1833 vm_paddr_t ma; 1834 int i; 1835#ifdef XEN 1836#ifdef PAE 1837 int npgptd = NPGPTD + 1; 1838#else 1839 int npgptd = NPGPTD; 1840#endif 1841#else 1842 int npgptd = NPGPTD; 1843#endif 1844 KASSERT(pmap->pm_stats.resident_count == 0, 1845 ("pmap_release: pmap resident count %ld != 0", 1846 pmap->pm_stats.resident_count)); 1847 PT_UPDATES_FLUSH(); 1848 1849 pmap_lazyfix(pmap); 1850 mtx_lock_spin(&allpmaps_lock); 1851 LIST_REMOVE(pmap, pm_list); 1852 mtx_unlock_spin(&allpmaps_lock); 1853 1854 for (i = 0; i < NPGPTD; i++) 1855 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1856 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1857#if defined(PAE) && defined(XEN) 1858 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1859#endif 1860 1861 for (i = 0; i < npgptd; i++) { 1862 m = ptdpg[i]; 1863 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1864 /* unpinning L1 and L2 treated the same */ 1865 xen_pgd_unpin(ma); 1866#ifdef PAE 1867 KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME), 1868 ("pmap_release: got wrong ptd page")); 1869#endif 1870 m->wire_count--; 1871 atomic_subtract_int(&cnt.v_wire_count, 1); 1872 vm_page_free(m); 1873 } 1874 PMAP_LOCK_DESTROY(pmap); 1875} 1876 1877static int 1878kvm_size(SYSCTL_HANDLER_ARGS) 1879{ 1880 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1881 1882 return sysctl_handle_long(oidp, &ksize, 0, req); 1883} 1884SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1885 0, 0, kvm_size, "IU", "Size of KVM"); 1886 1887static int 1888kvm_free(SYSCTL_HANDLER_ARGS) 1889{ 1890 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1891 1892 return sysctl_handle_long(oidp, &kfree, 0, req); 1893} 1894SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1895 0, 0, kvm_free, "IU", "Amount of KVM free"); 1896 1897/* 1898 * grow the number of kernel page table entries, if needed 1899 */ 1900void 1901pmap_growkernel(vm_offset_t addr) 1902{ 1903 struct pmap *pmap; 1904 vm_paddr_t ptppaddr; 1905 vm_page_t nkpg; 1906 pd_entry_t newpdir; 1907 1908 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1909 if (kernel_vm_end == 0) { 1910 kernel_vm_end = KERNBASE; 1911 nkpt = 0; 1912 while (pdir_pde(PTD, kernel_vm_end)) { 1913 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1914 nkpt++; 1915 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1916 kernel_vm_end = kernel_map->max_offset; 1917 break; 1918 } 1919 } 1920 } 1921 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1922 if (addr - 1 >= kernel_map->max_offset) 1923 addr = kernel_map->max_offset; 1924 while (kernel_vm_end < addr) { 1925 if (pdir_pde(PTD, kernel_vm_end)) { 1926 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1927 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1928 kernel_vm_end = kernel_map->max_offset; 1929 break; 1930 } 1931 continue; 1932 } 1933 1934 /* 1935 * This index is bogus, but out of the way 1936 */ 1937 nkpg = vm_page_alloc(NULL, nkpt, 1938 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1939 if (!nkpg) 1940 panic("pmap_growkernel: no memory to grow kernel"); 1941 1942 nkpt++; 1943 1944 pmap_zero_page(nkpg); 1945 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1946 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1947 vm_page_lock_queues(); 1948 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1949 mtx_lock_spin(&allpmaps_lock); 1950 LIST_FOREACH(pmap, &allpmaps, pm_list) 1951 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1952 1953 mtx_unlock_spin(&allpmaps_lock); 1954 vm_page_unlock_queues(); 1955 1956 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1957 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1958 kernel_vm_end = kernel_map->max_offset; 1959 break; 1960 } 1961 } 1962} 1963 1964 1965/*************************************************** 1966 * page management routines. 1967 ***************************************************/ 1968 1969CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1970CTASSERT(_NPCM == 11); 1971 1972static __inline struct pv_chunk * 1973pv_to_chunk(pv_entry_t pv) 1974{ 1975 1976 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1977} 1978 1979#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1980 1981#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1982#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1983 1984static uint32_t pc_freemask[11] = { 1985 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1986 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1987 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1988 PC_FREE0_9, PC_FREE10 1989}; 1990 1991SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1992 "Current number of pv entries"); 1993 1994#ifdef PV_STATS 1995static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1996 1997SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1998 "Current number of pv entry chunks"); 1999SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 2000 "Current number of pv entry chunks allocated"); 2001SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 2002 "Current number of pv entry chunks frees"); 2003SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 2004 "Number of times tried to get a chunk page but failed."); 2005 2006static long pv_entry_frees, pv_entry_allocs; 2007static int pv_entry_spare; 2008 2009SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 2010 "Current number of pv entry frees"); 2011SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 2012 "Current number of pv entry allocs"); 2013SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 2014 "Current number of spare pv entries"); 2015 2016static int pmap_collect_inactive, pmap_collect_active; 2017 2018SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 2019 "Current number times pmap_collect called on inactive queue"); 2020SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 2021 "Current number times pmap_collect called on active queue"); 2022#endif 2023 2024/* 2025 * We are in a serious low memory condition. Resort to 2026 * drastic measures to free some pages so we can allocate 2027 * another pv entry chunk. This is normally called to 2028 * unmap inactive pages, and if necessary, active pages. 2029 */ 2030static void 2031pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 2032{ 2033 pmap_t pmap; 2034 pt_entry_t *pte, tpte; 2035 pv_entry_t next_pv, pv; 2036 vm_offset_t va; 2037 vm_page_t m, free; 2038 2039 sched_pin(); 2040 TAILQ_FOREACH(m, &vpq->pl, pageq) { 2041 if (m->hold_count || m->busy) 2042 continue; 2043 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 2044 va = pv->pv_va; 2045 pmap = PV_PMAP(pv); 2046 /* Avoid deadlock and lock recursion. */ 2047 if (pmap > locked_pmap) 2048 PMAP_LOCK(pmap); 2049 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 2050 continue; 2051 pmap->pm_stats.resident_count--; 2052 pte = pmap_pte_quick(pmap, va); 2053 tpte = pte_load_clear(pte); 2054 KASSERT((tpte & PG_W) == 0, 2055 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 2056 if (tpte & PG_A) 2057 vm_page_flag_set(m, PG_REFERENCED); 2058 if (tpte & PG_M) { 2059 KASSERT((tpte & PG_RW), 2060 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 2061 va, (uintmax_t)tpte)); 2062 vm_page_dirty(m); 2063 } 2064 free = NULL; 2065 pmap_unuse_pt(pmap, va, &free); 2066 pmap_invalidate_page(pmap, va); 2067 pmap_free_zero_pages(free); 2068 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2069 if (TAILQ_EMPTY(&m->md.pv_list)) 2070 vm_page_flag_clear(m, PG_WRITEABLE); 2071 free_pv_entry(pmap, pv); 2072 if (pmap != locked_pmap) 2073 PMAP_UNLOCK(pmap); 2074 } 2075 } 2076 sched_unpin(); 2077} 2078 2079 2080/* 2081 * free the pv_entry back to the free list 2082 */ 2083static void 2084free_pv_entry(pmap_t pmap, pv_entry_t pv) 2085{ 2086 vm_page_t m; 2087 struct pv_chunk *pc; 2088 int idx, field, bit; 2089 2090 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2091 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2092 PV_STAT(pv_entry_frees++); 2093 PV_STAT(pv_entry_spare++); 2094 pv_entry_count--; 2095 pc = pv_to_chunk(pv); 2096 idx = pv - &pc->pc_pventry[0]; 2097 field = idx / 32; 2098 bit = idx % 32; 2099 pc->pc_map[field] |= 1ul << bit; 2100 /* move to head of list */ 2101 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2102 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2103 for (idx = 0; idx < _NPCM; idx++) 2104 if (pc->pc_map[idx] != pc_freemask[idx]) 2105 return; 2106 PV_STAT(pv_entry_spare -= _NPCPV); 2107 PV_STAT(pc_chunk_count--); 2108 PV_STAT(pc_chunk_frees++); 2109 /* entire chunk is free, return it */ 2110 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2111 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2112 pmap_qremove((vm_offset_t)pc, 1); 2113 vm_page_unwire(m, 0); 2114 vm_page_free(m); 2115 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2116} 2117 2118/* 2119 * get a new pv_entry, allocating a block from the system 2120 * when needed. 2121 */ 2122static pv_entry_t 2123get_pv_entry(pmap_t pmap, int try) 2124{ 2125 static const struct timeval printinterval = { 60, 0 }; 2126 static struct timeval lastprint; 2127 static vm_pindex_t colour; 2128 struct vpgqueues *pq; 2129 int bit, field; 2130 pv_entry_t pv; 2131 struct pv_chunk *pc; 2132 vm_page_t m; 2133 2134 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2135 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2136 PV_STAT(pv_entry_allocs++); 2137 pv_entry_count++; 2138 if (pv_entry_count > pv_entry_high_water) 2139 if (ratecheck(&lastprint, &printinterval)) 2140 printf("Approaching the limit on PV entries, consider " 2141 "increasing either the vm.pmap.shpgperproc or the " 2142 "vm.pmap.pv_entry_max tunable.\n"); 2143 pq = NULL; 2144retry: 2145 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2146 if (pc != NULL) { 2147 for (field = 0; field < _NPCM; field++) { 2148 if (pc->pc_map[field]) { 2149 bit = bsfl(pc->pc_map[field]); 2150 break; 2151 } 2152 } 2153 if (field < _NPCM) { 2154 pv = &pc->pc_pventry[field * 32 + bit]; 2155 pc->pc_map[field] &= ~(1ul << bit); 2156 /* If this was the last item, move it to tail */ 2157 for (field = 0; field < _NPCM; field++) 2158 if (pc->pc_map[field] != 0) { 2159 PV_STAT(pv_entry_spare--); 2160 return (pv); /* not full, return */ 2161 } 2162 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2163 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2164 PV_STAT(pv_entry_spare--); 2165 return (pv); 2166 } 2167 } 2168 /* 2169 * Access to the ptelist "pv_vafree" is synchronized by the page 2170 * queues lock. If "pv_vafree" is currently non-empty, it will 2171 * remain non-empty until pmap_ptelist_alloc() completes. 2172 */ 2173 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2174 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2175 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2176 if (try) { 2177 pv_entry_count--; 2178 PV_STAT(pc_chunk_tryfail++); 2179 return (NULL); 2180 } 2181 /* 2182 * Reclaim pv entries: At first, destroy mappings to 2183 * inactive pages. After that, if a pv chunk entry 2184 * is still needed, destroy mappings to active pages. 2185 */ 2186 if (pq == NULL) { 2187 PV_STAT(pmap_collect_inactive++); 2188 pq = &vm_page_queues[PQ_INACTIVE]; 2189 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2190 PV_STAT(pmap_collect_active++); 2191 pq = &vm_page_queues[PQ_ACTIVE]; 2192 } else 2193 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2194 pmap_collect(pmap, pq); 2195 goto retry; 2196 } 2197 PV_STAT(pc_chunk_count++); 2198 PV_STAT(pc_chunk_allocs++); 2199 colour++; 2200 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2201 pmap_qenter((vm_offset_t)pc, &m, 1); 2202 if ((m->flags & PG_ZERO) == 0) 2203 pagezero(pc); 2204 pc->pc_pmap = pmap; 2205 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2206 for (field = 1; field < _NPCM; field++) 2207 pc->pc_map[field] = pc_freemask[field]; 2208 pv = &pc->pc_pventry[0]; 2209 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2210 PV_STAT(pv_entry_spare += _NPCPV - 1); 2211 return (pv); 2212} 2213 2214static void 2215pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2216{ 2217 pv_entry_t pv; 2218 2219 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2220 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2221 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2222 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 2223 break; 2224 } 2225 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 2226 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2227 if (TAILQ_EMPTY(&m->md.pv_list)) 2228 vm_page_flag_clear(m, PG_WRITEABLE); 2229 free_pv_entry(pmap, pv); 2230} 2231 2232/* 2233 * Create a pv entry for page at pa for 2234 * (pmap, va). 2235 */ 2236static void 2237pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2238{ 2239 pv_entry_t pv; 2240 2241 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2242 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2243 pv = get_pv_entry(pmap, FALSE); 2244 pv->pv_va = va; 2245 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2246} 2247 2248/* 2249 * Conditionally create a pv entry. 2250 */ 2251static boolean_t 2252pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2253{ 2254 pv_entry_t pv; 2255 2256 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2257 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2258 if (pv_entry_count < pv_entry_high_water && 2259 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2260 pv->pv_va = va; 2261 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2262 return (TRUE); 2263 } else 2264 return (FALSE); 2265} 2266 2267/* 2268 * pmap_remove_pte: do the things to unmap a page in a process 2269 */ 2270static int 2271pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2272{ 2273 pt_entry_t oldpte; 2274 vm_page_t m; 2275 2276 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2277 pmap, (u_long)*ptq, va); 2278 2279 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2280 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2281 oldpte = *ptq; 2282 PT_SET_VA_MA(ptq, 0, TRUE); 2283 if (oldpte & PG_W) 2284 pmap->pm_stats.wired_count -= 1; 2285 /* 2286 * Machines that don't support invlpg, also don't support 2287 * PG_G. 2288 */ 2289 if (oldpte & PG_G) 2290 pmap_invalidate_page(kernel_pmap, va); 2291 pmap->pm_stats.resident_count -= 1; 2292 /* 2293 * XXX This is not strictly correctly, but somewhere along the line 2294 * we are losing the managed bit on some pages. It is unclear to me 2295 * why, but I think the most likely explanation is that xen's writable 2296 * page table implementation doesn't respect the unused bits. 2297 */ 2298 if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2299 ) { 2300 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2301 2302 if (!(oldpte & PG_MANAGED)) 2303 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2304 2305 if (oldpte & PG_M) { 2306 KASSERT((oldpte & PG_RW), 2307 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 2308 va, (uintmax_t)oldpte)); 2309 vm_page_dirty(m); 2310 } 2311 if (oldpte & PG_A) 2312 vm_page_flag_set(m, PG_REFERENCED); 2313 pmap_remove_entry(pmap, m, va); 2314 } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2315 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2316 2317 return (pmap_unuse_pt(pmap, va, free)); 2318} 2319 2320/* 2321 * Remove a single page from a process address space 2322 */ 2323static void 2324pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2325{ 2326 pt_entry_t *pte; 2327 2328 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2329 pmap, va); 2330 2331 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2332 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2333 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2334 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2335 return; 2336 pmap_remove_pte(pmap, pte, va, free); 2337 pmap_invalidate_page(pmap, va); 2338 if (*PMAP1) 2339 PT_SET_MA(PADDR1, 0); 2340 2341} 2342 2343/* 2344 * Remove the given range of addresses from the specified map. 2345 * 2346 * It is assumed that the start and end are properly 2347 * rounded to the page size. 2348 */ 2349void 2350pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2351{ 2352 vm_offset_t pdnxt; 2353 pd_entry_t ptpaddr; 2354 pt_entry_t *pte; 2355 vm_page_t free = NULL; 2356 int anyvalid; 2357 2358 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2359 pmap, sva, eva); 2360 2361 /* 2362 * Perform an unsynchronized read. This is, however, safe. 2363 */ 2364 if (pmap->pm_stats.resident_count == 0) 2365 return; 2366 2367 anyvalid = 0; 2368 2369 vm_page_lock_queues(); 2370 sched_pin(); 2371 PMAP_LOCK(pmap); 2372 2373 /* 2374 * special handling of removing one page. a very 2375 * common operation and easy to short circuit some 2376 * code. 2377 */ 2378 if ((sva + PAGE_SIZE == eva) && 2379 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2380 pmap_remove_page(pmap, sva, &free); 2381 goto out; 2382 } 2383 2384 for (; sva < eva; sva = pdnxt) { 2385 unsigned pdirindex; 2386 2387 /* 2388 * Calculate index for next page table. 2389 */ 2390 pdnxt = (sva + NBPDR) & ~PDRMASK; 2391 if (pmap->pm_stats.resident_count == 0) 2392 break; 2393 2394 pdirindex = sva >> PDRSHIFT; 2395 ptpaddr = pmap->pm_pdir[pdirindex]; 2396 2397 /* 2398 * Weed out invalid mappings. Note: we assume that the page 2399 * directory table is always allocated, and in kernel virtual. 2400 */ 2401 if (ptpaddr == 0) 2402 continue; 2403 2404 /* 2405 * Check for large page. 2406 */ 2407 if ((ptpaddr & PG_PS) != 0) { 2408 PD_CLEAR_VA(pmap, pdirindex, TRUE); 2409 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2410 anyvalid = 1; 2411 continue; 2412 } 2413 2414 /* 2415 * Limit our scan to either the end of the va represented 2416 * by the current page table page, or to the end of the 2417 * range being removed. 2418 */ 2419 if (pdnxt > eva) 2420 pdnxt = eva; 2421 2422 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2423 sva += PAGE_SIZE) { 2424 if ((*pte & PG_V) == 0) 2425 continue; 2426 2427 /* 2428 * The TLB entry for a PG_G mapping is invalidated 2429 * by pmap_remove_pte(). 2430 */ 2431 if ((*pte & PG_G) == 0) 2432 anyvalid = 1; 2433 if (pmap_remove_pte(pmap, pte, sva, &free)) 2434 break; 2435 } 2436 } 2437 PT_UPDATES_FLUSH(); 2438 if (*PMAP1) 2439 PT_SET_VA_MA(PMAP1, 0, TRUE); 2440out: 2441 if (anyvalid) 2442 pmap_invalidate_all(pmap); 2443 sched_unpin(); 2444 vm_page_unlock_queues(); 2445 PMAP_UNLOCK(pmap); 2446 pmap_free_zero_pages(free); 2447} 2448 2449/* 2450 * Routine: pmap_remove_all 2451 * Function: 2452 * Removes this physical page from 2453 * all physical maps in which it resides. 2454 * Reflects back modify bits to the pager. 2455 * 2456 * Notes: 2457 * Original versions of this routine were very 2458 * inefficient because they iteratively called 2459 * pmap_remove (slow...) 2460 */ 2461 2462void 2463pmap_remove_all(vm_page_t m) 2464{ 2465 pv_entry_t pv; 2466 pmap_t pmap; 2467 pt_entry_t *pte, tpte; 2468 vm_page_t free; 2469 2470#if defined(PMAP_DIAGNOSTIC) 2471 /* 2472 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2473 */ 2474 if (m->flags & PG_FICTITIOUS) { 2475 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx", 2476 VM_PAGE_TO_PHYS(m) & 0xffffffff); 2477 } 2478#endif 2479 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2480 sched_pin(); 2481 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2482 pmap = PV_PMAP(pv); 2483 PMAP_LOCK(pmap); 2484 pmap->pm_stats.resident_count--; 2485 pte = pmap_pte_quick(pmap, pv->pv_va); 2486 2487 tpte = *pte; 2488 PT_SET_VA_MA(pte, 0, TRUE); 2489 if (tpte & PG_W) 2490 pmap->pm_stats.wired_count--; 2491 if (tpte & PG_A) 2492 vm_page_flag_set(m, PG_REFERENCED); 2493 2494 /* 2495 * Update the vm_page_t clean and reference bits. 2496 */ 2497 if (tpte & PG_M) { 2498 KASSERT((tpte & PG_RW), 2499 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2500 pv->pv_va, (uintmax_t)tpte)); 2501 vm_page_dirty(m); 2502 } 2503 free = NULL; 2504 pmap_unuse_pt(pmap, pv->pv_va, &free); 2505 pmap_invalidate_page(pmap, pv->pv_va); 2506 pmap_free_zero_pages(free); 2507 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2508 free_pv_entry(pmap, pv); 2509 PMAP_UNLOCK(pmap); 2510 } 2511 vm_page_flag_clear(m, PG_WRITEABLE); 2512 PT_UPDATES_FLUSH(); 2513 if (*PMAP1) 2514 PT_SET_MA(PADDR1, 0); 2515 sched_unpin(); 2516} 2517 2518/* 2519 * Set the physical protection on the 2520 * specified range of this map as requested. 2521 */ 2522void 2523pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2524{ 2525 vm_offset_t pdnxt; 2526 pd_entry_t ptpaddr; 2527 pt_entry_t *pte; 2528 int anychanged; 2529 2530 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2531 pmap, sva, eva, prot); 2532 2533 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2534 pmap_remove(pmap, sva, eva); 2535 return; 2536 } 2537 2538#ifdef PAE 2539 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2540 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2541 return; 2542#else 2543 if (prot & VM_PROT_WRITE) 2544 return; 2545#endif 2546 2547 anychanged = 0; 2548 2549 vm_page_lock_queues(); 2550 sched_pin(); 2551 PMAP_LOCK(pmap); 2552 for (; sva < eva; sva = pdnxt) { 2553 pt_entry_t obits, pbits; 2554 unsigned pdirindex; 2555 2556 pdnxt = (sva + NBPDR) & ~PDRMASK; 2557 2558 pdirindex = sva >> PDRSHIFT; 2559 ptpaddr = pmap->pm_pdir[pdirindex]; 2560 2561 /* 2562 * Weed out invalid mappings. Note: we assume that the page 2563 * directory table is always allocated, and in kernel virtual. 2564 */ 2565 if (ptpaddr == 0) 2566 continue; 2567 2568 /* 2569 * Check for large page. 2570 */ 2571 if ((ptpaddr & PG_PS) != 0) { 2572 if ((prot & VM_PROT_WRITE) == 0) 2573 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2574#ifdef PAE 2575 if ((prot & VM_PROT_EXECUTE) == 0) 2576 pmap->pm_pdir[pdirindex] |= pg_nx; 2577#endif 2578 anychanged = 1; 2579 continue; 2580 } 2581 2582 if (pdnxt > eva) 2583 pdnxt = eva; 2584 2585 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2586 sva += PAGE_SIZE) { 2587 vm_page_t m; 2588 2589retry: 2590 /* 2591 * Regardless of whether a pte is 32 or 64 bits in 2592 * size, PG_RW, PG_A, and PG_M are among the least 2593 * significant 32 bits. 2594 */ 2595 obits = pbits = *pte; 2596 if ((pbits & PG_V) == 0) 2597 continue; 2598 if (pbits & PG_MANAGED) { 2599 m = NULL; 2600 if (pbits & PG_A) { 2601 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2602 vm_page_flag_set(m, PG_REFERENCED); 2603 pbits &= ~PG_A; 2604 } 2605 if ((pbits & PG_M) != 0) { 2606 if (m == NULL) 2607 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2608 vm_page_dirty(m); 2609 } 2610 } 2611 2612 if ((prot & VM_PROT_WRITE) == 0) 2613 pbits &= ~(PG_RW | PG_M); 2614#ifdef PAE 2615 if ((prot & VM_PROT_EXECUTE) == 0) 2616 pbits |= pg_nx; 2617#endif 2618 2619 if (pbits != obits) { 2620#ifdef XEN 2621 obits = *pte; 2622 PT_SET_VA_MA(pte, pbits, TRUE); 2623 if (*pte != pbits) 2624 goto retry; 2625#else 2626#ifdef PAE 2627 if (!atomic_cmpset_64(pte, obits, pbits)) 2628 goto retry; 2629#else 2630 if (!atomic_cmpset_int((u_int *)pte, obits, 2631 pbits)) 2632 goto retry; 2633#endif 2634#endif 2635 if (obits & PG_G) 2636 pmap_invalidate_page(pmap, sva); 2637 else 2638 anychanged = 1; 2639 } 2640 } 2641 } 2642 PT_UPDATES_FLUSH(); 2643 if (*PMAP1) 2644 PT_SET_VA_MA(PMAP1, 0, TRUE); 2645 if (anychanged) 2646 pmap_invalidate_all(pmap); 2647 sched_unpin(); 2648 vm_page_unlock_queues(); 2649 PMAP_UNLOCK(pmap); 2650} 2651 2652/* 2653 * Insert the given physical page (p) at 2654 * the specified virtual address (v) in the 2655 * target physical map with the protection requested. 2656 * 2657 * If specified, the page will be wired down, meaning 2658 * that the related pte can not be reclaimed. 2659 * 2660 * NB: This is the only routine which MAY NOT lazy-evaluate 2661 * or lose information. That is, this routine must actually 2662 * insert this page into the given map NOW. 2663 */ 2664void 2665pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2666 vm_prot_t prot, boolean_t wired) 2667{ 2668 vm_paddr_t pa; 2669 pd_entry_t *pde; 2670 pt_entry_t *pte; 2671 vm_paddr_t opa; 2672 pt_entry_t origpte, newpte; 2673 vm_page_t mpte, om; 2674 boolean_t invlva; 2675 2676 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2677 pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired); 2678 va = trunc_page(va); 2679#ifdef PMAP_DIAGNOSTIC 2680 if (va > VM_MAX_KERNEL_ADDRESS) 2681 panic("pmap_enter: toobig"); 2682 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2683 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2684#endif 2685 2686 mpte = NULL; 2687 2688 vm_page_lock_queues(); 2689 PMAP_LOCK(pmap); 2690 sched_pin(); 2691 2692 /* 2693 * In the case that a page table page is not 2694 * resident, we are creating it here. 2695 */ 2696 if (va < VM_MAXUSER_ADDRESS) { 2697 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2698 } 2699#if 0 && defined(PMAP_DIAGNOSTIC) 2700 else { 2701 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2702 origpte = *pdeaddr; 2703 if ((origpte & PG_V) == 0) { 2704 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2705 pmap->pm_pdir[PTDPTDI], origpte, va); 2706 } 2707 } 2708#endif 2709 2710 pde = pmap_pde(pmap, va); 2711 if ((*pde & PG_PS) != 0) 2712 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2713 pte = pmap_pte_quick(pmap, va); 2714 2715 /* 2716 * Page Directory table entry not valid, we need a new PT page 2717 */ 2718 if (pte == NULL) { 2719 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2720 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2721 } 2722 2723 pa = VM_PAGE_TO_PHYS(m); 2724 om = NULL; 2725 opa = origpte = 0; 2726 2727#if 0 2728 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2729 pte, *pte)); 2730#endif 2731 origpte = *pte; 2732 if (origpte) 2733 origpte = xpmap_mtop(origpte); 2734 opa = origpte & PG_FRAME; 2735 2736 /* 2737 * Mapping has not changed, must be protection or wiring change. 2738 */ 2739 if (origpte && (opa == pa)) { 2740 /* 2741 * Wiring change, just update stats. We don't worry about 2742 * wiring PT pages as they remain resident as long as there 2743 * are valid mappings in them. Hence, if a user page is wired, 2744 * the PT page will be also. 2745 */ 2746 if (wired && ((origpte & PG_W) == 0)) 2747 pmap->pm_stats.wired_count++; 2748 else if (!wired && (origpte & PG_W)) 2749 pmap->pm_stats.wired_count--; 2750 2751 /* 2752 * Remove extra pte reference 2753 */ 2754 if (mpte) 2755 mpte->wire_count--; 2756 2757 /* 2758 * We might be turning off write access to the page, 2759 * so we go ahead and sense modify status. 2760 */ 2761 if (origpte & PG_MANAGED) { 2762 om = m; 2763 pa |= PG_MANAGED; 2764 } 2765 goto validate; 2766 } 2767 /* 2768 * Mapping has changed, invalidate old range and fall through to 2769 * handle validating new mapping. 2770 */ 2771 if (opa) { 2772 if (origpte & PG_W) 2773 pmap->pm_stats.wired_count--; 2774 if (origpte & PG_MANAGED) { 2775 om = PHYS_TO_VM_PAGE(opa); 2776 pmap_remove_entry(pmap, om, va); 2777 } else if (va < VM_MAXUSER_ADDRESS) 2778 printf("va=0x%x is unmanaged :-( \n", va); 2779 2780 if (mpte != NULL) { 2781 mpte->wire_count--; 2782 KASSERT(mpte->wire_count > 0, 2783 ("pmap_enter: missing reference to page table page," 2784 " va: 0x%x", va)); 2785 } 2786 } else 2787 pmap->pm_stats.resident_count++; 2788 2789 /* 2790 * Enter on the PV list if part of our managed memory. 2791 */ 2792 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2793 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2794 ("pmap_enter: managed mapping within the clean submap")); 2795 pmap_insert_entry(pmap, va, m); 2796 pa |= PG_MANAGED; 2797 } 2798 2799 /* 2800 * Increment counters 2801 */ 2802 if (wired) 2803 pmap->pm_stats.wired_count++; 2804 2805validate: 2806 /* 2807 * Now validate mapping with desired protection/wiring. 2808 */ 2809 newpte = (pt_entry_t)(pa | PG_V); 2810 if ((prot & VM_PROT_WRITE) != 0) { 2811 newpte |= PG_RW; 2812 vm_page_flag_set(m, PG_WRITEABLE); 2813 } 2814#ifdef PAE 2815 if ((prot & VM_PROT_EXECUTE) == 0) 2816 newpte |= pg_nx; 2817#endif 2818 if (wired) 2819 newpte |= PG_W; 2820 if (va < VM_MAXUSER_ADDRESS) 2821 newpte |= PG_U; 2822 if (pmap == kernel_pmap) 2823 newpte |= pgeflag; 2824 2825 critical_enter(); 2826 /* 2827 * if the mapping or permission bits are different, we need 2828 * to update the pte. 2829 */ 2830 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2831 if (origpte) { 2832 invlva = FALSE; 2833 origpte = *pte; 2834 PT_SET_VA(pte, newpte | PG_A, FALSE); 2835 if (origpte & PG_A) { 2836 if (origpte & PG_MANAGED) 2837 vm_page_flag_set(om, PG_REFERENCED); 2838 if (opa != VM_PAGE_TO_PHYS(m)) 2839 invlva = TRUE; 2840#ifdef PAE 2841 if ((origpte & PG_NX) == 0 && 2842 (newpte & PG_NX) != 0) 2843 invlva = TRUE; 2844#endif 2845 } 2846 if (origpte & PG_M) { 2847 KASSERT((origpte & PG_RW), 2848 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2849 va, (uintmax_t)origpte)); 2850 if ((origpte & PG_MANAGED) != 0) 2851 vm_page_dirty(om); 2852 if ((prot & VM_PROT_WRITE) == 0) 2853 invlva = TRUE; 2854 } 2855 if (invlva) 2856 pmap_invalidate_page(pmap, va); 2857 } else{ 2858 PT_SET_VA(pte, newpte | PG_A, FALSE); 2859 } 2860 2861 } 2862 PT_UPDATES_FLUSH(); 2863 critical_exit(); 2864 if (*PMAP1) 2865 PT_SET_VA_MA(PMAP1, 0, TRUE); 2866 sched_unpin(); 2867 vm_page_unlock_queues(); 2868 PMAP_UNLOCK(pmap); 2869} 2870 2871/* 2872 * Maps a sequence of resident pages belonging to the same object. 2873 * The sequence begins with the given page m_start. This page is 2874 * mapped at the given virtual address start. Each subsequent page is 2875 * mapped at a virtual address that is offset from start by the same 2876 * amount as the page is offset from m_start within the object. The 2877 * last page in the sequence is the page with the largest offset from 2878 * m_start that can be mapped at a virtual address less than the given 2879 * virtual address end. Not every virtual page between start and end 2880 * is mapped; only those for which a resident page exists with the 2881 * corresponding offset from m_start are mapped. 2882 */ 2883void 2884pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2885 vm_page_t m_start, vm_prot_t prot) 2886{ 2887 vm_page_t m, mpte; 2888 vm_pindex_t diff, psize; 2889 multicall_entry_t mcl[16]; 2890 multicall_entry_t *mclp = mcl; 2891 int error, count = 0; 2892 2893 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2894 psize = atop(end - start); 2895 2896 mpte = NULL; 2897 m = m_start; 2898 PMAP_LOCK(pmap); 2899 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2900 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2901 prot, mpte); 2902 m = TAILQ_NEXT(m, listq); 2903 if (count == 16) { 2904 error = HYPERVISOR_multicall(mcl, count); 2905 KASSERT(error == 0, ("bad multicall %d", error)); 2906 mclp = mcl; 2907 count = 0; 2908 } 2909 } 2910 if (count) { 2911 error = HYPERVISOR_multicall(mcl, count); 2912 KASSERT(error == 0, ("bad multicall %d", error)); 2913 } 2914 2915 PMAP_UNLOCK(pmap); 2916} 2917 2918/* 2919 * this code makes some *MAJOR* assumptions: 2920 * 1. Current pmap & pmap exists. 2921 * 2. Not wired. 2922 * 3. Read access. 2923 * 4. No page table pages. 2924 * but is *MUCH* faster than pmap_enter... 2925 */ 2926 2927void 2928pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2929{ 2930 multicall_entry_t mcl, *mclp; 2931 int count = 0; 2932 mclp = &mcl; 2933 2934 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2935 pmap, va, m, prot); 2936 2937 PMAP_LOCK(pmap); 2938 (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2939 if (count) 2940 HYPERVISOR_multicall(&mcl, count); 2941 PMAP_UNLOCK(pmap); 2942} 2943 2944#ifdef notyet 2945void 2946pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2947{ 2948 int i, error, index = 0; 2949 multicall_entry_t mcl[16]; 2950 multicall_entry_t *mclp = mcl; 2951 2952 PMAP_LOCK(pmap); 2953 for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2954 if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2955 continue; 2956 2957 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2958 if (index == 16) { 2959 error = HYPERVISOR_multicall(mcl, index); 2960 mclp = mcl; 2961 index = 0; 2962 KASSERT(error == 0, ("bad multicall %d", error)); 2963 } 2964 } 2965 if (index) { 2966 error = HYPERVISOR_multicall(mcl, index); 2967 KASSERT(error == 0, ("bad multicall %d", error)); 2968 } 2969 2970 PMAP_UNLOCK(pmap); 2971} 2972#endif 2973 2974static vm_page_t 2975pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2976 vm_prot_t prot, vm_page_t mpte) 2977{ 2978 pt_entry_t *pte; 2979 vm_paddr_t pa; 2980 vm_page_t free; 2981 multicall_entry_t *mcl = *mclpp; 2982 2983 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2984 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2985 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2986 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2987 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2988 2989 /* 2990 * In the case that a page table page is not 2991 * resident, we are creating it here. 2992 */ 2993 if (va < VM_MAXUSER_ADDRESS) { 2994 unsigned ptepindex; 2995 pd_entry_t ptema; 2996 2997 /* 2998 * Calculate pagetable page index 2999 */ 3000 ptepindex = va >> PDRSHIFT; 3001 if (mpte && (mpte->pindex == ptepindex)) { 3002 mpte->wire_count++; 3003 } else { 3004 /* 3005 * Get the page directory entry 3006 */ 3007 ptema = pmap->pm_pdir[ptepindex]; 3008 3009 /* 3010 * If the page table page is mapped, we just increment 3011 * the hold count, and activate it. 3012 */ 3013 if (ptema & PG_V) { 3014 if (ptema & PG_PS) 3015 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 3016 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 3017 mpte->wire_count++; 3018 } else { 3019 mpte = _pmap_allocpte(pmap, ptepindex, 3020 M_NOWAIT); 3021 if (mpte == NULL) 3022 return (mpte); 3023 } 3024 } 3025 } else { 3026 mpte = NULL; 3027 } 3028 3029 /* 3030 * This call to vtopte makes the assumption that we are 3031 * entering the page into the current pmap. In order to support 3032 * quick entry into any pmap, one would likely use pmap_pte_quick. 3033 * But that isn't as quick as vtopte. 3034 */ 3035 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 3036 pte = vtopte(va); 3037 if (*pte & PG_V) { 3038 if (mpte != NULL) { 3039 mpte->wire_count--; 3040 mpte = NULL; 3041 } 3042 return (mpte); 3043 } 3044 3045 /* 3046 * Enter on the PV list if part of our managed memory. 3047 */ 3048 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3049 !pmap_try_insert_pv_entry(pmap, va, m)) { 3050 if (mpte != NULL) { 3051 free = NULL; 3052 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3053 pmap_invalidate_page(pmap, va); 3054 pmap_free_zero_pages(free); 3055 } 3056 3057 mpte = NULL; 3058 } 3059 return (mpte); 3060 } 3061 3062 /* 3063 * Increment counters 3064 */ 3065 pmap->pm_stats.resident_count++; 3066 3067 pa = VM_PAGE_TO_PHYS(m); 3068#ifdef PAE 3069 if ((prot & VM_PROT_EXECUTE) == 0) 3070 pa |= pg_nx; 3071#endif 3072 3073#if 0 3074 /* 3075 * Now validate mapping with RO protection 3076 */ 3077 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3078 pte_store(pte, pa | PG_V | PG_U); 3079 else 3080 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3081#else 3082 /* 3083 * Now validate mapping with RO protection 3084 */ 3085 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3086 pa = xpmap_ptom(pa | PG_V | PG_U); 3087 else 3088 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 3089 3090 mcl->op = __HYPERVISOR_update_va_mapping; 3091 mcl->args[0] = va; 3092 mcl->args[1] = (uint32_t)(pa & 0xffffffff); 3093 mcl->args[2] = (uint32_t)(pa >> 32); 3094 mcl->args[3] = 0; 3095 *mclpp = mcl + 1; 3096 *count = *count + 1; 3097#endif 3098 return mpte; 3099} 3100 3101/* 3102 * Make a temporary mapping for a physical address. This is only intended 3103 * to be used for panic dumps. 3104 */ 3105void * 3106pmap_kenter_temporary(vm_paddr_t pa, int i) 3107{ 3108 vm_offset_t va; 3109 vm_paddr_t ma = xpmap_ptom(pa); 3110 3111 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3112 PT_SET_MA(va, (ma & ~PAGE_MASK) | PG_V | pgeflag); 3113 invlpg(va); 3114 return ((void *)crashdumpmap); 3115} 3116 3117/* 3118 * This code maps large physical mmap regions into the 3119 * processor address space. Note that some shortcuts 3120 * are taken, but the code works. 3121 */ 3122void 3123pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3124 vm_object_t object, vm_pindex_t pindex, 3125 vm_size_t size) 3126{ 3127 vm_page_t p; 3128 3129 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3130 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, 3131 ("pmap_object_init_pt: non-device object")); 3132 if (pseflag && 3133 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3134 int i; 3135 vm_page_t m[1]; 3136 unsigned int ptepindex; 3137 int npdes; 3138 pd_entry_t ptepa; 3139 3140 PMAP_LOCK(pmap); 3141 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3142 goto out; 3143 PMAP_UNLOCK(pmap); 3144retry: 3145 p = vm_page_lookup(object, pindex); 3146 if (p != NULL) { 3147 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3148 goto retry; 3149 } else { 3150 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3151 if (p == NULL) 3152 return; 3153 m[0] = p; 3154 3155 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3156 vm_page_lock_queues(); 3157 vm_page_free(p); 3158 vm_page_unlock_queues(); 3159 return; 3160 } 3161 3162 p = vm_page_lookup(object, pindex); 3163 vm_page_wakeup(p); 3164 } 3165 3166 ptepa = VM_PAGE_TO_PHYS(p); 3167 if (ptepa & (NBPDR - 1)) 3168 return; 3169 3170 p->valid = VM_PAGE_BITS_ALL; 3171 3172 PMAP_LOCK(pmap); 3173 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3174 npdes = size >> PDRSHIFT; 3175 critical_enter(); 3176 for(i = 0; i < npdes; i++) { 3177 PD_SET_VA(pmap, ptepindex, 3178 ptepa | PG_U | PG_M | PG_RW | PG_V | PG_PS, FALSE); 3179 ptepa += NBPDR; 3180 ptepindex += 1; 3181 } 3182 pmap_invalidate_all(pmap); 3183 critical_exit(); 3184out: 3185 PMAP_UNLOCK(pmap); 3186 } 3187} 3188 3189/* 3190 * Routine: pmap_change_wiring 3191 * Function: Change the wiring attribute for a map/virtual-address 3192 * pair. 3193 * In/out conditions: 3194 * The mapping must already exist in the pmap. 3195 */ 3196void 3197pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3198{ 3199 pt_entry_t *pte; 3200 3201 vm_page_lock_queues(); 3202 PMAP_LOCK(pmap); 3203 pte = pmap_pte(pmap, va); 3204 3205 if (wired && !pmap_pte_w(pte)) { 3206 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3207 pmap->pm_stats.wired_count++; 3208 } else if (!wired && pmap_pte_w(pte)) { 3209 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3210 pmap->pm_stats.wired_count--; 3211 } 3212 3213 /* 3214 * Wiring is not a hardware characteristic so there is no need to 3215 * invalidate TLB. 3216 */ 3217 pmap_pte_release(pte); 3218 PMAP_UNLOCK(pmap); 3219 vm_page_unlock_queues(); 3220} 3221 3222 3223 3224/* 3225 * Copy the range specified by src_addr/len 3226 * from the source map to the range dst_addr/len 3227 * in the destination map. 3228 * 3229 * This routine is only advisory and need not do anything. 3230 */ 3231 3232void 3233pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3234 vm_offset_t src_addr) 3235{ 3236 vm_page_t free; 3237 vm_offset_t addr; 3238 vm_offset_t end_addr = src_addr + len; 3239 vm_offset_t pdnxt; 3240 3241 if (dst_addr != src_addr) 3242 return; 3243 3244 if (!pmap_is_current(src_pmap)) { 3245 CTR2(KTR_PMAP, 3246 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3247 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3248 3249 return; 3250 } 3251 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3252 dst_pmap, src_pmap, dst_addr, len, src_addr); 3253 3254 vm_page_lock_queues(); 3255 if (dst_pmap < src_pmap) { 3256 PMAP_LOCK(dst_pmap); 3257 PMAP_LOCK(src_pmap); 3258 } else { 3259 PMAP_LOCK(src_pmap); 3260 PMAP_LOCK(dst_pmap); 3261 } 3262 sched_pin(); 3263 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3264 pt_entry_t *src_pte, *dst_pte; 3265 vm_page_t dstmpte, srcmpte; 3266 pd_entry_t srcptepaddr; 3267 unsigned ptepindex; 3268 3269 if (addr >= UPT_MIN_ADDRESS) 3270 panic("pmap_copy: invalid to pmap_copy page tables"); 3271 3272 pdnxt = (addr + NBPDR) & ~PDRMASK; 3273 ptepindex = addr >> PDRSHIFT; 3274 3275 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3276 if (srcptepaddr == 0) 3277 continue; 3278 3279 if (srcptepaddr & PG_PS) { 3280 if (dst_pmap->pm_pdir[ptepindex] == 0) { 3281 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3282 dst_pmap->pm_stats.resident_count += 3283 NBPDR / PAGE_SIZE; 3284 } 3285 continue; 3286 } 3287 3288 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3289 if (srcmpte->wire_count == 0) 3290 panic("pmap_copy: source page table page is unused"); 3291 3292 if (pdnxt > end_addr) 3293 pdnxt = end_addr; 3294 3295 src_pte = vtopte(addr); 3296 while (addr < pdnxt) { 3297 pt_entry_t ptetemp; 3298 ptetemp = *src_pte; 3299 /* 3300 * we only virtual copy managed pages 3301 */ 3302 if ((ptetemp & PG_MANAGED) != 0) { 3303 dstmpte = pmap_allocpte(dst_pmap, addr, 3304 M_NOWAIT); 3305 if (dstmpte == NULL) 3306 break; 3307 dst_pte = pmap_pte_quick(dst_pmap, addr); 3308 if (*dst_pte == 0 && 3309 pmap_try_insert_pv_entry(dst_pmap, addr, 3310 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3311 /* 3312 * Clear the wired, modified, and 3313 * accessed (referenced) bits 3314 * during the copy. 3315 */ 3316 KASSERT(ptetemp != 0, ("src_pte not set")); 3317 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3318 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3319 ("no pmap copy expected: 0x%jx saw: 0x%jx", 3320 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3321 dst_pmap->pm_stats.resident_count++; 3322 } else { 3323 free = NULL; 3324 if (pmap_unwire_pte_hold(dst_pmap, 3325 dstmpte, &free)) { 3326 pmap_invalidate_page(dst_pmap, 3327 addr); 3328 pmap_free_zero_pages(free); 3329 } 3330 } 3331 if (dstmpte->wire_count >= srcmpte->wire_count) 3332 break; 3333 } 3334 addr += PAGE_SIZE; 3335 src_pte++; 3336 } 3337 } 3338 PT_UPDATES_FLUSH(); 3339 sched_unpin(); 3340 vm_page_unlock_queues(); 3341 PMAP_UNLOCK(src_pmap); 3342 PMAP_UNLOCK(dst_pmap); 3343} 3344 3345static __inline void 3346pagezero(void *page) 3347{ 3348#if defined(I686_CPU) 3349 if (cpu_class == CPUCLASS_686) { 3350#if defined(CPU_ENABLE_SSE) 3351 if (cpu_feature & CPUID_SSE2) 3352 sse2_pagezero(page); 3353 else 3354#endif 3355 i686_pagezero(page); 3356 } else 3357#endif 3358 bzero(page, PAGE_SIZE); 3359} 3360 3361/* 3362 * pmap_zero_page zeros the specified hardware page by mapping 3363 * the page into KVM and using bzero to clear its contents. 3364 */ 3365void 3366pmap_zero_page(vm_page_t m) 3367{ 3368 struct sysmaps *sysmaps; 3369 3370 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3371 mtx_lock(&sysmaps->lock); 3372 if (*sysmaps->CMAP2) 3373 panic("pmap_zero_page: CMAP2 busy"); 3374 sched_pin(); 3375 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3376 pagezero(sysmaps->CADDR2); 3377 PT_SET_MA(sysmaps->CADDR2, 0); 3378 sched_unpin(); 3379 mtx_unlock(&sysmaps->lock); 3380} 3381 3382/* 3383 * pmap_zero_page_area zeros the specified hardware page by mapping 3384 * the page into KVM and using bzero to clear its contents. 3385 * 3386 * off and size may not cover an area beyond a single hardware page. 3387 */ 3388void 3389pmap_zero_page_area(vm_page_t m, int off, int size) 3390{ 3391 struct sysmaps *sysmaps; 3392 3393 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3394 mtx_lock(&sysmaps->lock); 3395 if (*sysmaps->CMAP2) 3396 panic("pmap_zero_page: CMAP2 busy"); 3397 sched_pin(); 3398 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3399 3400 if (off == 0 && size == PAGE_SIZE) 3401 pagezero(sysmaps->CADDR2); 3402 else 3403 bzero((char *)sysmaps->CADDR2 + off, size); 3404 PT_SET_MA(sysmaps->CADDR2, 0); 3405 sched_unpin(); 3406 mtx_unlock(&sysmaps->lock); 3407} 3408 3409/* 3410 * pmap_zero_page_idle zeros the specified hardware page by mapping 3411 * the page into KVM and using bzero to clear its contents. This 3412 * is intended to be called from the vm_pagezero process only and 3413 * outside of Giant. 3414 */ 3415void 3416pmap_zero_page_idle(vm_page_t m) 3417{ 3418 3419 if (*CMAP3) 3420 panic("pmap_zero_page: CMAP3 busy"); 3421 sched_pin(); 3422 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3423 pagezero(CADDR3); 3424 PT_SET_MA(CADDR3, 0); 3425 sched_unpin(); 3426} 3427 3428/* 3429 * pmap_copy_page copies the specified (machine independent) 3430 * page by mapping the page into virtual memory and using 3431 * bcopy to copy the page, one machine dependent page at a 3432 * time. 3433 */ 3434void 3435pmap_copy_page(vm_page_t src, vm_page_t dst) 3436{ 3437 struct sysmaps *sysmaps; 3438 3439 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3440 mtx_lock(&sysmaps->lock); 3441 if (*sysmaps->CMAP1) 3442 panic("pmap_copy_page: CMAP1 busy"); 3443 if (*sysmaps->CMAP2) 3444 panic("pmap_copy_page: CMAP2 busy"); 3445 sched_pin(); 3446 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A); 3447 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M); 3448 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3449 PT_SET_MA(sysmaps->CADDR1, 0); 3450 PT_SET_MA(sysmaps->CADDR2, 0); 3451 sched_unpin(); 3452 mtx_unlock(&sysmaps->lock); 3453} 3454 3455/* 3456 * Returns true if the pmap's pv is one of the first 3457 * 16 pvs linked to from this page. This count may 3458 * be changed upwards or downwards in the future; it 3459 * is only necessary that true be returned for a small 3460 * subset of pmaps for proper page aging. 3461 */ 3462boolean_t 3463pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3464{ 3465 pv_entry_t pv; 3466 int loops = 0; 3467 3468 if (m->flags & PG_FICTITIOUS) 3469 return (FALSE); 3470 3471 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3472 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3473 if (PV_PMAP(pv) == pmap) { 3474 return TRUE; 3475 } 3476 loops++; 3477 if (loops >= 16) 3478 break; 3479 } 3480 return (FALSE); 3481} 3482 3483/* 3484 * pmap_page_wired_mappings: 3485 * 3486 * Return the number of managed mappings to the given physical page 3487 * that are wired. 3488 */ 3489int 3490pmap_page_wired_mappings(vm_page_t m) 3491{ 3492 pv_entry_t pv; 3493 pt_entry_t *pte; 3494 pmap_t pmap; 3495 int count; 3496 3497 count = 0; 3498 if ((m->flags & PG_FICTITIOUS) != 0) 3499 return (count); 3500 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3501 sched_pin(); 3502 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3503 pmap = PV_PMAP(pv); 3504 PMAP_LOCK(pmap); 3505 pte = pmap_pte_quick(pmap, pv->pv_va); 3506 if ((*pte & PG_W) != 0) 3507 count++; 3508 PMAP_UNLOCK(pmap); 3509 } 3510 sched_unpin(); 3511 return (count); 3512} 3513 3514/* 3515 * Returns TRUE if the given page is mapped individually or as part of 3516 * a 4mpage. Otherwise, returns FALSE. 3517 */ 3518boolean_t 3519pmap_page_is_mapped(vm_page_t m) 3520{ 3521 struct md_page *pvh; 3522 3523 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3524 return (FALSE); 3525 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3526 if (TAILQ_EMPTY(&m->md.pv_list)) { 3527 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3528 return (!TAILQ_EMPTY(&pvh->pv_list)); 3529 } else 3530 return (TRUE); 3531} 3532 3533/* 3534 * Remove all pages from specified address space 3535 * this aids process exit speeds. Also, this code 3536 * is special cased for current process only, but 3537 * can have the more generic (and slightly slower) 3538 * mode enabled. This is much faster than pmap_remove 3539 * in the case of running down an entire address space. 3540 */ 3541void 3542pmap_remove_pages(pmap_t pmap) 3543{ 3544 pt_entry_t *pte, tpte; 3545 vm_page_t m, free = NULL; 3546 pv_entry_t pv; 3547 struct pv_chunk *pc, *npc; 3548 int field, idx; 3549 int32_t bit; 3550 uint32_t inuse, bitmask; 3551 int allfree; 3552 3553 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3554 3555 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3556 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3557 return; 3558 } 3559 vm_page_lock_queues(); 3560 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3561 PMAP_LOCK(pmap); 3562 sched_pin(); 3563 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3564 allfree = 1; 3565 for (field = 0; field < _NPCM; field++) { 3566 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3567 while (inuse != 0) { 3568 bit = bsfl(inuse); 3569 bitmask = 1UL << bit; 3570 idx = field * 32 + bit; 3571 pv = &pc->pc_pventry[idx]; 3572 inuse &= ~bitmask; 3573 3574 pte = vtopte(pv->pv_va); 3575 tpte = *pte ? xpmap_mtop(*pte) : 0; 3576 3577 if (tpte == 0) { 3578 printf( 3579 "TPTE at %p IS ZERO @ VA %08x\n", 3580 pte, pv->pv_va); 3581 panic("bad pte"); 3582 } 3583 3584/* 3585 * We cannot remove wired pages from a process' mapping at this time 3586 */ 3587 if (tpte & PG_W) { 3588 allfree = 0; 3589 continue; 3590 } 3591 3592 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3593 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3594 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3595 m, (uintmax_t)m->phys_addr, 3596 (uintmax_t)tpte)); 3597 3598 KASSERT(m < &vm_page_array[vm_page_array_size], 3599 ("pmap_remove_pages: bad tpte %#jx", 3600 (uintmax_t)tpte)); 3601 3602 3603 PT_CLEAR_VA(pte, FALSE); 3604 3605 /* 3606 * Update the vm_page_t clean/reference bits. 3607 */ 3608 if (tpte & PG_M) 3609 vm_page_dirty(m); 3610 3611 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3612 if (TAILQ_EMPTY(&m->md.pv_list)) 3613 vm_page_flag_clear(m, PG_WRITEABLE); 3614 3615 pmap_unuse_pt(pmap, pv->pv_va, &free); 3616 3617 /* Mark free */ 3618 PV_STAT(pv_entry_frees++); 3619 PV_STAT(pv_entry_spare++); 3620 pv_entry_count--; 3621 pc->pc_map[field] |= bitmask; 3622 pmap->pm_stats.resident_count--; 3623 } 3624 } 3625 PT_UPDATES_FLUSH(); 3626 if (allfree) { 3627 PV_STAT(pv_entry_spare -= _NPCPV); 3628 PV_STAT(pc_chunk_count--); 3629 PV_STAT(pc_chunk_frees++); 3630 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3631 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3632 pmap_qremove((vm_offset_t)pc, 1); 3633 vm_page_unwire(m, 0); 3634 vm_page_free(m); 3635 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3636 } 3637 } 3638 PT_UPDATES_FLUSH(); 3639 if (*PMAP1) 3640 PT_SET_MA(PADDR1, 0); 3641 3642 sched_unpin(); 3643 pmap_invalidate_all(pmap); 3644 vm_page_unlock_queues(); 3645 PMAP_UNLOCK(pmap); 3646 pmap_free_zero_pages(free); 3647} 3648 3649/* 3650 * pmap_is_modified: 3651 * 3652 * Return whether or not the specified physical page was modified 3653 * in any physical maps. 3654 */ 3655boolean_t 3656pmap_is_modified(vm_page_t m) 3657{ 3658 pv_entry_t pv; 3659 pt_entry_t *pte; 3660 pmap_t pmap; 3661 boolean_t rv; 3662 3663 rv = FALSE; 3664 if (m->flags & PG_FICTITIOUS) 3665 return (rv); 3666 3667 sched_pin(); 3668 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3669 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3670 pmap = PV_PMAP(pv); 3671 PMAP_LOCK(pmap); 3672 pte = pmap_pte_quick(pmap, pv->pv_va); 3673 rv = (*pte & PG_M) != 0; 3674 PMAP_UNLOCK(pmap); 3675 if (rv) 3676 break; 3677 } 3678 if (*PMAP1) 3679 PT_SET_MA(PADDR1, 0); 3680 sched_unpin(); 3681 return (rv); 3682} 3683 3684/* 3685 * pmap_is_prefaultable: 3686 * 3687 * Return whether or not the specified virtual address is elgible 3688 * for prefault. 3689 */ 3690static boolean_t 3691pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3692{ 3693 pt_entry_t *pte; 3694 boolean_t rv = FALSE; 3695 3696 return (rv); 3697 3698 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3699 pte = vtopte(addr); 3700 rv = (*pte == 0); 3701 } 3702 return (rv); 3703} 3704 3705boolean_t 3706pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3707{ 3708 boolean_t rv; 3709 3710 PMAP_LOCK(pmap); 3711 rv = pmap_is_prefaultable_locked(pmap, addr); 3712 PMAP_UNLOCK(pmap); 3713 return (rv); 3714} 3715 3716void 3717pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3718{ 3719 int i, npages = round_page(len) >> PAGE_SHIFT; 3720 for (i = 0; i < npages; i++) { 3721 pt_entry_t *pte; 3722 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3723 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3724 PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3725 pmap_pte_release(pte); 3726 } 3727} 3728 3729void 3730pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3731{ 3732 int i, npages = round_page(len) >> PAGE_SHIFT; 3733 for (i = 0; i < npages; i++) { 3734 pt_entry_t *pte; 3735 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3736 PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3737 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3738 pmap_pte_release(pte); 3739 } 3740} 3741 3742/* 3743 * Clear the write and modified bits in each of the given page's mappings. 3744 */ 3745void 3746pmap_remove_write(vm_page_t m) 3747{ 3748 pv_entry_t pv; 3749 pmap_t pmap; 3750 pt_entry_t oldpte, *pte; 3751 3752 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3753 if ((m->flags & PG_FICTITIOUS) != 0 || 3754 (m->flags & PG_WRITEABLE) == 0) 3755 return; 3756 sched_pin(); 3757 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3758 pmap = PV_PMAP(pv); 3759 PMAP_LOCK(pmap); 3760 pte = pmap_pte_quick(pmap, pv->pv_va); 3761retry: 3762 oldpte = *pte; 3763 if ((oldpte & PG_RW) != 0) { 3764 vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M); 3765 3766 /* 3767 * Regardless of whether a pte is 32 or 64 bits 3768 * in size, PG_RW and PG_M are among the least 3769 * significant 32 bits. 3770 */ 3771 PT_SET_VA_MA(pte, newpte, TRUE); 3772 if (*pte != newpte) 3773 goto retry; 3774 3775 if ((oldpte & PG_M) != 0) 3776 vm_page_dirty(m); 3777 pmap_invalidate_page(pmap, pv->pv_va); 3778 } 3779 PMAP_UNLOCK(pmap); 3780 } 3781 vm_page_flag_clear(m, PG_WRITEABLE); 3782 PT_UPDATES_FLUSH(); 3783 if (*PMAP1) 3784 PT_SET_MA(PADDR1, 0); 3785 sched_unpin(); 3786} 3787 3788/* 3789 * pmap_ts_referenced: 3790 * 3791 * Return a count of reference bits for a page, clearing those bits. 3792 * It is not necessary for every reference bit to be cleared, but it 3793 * is necessary that 0 only be returned when there are truly no 3794 * reference bits set. 3795 * 3796 * XXX: The exact number of bits to check and clear is a matter that 3797 * should be tested and standardized at some point in the future for 3798 * optimal aging of shared pages. 3799 */ 3800int 3801pmap_ts_referenced(vm_page_t m) 3802{ 3803 pv_entry_t pv, pvf, pvn; 3804 pmap_t pmap; 3805 pt_entry_t *pte; 3806 int rtval = 0; 3807 3808 if (m->flags & PG_FICTITIOUS) 3809 return (rtval); 3810 sched_pin(); 3811 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3812 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3813 pvf = pv; 3814 do { 3815 pvn = TAILQ_NEXT(pv, pv_list); 3816 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3817 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3818 pmap = PV_PMAP(pv); 3819 PMAP_LOCK(pmap); 3820 pte = pmap_pte_quick(pmap, pv->pv_va); 3821 if ((*pte & PG_A) != 0) { 3822 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3823 pmap_invalidate_page(pmap, pv->pv_va); 3824 rtval++; 3825 if (rtval > 4) 3826 pvn = NULL; 3827 } 3828 PMAP_UNLOCK(pmap); 3829 } while ((pv = pvn) != NULL && pv != pvf); 3830 } 3831 PT_UPDATES_FLUSH(); 3832 if (*PMAP1) 3833 PT_SET_MA(PADDR1, 0); 3834 3835 sched_unpin(); 3836 return (rtval); 3837} 3838 3839/* 3840 * Clear the modify bits on the specified physical page. 3841 */ 3842void 3843pmap_clear_modify(vm_page_t m) 3844{ 3845 pv_entry_t pv; 3846 pmap_t pmap; 3847 pt_entry_t *pte; 3848 3849 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3850 if ((m->flags & PG_FICTITIOUS) != 0) 3851 return; 3852 sched_pin(); 3853 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3854 pmap = PV_PMAP(pv); 3855 PMAP_LOCK(pmap); 3856 pte = pmap_pte_quick(pmap, pv->pv_va); 3857 if ((*pte & PG_M) != 0) { 3858 /* 3859 * Regardless of whether a pte is 32 or 64 bits 3860 * in size, PG_M is among the least significant 3861 * 32 bits. 3862 */ 3863 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3864 pmap_invalidate_page(pmap, pv->pv_va); 3865 } 3866 PMAP_UNLOCK(pmap); 3867 } 3868 sched_unpin(); 3869} 3870 3871/* 3872 * pmap_clear_reference: 3873 * 3874 * Clear the reference bit on the specified physical page. 3875 */ 3876void 3877pmap_clear_reference(vm_page_t m) 3878{ 3879 pv_entry_t pv; 3880 pmap_t pmap; 3881 pt_entry_t *pte; 3882 3883 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3884 if ((m->flags & PG_FICTITIOUS) != 0) 3885 return; 3886 sched_pin(); 3887 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3888 pmap = PV_PMAP(pv); 3889 PMAP_LOCK(pmap); 3890 pte = pmap_pte_quick(pmap, pv->pv_va); 3891 if ((*pte & PG_A) != 0) { 3892 /* 3893 * Regardless of whether a pte is 32 or 64 bits 3894 * in size, PG_A is among the least significant 3895 * 32 bits. 3896 */ 3897 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3898 pmap_invalidate_page(pmap, pv->pv_va); 3899 } 3900 PMAP_UNLOCK(pmap); 3901 } 3902 sched_unpin(); 3903} 3904 3905/* 3906 * Miscellaneous support routines follow 3907 */ 3908 3909/* 3910 * Map a set of physical memory pages into the kernel virtual 3911 * address space. Return a pointer to where it is mapped. This 3912 * routine is intended to be used for mapping device memory, 3913 * NOT real memory. 3914 */ 3915void * 3916pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3917{ 3918 vm_offset_t va, offset; 3919 vm_size_t tmpsize; 3920 3921 offset = pa & PAGE_MASK; 3922 size = roundup(offset + size, PAGE_SIZE); 3923 pa = pa & PG_FRAME; 3924 3925 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3926 va = KERNBASE + pa; 3927 else 3928 va = kmem_alloc_nofault(kernel_map, size); 3929 if (!va) 3930 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3931 3932 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE) 3933 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode); 3934 pmap_invalidate_range(kernel_pmap, va, va + tmpsize); 3935 pmap_invalidate_cache_range(va, va + size); 3936 return ((void *)(va + offset)); 3937} 3938 3939void * 3940pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3941{ 3942 3943 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3944} 3945 3946void * 3947pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3948{ 3949 3950 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3951} 3952 3953void 3954pmap_unmapdev(vm_offset_t va, vm_size_t size) 3955{ 3956 vm_offset_t base, offset, tmpva; 3957 3958 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3959 return; 3960 base = trunc_page(va); 3961 offset = va & PAGE_MASK; 3962 size = roundup(offset + size, PAGE_SIZE); 3963 critical_enter(); 3964 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3965 pmap_kremove(tmpva); 3966 pmap_invalidate_range(kernel_pmap, va, tmpva); 3967 critical_exit(); 3968 kmem_free(kernel_map, base, size); 3969} 3970 3971/* 3972 * Sets the memory attribute for the specified page. 3973 */ 3974void 3975pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) 3976{ 3977 struct sysmaps *sysmaps; 3978 vm_offset_t sva, eva; 3979 3980 m->md.pat_mode = ma; 3981 if ((m->flags & PG_FICTITIOUS) != 0) 3982 return; 3983 3984 /* 3985 * If "m" is a normal page, flush it from the cache. 3986 * See pmap_invalidate_cache_range(). 3987 * 3988 * First, try to find an existing mapping of the page by sf 3989 * buffer. sf_buf_invalidate_cache() modifies mapping and 3990 * flushes the cache. 3991 */ 3992 if (sf_buf_invalidate_cache(m)) 3993 return; 3994 3995 /* 3996 * If page is not mapped by sf buffer, but CPU does not 3997 * support self snoop, map the page transient and do 3998 * invalidation. In the worst case, whole cache is flushed by 3999 * pmap_invalidate_cache_range(). 4000 */ 4001 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) { 4002 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 4003 mtx_lock(&sysmaps->lock); 4004 if (*sysmaps->CMAP2) 4005 panic("pmap_page_set_memattr: CMAP2 busy"); 4006 sched_pin(); 4007 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | 4008 xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M | 4009 pmap_cache_bits(m->md.pat_mode, 0)); 4010 invlcaddr(sysmaps->CADDR2); 4011 sva = (vm_offset_t)sysmaps->CADDR2; 4012 eva = sva + PAGE_SIZE; 4013 } else 4014 sva = eva = 0; /* gcc */ 4015 pmap_invalidate_cache_range(sva, eva); 4016 if (sva != 0) { 4017 PT_SET_MA(sysmaps->CADDR2, 0); 4018 sched_unpin(); 4019 mtx_unlock(&sysmaps->lock); 4020 } 4021} 4022 4023int 4024pmap_change_attr(va, size, mode) 4025 vm_offset_t va; 4026 vm_size_t size; 4027 int mode; 4028{ 4029 vm_offset_t base, offset, tmpva; 4030 pt_entry_t *pte; 4031 u_int opte, npte; 4032 pd_entry_t *pde; 4033 boolean_t changed; 4034 4035 base = trunc_page(va); 4036 offset = va & PAGE_MASK; 4037 size = roundup(offset + size, PAGE_SIZE); 4038 4039 /* Only supported on kernel virtual addresses. */ 4040 if (base <= VM_MAXUSER_ADDRESS) 4041 return (EINVAL); 4042 4043 /* 4MB pages and pages that aren't mapped aren't supported. */ 4044 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 4045 pde = pmap_pde(kernel_pmap, tmpva); 4046 if (*pde & PG_PS) 4047 return (EINVAL); 4048 if ((*pde & PG_V) == 0) 4049 return (EINVAL); 4050 pte = vtopte(va); 4051 if ((*pte & PG_V) == 0) 4052 return (EINVAL); 4053 } 4054 4055 changed = FALSE; 4056 4057 /* 4058 * Ok, all the pages exist and are 4k, so run through them updating 4059 * their cache mode. 4060 */ 4061 for (tmpva = base; size > 0; ) { 4062 pte = vtopte(tmpva); 4063 4064 /* 4065 * The cache mode bits are all in the low 32-bits of the 4066 * PTE, so we can just spin on updating the low 32-bits. 4067 */ 4068 do { 4069 opte = *(u_int *)pte; 4070 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 4071 npte |= pmap_cache_bits(mode, 0); 4072 PT_SET_VA_MA(pte, npte, TRUE); 4073 } while (npte != opte && (*pte != npte)); 4074 if (npte != opte) 4075 changed = TRUE; 4076 tmpva += PAGE_SIZE; 4077 size -= PAGE_SIZE; 4078 } 4079 4080 /* 4081 * Flush CPU caches to make sure any data isn't cached that shouldn't 4082 * be, etc. 4083 */ 4084 if (changed) { 4085 pmap_invalidate_range(kernel_pmap, base, tmpva); 4086 pmap_invalidate_cache_range(base, tmpva); 4087 } 4088 return (0); 4089} 4090 4091/* 4092 * perform the pmap work for mincore 4093 */ 4094int 4095pmap_mincore(pmap_t pmap, vm_offset_t addr) 4096{ 4097 pt_entry_t *ptep, pte; 4098 vm_page_t m; 4099 int val = 0; 4100 4101 PMAP_LOCK(pmap); 4102 ptep = pmap_pte(pmap, addr); 4103 pte = (ptep != NULL) ? PT_GET(ptep) : 0; 4104 pmap_pte_release(ptep); 4105 PMAP_UNLOCK(pmap); 4106 4107 if (pte != 0) { 4108 vm_paddr_t pa; 4109 4110 val = MINCORE_INCORE; 4111 if ((pte & PG_MANAGED) == 0) 4112 return val; 4113 4114 pa = pte & PG_FRAME; 4115 4116 m = PHYS_TO_VM_PAGE(pa); 4117 4118 /* 4119 * Modified by us 4120 */ 4121 if (pte & PG_M) 4122 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4123 else { 4124 /* 4125 * Modified by someone else 4126 */ 4127 vm_page_lock_queues(); 4128 if (m->dirty || pmap_is_modified(m)) 4129 val |= MINCORE_MODIFIED_OTHER; 4130 vm_page_unlock_queues(); 4131 } 4132 /* 4133 * Referenced by us 4134 */ 4135 if (pte & PG_A) 4136 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4137 else { 4138 /* 4139 * Referenced by someone else 4140 */ 4141 vm_page_lock_queues(); 4142 if ((m->flags & PG_REFERENCED) || 4143 pmap_ts_referenced(m)) { 4144 val |= MINCORE_REFERENCED_OTHER; 4145 vm_page_flag_set(m, PG_REFERENCED); 4146 } 4147 vm_page_unlock_queues(); 4148 } 4149 } 4150 return val; 4151} 4152 4153void 4154pmap_activate(struct thread *td) 4155{ 4156 pmap_t pmap, oldpmap; 4157 u_int32_t cr3; 4158 4159 critical_enter(); 4160 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4161 oldpmap = PCPU_GET(curpmap); 4162#if defined(SMP) 4163 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4164 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4165#else 4166 oldpmap->pm_active &= ~1; 4167 pmap->pm_active |= 1; 4168#endif 4169#ifdef PAE 4170 cr3 = vtophys(pmap->pm_pdpt); 4171#else 4172 cr3 = vtophys(pmap->pm_pdir); 4173#endif 4174 /* 4175 * pmap_activate is for the current thread on the current cpu 4176 */ 4177 td->td_pcb->pcb_cr3 = cr3; 4178 PT_UPDATES_FLUSH(); 4179 load_cr3(cr3); 4180 PCPU_SET(curpmap, pmap); 4181 critical_exit(); 4182} 4183 4184void 4185pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) 4186{ 4187} 4188 4189/* 4190 * Increase the starting virtual address of the given mapping if a 4191 * different alignment might result in more superpage mappings. 4192 */ 4193void 4194pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4195 vm_offset_t *addr, vm_size_t size) 4196{ 4197 vm_offset_t superpage_offset; 4198 4199 if (size < NBPDR) 4200 return; 4201 if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4202 offset += ptoa(object->pg_color); 4203 superpage_offset = offset & PDRMASK; 4204 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4205 (*addr & PDRMASK) == superpage_offset) 4206 return; 4207 if ((*addr & PDRMASK) < superpage_offset) 4208 *addr = (*addr & ~PDRMASK) + superpage_offset; 4209 else 4210 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4211} 4212 4213#ifdef XEN 4214 4215void 4216pmap_suspend() 4217{ 4218 pmap_t pmap; 4219 int i, pdir, offset; 4220 vm_paddr_t pdirma; 4221 mmu_update_t mu[4]; 4222 4223 /* 4224 * We need to remove the recursive mapping structure from all 4225 * our pmaps so that Xen doesn't get confused when it restores 4226 * the page tables. The recursive map lives at page directory 4227 * index PTDPTDI. We assume that the suspend code has stopped 4228 * the other vcpus (if any). 4229 */ 4230 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4231 for (i = 0; i < 4; i++) { 4232 /* 4233 * Figure out which page directory (L2) page 4234 * contains this bit of the recursive map and 4235 * the offset within that page of the map 4236 * entry 4237 */ 4238 pdir = (PTDPTDI + i) / NPDEPG; 4239 offset = (PTDPTDI + i) % NPDEPG; 4240 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4241 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4242 mu[i].val = 0; 4243 } 4244 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4245 } 4246} 4247 4248void 4249pmap_resume() 4250{ 4251 pmap_t pmap; 4252 int i, pdir, offset; 4253 vm_paddr_t pdirma; 4254 mmu_update_t mu[4]; 4255 4256 /* 4257 * Restore the recursive map that we removed on suspend. 4258 */ 4259 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4260 for (i = 0; i < 4; i++) { 4261 /* 4262 * Figure out which page directory (L2) page 4263 * contains this bit of the recursive map and 4264 * the offset within that page of the map 4265 * entry 4266 */ 4267 pdir = (PTDPTDI + i) / NPDEPG; 4268 offset = (PTDPTDI + i) % NPDEPG; 4269 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4270 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4271 mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V; 4272 } 4273 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4274 } 4275} 4276 4277#endif 4278 4279#if defined(PMAP_DEBUG) 4280pmap_pid_dump(int pid) 4281{ 4282 pmap_t pmap; 4283 struct proc *p; 4284 int npte = 0; 4285 int index; 4286 4287 sx_slock(&allproc_lock); 4288 FOREACH_PROC_IN_SYSTEM(p) { 4289 if (p->p_pid != pid) 4290 continue; 4291 4292 if (p->p_vmspace) { 4293 int i,j; 4294 index = 0; 4295 pmap = vmspace_pmap(p->p_vmspace); 4296 for (i = 0; i < NPDEPTD; i++) { 4297 pd_entry_t *pde; 4298 pt_entry_t *pte; 4299 vm_offset_t base = i << PDRSHIFT; 4300 4301 pde = &pmap->pm_pdir[i]; 4302 if (pde && pmap_pde_v(pde)) { 4303 for (j = 0; j < NPTEPG; j++) { 4304 vm_offset_t va = base + (j << PAGE_SHIFT); 4305 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4306 if (index) { 4307 index = 0; 4308 printf("\n"); 4309 } 4310 sx_sunlock(&allproc_lock); 4311 return npte; 4312 } 4313 pte = pmap_pte(pmap, va); 4314 if (pte && pmap_pte_v(pte)) { 4315 pt_entry_t pa; 4316 vm_page_t m; 4317 pa = PT_GET(pte); 4318 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4319 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4320 va, pa, m->hold_count, m->wire_count, m->flags); 4321 npte++; 4322 index++; 4323 if (index >= 2) { 4324 index = 0; 4325 printf("\n"); 4326 } else { 4327 printf(" "); 4328 } 4329 } 4330 } 4331 } 4332 } 4333 } 4334 } 4335 sx_sunlock(&allproc_lock); 4336 return npte; 4337} 4338#endif 4339 4340#if defined(DEBUG) 4341 4342static void pads(pmap_t pm); 4343void pmap_pvdump(vm_paddr_t pa); 4344 4345/* print address space of pmap*/ 4346static void 4347pads(pmap_t pm) 4348{ 4349 int i, j; 4350 vm_paddr_t va; 4351 pt_entry_t *ptep; 4352 4353 if (pm == kernel_pmap) 4354 return; 4355 for (i = 0; i < NPDEPTD; i++) 4356 if (pm->pm_pdir[i]) 4357 for (j = 0; j < NPTEPG; j++) { 4358 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4359 if (pm == kernel_pmap && va < KERNBASE) 4360 continue; 4361 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4362 continue; 4363 ptep = pmap_pte(pm, va); 4364 if (pmap_pte_v(ptep)) 4365 printf("%x:%x ", va, *ptep); 4366 }; 4367 4368} 4369 4370void 4371pmap_pvdump(vm_paddr_t pa) 4372{ 4373 pv_entry_t pv; 4374 pmap_t pmap; 4375 vm_page_t m; 4376 4377 printf("pa %x", pa); 4378 m = PHYS_TO_VM_PAGE(pa); 4379 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4380 pmap = PV_PMAP(pv); 4381 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4382 pads(pmap); 4383 } 4384 printf(" "); 4385} 4386#endif 4387