pmap.c revision 139241
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * the Systems Programming Group of the University of Utah Computer 11 * Science Department and William Jolitz of UUNET Technologies Inc. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the University of 24 * California, Berkeley and its contributors. 25 * 4. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 42 */ 43/*- 44 * Copyright (c) 2003 Networks Associates Technology, Inc. 45 * All rights reserved. 46 * 47 * This software was developed for the FreeBSD Project by Jake Burkholder, 48 * Safeport Network Services, and Network Associates Laboratories, the 49 * Security Research Division of Network Associates, Inc. under 50 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 51 * CHATS research program. 52 * 53 * Redistribution and use in source and binary forms, with or without 54 * modification, are permitted provided that the following conditions 55 * are met: 56 * 1. Redistributions of source code must retain the above copyright 57 * notice, this list of conditions and the following disclaimer. 58 * 2. Redistributions in binary form must reproduce the above copyright 59 * notice, this list of conditions and the following disclaimer in the 60 * documentation and/or other materials provided with the distribution. 61 * 62 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 63 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 65 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 * SUCH DAMAGE. 73 */ 74 75#include <sys/cdefs.h> 76__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 139241 2004-12-23 20:16:11Z alc $"); 77 78/* 79 * Manages physical address maps. 80 * 81 * In addition to hardware address maps, this 82 * module is called upon to provide software-use-only 83 * maps which may or may not be stored in the same 84 * form as hardware maps. These pseudo-maps are 85 * used to store intermediate results from copy 86 * operations to and from address spaces. 87 * 88 * Since the information managed by this module is 89 * also stored by the logical address mapping module, 90 * this module may throw away valid virtual-to-physical 91 * mappings at almost any time. However, invalidations 92 * of virtual-to-physical mappings must be done as 93 * requested. 94 * 95 * In order to cope with hardware architectures which 96 * make virtual-to-physical map invalidates expensive, 97 * this module may delay invalidate or reduced protection 98 * operations until such time as they are actually 99 * necessary. This module is given full information as 100 * to which processors are currently using which maps, 101 * and to when physical maps must be made correct. 102 */ 103 104#include "opt_cpu.h" 105#include "opt_pmap.h" 106#include "opt_msgbuf.h" 107#include "opt_kstack_pages.h" 108 109#include <sys/param.h> 110#include <sys/systm.h> 111#include <sys/kernel.h> 112#include <sys/lock.h> 113#include <sys/malloc.h> 114#include <sys/mman.h> 115#include <sys/msgbuf.h> 116#include <sys/mutex.h> 117#include <sys/proc.h> 118#include <sys/sx.h> 119#include <sys/vmmeter.h> 120#include <sys/sched.h> 121#include <sys/sysctl.h> 122#ifdef SMP 123#include <sys/smp.h> 124#endif 125 126#include <vm/vm.h> 127#include <vm/vm_param.h> 128#include <vm/vm_kern.h> 129#include <vm/vm_page.h> 130#include <vm/vm_map.h> 131#include <vm/vm_object.h> 132#include <vm/vm_extern.h> 133#include <vm/vm_pageout.h> 134#include <vm/vm_pager.h> 135#include <vm/uma.h> 136 137#include <machine/cpu.h> 138#include <machine/cputypes.h> 139#include <machine/md_var.h> 140#include <machine/pcb.h> 141#include <machine/specialreg.h> 142#ifdef SMP 143#include <machine/smp.h> 144#endif 145 146#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) 147#define CPU_ENABLE_SSE 148#endif 149#if defined(CPU_DISABLE_SSE) 150#undef CPU_ENABLE_SSE 151#endif 152 153#ifndef PMAP_SHPGPERPROC 154#define PMAP_SHPGPERPROC 200 155#endif 156 157#if defined(DIAGNOSTIC) 158#define PMAP_DIAGNOSTIC 159#endif 160 161#define MINPV 2048 162 163#if !defined(PMAP_DIAGNOSTIC) 164#define PMAP_INLINE __inline 165#else 166#define PMAP_INLINE 167#endif 168 169/* 170 * Get PDEs and PTEs for user/kernel address space 171 */ 172#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 173#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 174 175#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 176#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 177#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 178#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 179#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 180 181#define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 182 atomic_clear_int((u_int *)(pte), PG_W)) 183#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 184 185struct pmap kernel_pmap_store; 186LIST_HEAD(pmaplist, pmap); 187static struct pmaplist allpmaps; 188static struct mtx allpmaps_lock; 189 190vm_paddr_t avail_end; /* PA of last available physical page */ 191vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 192vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 193static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 194int pgeflag = 0; /* PG_G or-in */ 195int pseflag = 0; /* PG_PS or-in */ 196 197static int nkpt; 198vm_offset_t kernel_vm_end; 199extern u_int32_t KERNend; 200 201#ifdef PAE 202static uma_zone_t pdptzone; 203#endif 204 205/* 206 * Data for the pv entry allocation mechanism 207 */ 208static uma_zone_t pvzone; 209static struct vm_object pvzone_obj; 210static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 211int pmap_pagedaemon_waken; 212 213/* 214 * All those kernel PT submaps that BSD is so fond of 215 */ 216struct sysmaps { 217 struct mtx lock; 218 pt_entry_t *CMAP1; 219 pt_entry_t *CMAP2; 220 caddr_t CADDR1; 221 caddr_t CADDR2; 222}; 223static struct sysmaps sysmaps_pcpu[MAXCPU]; 224pt_entry_t *CMAP1 = 0; 225static pt_entry_t *CMAP3; 226caddr_t CADDR1 = 0, ptvmmap = 0; 227static caddr_t CADDR3; 228struct msgbuf *msgbufp = 0; 229 230/* 231 * Crashdump maps. 232 */ 233static caddr_t crashdumpmap; 234 235#ifdef SMP 236extern pt_entry_t *SMPpt; 237#endif 238static pt_entry_t *PMAP1 = 0, *PMAP2; 239static pt_entry_t *PADDR1 = 0, *PADDR2; 240#ifdef SMP 241static int PMAP1cpu; 242static int PMAP1changedcpu; 243SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 244 &PMAP1changedcpu, 0, 245 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 246#endif 247static int PMAP1changed; 248SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 249 &PMAP1changed, 0, 250 "Number of times pmap_pte_quick changed PMAP1"); 251static int PMAP1unchanged; 252SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 253 &PMAP1unchanged, 0, 254 "Number of times pmap_pte_quick didn't change PMAP1"); 255static struct mtx PMAP2mutex; 256 257static PMAP_INLINE void free_pv_entry(pv_entry_t pv); 258static pv_entry_t get_pv_entry(void); 259static void pmap_clear_ptes(vm_page_t m, int bit); 260 261static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva); 262static void pmap_remove_page(struct pmap *pmap, vm_offset_t va); 263static int pmap_remove_entry(struct pmap *pmap, vm_page_t m, 264 vm_offset_t va); 265static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 266 267static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 268 269static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 270static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m); 271static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 272static void pmap_pte_release(pt_entry_t *pte); 273static int pmap_unuse_pt(pmap_t, vm_offset_t); 274static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 275#ifdef PAE 276static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 277#endif 278 279CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 280CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 281 282/* 283 * Move the kernel virtual free pointer to the next 284 * 4MB. This is used to help improve performance 285 * by using a large (4MB) page for much of the kernel 286 * (.text, .data, .bss) 287 */ 288static vm_offset_t 289pmap_kmem_choose(vm_offset_t addr) 290{ 291 vm_offset_t newaddr = addr; 292 293#ifndef DISABLE_PSE 294 if (cpu_feature & CPUID_PSE) 295 newaddr = (addr + PDRMASK) & ~PDRMASK; 296#endif 297 return newaddr; 298} 299 300/* 301 * Bootstrap the system enough to run with virtual memory. 302 * 303 * On the i386 this is called after mapping has already been enabled 304 * and just syncs the pmap module with what has already been done. 305 * [We can't call it easily with mapping off since the kernel is not 306 * mapped with PA == VA, hence we would have to relocate every address 307 * from the linked base (virtual) address "KERNBASE" to the actual 308 * (physical) address starting relative to 0] 309 */ 310void 311pmap_bootstrap(firstaddr, loadaddr) 312 vm_paddr_t firstaddr; 313 vm_paddr_t loadaddr; 314{ 315 vm_offset_t va; 316 pt_entry_t *pte, *unused; 317 struct sysmaps *sysmaps; 318 int i; 319 320 /* 321 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 322 * large. It should instead be correctly calculated in locore.s and 323 * not based on 'first' (which is a physical address, not a virtual 324 * address, for the start of unused physical memory). The kernel 325 * page tables are NOT double mapped and thus should not be included 326 * in this calculation. 327 */ 328 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 329 virtual_avail = pmap_kmem_choose(virtual_avail); 330 331 virtual_end = VM_MAX_KERNEL_ADDRESS; 332 333 /* 334 * Initialize the kernel pmap (which is statically allocated). 335 */ 336 PMAP_LOCK_INIT(kernel_pmap); 337 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 338#ifdef PAE 339 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 340#endif 341 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 342 TAILQ_INIT(&kernel_pmap->pm_pvlist); 343 LIST_INIT(&allpmaps); 344 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 345 mtx_lock_spin(&allpmaps_lock); 346 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 347 mtx_unlock_spin(&allpmaps_lock); 348 nkpt = NKPT; 349 350 /* 351 * Reserve some special page table entries/VA space for temporary 352 * mapping of pages. 353 */ 354#define SYSMAP(c, p, v, n) \ 355 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 356 357 va = virtual_avail; 358 pte = vtopte(va); 359 360 /* 361 * CMAP1/CMAP2 are used for zeroing and copying pages. 362 * CMAP3 is used for the idle process page zeroing. 363 */ 364 for (i = 0; i < MAXCPU; i++) { 365 sysmaps = &sysmaps_pcpu[i]; 366 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 367 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 368 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 369 } 370 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 371 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 372 *CMAP3 = 0; 373 374 /* 375 * Crashdump maps. 376 */ 377 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 378 379 /* 380 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 381 */ 382 SYSMAP(caddr_t, unused, ptvmmap, 1) 383 384 /* 385 * msgbufp is used to map the system message buffer. 386 */ 387 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 388 389 /* 390 * ptemap is used for pmap_pte_quick 391 */ 392 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 393 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 394 395 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 396 397 virtual_avail = va; 398 399 *CMAP1 = 0; 400 for (i = 0; i < NKPT; i++) 401 PTD[i] = 0; 402 403 /* Turn on PG_G on kernel page(s) */ 404 pmap_set_pg(); 405} 406 407/* 408 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 409 */ 410void 411pmap_set_pg(void) 412{ 413 pd_entry_t pdir; 414 pt_entry_t *pte; 415 vm_offset_t va, endva; 416 int i; 417 418 if (pgeflag == 0) 419 return; 420 421 i = KERNLOAD/NBPDR; 422 endva = KERNBASE + KERNend; 423 424 if (pseflag) { 425 va = KERNBASE + KERNLOAD; 426 while (va < endva) { 427 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 428 pdir |= pgeflag; 429 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 430 invltlb(); /* Play it safe, invltlb() every time */ 431 i++; 432 va += NBPDR; 433 } 434 } else { 435 va = (vm_offset_t)btext; 436 while (va < endva) { 437 pte = vtopte(va); 438 if (*pte) 439 *pte |= pgeflag; 440 invltlb(); /* Play it safe, invltlb() every time */ 441 va += PAGE_SIZE; 442 } 443 } 444} 445 446#ifdef PAE 447 448static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 449 450static void * 451pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 452{ 453 *flags = UMA_SLAB_PRIV; 454 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 455 1, 0)); 456} 457#endif 458 459/* 460 * Initialize the pmap module. 461 * Called by vm_init, to initialize any structures that the pmap 462 * system needs to map virtual memory. 463 * pmap_init has been enhanced to support in a fairly consistant 464 * way, discontiguous physical memory. 465 */ 466void 467pmap_init(void) 468{ 469 int i; 470 471 /* 472 * Allocate memory for random pmap data structures. Includes the 473 * pv_head_table. 474 */ 475 476 for(i = 0; i < vm_page_array_size; i++) { 477 vm_page_t m; 478 479 m = &vm_page_array[i]; 480 TAILQ_INIT(&m->md.pv_list); 481 m->md.pv_list_count = 0; 482 } 483 484 /* 485 * init the pv free list 486 */ 487 pvzone = uma_zcreate("PV ENTRY", sizeof (struct pv_entry), NULL, NULL, 488 NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE); 489 uma_prealloc(pvzone, MINPV); 490 491#ifdef PAE 492 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 493 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 494 UMA_ZONE_VM | UMA_ZONE_NOFREE); 495 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 496#endif 497 498 /* 499 * Now it is safe to enable pv_table recording. 500 */ 501 pmap_initialized = TRUE; 502} 503 504/* 505 * Initialize the address space (zone) for the pv_entries. Set a 506 * high water mark so that the system can recover from excessive 507 * numbers of pv entries. 508 */ 509void 510pmap_init2() 511{ 512 int shpgperproc = PMAP_SHPGPERPROC; 513 514 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 515 pv_entry_max = shpgperproc * maxproc + vm_page_array_size; 516 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 517 pv_entry_high_water = 9 * (pv_entry_max / 10); 518 uma_zone_set_obj(pvzone, &pvzone_obj, pv_entry_max); 519} 520 521 522/*************************************************** 523 * Low level helper routines..... 524 ***************************************************/ 525 526#if defined(PMAP_DIAGNOSTIC) 527 528/* 529 * This code checks for non-writeable/modified pages. 530 * This should be an invalid condition. 531 */ 532static int 533pmap_nw_modified(pt_entry_t ptea) 534{ 535 int pte; 536 537 pte = (int) ptea; 538 539 if ((pte & (PG_M|PG_RW)) == PG_M) 540 return 1; 541 else 542 return 0; 543} 544#endif 545 546 547/* 548 * this routine defines the region(s) of memory that should 549 * not be tested for the modified bit. 550 */ 551static PMAP_INLINE int 552pmap_track_modified(vm_offset_t va) 553{ 554 if ((va < kmi.clean_sva) || (va >= kmi.clean_eva)) 555 return 1; 556 else 557 return 0; 558} 559 560#ifdef SMP 561/* 562 * For SMP, these functions have to use the IPI mechanism for coherence. 563 */ 564void 565pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 566{ 567 u_int cpumask; 568 u_int other_cpus; 569 570 if (smp_started) { 571 if (!(read_eflags() & PSL_I)) 572 panic("%s: interrupts disabled", __func__); 573 mtx_lock_spin(&smp_ipi_mtx); 574 } else 575 critical_enter(); 576 /* 577 * We need to disable interrupt preemption but MUST NOT have 578 * interrupts disabled here. 579 * XXX we may need to hold schedlock to get a coherent pm_active 580 * XXX critical sections disable interrupts again 581 */ 582 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 583 invlpg(va); 584 smp_invlpg(va); 585 } else { 586 cpumask = PCPU_GET(cpumask); 587 other_cpus = PCPU_GET(other_cpus); 588 if (pmap->pm_active & cpumask) 589 invlpg(va); 590 if (pmap->pm_active & other_cpus) 591 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 592 } 593 if (smp_started) 594 mtx_unlock_spin(&smp_ipi_mtx); 595 else 596 critical_exit(); 597} 598 599void 600pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 601{ 602 u_int cpumask; 603 u_int other_cpus; 604 vm_offset_t addr; 605 606 if (smp_started) { 607 if (!(read_eflags() & PSL_I)) 608 panic("%s: interrupts disabled", __func__); 609 mtx_lock_spin(&smp_ipi_mtx); 610 } else 611 critical_enter(); 612 /* 613 * We need to disable interrupt preemption but MUST NOT have 614 * interrupts disabled here. 615 * XXX we may need to hold schedlock to get a coherent pm_active 616 * XXX critical sections disable interrupts again 617 */ 618 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 619 for (addr = sva; addr < eva; addr += PAGE_SIZE) 620 invlpg(addr); 621 smp_invlpg_range(sva, eva); 622 } else { 623 cpumask = PCPU_GET(cpumask); 624 other_cpus = PCPU_GET(other_cpus); 625 if (pmap->pm_active & cpumask) 626 for (addr = sva; addr < eva; addr += PAGE_SIZE) 627 invlpg(addr); 628 if (pmap->pm_active & other_cpus) 629 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 630 sva, eva); 631 } 632 if (smp_started) 633 mtx_unlock_spin(&smp_ipi_mtx); 634 else 635 critical_exit(); 636} 637 638void 639pmap_invalidate_all(pmap_t pmap) 640{ 641 u_int cpumask; 642 u_int other_cpus; 643 644 if (smp_started) { 645 if (!(read_eflags() & PSL_I)) 646 panic("%s: interrupts disabled", __func__); 647 mtx_lock_spin(&smp_ipi_mtx); 648 } else 649 critical_enter(); 650 /* 651 * We need to disable interrupt preemption but MUST NOT have 652 * interrupts disabled here. 653 * XXX we may need to hold schedlock to get a coherent pm_active 654 * XXX critical sections disable interrupts again 655 */ 656 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 657 invltlb(); 658 smp_invltlb(); 659 } else { 660 cpumask = PCPU_GET(cpumask); 661 other_cpus = PCPU_GET(other_cpus); 662 if (pmap->pm_active & cpumask) 663 invltlb(); 664 if (pmap->pm_active & other_cpus) 665 smp_masked_invltlb(pmap->pm_active & other_cpus); 666 } 667 if (smp_started) 668 mtx_unlock_spin(&smp_ipi_mtx); 669 else 670 critical_exit(); 671} 672#else /* !SMP */ 673/* 674 * Normal, non-SMP, 486+ invalidation functions. 675 * We inline these within pmap.c for speed. 676 */ 677PMAP_INLINE void 678pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 679{ 680 681 if (pmap == kernel_pmap || pmap->pm_active) 682 invlpg(va); 683} 684 685PMAP_INLINE void 686pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 687{ 688 vm_offset_t addr; 689 690 if (pmap == kernel_pmap || pmap->pm_active) 691 for (addr = sva; addr < eva; addr += PAGE_SIZE) 692 invlpg(addr); 693} 694 695PMAP_INLINE void 696pmap_invalidate_all(pmap_t pmap) 697{ 698 699 if (pmap == kernel_pmap || pmap->pm_active) 700 invltlb(); 701} 702#endif /* !SMP */ 703 704/* 705 * Are we current address space or kernel? N.B. We return FALSE when 706 * a pmap's page table is in use because a kernel thread is borrowing 707 * it. The borrowed page table can change spontaneously, making any 708 * dependence on its continued use subject to a race condition. 709 */ 710static __inline int 711pmap_is_current(pmap_t pmap) 712{ 713 714 return (pmap == kernel_pmap || 715 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 716 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 717} 718 719/* 720 * If the given pmap is not the current or kernel pmap, the returned pte must 721 * be released by passing it to pmap_pte_release(). 722 */ 723pt_entry_t * 724pmap_pte(pmap_t pmap, vm_offset_t va) 725{ 726 pd_entry_t newpf; 727 pd_entry_t *pde; 728 729 pde = pmap_pde(pmap, va); 730 if (*pde & PG_PS) 731 return (pde); 732 if (*pde != 0) { 733 /* are we current address space or kernel? */ 734 if (pmap_is_current(pmap)) 735 return (vtopte(va)); 736 mtx_lock(&PMAP2mutex); 737 newpf = *pde & PG_FRAME; 738 if ((*PMAP2 & PG_FRAME) != newpf) { 739 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 740 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 741 } 742 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 743 } 744 return (0); 745} 746 747/* 748 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 749 * being NULL. 750 */ 751static __inline void 752pmap_pte_release(pt_entry_t *pte) 753{ 754 755 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 756 mtx_unlock(&PMAP2mutex); 757} 758 759static __inline void 760invlcaddr(void *caddr) 761{ 762 763 invlpg((u_int)caddr); 764} 765 766/* 767 * Super fast pmap_pte routine best used when scanning 768 * the pv lists. This eliminates many coarse-grained 769 * invltlb calls. Note that many of the pv list 770 * scans are across different pmaps. It is very wasteful 771 * to do an entire invltlb for checking a single mapping. 772 * 773 * If the given pmap is not the current pmap, vm_page_queue_mtx 774 * must be held and curthread pinned to a CPU. 775 */ 776static pt_entry_t * 777pmap_pte_quick(pmap_t pmap, vm_offset_t va) 778{ 779 pd_entry_t newpf; 780 pd_entry_t *pde; 781 782 pde = pmap_pde(pmap, va); 783 if (*pde & PG_PS) 784 return (pde); 785 if (*pde != 0) { 786 /* are we current address space or kernel? */ 787 if (pmap_is_current(pmap)) 788 return (vtopte(va)); 789 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 790 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 791 newpf = *pde & PG_FRAME; 792 if ((*PMAP1 & PG_FRAME) != newpf) { 793 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 794#ifdef SMP 795 PMAP1cpu = PCPU_GET(cpuid); 796#endif 797 invlcaddr(PADDR1); 798 PMAP1changed++; 799 } else 800#ifdef SMP 801 if (PMAP1cpu != PCPU_GET(cpuid)) { 802 PMAP1cpu = PCPU_GET(cpuid); 803 invlcaddr(PADDR1); 804 PMAP1changedcpu++; 805 } else 806#endif 807 PMAP1unchanged++; 808 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 809 } 810 return (0); 811} 812 813/* 814 * Routine: pmap_extract 815 * Function: 816 * Extract the physical page address associated 817 * with the given map/virtual_address pair. 818 */ 819vm_paddr_t 820pmap_extract(pmap_t pmap, vm_offset_t va) 821{ 822 vm_paddr_t rtval; 823 pt_entry_t *pte; 824 pd_entry_t pde; 825 826 rtval = 0; 827 PMAP_LOCK(pmap); 828 pde = pmap->pm_pdir[va >> PDRSHIFT]; 829 if (pde != 0) { 830 if ((pde & PG_PS) != 0) { 831 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 832 PMAP_UNLOCK(pmap); 833 return rtval; 834 } 835 pte = pmap_pte(pmap, va); 836 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 837 pmap_pte_release(pte); 838 } 839 PMAP_UNLOCK(pmap); 840 return (rtval); 841} 842 843/* 844 * Routine: pmap_extract_and_hold 845 * Function: 846 * Atomically extract and hold the physical page 847 * with the given pmap and virtual address pair 848 * if that mapping permits the given protection. 849 */ 850vm_page_t 851pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 852{ 853 pd_entry_t pde; 854 pt_entry_t pte; 855 vm_page_t m; 856 857 m = NULL; 858 vm_page_lock_queues(); 859 PMAP_LOCK(pmap); 860 pde = *pmap_pde(pmap, va); 861 if (pde != 0) { 862 if (pde & PG_PS) { 863 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 864 m = PHYS_TO_VM_PAGE((pde & ~PDRMASK) | 865 (va & PDRMASK)); 866 vm_page_hold(m); 867 } 868 } else { 869 sched_pin(); 870 pte = *pmap_pte_quick(pmap, va); 871 if (pte != 0 && 872 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 873 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 874 vm_page_hold(m); 875 } 876 sched_unpin(); 877 } 878 } 879 vm_page_unlock_queues(); 880 PMAP_UNLOCK(pmap); 881 return (m); 882} 883 884/*************************************************** 885 * Low level mapping routines..... 886 ***************************************************/ 887 888/* 889 * Add a wired page to the kva. 890 * Note: not SMP coherent. 891 */ 892PMAP_INLINE void 893pmap_kenter(vm_offset_t va, vm_paddr_t pa) 894{ 895 pt_entry_t *pte; 896 897 pte = vtopte(va); 898 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 899} 900 901/* 902 * Remove a page from the kernel pagetables. 903 * Note: not SMP coherent. 904 */ 905PMAP_INLINE void 906pmap_kremove(vm_offset_t va) 907{ 908 pt_entry_t *pte; 909 910 pte = vtopte(va); 911 pte_clear(pte); 912} 913 914/* 915 * Used to map a range of physical addresses into kernel 916 * virtual address space. 917 * 918 * The value passed in '*virt' is a suggested virtual address for 919 * the mapping. Architectures which can support a direct-mapped 920 * physical to virtual region can return the appropriate address 921 * within that region, leaving '*virt' unchanged. Other 922 * architectures should map the pages starting at '*virt' and 923 * update '*virt' with the first usable address after the mapped 924 * region. 925 */ 926vm_offset_t 927pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 928{ 929 vm_offset_t va, sva; 930 931 va = sva = *virt; 932 while (start < end) { 933 pmap_kenter(va, start); 934 va += PAGE_SIZE; 935 start += PAGE_SIZE; 936 } 937 pmap_invalidate_range(kernel_pmap, sva, va); 938 *virt = va; 939 return (sva); 940} 941 942 943/* 944 * Add a list of wired pages to the kva 945 * this routine is only used for temporary 946 * kernel mappings that do not need to have 947 * page modification or references recorded. 948 * Note that old mappings are simply written 949 * over. The page *must* be wired. 950 * Note: SMP coherent. Uses a ranged shootdown IPI. 951 */ 952void 953pmap_qenter(vm_offset_t sva, vm_page_t *m, int count) 954{ 955 vm_offset_t va; 956 957 va = sva; 958 while (count-- > 0) { 959 pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); 960 va += PAGE_SIZE; 961 m++; 962 } 963 pmap_invalidate_range(kernel_pmap, sva, va); 964} 965 966/* 967 * This routine tears out page mappings from the 968 * kernel -- it is meant only for temporary mappings. 969 * Note: SMP coherent. Uses a ranged shootdown IPI. 970 */ 971void 972pmap_qremove(vm_offset_t sva, int count) 973{ 974 vm_offset_t va; 975 976 va = sva; 977 while (count-- > 0) { 978 pmap_kremove(va); 979 va += PAGE_SIZE; 980 } 981 pmap_invalidate_range(kernel_pmap, sva, va); 982} 983 984/*************************************************** 985 * Page table page management routines..... 986 ***************************************************/ 987 988/* 989 * This routine unholds page table pages, and if the hold count 990 * drops to zero, then it decrements the wire count. 991 */ 992static PMAP_INLINE int 993pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m) 994{ 995 996 --m->wire_count; 997 if (m->wire_count == 0) 998 return _pmap_unwire_pte_hold(pmap, m); 999 else 1000 return 0; 1001} 1002 1003static int 1004_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m) 1005{ 1006 vm_offset_t pteva; 1007 1008 /* 1009 * unmap the page table page 1010 */ 1011 pmap->pm_pdir[m->pindex] = 0; 1012 --pmap->pm_stats.resident_count; 1013 1014 /* 1015 * Do an invltlb to make the invalidated mapping 1016 * take effect immediately. 1017 */ 1018 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1019 pmap_invalidate_page(pmap, pteva); 1020 1021 vm_page_free_zero(m); 1022 atomic_subtract_int(&cnt.v_wire_count, 1); 1023 return 1; 1024} 1025 1026/* 1027 * After removing a page table entry, this routine is used to 1028 * conditionally free the page, and manage the hold/wire counts. 1029 */ 1030static int 1031pmap_unuse_pt(pmap_t pmap, vm_offset_t va) 1032{ 1033 pd_entry_t ptepde; 1034 vm_page_t mpte; 1035 1036 if (va >= VM_MAXUSER_ADDRESS) 1037 return 0; 1038 ptepde = *pmap_pde(pmap, va); 1039 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1040 return pmap_unwire_pte_hold(pmap, mpte); 1041} 1042 1043void 1044pmap_pinit0(pmap) 1045 struct pmap *pmap; 1046{ 1047 1048 PMAP_LOCK_INIT(pmap); 1049 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1050#ifdef PAE 1051 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1052#endif 1053 pmap->pm_active = 0; 1054 PCPU_SET(curpmap, pmap); 1055 TAILQ_INIT(&pmap->pm_pvlist); 1056 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1057 mtx_lock_spin(&allpmaps_lock); 1058 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1059 mtx_unlock_spin(&allpmaps_lock); 1060} 1061 1062/* 1063 * Initialize a preallocated and zeroed pmap structure, 1064 * such as one in a vmspace structure. 1065 */ 1066void 1067pmap_pinit(pmap) 1068 register struct pmap *pmap; 1069{ 1070 vm_page_t m, ptdpg[NPGPTD]; 1071 vm_paddr_t pa; 1072 static int color; 1073 int i; 1074 1075 PMAP_LOCK_INIT(pmap); 1076 1077 /* 1078 * No need to allocate page table space yet but we do need a valid 1079 * page directory table. 1080 */ 1081 if (pmap->pm_pdir == NULL) { 1082 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1083 NBPTD); 1084#ifdef PAE 1085 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1086 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1087 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1088 ("pmap_pinit: pdpt misaligned")); 1089 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1090 ("pmap_pinit: pdpt above 4g")); 1091#endif 1092 } 1093 1094 /* 1095 * allocate the page directory page(s) 1096 */ 1097 for (i = 0; i < NPGPTD;) { 1098 m = vm_page_alloc(NULL, color++, 1099 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1100 VM_ALLOC_ZERO); 1101 if (m == NULL) 1102 VM_WAIT; 1103 else { 1104 ptdpg[i++] = m; 1105 } 1106 } 1107 1108 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1109 1110 for (i = 0; i < NPGPTD; i++) { 1111 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1112 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1113 } 1114 1115 mtx_lock_spin(&allpmaps_lock); 1116 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1117 mtx_unlock_spin(&allpmaps_lock); 1118 /* Wire in kernel global address entries. */ 1119 /* XXX copies current process, does not fill in MPPTDI */ 1120 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1121#ifdef SMP 1122 pmap->pm_pdir[MPPTDI] = PTD[MPPTDI]; 1123#endif 1124 1125 /* install self-referential address mapping entry(s) */ 1126 for (i = 0; i < NPGPTD; i++) { 1127 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1128 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1129#ifdef PAE 1130 pmap->pm_pdpt[i] = pa | PG_V; 1131#endif 1132 } 1133 1134 pmap->pm_active = 0; 1135 TAILQ_INIT(&pmap->pm_pvlist); 1136 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1137} 1138 1139/* 1140 * this routine is called if the page table page is not 1141 * mapped correctly. 1142 */ 1143static vm_page_t 1144_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1145{ 1146 vm_paddr_t ptepa; 1147 vm_page_t m; 1148 1149 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1150 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1151 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1152 1153 /* 1154 * Allocate a page table page. 1155 */ 1156 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1157 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1158 if (flags & M_WAITOK) { 1159 PMAP_UNLOCK(pmap); 1160 vm_page_unlock_queues(); 1161 VM_WAIT; 1162 vm_page_lock_queues(); 1163 PMAP_LOCK(pmap); 1164 } 1165 1166 /* 1167 * Indicate the need to retry. While waiting, the page table 1168 * page may have been allocated. 1169 */ 1170 return (NULL); 1171 } 1172 if ((m->flags & PG_ZERO) == 0) 1173 pmap_zero_page(m); 1174 1175 /* 1176 * Map the pagetable page into the process address space, if 1177 * it isn't already there. 1178 */ 1179 1180 pmap->pm_stats.resident_count++; 1181 1182 ptepa = VM_PAGE_TO_PHYS(m); 1183 pmap->pm_pdir[ptepindex] = 1184 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1185 1186 return m; 1187} 1188 1189static vm_page_t 1190pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1191{ 1192 unsigned ptepindex; 1193 pd_entry_t ptepa; 1194 vm_page_t m; 1195 1196 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1197 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1198 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1199 1200 /* 1201 * Calculate pagetable page index 1202 */ 1203 ptepindex = va >> PDRSHIFT; 1204retry: 1205 /* 1206 * Get the page directory entry 1207 */ 1208 ptepa = pmap->pm_pdir[ptepindex]; 1209 1210 /* 1211 * This supports switching from a 4MB page to a 1212 * normal 4K page. 1213 */ 1214 if (ptepa & PG_PS) { 1215 pmap->pm_pdir[ptepindex] = 0; 1216 ptepa = 0; 1217 pmap_invalidate_all(kernel_pmap); 1218 } 1219 1220 /* 1221 * If the page table page is mapped, we just increment the 1222 * hold count, and activate it. 1223 */ 1224 if (ptepa) { 1225 m = PHYS_TO_VM_PAGE(ptepa); 1226 m->wire_count++; 1227 } else { 1228 /* 1229 * Here if the pte page isn't mapped, or if it has 1230 * been deallocated. 1231 */ 1232 m = _pmap_allocpte(pmap, ptepindex, flags); 1233 if (m == NULL && (flags & M_WAITOK)) 1234 goto retry; 1235 } 1236 return (m); 1237} 1238 1239 1240/*************************************************** 1241* Pmap allocation/deallocation routines. 1242 ***************************************************/ 1243 1244#ifdef SMP 1245/* 1246 * Deal with a SMP shootdown of other users of the pmap that we are 1247 * trying to dispose of. This can be a bit hairy. 1248 */ 1249static u_int *lazymask; 1250static u_int lazyptd; 1251static volatile u_int lazywait; 1252 1253void pmap_lazyfix_action(void); 1254 1255void 1256pmap_lazyfix_action(void) 1257{ 1258 u_int mymask = PCPU_GET(cpumask); 1259 1260 if (rcr3() == lazyptd) 1261 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1262 atomic_clear_int(lazymask, mymask); 1263 atomic_store_rel_int(&lazywait, 1); 1264} 1265 1266static void 1267pmap_lazyfix_self(u_int mymask) 1268{ 1269 1270 if (rcr3() == lazyptd) 1271 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1272 atomic_clear_int(lazymask, mymask); 1273} 1274 1275 1276static void 1277pmap_lazyfix(pmap_t pmap) 1278{ 1279 u_int mymask; 1280 u_int mask; 1281 register u_int spins; 1282 1283 while ((mask = pmap->pm_active) != 0) { 1284 spins = 50000000; 1285 mask = mask & -mask; /* Find least significant set bit */ 1286 mtx_lock_spin(&smp_ipi_mtx); 1287#ifdef PAE 1288 lazyptd = vtophys(pmap->pm_pdpt); 1289#else 1290 lazyptd = vtophys(pmap->pm_pdir); 1291#endif 1292 mymask = PCPU_GET(cpumask); 1293 if (mask == mymask) { 1294 lazymask = &pmap->pm_active; 1295 pmap_lazyfix_self(mymask); 1296 } else { 1297 atomic_store_rel_int((u_int *)&lazymask, 1298 (u_int)&pmap->pm_active); 1299 atomic_store_rel_int(&lazywait, 0); 1300 ipi_selected(mask, IPI_LAZYPMAP); 1301 while (lazywait == 0) { 1302 ia32_pause(); 1303 if (--spins == 0) 1304 break; 1305 } 1306 } 1307 mtx_unlock_spin(&smp_ipi_mtx); 1308 if (spins == 0) 1309 printf("pmap_lazyfix: spun for 50000000\n"); 1310 } 1311} 1312 1313#else /* SMP */ 1314 1315/* 1316 * Cleaning up on uniprocessor is easy. For various reasons, we're 1317 * unlikely to have to even execute this code, including the fact 1318 * that the cleanup is deferred until the parent does a wait(2), which 1319 * means that another userland process has run. 1320 */ 1321static void 1322pmap_lazyfix(pmap_t pmap) 1323{ 1324 u_int cr3; 1325 1326 cr3 = vtophys(pmap->pm_pdir); 1327 if (cr3 == rcr3()) { 1328 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1329 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1330 } 1331} 1332#endif /* SMP */ 1333 1334/* 1335 * Release any resources held by the given physical map. 1336 * Called when a pmap initialized by pmap_pinit is being released. 1337 * Should only be called if the map contains no valid mappings. 1338 */ 1339void 1340pmap_release(pmap_t pmap) 1341{ 1342 vm_page_t m, ptdpg[NPGPTD]; 1343 int i; 1344 1345 KASSERT(pmap->pm_stats.resident_count == 0, 1346 ("pmap_release: pmap resident count %ld != 0", 1347 pmap->pm_stats.resident_count)); 1348 1349 pmap_lazyfix(pmap); 1350 mtx_lock_spin(&allpmaps_lock); 1351 LIST_REMOVE(pmap, pm_list); 1352 mtx_unlock_spin(&allpmaps_lock); 1353 1354 for (i = 0; i < NPGPTD; i++) 1355 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i]); 1356 1357 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1358 sizeof(*pmap->pm_pdir)); 1359#ifdef SMP 1360 pmap->pm_pdir[MPPTDI] = 0; 1361#endif 1362 1363 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1364 1365 vm_page_lock_queues(); 1366 for (i = 0; i < NPGPTD; i++) { 1367 m = ptdpg[i]; 1368#ifdef PAE 1369 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1370 ("pmap_release: got wrong ptd page")); 1371#endif 1372 m->wire_count--; 1373 atomic_subtract_int(&cnt.v_wire_count, 1); 1374 vm_page_free_zero(m); 1375 } 1376 vm_page_unlock_queues(); 1377 PMAP_LOCK_DESTROY(pmap); 1378} 1379 1380static int 1381kvm_size(SYSCTL_HANDLER_ARGS) 1382{ 1383 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1384 1385 return sysctl_handle_long(oidp, &ksize, 0, req); 1386} 1387SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1388 0, 0, kvm_size, "IU", "Size of KVM"); 1389 1390static int 1391kvm_free(SYSCTL_HANDLER_ARGS) 1392{ 1393 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1394 1395 return sysctl_handle_long(oidp, &kfree, 0, req); 1396} 1397SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1398 0, 0, kvm_free, "IU", "Amount of KVM free"); 1399 1400/* 1401 * grow the number of kernel page table entries, if needed 1402 */ 1403void 1404pmap_growkernel(vm_offset_t addr) 1405{ 1406 struct pmap *pmap; 1407 vm_paddr_t ptppaddr; 1408 vm_page_t nkpg; 1409 pd_entry_t newpdir; 1410 pt_entry_t *pde; 1411 1412 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1413 if (kernel_vm_end == 0) { 1414 kernel_vm_end = KERNBASE; 1415 nkpt = 0; 1416 while (pdir_pde(PTD, kernel_vm_end)) { 1417 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1418 nkpt++; 1419 } 1420 } 1421 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1422 while (kernel_vm_end < addr) { 1423 if (pdir_pde(PTD, kernel_vm_end)) { 1424 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1425 continue; 1426 } 1427 1428 /* 1429 * This index is bogus, but out of the way 1430 */ 1431 nkpg = vm_page_alloc(NULL, nkpt, 1432 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1433 if (!nkpg) 1434 panic("pmap_growkernel: no memory to grow kernel"); 1435 1436 nkpt++; 1437 1438 pmap_zero_page(nkpg); 1439 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1440 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1441 pdir_pde(PTD, kernel_vm_end) = newpdir; 1442 1443 mtx_lock_spin(&allpmaps_lock); 1444 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1445 pde = pmap_pde(pmap, kernel_vm_end); 1446 pde_store(pde, newpdir); 1447 } 1448 mtx_unlock_spin(&allpmaps_lock); 1449 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1450 } 1451} 1452 1453 1454/*************************************************** 1455 * page management routines. 1456 ***************************************************/ 1457 1458/* 1459 * free the pv_entry back to the free list 1460 */ 1461static PMAP_INLINE void 1462free_pv_entry(pv_entry_t pv) 1463{ 1464 pv_entry_count--; 1465 uma_zfree(pvzone, pv); 1466} 1467 1468/* 1469 * get a new pv_entry, allocating a block from the system 1470 * when needed. 1471 * the memory allocation is performed bypassing the malloc code 1472 * because of the possibility of allocations at interrupt time. 1473 */ 1474static pv_entry_t 1475get_pv_entry(void) 1476{ 1477 pv_entry_count++; 1478 if (pv_entry_high_water && 1479 (pv_entry_count > pv_entry_high_water) && 1480 (pmap_pagedaemon_waken == 0)) { 1481 pmap_pagedaemon_waken = 1; 1482 wakeup (&vm_pages_needed); 1483 } 1484 return uma_zalloc(pvzone, M_NOWAIT); 1485} 1486 1487 1488static int 1489pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1490{ 1491 pv_entry_t pv; 1492 int rtval; 1493 1494 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1495 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1496 if (m->md.pv_list_count < pmap->pm_stats.resident_count) { 1497 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1498 if (pmap == pv->pv_pmap && va == pv->pv_va) 1499 break; 1500 } 1501 } else { 1502 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) { 1503 if (va == pv->pv_va) 1504 break; 1505 } 1506 } 1507 1508 rtval = 0; 1509 if (pv) { 1510 rtval = pmap_unuse_pt(pmap, va); 1511 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1512 m->md.pv_list_count--; 1513 if (TAILQ_FIRST(&m->md.pv_list) == NULL) 1514 vm_page_flag_clear(m, PG_WRITEABLE); 1515 1516 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist); 1517 free_pv_entry(pv); 1518 } 1519 1520 return rtval; 1521} 1522 1523/* 1524 * Create a pv entry for page at pa for 1525 * (pmap, va). 1526 */ 1527static void 1528pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1529{ 1530 pv_entry_t pv; 1531 1532 pv = get_pv_entry(); 1533 pv->pv_va = va; 1534 pv->pv_pmap = pmap; 1535 1536 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1537 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1538 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist); 1539 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1540 m->md.pv_list_count++; 1541} 1542 1543/* 1544 * pmap_remove_pte: do the things to unmap a page in a process 1545 */ 1546static int 1547pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va) 1548{ 1549 pt_entry_t oldpte; 1550 vm_page_t m; 1551 1552 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1553 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1554 oldpte = pte_load_clear(ptq); 1555 if (oldpte & PG_W) 1556 pmap->pm_stats.wired_count -= 1; 1557 /* 1558 * Machines that don't support invlpg, also don't support 1559 * PG_G. 1560 */ 1561 if (oldpte & PG_G) 1562 pmap_invalidate_page(kernel_pmap, va); 1563 pmap->pm_stats.resident_count -= 1; 1564 if (oldpte & PG_MANAGED) { 1565 m = PHYS_TO_VM_PAGE(oldpte); 1566 if (oldpte & PG_M) { 1567#if defined(PMAP_DIAGNOSTIC) 1568 if (pmap_nw_modified((pt_entry_t) oldpte)) { 1569 printf( 1570 "pmap_remove: modified page not writable: va: 0x%x, pte: 0x%x\n", 1571 va, oldpte); 1572 } 1573#endif 1574 if (pmap_track_modified(va)) 1575 vm_page_dirty(m); 1576 } 1577 if (oldpte & PG_A) 1578 vm_page_flag_set(m, PG_REFERENCED); 1579 return pmap_remove_entry(pmap, m, va); 1580 } else { 1581 return pmap_unuse_pt(pmap, va); 1582 } 1583} 1584 1585/* 1586 * Remove a single page from a process address space 1587 */ 1588static void 1589pmap_remove_page(pmap_t pmap, vm_offset_t va) 1590{ 1591 pt_entry_t *pte; 1592 1593 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1594 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1595 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1596 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 1597 return; 1598 pmap_remove_pte(pmap, pte, va); 1599 pmap_invalidate_page(pmap, va); 1600} 1601 1602/* 1603 * Remove the given range of addresses from the specified map. 1604 * 1605 * It is assumed that the start and end are properly 1606 * rounded to the page size. 1607 */ 1608void 1609pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 1610{ 1611 vm_offset_t pdnxt; 1612 pd_entry_t ptpaddr; 1613 pt_entry_t *pte; 1614 int anyvalid; 1615 1616 /* 1617 * Perform an unsynchronized read. This is, however, safe. 1618 */ 1619 if (pmap->pm_stats.resident_count == 0) 1620 return; 1621 1622 anyvalid = 0; 1623 1624 vm_page_lock_queues(); 1625 sched_pin(); 1626 PMAP_LOCK(pmap); 1627 1628 /* 1629 * special handling of removing one page. a very 1630 * common operation and easy to short circuit some 1631 * code. 1632 */ 1633 if ((sva + PAGE_SIZE == eva) && 1634 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 1635 pmap_remove_page(pmap, sva); 1636 goto out; 1637 } 1638 1639 for (; sva < eva; sva = pdnxt) { 1640 unsigned pdirindex; 1641 1642 /* 1643 * Calculate index for next page table. 1644 */ 1645 pdnxt = (sva + NBPDR) & ~PDRMASK; 1646 if (pmap->pm_stats.resident_count == 0) 1647 break; 1648 1649 pdirindex = sva >> PDRSHIFT; 1650 ptpaddr = pmap->pm_pdir[pdirindex]; 1651 1652 /* 1653 * Weed out invalid mappings. Note: we assume that the page 1654 * directory table is always allocated, and in kernel virtual. 1655 */ 1656 if (ptpaddr == 0) 1657 continue; 1658 1659 /* 1660 * Check for large page. 1661 */ 1662 if ((ptpaddr & PG_PS) != 0) { 1663 pmap->pm_pdir[pdirindex] = 0; 1664 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1665 anyvalid = 1; 1666 continue; 1667 } 1668 1669 /* 1670 * Limit our scan to either the end of the va represented 1671 * by the current page table page, or to the end of the 1672 * range being removed. 1673 */ 1674 if (pdnxt > eva) 1675 pdnxt = eva; 1676 1677 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 1678 sva += PAGE_SIZE) { 1679 if (*pte == 0) 1680 continue; 1681 anyvalid = 1; 1682 if (pmap_remove_pte(pmap, pte, sva)) 1683 break; 1684 } 1685 } 1686out: 1687 sched_unpin(); 1688 vm_page_unlock_queues(); 1689 if (anyvalid) 1690 pmap_invalidate_all(pmap); 1691 PMAP_UNLOCK(pmap); 1692} 1693 1694/* 1695 * Routine: pmap_remove_all 1696 * Function: 1697 * Removes this physical page from 1698 * all physical maps in which it resides. 1699 * Reflects back modify bits to the pager. 1700 * 1701 * Notes: 1702 * Original versions of this routine were very 1703 * inefficient because they iteratively called 1704 * pmap_remove (slow...) 1705 */ 1706 1707void 1708pmap_remove_all(vm_page_t m) 1709{ 1710 register pv_entry_t pv; 1711 pt_entry_t *pte, tpte; 1712 1713#if defined(PMAP_DIAGNOSTIC) 1714 /* 1715 * XXX This makes pmap_remove_all() illegal for non-managed pages! 1716 */ 1717 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) { 1718 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", 1719 VM_PAGE_TO_PHYS(m)); 1720 } 1721#endif 1722 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1723 sched_pin(); 1724 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 1725 PMAP_LOCK(pv->pv_pmap); 1726 pv->pv_pmap->pm_stats.resident_count--; 1727 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 1728 tpte = pte_load_clear(pte); 1729 if (tpte & PG_W) 1730 pv->pv_pmap->pm_stats.wired_count--; 1731 if (tpte & PG_A) 1732 vm_page_flag_set(m, PG_REFERENCED); 1733 1734 /* 1735 * Update the vm_page_t clean and reference bits. 1736 */ 1737 if (tpte & PG_M) { 1738#if defined(PMAP_DIAGNOSTIC) 1739 if (pmap_nw_modified((pt_entry_t) tpte)) { 1740 printf( 1741 "pmap_remove_all: modified page not writable: va: 0x%x, pte: 0x%x\n", 1742 pv->pv_va, tpte); 1743 } 1744#endif 1745 if (pmap_track_modified(pv->pv_va)) 1746 vm_page_dirty(m); 1747 } 1748 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 1749 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist); 1750 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1751 m->md.pv_list_count--; 1752 pmap_unuse_pt(pv->pv_pmap, pv->pv_va); 1753 PMAP_UNLOCK(pv->pv_pmap); 1754 free_pv_entry(pv); 1755 } 1756 vm_page_flag_clear(m, PG_WRITEABLE); 1757 sched_unpin(); 1758} 1759 1760/* 1761 * Set the physical protection on the 1762 * specified range of this map as requested. 1763 */ 1764void 1765pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1766{ 1767 vm_offset_t pdnxt; 1768 pd_entry_t ptpaddr; 1769 pt_entry_t *pte; 1770 int anychanged; 1771 1772 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1773 pmap_remove(pmap, sva, eva); 1774 return; 1775 } 1776 1777 if (prot & VM_PROT_WRITE) 1778 return; 1779 1780 anychanged = 0; 1781 1782 vm_page_lock_queues(); 1783 sched_pin(); 1784 PMAP_LOCK(pmap); 1785 for (; sva < eva; sva = pdnxt) { 1786 unsigned obits, pbits, pdirindex; 1787 1788 pdnxt = (sva + NBPDR) & ~PDRMASK; 1789 1790 pdirindex = sva >> PDRSHIFT; 1791 ptpaddr = pmap->pm_pdir[pdirindex]; 1792 1793 /* 1794 * Weed out invalid mappings. Note: we assume that the page 1795 * directory table is always allocated, and in kernel virtual. 1796 */ 1797 if (ptpaddr == 0) 1798 continue; 1799 1800 /* 1801 * Check for large page. 1802 */ 1803 if ((ptpaddr & PG_PS) != 0) { 1804 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 1805 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1806 anychanged = 1; 1807 continue; 1808 } 1809 1810 if (pdnxt > eva) 1811 pdnxt = eva; 1812 1813 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 1814 sva += PAGE_SIZE) { 1815 vm_page_t m; 1816 1817retry: 1818 /* 1819 * Regardless of whether a pte is 32 or 64 bits in 1820 * size, PG_RW, PG_A, and PG_M are among the least 1821 * significant 32 bits. 1822 */ 1823 obits = pbits = *(u_int *)pte; 1824 if (pbits & PG_MANAGED) { 1825 m = NULL; 1826 if (pbits & PG_A) { 1827 m = PHYS_TO_VM_PAGE(pbits); 1828 vm_page_flag_set(m, PG_REFERENCED); 1829 pbits &= ~PG_A; 1830 } 1831 if ((pbits & PG_M) != 0 && 1832 pmap_track_modified(sva)) { 1833 if (m == NULL) 1834 m = PHYS_TO_VM_PAGE(pbits); 1835 vm_page_dirty(m); 1836 } 1837 } 1838 1839 pbits &= ~(PG_RW | PG_M); 1840 1841 if (pbits != obits) { 1842 if (!atomic_cmpset_int((u_int *)pte, obits, 1843 pbits)) 1844 goto retry; 1845 anychanged = 1; 1846 } 1847 } 1848 } 1849 sched_unpin(); 1850 vm_page_unlock_queues(); 1851 if (anychanged) 1852 pmap_invalidate_all(pmap); 1853 PMAP_UNLOCK(pmap); 1854} 1855 1856/* 1857 * Insert the given physical page (p) at 1858 * the specified virtual address (v) in the 1859 * target physical map with the protection requested. 1860 * 1861 * If specified, the page will be wired down, meaning 1862 * that the related pte can not be reclaimed. 1863 * 1864 * NB: This is the only routine which MAY NOT lazy-evaluate 1865 * or lose information. That is, this routine must actually 1866 * insert this page into the given map NOW. 1867 */ 1868void 1869pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 1870 boolean_t wired) 1871{ 1872 vm_paddr_t pa; 1873 register pt_entry_t *pte; 1874 vm_paddr_t opa; 1875 pt_entry_t origpte, newpte; 1876 vm_page_t mpte, om; 1877 1878 va &= PG_FRAME; 1879#ifdef PMAP_DIAGNOSTIC 1880 if (va > VM_MAX_KERNEL_ADDRESS) 1881 panic("pmap_enter: toobig"); 1882 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 1883 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 1884#endif 1885 1886 mpte = NULL; 1887 1888 vm_page_lock_queues(); 1889 PMAP_LOCK(pmap); 1890 sched_pin(); 1891 1892 /* 1893 * In the case that a page table page is not 1894 * resident, we are creating it here. 1895 */ 1896 if (va < VM_MAXUSER_ADDRESS) { 1897 mpte = pmap_allocpte(pmap, va, M_WAITOK); 1898 } 1899#if 0 && defined(PMAP_DIAGNOSTIC) 1900 else { 1901 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 1902 origpte = *pdeaddr; 1903 if ((origpte & PG_V) == 0) { 1904 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 1905 pmap->pm_pdir[PTDPTDI], origpte, va); 1906 } 1907 } 1908#endif 1909 1910 pte = pmap_pte_quick(pmap, va); 1911 1912 /* 1913 * Page Directory table entry not valid, we need a new PT page 1914 */ 1915 if (pte == NULL) { 1916 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 1917 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 1918 } 1919 1920 pa = VM_PAGE_TO_PHYS(m); 1921 om = NULL; 1922 origpte = *pte; 1923 opa = origpte & PG_FRAME; 1924 1925 if (origpte & PG_PS) { 1926 /* 1927 * Yes, I know this will truncate upper address bits for PAE, 1928 * but I'm actually more interested in the lower bits 1929 */ 1930 printf("pmap_enter: va %p, pte %p, origpte %p\n", 1931 (void *)va, (void *)pte, (void *)(uintptr_t)origpte); 1932 panic("pmap_enter: attempted pmap_enter on 4MB page"); 1933 } 1934 1935 /* 1936 * Mapping has not changed, must be protection or wiring change. 1937 */ 1938 if (origpte && (opa == pa)) { 1939 /* 1940 * Wiring change, just update stats. We don't worry about 1941 * wiring PT pages as they remain resident as long as there 1942 * are valid mappings in them. Hence, if a user page is wired, 1943 * the PT page will be also. 1944 */ 1945 if (wired && ((origpte & PG_W) == 0)) 1946 pmap->pm_stats.wired_count++; 1947 else if (!wired && (origpte & PG_W)) 1948 pmap->pm_stats.wired_count--; 1949 1950#if defined(PMAP_DIAGNOSTIC) 1951 if (pmap_nw_modified((pt_entry_t) origpte)) { 1952 printf( 1953 "pmap_enter: modified page not writable: va: 0x%x, pte: 0x%x\n", 1954 va, origpte); 1955 } 1956#endif 1957 1958 /* 1959 * Remove extra pte reference 1960 */ 1961 if (mpte) 1962 mpte->wire_count--; 1963 1964 /* 1965 * We might be turning off write access to the page, 1966 * so we go ahead and sense modify status. 1967 */ 1968 if (origpte & PG_MANAGED) { 1969 om = m; 1970 pa |= PG_MANAGED; 1971 } 1972 goto validate; 1973 } 1974 /* 1975 * Mapping has changed, invalidate old range and fall through to 1976 * handle validating new mapping. 1977 */ 1978 if (opa) { 1979 int err; 1980 if (origpte & PG_W) 1981 pmap->pm_stats.wired_count--; 1982 if (origpte & PG_MANAGED) { 1983 om = PHYS_TO_VM_PAGE(opa); 1984 err = pmap_remove_entry(pmap, om, va); 1985 } else 1986 err = pmap_unuse_pt(pmap, va); 1987 if (err) 1988 panic("pmap_enter: pte vanished, va: 0x%x", va); 1989 } else 1990 pmap->pm_stats.resident_count++; 1991 1992 /* 1993 * Enter on the PV list if part of our managed memory. Note that we 1994 * raise IPL while manipulating pv_table since pmap_enter can be 1995 * called at interrupt time. 1996 */ 1997 if (pmap_initialized && 1998 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) { 1999 pmap_insert_entry(pmap, va, m); 2000 pa |= PG_MANAGED; 2001 } 2002 2003 /* 2004 * Increment counters 2005 */ 2006 if (wired) 2007 pmap->pm_stats.wired_count++; 2008 2009validate: 2010 /* 2011 * Now validate mapping with desired protection/wiring. 2012 */ 2013 newpte = (pt_entry_t)(pa | PG_V); 2014 if ((prot & VM_PROT_WRITE) != 0) 2015 newpte |= PG_RW; 2016 if (wired) 2017 newpte |= PG_W; 2018 if (va < VM_MAXUSER_ADDRESS) 2019 newpte |= PG_U; 2020 if (pmap == kernel_pmap) 2021 newpte |= pgeflag; 2022 2023 /* 2024 * if the mapping or permission bits are different, we need 2025 * to update the pte. 2026 */ 2027 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2028 if (origpte & PG_MANAGED) { 2029 origpte = pte_load_store(pte, newpte | PG_A); 2030 if ((origpte & PG_M) && pmap_track_modified(va)) 2031 vm_page_dirty(om); 2032 if (origpte & PG_A) 2033 vm_page_flag_set(om, PG_REFERENCED); 2034 } else 2035 pte_store(pte, newpte | PG_A); 2036 if (origpte) { 2037 pmap_invalidate_page(pmap, va); 2038 } 2039 } 2040 sched_unpin(); 2041 vm_page_unlock_queues(); 2042 PMAP_UNLOCK(pmap); 2043} 2044 2045/* 2046 * this code makes some *MAJOR* assumptions: 2047 * 1. Current pmap & pmap exists. 2048 * 2. Not wired. 2049 * 3. Read access. 2050 * 4. No page table pages. 2051 * 6. Page IS managed. 2052 * but is *MUCH* faster than pmap_enter... 2053 */ 2054 2055vm_page_t 2056pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_page_t mpte) 2057{ 2058 pt_entry_t *pte; 2059 vm_paddr_t pa; 2060 2061 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2062 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED); 2063 PMAP_LOCK(pmap); 2064 2065 /* 2066 * In the case that a page table page is not 2067 * resident, we are creating it here. 2068 */ 2069 if (va < VM_MAXUSER_ADDRESS) { 2070 unsigned ptepindex; 2071 pd_entry_t ptepa; 2072 2073 /* 2074 * Calculate pagetable page index 2075 */ 2076 ptepindex = va >> PDRSHIFT; 2077 if (mpte && (mpte->pindex == ptepindex)) { 2078 mpte->wire_count++; 2079 } else { 2080retry: 2081 /* 2082 * Get the page directory entry 2083 */ 2084 ptepa = pmap->pm_pdir[ptepindex]; 2085 2086 /* 2087 * If the page table page is mapped, we just increment 2088 * the hold count, and activate it. 2089 */ 2090 if (ptepa) { 2091 if (ptepa & PG_PS) 2092 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2093 mpte = PHYS_TO_VM_PAGE(ptepa); 2094 mpte->wire_count++; 2095 } else { 2096 mpte = _pmap_allocpte(pmap, ptepindex, 2097 M_NOWAIT); 2098 if (mpte == NULL) { 2099 PMAP_UNLOCK(pmap); 2100 vm_page_busy(m); 2101 vm_page_unlock_queues(); 2102 VM_OBJECT_UNLOCK(m->object); 2103 VM_WAIT; 2104 VM_OBJECT_LOCK(m->object); 2105 vm_page_lock_queues(); 2106 vm_page_wakeup(m); 2107 PMAP_LOCK(pmap); 2108 goto retry; 2109 } 2110 } 2111 } 2112 } else { 2113 mpte = NULL; 2114 } 2115 2116 /* 2117 * This call to vtopte makes the assumption that we are 2118 * entering the page into the current pmap. In order to support 2119 * quick entry into any pmap, one would likely use pmap_pte_quick. 2120 * But that isn't as quick as vtopte. 2121 */ 2122 pte = vtopte(va); 2123 if (*pte) { 2124 if (mpte != NULL) { 2125 pmap_unwire_pte_hold(pmap, mpte); 2126 mpte = NULL; 2127 } 2128 goto out; 2129 } 2130 2131 /* 2132 * Enter on the PV list if part of our managed memory. Note that we 2133 * raise IPL while manipulating pv_table since pmap_enter can be 2134 * called at interrupt time. 2135 */ 2136 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) 2137 pmap_insert_entry(pmap, va, m); 2138 2139 /* 2140 * Increment counters 2141 */ 2142 pmap->pm_stats.resident_count++; 2143 2144 pa = VM_PAGE_TO_PHYS(m); 2145 2146 /* 2147 * Now validate mapping with RO protection 2148 */ 2149 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2150 pte_store(pte, pa | PG_V | PG_U); 2151 else 2152 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2153out: 2154 PMAP_UNLOCK(pmap); 2155 return mpte; 2156} 2157 2158/* 2159 * Make a temporary mapping for a physical address. This is only intended 2160 * to be used for panic dumps. 2161 */ 2162void * 2163pmap_kenter_temporary(vm_paddr_t pa, int i) 2164{ 2165 vm_offset_t va; 2166 2167 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2168 pmap_kenter(va, pa); 2169 invlpg(va); 2170 return ((void *)crashdumpmap); 2171} 2172 2173/* 2174 * This code maps large physical mmap regions into the 2175 * processor address space. Note that some shortcuts 2176 * are taken, but the code works. 2177 */ 2178void 2179pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2180 vm_object_t object, vm_pindex_t pindex, 2181 vm_size_t size) 2182{ 2183 vm_page_t p; 2184 2185 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2186 KASSERT(object->type == OBJT_DEVICE, 2187 ("pmap_object_init_pt: non-device object")); 2188 if (pseflag && 2189 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2190 int i; 2191 vm_page_t m[1]; 2192 unsigned int ptepindex; 2193 int npdes; 2194 pd_entry_t ptepa; 2195 2196 PMAP_LOCK(pmap); 2197 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 2198 goto out; 2199 PMAP_UNLOCK(pmap); 2200retry: 2201 p = vm_page_lookup(object, pindex); 2202 if (p != NULL) { 2203 vm_page_lock_queues(); 2204 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2205 goto retry; 2206 } else { 2207 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2208 if (p == NULL) 2209 return; 2210 m[0] = p; 2211 2212 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2213 vm_page_lock_queues(); 2214 vm_page_free(p); 2215 vm_page_unlock_queues(); 2216 return; 2217 } 2218 2219 p = vm_page_lookup(object, pindex); 2220 vm_page_lock_queues(); 2221 vm_page_wakeup(p); 2222 } 2223 vm_page_unlock_queues(); 2224 2225 ptepa = VM_PAGE_TO_PHYS(p); 2226 if (ptepa & (NBPDR - 1)) 2227 return; 2228 2229 p->valid = VM_PAGE_BITS_ALL; 2230 2231 PMAP_LOCK(pmap); 2232 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2233 npdes = size >> PDRSHIFT; 2234 for(i = 0; i < npdes; i++) { 2235 pde_store(&pmap->pm_pdir[ptepindex], 2236 ptepa | PG_U | PG_RW | PG_V | PG_PS); 2237 ptepa += NBPDR; 2238 ptepindex += 1; 2239 } 2240 pmap_invalidate_all(pmap); 2241out: 2242 PMAP_UNLOCK(pmap); 2243 } 2244} 2245 2246/* 2247 * Routine: pmap_change_wiring 2248 * Function: Change the wiring attribute for a map/virtual-address 2249 * pair. 2250 * In/out conditions: 2251 * The mapping must already exist in the pmap. 2252 */ 2253void 2254pmap_change_wiring(pmap, va, wired) 2255 register pmap_t pmap; 2256 vm_offset_t va; 2257 boolean_t wired; 2258{ 2259 register pt_entry_t *pte; 2260 2261 PMAP_LOCK(pmap); 2262 pte = pmap_pte(pmap, va); 2263 2264 if (wired && !pmap_pte_w(pte)) 2265 pmap->pm_stats.wired_count++; 2266 else if (!wired && pmap_pte_w(pte)) 2267 pmap->pm_stats.wired_count--; 2268 2269 /* 2270 * Wiring is not a hardware characteristic so there is no need to 2271 * invalidate TLB. 2272 */ 2273 pmap_pte_set_w(pte, wired); 2274 pmap_pte_release(pte); 2275 PMAP_UNLOCK(pmap); 2276} 2277 2278 2279 2280/* 2281 * Copy the range specified by src_addr/len 2282 * from the source map to the range dst_addr/len 2283 * in the destination map. 2284 * 2285 * This routine is only advisory and need not do anything. 2286 */ 2287 2288void 2289pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2290 vm_offset_t src_addr) 2291{ 2292 vm_offset_t addr; 2293 vm_offset_t end_addr = src_addr + len; 2294 vm_offset_t pdnxt; 2295 vm_page_t m; 2296 2297 if (dst_addr != src_addr) 2298 return; 2299 2300 if (!pmap_is_current(src_pmap)) 2301 return; 2302 2303 vm_page_lock_queues(); 2304 if (dst_pmap < src_pmap) { 2305 PMAP_LOCK(dst_pmap); 2306 PMAP_LOCK(src_pmap); 2307 } else { 2308 PMAP_LOCK(src_pmap); 2309 PMAP_LOCK(dst_pmap); 2310 } 2311 sched_pin(); 2312 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 2313 pt_entry_t *src_pte, *dst_pte; 2314 vm_page_t dstmpte, srcmpte; 2315 pd_entry_t srcptepaddr; 2316 unsigned ptepindex; 2317 2318 if (addr >= UPT_MIN_ADDRESS) 2319 panic("pmap_copy: invalid to pmap_copy page tables"); 2320 2321 /* 2322 * Don't let optional prefaulting of pages make us go 2323 * way below the low water mark of free pages or way 2324 * above high water mark of used pv entries. 2325 */ 2326 if (cnt.v_free_count < cnt.v_free_reserved || 2327 pv_entry_count > pv_entry_high_water) 2328 break; 2329 2330 pdnxt = (addr + NBPDR) & ~PDRMASK; 2331 ptepindex = addr >> PDRSHIFT; 2332 2333 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 2334 if (srcptepaddr == 0) 2335 continue; 2336 2337 if (srcptepaddr & PG_PS) { 2338 if (dst_pmap->pm_pdir[ptepindex] == 0) { 2339 dst_pmap->pm_pdir[ptepindex] = srcptepaddr; 2340 dst_pmap->pm_stats.resident_count += 2341 NBPDR / PAGE_SIZE; 2342 } 2343 continue; 2344 } 2345 2346 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr); 2347 if (srcmpte->wire_count == 0) 2348 panic("pmap_copy: source page table page is unused"); 2349 2350 if (pdnxt > end_addr) 2351 pdnxt = end_addr; 2352 2353 src_pte = vtopte(addr); 2354 while (addr < pdnxt) { 2355 pt_entry_t ptetemp; 2356 ptetemp = *src_pte; 2357 /* 2358 * we only virtual copy managed pages 2359 */ 2360 if ((ptetemp & PG_MANAGED) != 0) { 2361 /* 2362 * We have to check after allocpte for the 2363 * pte still being around... allocpte can 2364 * block. 2365 */ 2366 dstmpte = pmap_allocpte(dst_pmap, addr, 2367 M_NOWAIT); 2368 if (dstmpte == NULL) 2369 break; 2370 dst_pte = pmap_pte_quick(dst_pmap, addr); 2371 if (*dst_pte == 0) { 2372 /* 2373 * Clear the modified and 2374 * accessed (referenced) bits 2375 * during the copy. 2376 */ 2377 m = PHYS_TO_VM_PAGE(ptetemp); 2378 *dst_pte = ptetemp & ~(PG_M | PG_A); 2379 dst_pmap->pm_stats.resident_count++; 2380 pmap_insert_entry(dst_pmap, addr, m); 2381 } else 2382 pmap_unwire_pte_hold(dst_pmap, dstmpte); 2383 if (dstmpte->wire_count >= srcmpte->wire_count) 2384 break; 2385 } 2386 addr += PAGE_SIZE; 2387 src_pte++; 2388 } 2389 } 2390 sched_unpin(); 2391 vm_page_unlock_queues(); 2392 PMAP_UNLOCK(src_pmap); 2393 PMAP_UNLOCK(dst_pmap); 2394} 2395 2396static __inline void 2397pagezero(void *page) 2398{ 2399#if defined(I686_CPU) 2400 if (cpu_class == CPUCLASS_686) { 2401#if defined(CPU_ENABLE_SSE) 2402 if (cpu_feature & CPUID_SSE2) 2403 sse2_pagezero(page); 2404 else 2405#endif 2406 i686_pagezero(page); 2407 } else 2408#endif 2409 bzero(page, PAGE_SIZE); 2410} 2411 2412/* 2413 * pmap_zero_page zeros the specified hardware page by mapping 2414 * the page into KVM and using bzero to clear its contents. 2415 */ 2416void 2417pmap_zero_page(vm_page_t m) 2418{ 2419 struct sysmaps *sysmaps; 2420 2421 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2422 mtx_lock(&sysmaps->lock); 2423 if (*sysmaps->CMAP2) 2424 panic("pmap_zero_page: CMAP2 busy"); 2425 sched_pin(); 2426 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2427 invlcaddr(sysmaps->CADDR2); 2428 pagezero(sysmaps->CADDR2); 2429 *sysmaps->CMAP2 = 0; 2430 sched_unpin(); 2431 mtx_unlock(&sysmaps->lock); 2432} 2433 2434/* 2435 * pmap_zero_page_area zeros the specified hardware page by mapping 2436 * the page into KVM and using bzero to clear its contents. 2437 * 2438 * off and size may not cover an area beyond a single hardware page. 2439 */ 2440void 2441pmap_zero_page_area(vm_page_t m, int off, int size) 2442{ 2443 struct sysmaps *sysmaps; 2444 2445 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2446 mtx_lock(&sysmaps->lock); 2447 if (*sysmaps->CMAP2) 2448 panic("pmap_zero_page: CMAP2 busy"); 2449 sched_pin(); 2450 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2451 invlcaddr(sysmaps->CADDR2); 2452 if (off == 0 && size == PAGE_SIZE) 2453 pagezero(sysmaps->CADDR2); 2454 else 2455 bzero((char *)sysmaps->CADDR2 + off, size); 2456 *sysmaps->CMAP2 = 0; 2457 sched_unpin(); 2458 mtx_unlock(&sysmaps->lock); 2459} 2460 2461/* 2462 * pmap_zero_page_idle zeros the specified hardware page by mapping 2463 * the page into KVM and using bzero to clear its contents. This 2464 * is intended to be called from the vm_pagezero process only and 2465 * outside of Giant. 2466 */ 2467void 2468pmap_zero_page_idle(vm_page_t m) 2469{ 2470 2471 if (*CMAP3) 2472 panic("pmap_zero_page: CMAP3 busy"); 2473 sched_pin(); 2474 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2475 invlcaddr(CADDR3); 2476 pagezero(CADDR3); 2477 *CMAP3 = 0; 2478 sched_unpin(); 2479} 2480 2481/* 2482 * pmap_copy_page copies the specified (machine independent) 2483 * page by mapping the page into virtual memory and using 2484 * bcopy to copy the page, one machine dependent page at a 2485 * time. 2486 */ 2487void 2488pmap_copy_page(vm_page_t src, vm_page_t dst) 2489{ 2490 struct sysmaps *sysmaps; 2491 2492 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2493 mtx_lock(&sysmaps->lock); 2494 if (*sysmaps->CMAP1) 2495 panic("pmap_copy_page: CMAP1 busy"); 2496 if (*sysmaps->CMAP2) 2497 panic("pmap_copy_page: CMAP2 busy"); 2498 sched_pin(); 2499 invlpg((u_int)sysmaps->CADDR1); 2500 invlpg((u_int)sysmaps->CADDR2); 2501 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 2502 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 2503 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 2504 *sysmaps->CMAP1 = 0; 2505 *sysmaps->CMAP2 = 0; 2506 sched_unpin(); 2507 mtx_unlock(&sysmaps->lock); 2508} 2509 2510/* 2511 * Returns true if the pmap's pv is one of the first 2512 * 16 pvs linked to from this page. This count may 2513 * be changed upwards or downwards in the future; it 2514 * is only necessary that true be returned for a small 2515 * subset of pmaps for proper page aging. 2516 */ 2517boolean_t 2518pmap_page_exists_quick(pmap, m) 2519 pmap_t pmap; 2520 vm_page_t m; 2521{ 2522 pv_entry_t pv; 2523 int loops = 0; 2524 2525 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2526 return FALSE; 2527 2528 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2529 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2530 if (pv->pv_pmap == pmap) { 2531 return TRUE; 2532 } 2533 loops++; 2534 if (loops >= 16) 2535 break; 2536 } 2537 return (FALSE); 2538} 2539 2540#define PMAP_REMOVE_PAGES_CURPROC_ONLY 2541/* 2542 * Remove all pages from specified address space 2543 * this aids process exit speeds. Also, this code 2544 * is special cased for current process only, but 2545 * can have the more generic (and slightly slower) 2546 * mode enabled. This is much faster than pmap_remove 2547 * in the case of running down an entire address space. 2548 */ 2549void 2550pmap_remove_pages(pmap, sva, eva) 2551 pmap_t pmap; 2552 vm_offset_t sva, eva; 2553{ 2554 pt_entry_t *pte, tpte; 2555 vm_page_t m; 2556 pv_entry_t pv, npv; 2557 2558#ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2559 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 2560 printf("warning: pmap_remove_pages called with non-current pmap\n"); 2561 return; 2562 } 2563#endif 2564 vm_page_lock_queues(); 2565 PMAP_LOCK(pmap); 2566 sched_pin(); 2567 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) { 2568 2569 if (pv->pv_va >= eva || pv->pv_va < sva) { 2570 npv = TAILQ_NEXT(pv, pv_plist); 2571 continue; 2572 } 2573 2574#ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2575 pte = vtopte(pv->pv_va); 2576#else 2577 pte = pmap_pte_quick(pmap, pv->pv_va); 2578#endif 2579 tpte = *pte; 2580 2581 if (tpte == 0) { 2582 printf("TPTE at %p IS ZERO @ VA %08x\n", 2583 pte, pv->pv_va); 2584 panic("bad pte"); 2585 } 2586 2587/* 2588 * We cannot remove wired pages from a process' mapping at this time 2589 */ 2590 if (tpte & PG_W) { 2591 npv = TAILQ_NEXT(pv, pv_plist); 2592 continue; 2593 } 2594 2595 m = PHYS_TO_VM_PAGE(tpte); 2596 KASSERT(m->phys_addr == (tpte & PG_FRAME), 2597 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 2598 m, (uintmax_t)m->phys_addr, (uintmax_t)tpte)); 2599 2600 KASSERT(m < &vm_page_array[vm_page_array_size], 2601 ("pmap_remove_pages: bad tpte %#jx", (uintmax_t)tpte)); 2602 2603 pmap->pm_stats.resident_count--; 2604 2605 pte_clear(pte); 2606 2607 /* 2608 * Update the vm_page_t clean and reference bits. 2609 */ 2610 if (tpte & PG_M) { 2611 vm_page_dirty(m); 2612 } 2613 2614 npv = TAILQ_NEXT(pv, pv_plist); 2615 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist); 2616 2617 m->md.pv_list_count--; 2618 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2619 if (TAILQ_EMPTY(&m->md.pv_list)) 2620 vm_page_flag_clear(m, PG_WRITEABLE); 2621 2622 pmap_unuse_pt(pmap, pv->pv_va); 2623 free_pv_entry(pv); 2624 } 2625 sched_unpin(); 2626 pmap_invalidate_all(pmap); 2627 PMAP_UNLOCK(pmap); 2628 vm_page_unlock_queues(); 2629} 2630 2631/* 2632 * pmap_is_modified: 2633 * 2634 * Return whether or not the specified physical page was modified 2635 * in any physical maps. 2636 */ 2637boolean_t 2638pmap_is_modified(vm_page_t m) 2639{ 2640 pv_entry_t pv; 2641 pt_entry_t *pte; 2642 boolean_t rv; 2643 2644 rv = FALSE; 2645 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2646 return (rv); 2647 2648 sched_pin(); 2649 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2650 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2651 /* 2652 * if the bit being tested is the modified bit, then 2653 * mark clean_map and ptes as never 2654 * modified. 2655 */ 2656 if (!pmap_track_modified(pv->pv_va)) 2657 continue; 2658#if defined(PMAP_DIAGNOSTIC) 2659 if (!pv->pv_pmap) { 2660 printf("Null pmap (tb) at va: 0x%x\n", pv->pv_va); 2661 continue; 2662 } 2663#endif 2664 PMAP_LOCK(pv->pv_pmap); 2665 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2666 rv = (*pte & PG_M) != 0; 2667 PMAP_UNLOCK(pv->pv_pmap); 2668 if (rv) 2669 break; 2670 } 2671 sched_unpin(); 2672 return (rv); 2673} 2674 2675/* 2676 * pmap_is_prefaultable: 2677 * 2678 * Return whether or not the specified virtual address is elgible 2679 * for prefault. 2680 */ 2681boolean_t 2682pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 2683{ 2684 pt_entry_t *pte; 2685 boolean_t rv; 2686 2687 rv = FALSE; 2688 PMAP_LOCK(pmap); 2689 if (*pmap_pde(pmap, addr)) { 2690 pte = vtopte(addr); 2691 rv = *pte == 0; 2692 } 2693 PMAP_UNLOCK(pmap); 2694 return (rv); 2695} 2696 2697/* 2698 * Clear the given bit in each of the given page's ptes. The bit is 2699 * expressed as a 32-bit mask. Consequently, if the pte is 64 bits in 2700 * size, only a bit within the least significant 32 can be cleared. 2701 */ 2702static __inline void 2703pmap_clear_ptes(vm_page_t m, int bit) 2704{ 2705 register pv_entry_t pv; 2706 pt_entry_t pbits, *pte; 2707 2708 if (!pmap_initialized || (m->flags & PG_FICTITIOUS) || 2709 (bit == PG_RW && (m->flags & PG_WRITEABLE) == 0)) 2710 return; 2711 2712 sched_pin(); 2713 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2714 /* 2715 * Loop over all current mappings setting/clearing as appropos If 2716 * setting RO do we need to clear the VAC? 2717 */ 2718 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2719 /* 2720 * don't write protect pager mappings 2721 */ 2722 if (bit == PG_RW) { 2723 if (!pmap_track_modified(pv->pv_va)) 2724 continue; 2725 } 2726 2727#if defined(PMAP_DIAGNOSTIC) 2728 if (!pv->pv_pmap) { 2729 printf("Null pmap (cb) at va: 0x%x\n", pv->pv_va); 2730 continue; 2731 } 2732#endif 2733 2734 PMAP_LOCK(pv->pv_pmap); 2735 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2736retry: 2737 pbits = *pte; 2738 if (pbits & bit) { 2739 if (bit == PG_RW) { 2740 /* 2741 * Regardless of whether a pte is 32 or 64 bits 2742 * in size, PG_RW and PG_M are among the least 2743 * significant 32 bits. 2744 */ 2745 if (!atomic_cmpset_int((u_int *)pte, pbits, 2746 pbits & ~(PG_RW | PG_M))) 2747 goto retry; 2748 if (pbits & PG_M) { 2749 vm_page_dirty(m); 2750 } 2751 } else { 2752 atomic_clear_int((u_int *)pte, bit); 2753 } 2754 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2755 } 2756 PMAP_UNLOCK(pv->pv_pmap); 2757 } 2758 if (bit == PG_RW) 2759 vm_page_flag_clear(m, PG_WRITEABLE); 2760 sched_unpin(); 2761} 2762 2763/* 2764 * pmap_page_protect: 2765 * 2766 * Lower the permission for all mappings to a given page. 2767 */ 2768void 2769pmap_page_protect(vm_page_t m, vm_prot_t prot) 2770{ 2771 if ((prot & VM_PROT_WRITE) == 0) { 2772 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) { 2773 pmap_clear_ptes(m, PG_RW); 2774 } else { 2775 pmap_remove_all(m); 2776 } 2777 } 2778} 2779 2780/* 2781 * pmap_ts_referenced: 2782 * 2783 * Return a count of reference bits for a page, clearing those bits. 2784 * It is not necessary for every reference bit to be cleared, but it 2785 * is necessary that 0 only be returned when there are truly no 2786 * reference bits set. 2787 * 2788 * XXX: The exact number of bits to check and clear is a matter that 2789 * should be tested and standardized at some point in the future for 2790 * optimal aging of shared pages. 2791 */ 2792int 2793pmap_ts_referenced(vm_page_t m) 2794{ 2795 register pv_entry_t pv, pvf, pvn; 2796 pt_entry_t *pte; 2797 pt_entry_t v; 2798 int rtval = 0; 2799 2800 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2801 return (rtval); 2802 2803 sched_pin(); 2804 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2805 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2806 2807 pvf = pv; 2808 2809 do { 2810 pvn = TAILQ_NEXT(pv, pv_list); 2811 2812 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2813 2814 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2815 2816 if (!pmap_track_modified(pv->pv_va)) 2817 continue; 2818 2819 PMAP_LOCK(pv->pv_pmap); 2820 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2821 2822 if (pte && ((v = pte_load(pte)) & PG_A) != 0) { 2823 atomic_clear_int((u_int *)pte, PG_A); 2824 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2825 2826 rtval++; 2827 if (rtval > 4) { 2828 PMAP_UNLOCK(pv->pv_pmap); 2829 break; 2830 } 2831 } 2832 PMAP_UNLOCK(pv->pv_pmap); 2833 } while ((pv = pvn) != NULL && pv != pvf); 2834 } 2835 sched_unpin(); 2836 2837 return (rtval); 2838} 2839 2840/* 2841 * Clear the modify bits on the specified physical page. 2842 */ 2843void 2844pmap_clear_modify(vm_page_t m) 2845{ 2846 pmap_clear_ptes(m, PG_M); 2847} 2848 2849/* 2850 * pmap_clear_reference: 2851 * 2852 * Clear the reference bit on the specified physical page. 2853 */ 2854void 2855pmap_clear_reference(vm_page_t m) 2856{ 2857 pmap_clear_ptes(m, PG_A); 2858} 2859 2860/* 2861 * Miscellaneous support routines follow 2862 */ 2863 2864/* 2865 * Map a set of physical memory pages into the kernel virtual 2866 * address space. Return a pointer to where it is mapped. This 2867 * routine is intended to be used for mapping device memory, 2868 * NOT real memory. 2869 */ 2870void * 2871pmap_mapdev(pa, size) 2872 vm_paddr_t pa; 2873 vm_size_t size; 2874{ 2875 vm_offset_t va, tmpva, offset; 2876 2877 offset = pa & PAGE_MASK; 2878 size = roundup(offset + size, PAGE_SIZE); 2879 pa = pa & PG_FRAME; 2880 2881 if (pa < KERNLOAD && pa + size <= KERNLOAD) 2882 va = KERNBASE + pa; 2883 else 2884 va = kmem_alloc_nofault(kernel_map, size); 2885 if (!va) 2886 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 2887 2888 for (tmpva = va; size > 0; ) { 2889 pmap_kenter(tmpva, pa); 2890 size -= PAGE_SIZE; 2891 tmpva += PAGE_SIZE; 2892 pa += PAGE_SIZE; 2893 } 2894 pmap_invalidate_range(kernel_pmap, va, tmpva); 2895 return ((void *)(va + offset)); 2896} 2897 2898void 2899pmap_unmapdev(va, size) 2900 vm_offset_t va; 2901 vm_size_t size; 2902{ 2903 vm_offset_t base, offset, tmpva; 2904 2905 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 2906 return; 2907 base = va & PG_FRAME; 2908 offset = va & PAGE_MASK; 2909 size = roundup(offset + size, PAGE_SIZE); 2910 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 2911 pmap_kremove(tmpva); 2912 pmap_invalidate_range(kernel_pmap, va, tmpva); 2913 kmem_free(kernel_map, base, size); 2914} 2915 2916/* 2917 * perform the pmap work for mincore 2918 */ 2919int 2920pmap_mincore(pmap, addr) 2921 pmap_t pmap; 2922 vm_offset_t addr; 2923{ 2924 pt_entry_t *ptep, pte; 2925 vm_page_t m; 2926 int val = 0; 2927 2928 PMAP_LOCK(pmap); 2929 ptep = pmap_pte(pmap, addr); 2930 pte = (ptep != NULL) ? *ptep : 0; 2931 pmap_pte_release(ptep); 2932 PMAP_UNLOCK(pmap); 2933 2934 if (pte != 0) { 2935 vm_paddr_t pa; 2936 2937 val = MINCORE_INCORE; 2938 if ((pte & PG_MANAGED) == 0) 2939 return val; 2940 2941 pa = pte & PG_FRAME; 2942 2943 m = PHYS_TO_VM_PAGE(pa); 2944 2945 /* 2946 * Modified by us 2947 */ 2948 if (pte & PG_M) 2949 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 2950 else { 2951 /* 2952 * Modified by someone else 2953 */ 2954 vm_page_lock_queues(); 2955 if (m->dirty || pmap_is_modified(m)) 2956 val |= MINCORE_MODIFIED_OTHER; 2957 vm_page_unlock_queues(); 2958 } 2959 /* 2960 * Referenced by us 2961 */ 2962 if (pte & PG_A) 2963 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 2964 else { 2965 /* 2966 * Referenced by someone else 2967 */ 2968 vm_page_lock_queues(); 2969 if ((m->flags & PG_REFERENCED) || 2970 pmap_ts_referenced(m)) { 2971 val |= MINCORE_REFERENCED_OTHER; 2972 vm_page_flag_set(m, PG_REFERENCED); 2973 } 2974 vm_page_unlock_queues(); 2975 } 2976 } 2977 return val; 2978} 2979 2980void 2981pmap_activate(struct thread *td) 2982{ 2983 struct proc *p = td->td_proc; 2984 pmap_t pmap, oldpmap; 2985 u_int32_t cr3; 2986 2987 critical_enter(); 2988 pmap = vmspace_pmap(td->td_proc->p_vmspace); 2989 oldpmap = PCPU_GET(curpmap); 2990#if defined(SMP) 2991 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 2992 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 2993#else 2994 oldpmap->pm_active &= ~1; 2995 pmap->pm_active |= 1; 2996#endif 2997#ifdef PAE 2998 cr3 = vtophys(pmap->pm_pdpt); 2999#else 3000 cr3 = vtophys(pmap->pm_pdir); 3001#endif 3002 /* XXXKSE this is wrong. 3003 * pmap_activate is for the current thread on the current cpu 3004 */ 3005 if (p->p_flag & P_SA) { 3006 /* Make sure all other cr3 entries are updated. */ 3007 /* what if they are running? XXXKSE (maybe abort them) */ 3008 FOREACH_THREAD_IN_PROC(p, td) { 3009 td->td_pcb->pcb_cr3 = cr3; 3010 } 3011 } else { 3012 td->td_pcb->pcb_cr3 = cr3; 3013 } 3014 load_cr3(cr3); 3015 PCPU_SET(curpmap, pmap); 3016 critical_exit(); 3017} 3018 3019vm_offset_t 3020pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 3021{ 3022 3023 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 3024 return addr; 3025 } 3026 3027 addr = (addr + PDRMASK) & ~PDRMASK; 3028 return addr; 3029} 3030 3031 3032#if defined(PMAP_DEBUG) 3033pmap_pid_dump(int pid) 3034{ 3035 pmap_t pmap; 3036 struct proc *p; 3037 int npte = 0; 3038 int index; 3039 3040 sx_slock(&allproc_lock); 3041 LIST_FOREACH(p, &allproc, p_list) { 3042 if (p->p_pid != pid) 3043 continue; 3044 3045 if (p->p_vmspace) { 3046 int i,j; 3047 index = 0; 3048 pmap = vmspace_pmap(p->p_vmspace); 3049 for (i = 0; i < NPDEPTD; i++) { 3050 pd_entry_t *pde; 3051 pt_entry_t *pte; 3052 vm_offset_t base = i << PDRSHIFT; 3053 3054 pde = &pmap->pm_pdir[i]; 3055 if (pde && pmap_pde_v(pde)) { 3056 for (j = 0; j < NPTEPG; j++) { 3057 vm_offset_t va = base + (j << PAGE_SHIFT); 3058 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 3059 if (index) { 3060 index = 0; 3061 printf("\n"); 3062 } 3063 sx_sunlock(&allproc_lock); 3064 return npte; 3065 } 3066 pte = pmap_pte(pmap, va); 3067 if (pte && pmap_pte_v(pte)) { 3068 pt_entry_t pa; 3069 vm_page_t m; 3070 pa = *pte; 3071 m = PHYS_TO_VM_PAGE(pa); 3072 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 3073 va, pa, m->hold_count, m->wire_count, m->flags); 3074 npte++; 3075 index++; 3076 if (index >= 2) { 3077 index = 0; 3078 printf("\n"); 3079 } else { 3080 printf(" "); 3081 } 3082 } 3083 } 3084 } 3085 } 3086 } 3087 } 3088 sx_sunlock(&allproc_lock); 3089 return npte; 3090} 3091#endif 3092 3093#if defined(DEBUG) 3094 3095static void pads(pmap_t pm); 3096void pmap_pvdump(vm_offset_t pa); 3097 3098/* print address space of pmap*/ 3099static void 3100pads(pm) 3101 pmap_t pm; 3102{ 3103 int i, j; 3104 vm_paddr_t va; 3105 pt_entry_t *ptep; 3106 3107 if (pm == kernel_pmap) 3108 return; 3109 for (i = 0; i < NPDEPTD; i++) 3110 if (pm->pm_pdir[i]) 3111 for (j = 0; j < NPTEPG; j++) { 3112 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 3113 if (pm == kernel_pmap && va < KERNBASE) 3114 continue; 3115 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 3116 continue; 3117 ptep = pmap_pte(pm, va); 3118 if (pmap_pte_v(ptep)) 3119 printf("%x:%x ", va, *ptep); 3120 }; 3121 3122} 3123 3124void 3125pmap_pvdump(pa) 3126 vm_paddr_t pa; 3127{ 3128 pv_entry_t pv; 3129 vm_page_t m; 3130 3131 printf("pa %x", pa); 3132 m = PHYS_TO_VM_PAGE(pa); 3133 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3134 printf(" -> pmap %p, va %x", (void *)pv->pv_pmap, pv->pv_va); 3135 pads(pv->pv_pmap); 3136 } 3137 printf(" "); 3138} 3139#endif 3140