virtio_pci.h revision 227652 
1/*
2 * Copyright IBM Corp. 2007
3 *
4 * Authors:
5 *  Anthony Liguori  <aliguori@us.ibm.com>
6 *
7 * This header is BSD licensed so anyone can use the definitions to implement
8 * compatible drivers/servers.
9 *
10 * $FreeBSD: head/sys/dev/virtio/pci/virtio_pci.h 227652 2011-11-18 05:43:43Z grehan $
11 */
12
13#ifndef _VIRTIO_PCI_H
14#define _VIRTIO_PCI_H
15
16/* VirtIO PCI vendor/device ID. */
17#define VIRTIO_PCI_VENDORID	0x1AF4
18#define VIRTIO_PCI_DEVICEID_MIN	0x1000
19#define VIRTIO_PCI_DEVICEID_MAX	0x103F
20
21/* VirtIO ABI version, this must match exactly. */
22#define VIRTIO_PCI_ABI_VERSION	0
23
24/*
25 * VirtIO Header, located in BAR 0.
26 */
27#define VIRTIO_PCI_HOST_FEATURES  0  /* host's supported features (32bit, RO)*/
28#define VIRTIO_PCI_GUEST_FEATURES 4  /* guest's supported features (32, RW) */
29#define VIRTIO_PCI_QUEUE_PFN      8  /* physical address of VQ (32, RW) */
30#define VIRTIO_PCI_QUEUE_NUM      12 /* number of ring entries (16, RO) */
31#define VIRTIO_PCI_QUEUE_SEL      14 /* current VQ selection (16, RW) */
32#define VIRTIO_PCI_QUEUE_NOTIFY	  16 /* notify host regarding VQ (16, RW) */
33#define VIRTIO_PCI_STATUS         18 /* device status register (8, RW) */
34#define VIRTIO_PCI_ISR            19 /* interrupt status register, reading
35				      * also clears the register (8, RO) */
36/* Only if MSIX is enabled: */
37#define VIRTIO_MSI_CONFIG_VECTOR  20 /* configuration change vector (16, RW) */
38#define VIRTIO_MSI_QUEUE_VECTOR   22 /* vector for selected VQ notifications
39					(16, RW) */
40
41/* The bit of the ISR which indicates a device has an interrupt. */
42#define VIRTIO_PCI_ISR_INTR	0x1
43/* The bit of the ISR which indicates a device configuration change. */
44#define VIRTIO_PCI_ISR_CONFIG	0x2
45/* Vector value used to disable MSI for queue. */
46#define VIRTIO_MSI_NO_VECTOR	0xFFFF
47
48/*
49 * The remaining space is defined by each driver as the per-driver
50 * configuration space.
51 */
52#define VIRTIO_PCI_CONFIG(sc) \
53    (((sc)->vtpci_flags & VIRTIO_PCI_FLAG_MSIX) ? 24 : 20)
54
55/*
56 * How many bits to shift physical queue address written to QUEUE_PFN.
57 * 12 is historical, and due to x86 page size.
58 */
59#define VIRTIO_PCI_QUEUE_ADDR_SHIFT	12
60
61/* The alignment to use between consumer and producer parts of vring. */
62#define VIRTIO_PCI_VRING_ALIGN	4096
63
64#endif /* _VIRTIO_PCI_H */
65