if_axe.c revision 193045
1/*-
2 * Copyright (c) 1997, 1998, 1999, 2000-2003
3 *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/usb/net/if_axe.c 193045 2009-05-29 18:46:57Z thompsa $");
35
36/*
37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver.
38 * Used in the LinkSys USB200M and various other adapters.
39 *
40 * Manuals available from:
41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
43 * controller) to find the definitions for the RX control register.
44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
45 *
46 * Written by Bill Paul <wpaul@windriver.com>
47 * Senior Engineer
48 * Wind River Systems
49 */
50
51/*
52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
53 * It uses an external PHY (reference designs use a RealTek chip),
54 * and has a 64-bit multicast hash filter. There is some information
55 * missing from the manual which one needs to know in order to make
56 * the chip function:
57 *
58 * - You must set bit 7 in the RX control register, otherwise the
59 *   chip won't receive any packets.
60 * - You must initialize all 3 IPG registers, or you won't be able
61 *   to send any packets.
62 *
63 * Note that this device appears to only support loading the station
64 * address via autload from the EEPROM (i.e. there's no way to manaully
65 * set it).
66 *
67 * (Adam Weinberger wanted me to name this driver if_gir.c.)
68 */
69
70/*
71 * Ax88178 and Ax88772 support backported from the OpenBSD driver.
72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com
73 *
74 * Manual here:
75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf
76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf
77 */
78
79#include "usbdevs.h"
80#include <dev/usb/usb.h>
81#include <dev/usb/usb_mfunc.h>
82#include <dev/usb/usb_error.h>
83
84#define	USB_DEBUG_VAR axe_debug
85
86#include <dev/usb/usb_core.h>
87#include <dev/usb/usb_lookup.h>
88#include <dev/usb/usb_process.h>
89#include <dev/usb/usb_debug.h>
90#include <dev/usb/usb_request.h>
91#include <dev/usb/usb_busdma.h>
92#include <dev/usb/usb_util.h>
93
94#include <dev/usb/net/usb_ethernet.h>
95#include <dev/usb/net/if_axereg.h>
96
97/*
98 * AXE_178_MAX_FRAME_BURST
99 * max frame burst size for Ax88178 and Ax88772
100 *	0	2048 bytes
101 *	1	4096 bytes
102 *	2	8192 bytes
103 *	3	16384 bytes
104 * use the largest your system can handle without USB stalling.
105 *
106 * NB: 88772 parts appear to generate lots of input errors with
107 * a 2K rx buffer and 8K is only slightly faster than 4K on an
108 * EHCI port on a T42 so change at your own risk.
109 */
110#define AXE_178_MAX_FRAME_BURST	1
111
112#if USB_DEBUG
113static int axe_debug = 0;
114
115SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe");
116SYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0,
117    "Debug level");
118#endif
119
120/*
121 * Various supported device vendors/products.
122 */
123static const struct usb_device_id axe_devs[] = {
124	{USB_VPI(USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UF200, 0)},
125	{USB_VPI(USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2, 0)},
126	{USB_VPI(USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET, AXE_FLAG_772)},
127	{USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172, 0)},
128	{USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178, AXE_FLAG_178)},
129	{USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772, AXE_FLAG_772)},
130	{USB_VPI(USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T, 0)},
131	{USB_VPI(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055, AXE_FLAG_178)},
132	{USB_VPI(USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR, 0)},
133	{USB_VPI(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2, AXE_FLAG_772)},
134	{USB_VPI(USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX, 0)},
135	{USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100, 0)},
136	{USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1, AXE_FLAG_772)},
137	{USB_VPI(USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E, 0)},
138	{USB_VPI(USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2, AXE_FLAG_178)},
139	{USB_VPI(USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1, 0)},
140	{USB_VPI(USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M, 0)},
141	{USB_VPI(USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000, AXE_FLAG_178)},
142	{USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX, 0)},
143	{USB_VPI(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120, 0)},
144	{USB_VPI(USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS, AXE_FLAG_772)},
145	{USB_VPI(USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T, AXE_FLAG_178)},
146	{USB_VPI(USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029, 0)},
147	{USB_VPI(USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028, AXE_FLAG_178)},
148	{USB_VPI(USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL, 0)},
149};
150
151static device_probe_t axe_probe;
152static device_attach_t axe_attach;
153static device_detach_t axe_detach;
154
155static usb_callback_t axe_intr_callback;
156static usb_callback_t axe_bulk_read_callback;
157static usb_callback_t axe_bulk_write_callback;
158
159static miibus_readreg_t axe_miibus_readreg;
160static miibus_writereg_t axe_miibus_writereg;
161static miibus_statchg_t axe_miibus_statchg;
162
163static uether_fn_t axe_attach_post;
164static uether_fn_t axe_init;
165static uether_fn_t axe_stop;
166static uether_fn_t axe_start;
167static uether_fn_t axe_tick;
168static uether_fn_t axe_setmulti;
169static uether_fn_t axe_setpromisc;
170
171static int	axe_ifmedia_upd(struct ifnet *);
172static void	axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
173static int	axe_cmd(struct axe_softc *, int, int, int, void *);
174static void	axe_ax88178_init(struct axe_softc *);
175static void	axe_ax88772_init(struct axe_softc *);
176static int	axe_get_phyno(struct axe_softc *, int);
177
178static const struct usb_config axe_config[AXE_N_TRANSFER] = {
179
180	[AXE_BULK_DT_WR] = {
181		.type = UE_BULK,
182		.endpoint = UE_ADDR_ANY,
183		.direction = UE_DIR_OUT,
184		.bufsize = AXE_BULK_BUF_SIZE,
185		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
186		.callback = axe_bulk_write_callback,
187		.timeout = 10000,	/* 10 seconds */
188	},
189
190	[AXE_BULK_DT_RD] = {
191		.type = UE_BULK,
192		.endpoint = UE_ADDR_ANY,
193		.direction = UE_DIR_IN,
194#if (MCLBYTES < 2048)
195#error "(MCLBYTES < 2048)"
196#endif
197		.bufsize = MCLBYTES,
198		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
199		.callback = axe_bulk_read_callback,
200		.timeout = 0,	/* no timeout */
201	},
202
203	[AXE_INTR_DT_RD] = {
204		.type = UE_INTERRUPT,
205		.endpoint = UE_ADDR_ANY,
206		.direction = UE_DIR_IN,
207		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
208		.bufsize = 0,	/* use wMaxPacketSize */
209		.callback = axe_intr_callback,
210	},
211};
212
213static device_method_t axe_methods[] = {
214	/* Device interface */
215	DEVMETHOD(device_probe, axe_probe),
216	DEVMETHOD(device_attach, axe_attach),
217	DEVMETHOD(device_detach, axe_detach),
218
219	/* bus interface */
220	DEVMETHOD(bus_print_child, bus_generic_print_child),
221	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
222
223	/* MII interface */
224	DEVMETHOD(miibus_readreg, axe_miibus_readreg),
225	DEVMETHOD(miibus_writereg, axe_miibus_writereg),
226	DEVMETHOD(miibus_statchg, axe_miibus_statchg),
227
228	{0, 0}
229};
230
231static driver_t axe_driver = {
232	.name = "axe",
233	.methods = axe_methods,
234	.size = sizeof(struct axe_softc),
235};
236
237static devclass_t axe_devclass;
238
239DRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0);
240DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0);
241MODULE_DEPEND(axe, uether, 1, 1, 1);
242MODULE_DEPEND(axe, usb, 1, 1, 1);
243MODULE_DEPEND(axe, ether, 1, 1, 1);
244MODULE_DEPEND(axe, miibus, 1, 1, 1);
245
246static const struct usb_ether_methods axe_ue_methods = {
247	.ue_attach_post = axe_attach_post,
248	.ue_start = axe_start,
249	.ue_init = axe_init,
250	.ue_stop = axe_stop,
251	.ue_tick = axe_tick,
252	.ue_setmulti = axe_setmulti,
253	.ue_setpromisc = axe_setpromisc,
254	.ue_mii_upd = axe_ifmedia_upd,
255	.ue_mii_sts = axe_ifmedia_sts,
256};
257
258static int
259axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
260{
261	struct usb_device_request req;
262	usb_error_t err;
263
264	AXE_LOCK_ASSERT(sc, MA_OWNED);
265
266	req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ?
267	    UT_WRITE_VENDOR_DEVICE :
268	    UT_READ_VENDOR_DEVICE);
269	req.bRequest = AXE_CMD_CMD(cmd);
270	USETW(req.wValue, val);
271	USETW(req.wIndex, index);
272	USETW(req.wLength, AXE_CMD_LEN(cmd));
273
274	err = usb2_ether_do_request(&sc->sc_ue, &req, buf, 1000);
275
276	return (err);
277}
278
279static int
280axe_miibus_readreg(device_t dev, int phy, int reg)
281{
282	struct axe_softc *sc = device_get_softc(dev);
283	uint16_t val;
284	int locked;
285
286	if (sc->sc_phyno != phy)
287		return (0);
288
289	locked = mtx_owned(&sc->sc_mtx);
290	if (!locked)
291		AXE_LOCK(sc);
292
293	axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
294	axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val);
295	axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
296
297	val = le16toh(val);
298	if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) {
299		/*
300		 * BMSR of AX88772 indicates that it supports extended
301		 * capability but the extended status register is
302		 * revered for embedded ethernet PHY. So clear the
303		 * extended capability bit of BMSR.
304		 */
305		val &= ~BMSR_EXTCAP;
306	}
307
308	if (!locked)
309		AXE_UNLOCK(sc);
310	return (val);
311}
312
313static int
314axe_miibus_writereg(device_t dev, int phy, int reg, int val)
315{
316	struct axe_softc *sc = device_get_softc(dev);
317	int locked;
318
319	val = htole32(val);
320
321	if (sc->sc_phyno != phy)
322		return (0);
323
324	locked = mtx_owned(&sc->sc_mtx);
325	if (!locked)
326		AXE_LOCK(sc);
327
328	axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
329	axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val);
330	axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
331
332	if (!locked)
333		AXE_UNLOCK(sc);
334	return (0);
335}
336
337static void
338axe_miibus_statchg(device_t dev)
339{
340	struct axe_softc *sc = device_get_softc(dev);
341	struct mii_data *mii = GET_MII(sc);
342	struct ifnet *ifp;
343	uint16_t val;
344	int err, locked;
345
346	locked = mtx_owned(&sc->sc_mtx);
347	if (!locked)
348		AXE_LOCK(sc);
349
350	ifp = usb2_ether_getifp(&sc->sc_ue);
351	if (mii == NULL || ifp == NULL ||
352	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
353		goto done;
354
355	sc->sc_flags &= ~AXE_FLAG_LINK;
356	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
357	    (IFM_ACTIVE | IFM_AVALID)) {
358		switch (IFM_SUBTYPE(mii->mii_media_active)) {
359		case IFM_10_T:
360		case IFM_100_TX:
361			sc->sc_flags |= AXE_FLAG_LINK;
362			break;
363		case IFM_1000_T:
364			if ((sc->sc_flags & AXE_FLAG_178) == 0)
365				break;
366			sc->sc_flags |= AXE_FLAG_LINK;
367			break;
368		default:
369			break;
370		}
371	}
372
373	/* Lost link, do nothing. */
374	if ((sc->sc_flags & AXE_FLAG_LINK) == 0)
375		goto done;
376
377	val = 0;
378	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
379		val |= AXE_MEDIA_FULL_DUPLEX;
380	if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
381		val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;
382		if ((sc->sc_flags & AXE_FLAG_178) != 0)
383			val |= AXE_178_MEDIA_ENCK;
384		switch (IFM_SUBTYPE(mii->mii_media_active)) {
385		case IFM_1000_T:
386			val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
387			break;
388		case IFM_100_TX:
389			val |= AXE_178_MEDIA_100TX;
390			break;
391		case IFM_10_T:
392			/* doesn't need to be handled */
393			break;
394		}
395	}
396	err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
397	if (err)
398		device_printf(dev, "media change failed, error %d\n", err);
399done:
400	if (!locked)
401		AXE_UNLOCK(sc);
402}
403
404/*
405 * Set media options.
406 */
407static int
408axe_ifmedia_upd(struct ifnet *ifp)
409{
410	struct axe_softc *sc = ifp->if_softc;
411	struct mii_data *mii = GET_MII(sc);
412	int error;
413
414	AXE_LOCK_ASSERT(sc, MA_OWNED);
415
416	if (mii->mii_instance) {
417		struct mii_softc *miisc;
418
419		LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
420			mii_phy_reset(miisc);
421	}
422	error = mii_mediachg(mii);
423	return (error);
424}
425
426/*
427 * Report current media status.
428 */
429static void
430axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
431{
432	struct axe_softc *sc = ifp->if_softc;
433	struct mii_data *mii = GET_MII(sc);
434
435	AXE_LOCK(sc);
436	mii_pollstat(mii);
437	AXE_UNLOCK(sc);
438	ifmr->ifm_active = mii->mii_media_active;
439	ifmr->ifm_status = mii->mii_media_status;
440}
441
442static void
443axe_setmulti(struct usb_ether *ue)
444{
445	struct axe_softc *sc = usb2_ether_getsc(ue);
446	struct ifnet *ifp = usb2_ether_getifp(ue);
447	struct ifmultiaddr *ifma;
448	uint32_t h = 0;
449	uint16_t rxmode;
450	uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
451
452	AXE_LOCK_ASSERT(sc, MA_OWNED);
453
454	axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
455	rxmode = le16toh(rxmode);
456
457	if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
458		rxmode |= AXE_RXCMD_ALLMULTI;
459		axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
460		return;
461	}
462	rxmode &= ~AXE_RXCMD_ALLMULTI;
463
464	IF_ADDR_LOCK(ifp);
465	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link)
466	{
467		if (ifma->ifma_addr->sa_family != AF_LINK)
468			continue;
469		h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
470		    ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
471		hashtbl[h / 8] |= 1 << (h % 8);
472	}
473	IF_ADDR_UNLOCK(ifp);
474
475	axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
476	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
477}
478
479static int
480axe_get_phyno(struct axe_softc *sc, int sel)
481{
482	int phyno;
483
484	switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) {
485	case PHY_TYPE_100_HOME:
486	case PHY_TYPE_GIG:
487		phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]);
488		break;
489	case PHY_TYPE_SPECIAL:
490		/* FALLTHROUGH */
491	case PHY_TYPE_RSVD:
492		/* FALLTHROUGH */
493	case PHY_TYPE_NON_SUP:
494		/* FALLTHROUGH */
495	default:
496		phyno = -1;
497		break;
498	}
499
500	return (phyno);
501}
502
503static void
504axe_ax88178_init(struct axe_softc *sc)
505{
506	int gpio0 = 0, phymode = 0;
507	uint16_t eeprom;
508
509	axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
510	/* XXX magic */
511	axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
512	eeprom = le16toh(eeprom);
513	axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
514
515	/* if EEPROM is invalid we have to use to GPIO0 */
516	if (eeprom == 0xffff) {
517		phymode = 0;
518		gpio0 = 1;
519	} else {
520		phymode = eeprom & 7;
521		gpio0 = (eeprom & 0x80) ? 0 : 1;
522	}
523
524	axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL);
525	usb2_ether_pause(&sc->sc_ue, hz / 16);
526
527	if ((eeprom >> 8) != 0x01) {
528		axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
529		usb2_ether_pause(&sc->sc_ue, hz / 32);
530
531		axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL);
532		usb2_ether_pause(&sc->sc_ue, hz / 3);
533
534		axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
535		usb2_ether_pause(&sc->sc_ue, hz / 32);
536	} else {
537		axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL);
538		usb2_ether_pause(&sc->sc_ue, hz / 32);
539
540		axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL);
541		usb2_ether_pause(&sc->sc_ue, hz / 32);
542	}
543
544	/* soft reset */
545	axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
546	usb2_ether_pause(&sc->sc_ue, hz / 4);
547
548	axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
549	    AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
550	usb2_ether_pause(&sc->sc_ue, hz / 4);
551	/* Enable MII/GMII/RGMII interface to work with external PHY. */
552	axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
553	usb2_ether_pause(&sc->sc_ue, hz / 4);
554
555	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
556}
557
558static void
559axe_ax88772_init(struct axe_softc *sc)
560{
561	axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
562	usb2_ether_pause(&sc->sc_ue, hz / 16);
563
564	if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) {
565		/* ask for the embedded PHY */
566		axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
567		usb2_ether_pause(&sc->sc_ue, hz / 64);
568
569		/* power down and reset state, pin reset state */
570		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
571		    AXE_SW_RESET_CLEAR, NULL);
572		usb2_ether_pause(&sc->sc_ue, hz / 16);
573
574		/* power down/reset state, pin operating state */
575		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
576		    AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
577		usb2_ether_pause(&sc->sc_ue, hz / 4);
578
579		/* power up, reset */
580		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
581
582		/* power up, operating */
583		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
584		    AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
585	} else {
586		/* ask for external PHY */
587		axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
588		usb2_ether_pause(&sc->sc_ue, hz / 64);
589
590		/* power down internal PHY */
591		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
592		    AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
593	}
594
595	usb2_ether_pause(&sc->sc_ue, hz / 4);
596	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
597}
598
599static void
600axe_reset(struct axe_softc *sc)
601{
602	struct usb_config_descriptor *cd;
603	usb_error_t err;
604
605	cd = usb2_get_config_descriptor(sc->sc_ue.ue_udev);
606
607	err = usb2_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
608	    cd->bConfigurationValue);
609	if (err)
610		DPRINTF("reset failed (ignored)\n");
611
612	/* Wait a little while for the chip to get its brains in order. */
613	usb2_ether_pause(&sc->sc_ue, hz / 100);
614}
615
616static void
617axe_attach_post(struct usb_ether *ue)
618{
619	struct axe_softc *sc = usb2_ether_getsc(ue);
620
621	/*
622	 * Load PHY indexes first. Needed by axe_xxx_init().
623	 */
624	axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs);
625#if 1
626	device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n",
627	    sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]);
628#endif
629	sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI);
630	if (sc->sc_phyno == -1)
631		sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC);
632	if (sc->sc_phyno == -1) {
633		device_printf(sc->sc_ue.ue_dev,
634		    "no valid PHY address found, assuming PHY address 0\n");
635		sc->sc_phyno = 0;
636	}
637
638	if (sc->sc_flags & AXE_FLAG_178)
639		axe_ax88178_init(sc);
640	else if (sc->sc_flags & AXE_FLAG_772)
641		axe_ax88772_init(sc);
642
643	/*
644	 * Get station address.
645	 */
646	if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
647		axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
648	else
649		axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
650
651	/*
652	 * Fetch IPG values.
653	 */
654	axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs);
655}
656
657/*
658 * Probe for a AX88172 chip.
659 */
660static int
661axe_probe(device_t dev)
662{
663	struct usb_attach_arg *uaa = device_get_ivars(dev);
664
665	if (uaa->usb_mode != USB_MODE_HOST)
666		return (ENXIO);
667	if (uaa->info.bConfigIndex != AXE_CONFIG_IDX)
668		return (ENXIO);
669	if (uaa->info.bIfaceIndex != AXE_IFACE_IDX)
670		return (ENXIO);
671
672	return (usb2_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa));
673}
674
675/*
676 * Attach the interface. Allocate softc structures, do ifmedia
677 * setup and ethernet/BPF attach.
678 */
679static int
680axe_attach(device_t dev)
681{
682	struct usb_attach_arg *uaa = device_get_ivars(dev);
683	struct axe_softc *sc = device_get_softc(dev);
684	struct usb_ether *ue = &sc->sc_ue;
685	uint8_t iface_index;
686	int error;
687
688	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
689
690	device_set_usb2_desc(dev);
691
692	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
693
694	iface_index = AXE_IFACE_IDX;
695	error = usb2_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
696	    axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx);
697	if (error) {
698		device_printf(dev, "allocating USB transfers failed!\n");
699		goto detach;
700	}
701
702	ue->ue_sc = sc;
703	ue->ue_dev = dev;
704	ue->ue_udev = uaa->device;
705	ue->ue_mtx = &sc->sc_mtx;
706	ue->ue_methods = &axe_ue_methods;
707
708	error = usb2_ether_ifattach(ue);
709	if (error) {
710		device_printf(dev, "could not attach interface\n");
711		goto detach;
712	}
713	return (0);			/* success */
714
715detach:
716	axe_detach(dev);
717	return (ENXIO);			/* failure */
718}
719
720static int
721axe_detach(device_t dev)
722{
723	struct axe_softc *sc = device_get_softc(dev);
724	struct usb_ether *ue = &sc->sc_ue;
725
726	usb2_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER);
727	usb2_ether_ifdetach(ue);
728	mtx_destroy(&sc->sc_mtx);
729
730	return (0);
731}
732
733static void
734axe_intr_callback(struct usb_xfer *xfer)
735{
736	switch (USB_GET_STATE(xfer)) {
737	case USB_ST_TRANSFERRED:
738	case USB_ST_SETUP:
739tr_setup:
740		xfer->frlengths[0] = xfer->max_data_length;
741		usb2_start_hardware(xfer);
742		return;
743
744	default:			/* Error */
745		if (xfer->error != USB_ERR_CANCELLED) {
746			/* try to clear stall first */
747			xfer->flags.stall_pipe = 1;
748			goto tr_setup;
749		}
750		return;
751	}
752}
753
754#if (AXE_BULK_BUF_SIZE >= 0x10000)
755#error "Please update axe_bulk_read_callback()!"
756#endif
757
758static void
759axe_bulk_read_callback(struct usb_xfer *xfer)
760{
761	struct axe_softc *sc = xfer->priv_sc;
762	struct usb_ether *ue = &sc->sc_ue;
763	struct ifnet *ifp = usb2_ether_getifp(ue);
764	struct axe_sframe_hdr hdr;
765	int error, pos, len, adjust;
766
767	switch (USB_GET_STATE(xfer)) {
768	case USB_ST_TRANSFERRED:
769		pos = 0;
770		while (1) {
771			if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
772				if (xfer->actlen < sizeof(hdr)) {
773					/* too little data */
774					break;
775				}
776				usb2_copy_out(xfer->frbuffers, pos, &hdr, sizeof(hdr));
777
778				if ((hdr.len ^ hdr.ilen) != 0xFFFF) {
779					/* we lost sync */
780					break;
781				}
782				xfer->actlen -= sizeof(hdr);
783				pos += sizeof(hdr);
784
785				len = le16toh(hdr.len);
786				if (len > xfer->actlen) {
787					/* invalid length */
788					break;
789				}
790				adjust = (len & 1);
791
792			} else {
793				len = xfer->actlen;
794				adjust = 0;
795			}
796			error = usb2_ether_rxbuf(ue, xfer->frbuffers, pos, len);
797			if (error)
798				break;
799
800			pos += len;
801			xfer->actlen -= len;
802
803			if (xfer->actlen <= adjust) {
804				/* we are finished */
805				goto tr_setup;
806			}
807			pos += adjust;
808			xfer->actlen -= adjust;
809		}
810
811		/* count an error */
812		ifp->if_ierrors++;
813
814		/* FALLTHROUGH */
815	case USB_ST_SETUP:
816tr_setup:
817		xfer->frlengths[0] = xfer->max_data_length;
818		usb2_start_hardware(xfer);
819		usb2_ether_rxflush(ue);
820		return;
821
822	default:			/* Error */
823		DPRINTF("bulk read error, %s\n",
824		    usb2_errstr(xfer->error));
825
826		if (xfer->error != USB_ERR_CANCELLED) {
827			/* try to clear stall first */
828			xfer->flags.stall_pipe = 1;
829			goto tr_setup;
830		}
831		return;
832
833	}
834}
835
836#if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4)))
837#error "Please update axe_bulk_write_callback()!"
838#endif
839
840static void
841axe_bulk_write_callback(struct usb_xfer *xfer)
842{
843	struct axe_softc *sc = xfer->priv_sc;
844	struct axe_sframe_hdr hdr;
845	struct ifnet *ifp = usb2_ether_getifp(&sc->sc_ue);
846	struct mbuf *m;
847	int pos;
848
849	switch (USB_GET_STATE(xfer)) {
850	case USB_ST_TRANSFERRED:
851		DPRINTFN(11, "transfer complete\n");
852		ifp->if_opackets++;
853		/* FALLTHROUGH */
854	case USB_ST_SETUP:
855tr_setup:
856		if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
857			/*
858			 * don't send anything if there is no link !
859			 */
860			return;
861		}
862		pos = 0;
863
864		while (1) {
865
866			IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
867
868			if (m == NULL) {
869				if (pos > 0)
870					break;	/* send out data */
871				return;
872			}
873			if (m->m_pkthdr.len > MCLBYTES) {
874				m->m_pkthdr.len = MCLBYTES;
875			}
876			if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
877
878				hdr.len = htole16(m->m_pkthdr.len);
879				hdr.ilen = ~hdr.len;
880
881				usb2_copy_in(xfer->frbuffers, pos, &hdr, sizeof(hdr));
882
883				pos += sizeof(hdr);
884
885				/*
886				 * NOTE: Some drivers force a short packet
887				 * by appending a dummy header with zero
888				 * length at then end of the USB transfer.
889				 * This driver uses the
890				 * USB_FORCE_SHORT_XFER flag instead.
891				 */
892			}
893			usb2_m_copy_in(xfer->frbuffers, pos,
894			    m, 0, m->m_pkthdr.len);
895
896			pos += m->m_pkthdr.len;
897
898			/*
899			 * if there's a BPF listener, bounce a copy
900			 * of this frame to him:
901			 */
902			BPF_MTAP(ifp, m);
903
904			m_freem(m);
905
906			if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
907				if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) {
908					/* send out frame(s) */
909					break;
910				}
911			} else {
912				/* send out frame */
913				break;
914			}
915		}
916
917		xfer->frlengths[0] = pos;
918		usb2_start_hardware(xfer);
919		return;
920
921	default:			/* Error */
922		DPRINTFN(11, "transfer error, %s\n",
923		    usb2_errstr(xfer->error));
924
925		ifp->if_oerrors++;
926
927		if (xfer->error != USB_ERR_CANCELLED) {
928			/* try to clear stall first */
929			xfer->flags.stall_pipe = 1;
930			goto tr_setup;
931		}
932		return;
933
934	}
935}
936
937static void
938axe_tick(struct usb_ether *ue)
939{
940	struct axe_softc *sc = usb2_ether_getsc(ue);
941	struct mii_data *mii = GET_MII(sc);
942
943	AXE_LOCK_ASSERT(sc, MA_OWNED);
944
945	mii_tick(mii);
946	if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
947		axe_miibus_statchg(ue->ue_dev);
948		if ((sc->sc_flags & AXE_FLAG_LINK) != 0)
949			axe_start(ue);
950	}
951}
952
953static void
954axe_start(struct usb_ether *ue)
955{
956	struct axe_softc *sc = usb2_ether_getsc(ue);
957
958	/*
959	 * start the USB transfers, if not already started:
960	 */
961	usb2_transfer_start(sc->sc_xfer[AXE_INTR_DT_RD]);
962	usb2_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]);
963	usb2_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]);
964}
965
966static void
967axe_init(struct usb_ether *ue)
968{
969	struct axe_softc *sc = usb2_ether_getsc(ue);
970	struct ifnet *ifp = usb2_ether_getifp(ue);
971	uint16_t rxmode;
972
973	AXE_LOCK_ASSERT(sc, MA_OWNED);
974
975	/* Cancel pending I/O */
976	axe_stop(ue);
977
978#ifdef notdef
979	/* Set MAC address */
980	axe_mac(sc, IF_LLADDR(ifp), 1);
981#endif
982
983	/* Set transmitter IPG values */
984	if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
985		axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2],
986		    (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL);
987	} else {
988		axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL);
989		axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL);
990		axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL);
991	}
992
993	/* Enable receiver, set RX mode */
994	rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE);
995	if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
996		rxmode |= AXE_178_RXCMD_MFB_2048;	/* chip default */
997	} else {
998		rxmode |= AXE_172_RXCMD_UNICAST;
999	}
1000
1001	/* If we want promiscuous mode, set the allframes bit. */
1002	if (ifp->if_flags & IFF_PROMISC)
1003		rxmode |= AXE_RXCMD_PROMISC;
1004
1005	if (ifp->if_flags & IFF_BROADCAST)
1006		rxmode |= AXE_RXCMD_BROADCAST;
1007
1008	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1009
1010	/* Load the multicast filter. */
1011	axe_setmulti(ue);
1012
1013	usb2_transfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]);
1014
1015	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1016	axe_start(ue);
1017}
1018
1019static void
1020axe_setpromisc(struct usb_ether *ue)
1021{
1022	struct axe_softc *sc = usb2_ether_getsc(ue);
1023	struct ifnet *ifp = usb2_ether_getifp(ue);
1024	uint16_t rxmode;
1025
1026	axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
1027
1028	rxmode = le16toh(rxmode);
1029
1030	if (ifp->if_flags & IFF_PROMISC) {
1031		rxmode |= AXE_RXCMD_PROMISC;
1032	} else {
1033		rxmode &= ~AXE_RXCMD_PROMISC;
1034	}
1035
1036	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1037
1038	axe_setmulti(ue);
1039}
1040
1041static void
1042axe_stop(struct usb_ether *ue)
1043{
1044	struct axe_softc *sc = usb2_ether_getsc(ue);
1045	struct ifnet *ifp = usb2_ether_getifp(ue);
1046
1047	AXE_LOCK_ASSERT(sc, MA_OWNED);
1048
1049	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1050	sc->sc_flags &= ~AXE_FLAG_LINK;
1051
1052	/*
1053	 * stop all the transfers, if not already stopped:
1054	 */
1055	usb2_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]);
1056	usb2_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]);
1057	usb2_transfer_stop(sc->sc_xfer[AXE_INTR_DT_RD]);
1058
1059	axe_reset(sc);
1060}
1061