ehci_ixp4xx.c revision 190183 
1/*-
2 * Copyright (c) 2008 Sam Leffler.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25/*
26 * IXP435 attachment driver for the USB Enhanced Host Controller.
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/usb/controller/ehci_ixp4xx.c 190183 2009-03-20 21:57:54Z thompsa $");
31
32#include "opt_bus.h"
33
34#include <dev/usb/usb_mfunc.h>
35#include <dev/usb/usb.h>
36
37#include <dev/usb/usb_core.h>
38#include <dev/usb/usb_busdma.h>
39#include <dev/usb/usb_process.h>
40#include <dev/usb/usb_sw_transfer.h>
41#include <dev/usb/usb_util.h>
42
43#include <dev/usb/usb_controller.h>
44#include <dev/usb/usb_bus.h>
45#include <dev/usb/controller/ehci.h>
46
47#include <arm/xscale/ixp425/ixp425reg.h>
48#include <arm/xscale/ixp425/ixp425var.h>
49
50#define EHCI_VENDORID_IXP4XX	0x42fa05
51#define EHCI_HC_DEVSTR		"IXP4XX Integrated USB 2.0 controller"
52
53struct ixp_ehci_softc {
54	ehci_softc_t		base;	/* storage for EHCI code */
55	bus_space_tag_t		iot;
56	bus_space_handle_t	ioh;
57	struct bus_space	tag;	/* tag for private bus space ops */
58};
59
60static device_attach_t ehci_ixp_attach;
61static device_detach_t ehci_ixp_detach;
62static device_shutdown_t ehci_ixp_shutdown;
63static device_suspend_t ehci_ixp_suspend;
64static device_resume_t ehci_ixp_resume;
65
66static uint8_t ehci_bs_r_1(void *, bus_space_handle_t, bus_size_t);
67static void ehci_bs_w_1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
68static uint16_t ehci_bs_r_2(void *, bus_space_handle_t, bus_size_t);
69static void ehci_bs_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t);
70static uint32_t ehci_bs_r_4(void *, bus_space_handle_t, bus_size_t);
71static void ehci_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t);
72
73static int
74ehci_ixp_suspend(device_t self)
75{
76	ehci_softc_t *sc = device_get_softc(self);
77	int err;
78
79	err = bus_generic_suspend(self);
80	if (err)
81		return (err);
82	ehci_suspend(sc);
83	return (0);
84}
85
86static int
87ehci_ixp_resume(device_t self)
88{
89	ehci_softc_t *sc = device_get_softc(self);
90
91	ehci_resume(sc);
92
93	bus_generic_resume(self);
94
95	return (0);
96}
97
98static int
99ehci_ixp_shutdown(device_t self)
100{
101	ehci_softc_t *sc = device_get_softc(self);
102	int err;
103
104	err = bus_generic_shutdown(self);
105	if (err)
106		return (err);
107	ehci_shutdown(sc);
108
109	return (0);
110}
111
112static int
113ehci_ixp_probe(device_t self)
114{
115
116	device_set_desc(self, EHCI_HC_DEVSTR);
117
118	return (BUS_PROBE_DEFAULT);
119}
120
121static int
122ehci_ixp_attach(device_t self)
123{
124	struct ixp_ehci_softc *isc = device_get_softc(self);
125	ehci_softc_t *sc = &isc->base;
126	int err;
127	int rid;
128
129	/* initialise some bus fields */
130	sc->sc_bus.parent = self;
131	sc->sc_bus.devices = sc->sc_devices;
132	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
133
134	/* get all DMA memory */
135	if (usb2_bus_mem_alloc_all(&sc->sc_bus,
136	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
137		return (ENOMEM);
138	}
139
140	sc->sc_bus.usbrev = USB_REV_2_0;
141
142	/* NB: hints fix the memory location and irq */
143
144	rid = 0;
145	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
146	if (!sc->sc_io_res) {
147		device_printf(self, "Could not map memory\n");
148		goto error;
149	}
150
151	/*
152	 * Craft special resource for bus space ops that handle
153	 * byte-alignment of non-word addresses.  Also, since
154	 * we're already intercepting bus space ops we handle
155	 * the register window offset that could otherwise be
156	 * done with bus_space_subregion.
157	 */
158	isc->iot = rman_get_bustag(sc->sc_io_res);
159	isc->tag.bs_cookie = isc->iot;
160	/* read single */
161	isc->tag.bs_r_1	= ehci_bs_r_1,
162	isc->tag.bs_r_2	= ehci_bs_r_2,
163	isc->tag.bs_r_4	= ehci_bs_r_4,
164	/* write (single) */
165	isc->tag.bs_w_1	= ehci_bs_w_1,
166	isc->tag.bs_w_2	= ehci_bs_w_2,
167	isc->tag.bs_w_4	= ehci_bs_w_4,
168
169	sc->sc_io_tag = &isc->tag;
170	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
171	sc->sc_io_size = IXP435_USB1_SIZE - 0x100;
172
173	rid = 0;
174	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
175	    RF_ACTIVE);
176	if (sc->sc_irq_res == NULL) {
177		device_printf(self, "Could not allocate irq\n");
178		goto error;
179	}
180	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
181	if (!sc->sc_bus.bdev) {
182		device_printf(self, "Could not add USB device\n");
183		goto error;
184	}
185	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
186	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
187
188	sprintf(sc->sc_vendor, "Intel");
189
190
191	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
192	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
193	if (err) {
194		device_printf(self, "Could not setup irq, %d\n", err);
195		sc->sc_intr_hdl = NULL;
196		goto error;
197	}
198
199	/*
200	 * Arrange to force Host mode, select big-endian byte alignment,
201	 * and arrange to not terminate reset operations (the adapter
202	 * will ignore it if we do but might as well save a reg write).
203	 * Also, the controller has an embedded Transaction Translator
204	 * which means port speed must be read from the Port Status
205	 * register following a port enable.
206	 */
207	sc->sc_flags |= EHCI_SCFLG_TT
208		     | EHCI_SCFLG_SETMODE
209		     | EHCI_SCFLG_BIGEDESC
210		     | EHCI_SCFLG_BIGEMMIO
211		     | EHCI_SCFLG_NORESTERM
212		     ;
213	(void) ehci_reset(sc);
214
215	err = ehci_init(sc);
216	if (!err) {
217		err = device_probe_and_attach(sc->sc_bus.bdev);
218	}
219	if (err) {
220		device_printf(self, "USB init failed err=%d\n", err);
221		goto error;
222	}
223	return (0);
224
225error:
226	ehci_ixp_detach(self);
227	return (ENXIO);
228}
229
230static int
231ehci_ixp_detach(device_t self)
232{
233	struct ixp_ehci_softc *isc = device_get_softc(self);
234	ehci_softc_t *sc = &isc->base;
235	device_t bdev;
236	int err;
237
238 	if (sc->sc_bus.bdev) {
239		bdev = sc->sc_bus.bdev;
240		device_detach(bdev);
241		device_delete_child(self, bdev);
242	}
243	/* during module unload there are lots of children leftover */
244	device_delete_all_children(self);
245
246	/*
247	 * disable interrupts that might have been switched on in ehci_init
248	 */
249	if (sc->sc_io_res) {
250		EWRITE4(sc, EHCI_USBINTR, 0);
251	}
252
253 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
254		/*
255		 * only call ehci_detach() after ehci_init()
256		 */
257		ehci_detach(sc);
258
259		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
260
261		if (err)
262			/* XXX or should we panic? */
263			device_printf(self, "Could not tear down irq, %d\n",
264			    err);
265		sc->sc_intr_hdl = NULL;
266	}
267
268 	if (sc->sc_irq_res) {
269		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
270		sc->sc_irq_res = NULL;
271	}
272	if (sc->sc_io_res) {
273		bus_release_resource(self, SYS_RES_MEMORY, 0,
274		    sc->sc_io_res);
275		sc->sc_io_res = NULL;
276	}
277	usb2_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
278
279	return (0);
280}
281
282/*
283 * Bus space accessors for PIO operations.
284 */
285
286static uint8_t
287ehci_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
288{
289	return bus_space_read_1((bus_space_tag_t) t, h,
290	    0x100 + (o &~ 3) + (3 - (o & 3)));
291}
292
293static void
294ehci_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
295{
296	panic("%s", __func__);
297}
298
299static uint16_t
300ehci_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
301{
302	return bus_space_read_2((bus_space_tag_t) t, h,
303	    0x100 + (o &~ 3) + (2 - (o & 3)));
304}
305
306static void
307ehci_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
308{
309	panic("%s", __func__);
310}
311
312static uint32_t
313ehci_bs_r_4(void *t, bus_space_handle_t h, bus_size_t o)
314{
315	return bus_space_read_4((bus_space_tag_t) t, h, 0x100 + o);
316}
317
318static void
319ehci_bs_w_4(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v)
320{
321	bus_space_write_4((bus_space_tag_t) t, h, 0x100 + o, v);
322}
323
324static device_method_t ehci_methods[] = {
325	/* Device interface */
326	DEVMETHOD(device_probe, ehci_ixp_probe),
327	DEVMETHOD(device_attach, ehci_ixp_attach),
328	DEVMETHOD(device_detach, ehci_ixp_detach),
329	DEVMETHOD(device_suspend, ehci_ixp_suspend),
330	DEVMETHOD(device_resume, ehci_ixp_resume),
331	DEVMETHOD(device_shutdown, ehci_ixp_shutdown),
332
333	/* Bus interface */
334	DEVMETHOD(bus_print_child, bus_generic_print_child),
335
336	{0, 0}
337};
338
339static driver_t ehci_driver = {
340	"ehci",
341	ehci_methods,
342	sizeof(struct ixp_ehci_softc),
343};
344
345static devclass_t ehci_devclass;
346
347DRIVER_MODULE(ehci, ixp, ehci_driver, ehci_devclass, 0, 0);
348MODULE_DEPEND(ehci, usb, 1, 1, 1);
349