1139749Simp/*- 2119815Smarcel * Copyright (c) 2003 Marcel Moolenaar 3119815Smarcel * All rights reserved. 4119815Smarcel * 5119815Smarcel * Redistribution and use in source and binary forms, with or without 6119815Smarcel * modification, are permitted provided that the following conditions 7119815Smarcel * are met: 8119815Smarcel * 9119815Smarcel * 1. Redistributions of source code must retain the above copyright 10119815Smarcel * notice, this list of conditions and the following disclaimer. 11119815Smarcel * 2. Redistributions in binary form must reproduce the above copyright 12119815Smarcel * notice, this list of conditions and the following disclaimer in the 13119815Smarcel * documentation and/or other materials provided with the distribution. 14119815Smarcel * 15119815Smarcel * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16119815Smarcel * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17119815Smarcel * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18119815Smarcel * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19119815Smarcel * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20119815Smarcel * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21119815Smarcel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22119815Smarcel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23119815Smarcel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24119815Smarcel * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25119815Smarcel */ 26119815Smarcel 27119815Smarcel#include <sys/cdefs.h> 28119815Smarcel__FBSDID("$FreeBSD$"); 29119815Smarcel 30119815Smarcel#include <sys/param.h> 31119815Smarcel#include <sys/systm.h> 32119815Smarcel#include <sys/bus.h> 33119815Smarcel#include <sys/conf.h> 34119815Smarcel#include <machine/bus.h> 35119815Smarcel 36119815Smarcel#include <dev/uart/uart.h> 37119815Smarcel#include <dev/uart/uart_cpu.h> 38119815Smarcel#include <dev/uart/uart_bus.h> 39119815Smarcel 40137956Smarcel#include <dev/ic/z8530.h> 41137956Smarcel 42119815Smarcel#include "uart_if.h" 43119815Smarcel 44119815Smarcel#define DEFAULT_RCLK 307200 45119815Smarcel 46160717Smarcel/* Hack! */ 47160717Smarcel#ifdef __powerpc__ 48160717Smarcel#define UART_PCLK 0 49160717Smarcel#else 50160717Smarcel#define UART_PCLK MCB2_PCLK 51160717Smarcel#endif 52160717Smarcel 53119815Smarcel/* Multiplexed I/O. */ 54119815Smarcelstatic __inline void 55119815Smarceluart_setmreg(struct uart_bas *bas, int reg, int val) 56119815Smarcel{ 57119815Smarcel 58119815Smarcel uart_setreg(bas, REG_CTRL, reg); 59119815Smarcel uart_barrier(bas); 60119815Smarcel uart_setreg(bas, REG_CTRL, val); 61119815Smarcel} 62119815Smarcel 63119815Smarcelstatic __inline uint8_t 64119815Smarceluart_getmreg(struct uart_bas *bas, int reg) 65119815Smarcel{ 66119815Smarcel 67119815Smarcel uart_setreg(bas, REG_CTRL, reg); 68119815Smarcel uart_barrier(bas); 69119815Smarcel return (uart_getreg(bas, REG_CTRL)); 70119815Smarcel} 71119815Smarcel 72119815Smarcelstatic int 73119815Smarcelz8530_divisor(int rclk, int baudrate) 74119815Smarcel{ 75119815Smarcel int act_baud, divisor, error; 76119815Smarcel 77119815Smarcel if (baudrate == 0) 78158504Smarcel return (-1); 79119815Smarcel 80119815Smarcel divisor = (rclk + baudrate) / (baudrate << 1) - 2; 81157451Smarcel if (divisor < 0 || divisor >= 65536) 82158504Smarcel return (-1); 83119815Smarcel act_baud = rclk / 2 / (divisor + 2); 84119815Smarcel 85119815Smarcel /* 10 times error in percent: */ 86119815Smarcel error = ((act_baud - baudrate) * 2000 / baudrate + 1) >> 1; 87119815Smarcel 88119815Smarcel /* 3.0% maximum error tolerance: */ 89119815Smarcel if (error < -30 || error > 30) 90158504Smarcel return (-1); 91119815Smarcel 92119815Smarcel return (divisor); 93119815Smarcel} 94119815Smarcel 95119815Smarcelstatic int 96119815Smarcelz8530_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, 97119815Smarcel int parity, uint8_t *tpcp) 98119815Smarcel{ 99119815Smarcel int divisor; 100119815Smarcel uint8_t mpm, rpc, tpc; 101119815Smarcel 102119815Smarcel rpc = RPC_RXE; 103119815Smarcel mpm = MPM_CM16; 104119815Smarcel tpc = TPC_TXE | (*tpcp & (TPC_DTR | TPC_RTS)); 105119815Smarcel 106119815Smarcel if (databits >= 8) { 107119815Smarcel rpc |= RPC_RB8; 108119815Smarcel tpc |= TPC_TB8; 109119815Smarcel } else if (databits == 7) { 110119815Smarcel rpc |= RPC_RB7; 111119815Smarcel tpc |= TPC_TB7; 112119815Smarcel } else if (databits == 6) { 113119815Smarcel rpc |= RPC_RB6; 114119815Smarcel tpc |= TPC_TB6; 115119815Smarcel } else { 116119815Smarcel rpc |= RPC_RB5; 117119815Smarcel tpc |= TPC_TB5; 118119815Smarcel } 119119815Smarcel mpm |= (stopbits > 1) ? MPM_SB2 : MPM_SB1; 120119815Smarcel switch (parity) { 121119815Smarcel case UART_PARITY_EVEN: mpm |= MPM_PE | MPM_EVEN; break; 122119815Smarcel case UART_PARITY_NONE: break; 123119815Smarcel case UART_PARITY_ODD: mpm |= MPM_PE; break; 124119815Smarcel default: return (EINVAL); 125119815Smarcel } 126119815Smarcel 127119815Smarcel if (baudrate > 0) { 128119815Smarcel divisor = z8530_divisor(bas->rclk, baudrate); 129158504Smarcel if (divisor == -1) 130119815Smarcel return (EINVAL); 131158504Smarcel } else 132158504Smarcel divisor = -1; 133158504Smarcel 134160717Smarcel uart_setmreg(bas, WR_MCB2, UART_PCLK); 135158504Smarcel uart_barrier(bas); 136158504Smarcel 137158504Smarcel if (divisor >= 0) { 138119815Smarcel uart_setmreg(bas, WR_TCL, divisor & 0xff); 139119815Smarcel uart_barrier(bas); 140119815Smarcel uart_setmreg(bas, WR_TCH, (divisor >> 8) & 0xff); 141119815Smarcel uart_barrier(bas); 142119815Smarcel } 143119815Smarcel 144119815Smarcel uart_setmreg(bas, WR_RPC, rpc); 145119815Smarcel uart_barrier(bas); 146119815Smarcel uart_setmreg(bas, WR_MPM, mpm); 147119815Smarcel uart_barrier(bas); 148119815Smarcel uart_setmreg(bas, WR_TPC, tpc); 149119815Smarcel uart_barrier(bas); 150160717Smarcel uart_setmreg(bas, WR_MCB2, UART_PCLK | MCB2_BRGE); 151158504Smarcel uart_barrier(bas); 152119815Smarcel *tpcp = tpc; 153119815Smarcel return (0); 154119815Smarcel} 155119815Smarcel 156119815Smarcelstatic int 157119815Smarcelz8530_setup(struct uart_bas *bas, int baudrate, int databits, int stopbits, 158119815Smarcel int parity) 159119815Smarcel{ 160141032Smarcel uint8_t tpc; 161119815Smarcel 162119815Smarcel if (bas->rclk == 0) 163119815Smarcel bas->rclk = DEFAULT_RCLK; 164119815Smarcel 165119815Smarcel /* Assume we don't need to perform a full hardware reset. */ 166120452Smarcel switch (bas->chan) { 167120452Smarcel case 1: 168141032Smarcel uart_setmreg(bas, WR_MIC, MIC_NV | MIC_CRA); 169120452Smarcel break; 170120452Smarcel case 2: 171141032Smarcel uart_setmreg(bas, WR_MIC, MIC_NV | MIC_CRB); 172120452Smarcel break; 173120452Smarcel } 174119815Smarcel uart_barrier(bas); 175158504Smarcel /* Set clock sources. */ 176119815Smarcel uart_setmreg(bas, WR_CMC, CMC_RC_BRG | CMC_TC_BRG); 177160717Smarcel uart_setmreg(bas, WR_MCB2, UART_PCLK); 178119815Smarcel uart_barrier(bas); 179119815Smarcel /* Set data encoding. */ 180119815Smarcel uart_setmreg(bas, WR_MCB1, MCB1_NRZ); 181119815Smarcel uart_barrier(bas); 182119815Smarcel 183119815Smarcel tpc = TPC_DTR | TPC_RTS; 184119815Smarcel z8530_param(bas, baudrate, databits, stopbits, parity, &tpc); 185119815Smarcel return (int)tpc; 186119815Smarcel} 187119815Smarcel 188119815Smarcel/* 189119815Smarcel * Low-level UART interface. 190119815Smarcel */ 191119815Smarcelstatic int z8530_probe(struct uart_bas *bas); 192119815Smarcelstatic void z8530_init(struct uart_bas *bas, int, int, int, int); 193119815Smarcelstatic void z8530_term(struct uart_bas *bas); 194119815Smarcelstatic void z8530_putc(struct uart_bas *bas, int); 195166100Smariusstatic int z8530_rxready(struct uart_bas *bas); 196157380Smarcelstatic int z8530_getc(struct uart_bas *bas, struct mtx *); 197119815Smarcel 198168281Smarcelstatic struct uart_ops uart_z8530_ops = { 199119815Smarcel .probe = z8530_probe, 200119815Smarcel .init = z8530_init, 201119815Smarcel .term = z8530_term, 202119815Smarcel .putc = z8530_putc, 203166100Smarius .rxready = z8530_rxready, 204119815Smarcel .getc = z8530_getc, 205119815Smarcel}; 206119815Smarcel 207119815Smarcelstatic int 208119815Smarcelz8530_probe(struct uart_bas *bas) 209119815Smarcel{ 210119815Smarcel 211119815Smarcel return (0); 212119815Smarcel} 213119815Smarcel 214119815Smarcelstatic void 215119815Smarcelz8530_init(struct uart_bas *bas, int baudrate, int databits, int stopbits, 216119815Smarcel int parity) 217119815Smarcel{ 218119815Smarcel 219119815Smarcel z8530_setup(bas, baudrate, databits, stopbits, parity); 220119815Smarcel} 221119815Smarcel 222119815Smarcelstatic void 223119815Smarcelz8530_term(struct uart_bas *bas) 224119815Smarcel{ 225119815Smarcel} 226119815Smarcel 227119815Smarcelstatic void 228119815Smarcelz8530_putc(struct uart_bas *bas, int c) 229119815Smarcel{ 230119815Smarcel 231145603Smarcel while (!(uart_getreg(bas, REG_CTRL) & BES_TXE)) 232119815Smarcel ; 233119815Smarcel uart_setreg(bas, REG_DATA, c); 234119815Smarcel uart_barrier(bas); 235119815Smarcel} 236119815Smarcel 237119815Smarcelstatic int 238166100Smariusz8530_rxready(struct uart_bas *bas) 239119815Smarcel{ 240119815Smarcel 241166100Smarius return ((uart_getreg(bas, REG_CTRL) & BES_RXA) != 0 ? 1 : 0); 242119815Smarcel} 243119815Smarcel 244119815Smarcelstatic int 245157380Smarcelz8530_getc(struct uart_bas *bas, struct mtx *hwmtx) 246119815Smarcel{ 247157380Smarcel int c; 248119815Smarcel 249157380Smarcel uart_lock(hwmtx); 250157380Smarcel 251157380Smarcel while (!(uart_getreg(bas, REG_CTRL) & BES_RXA)) { 252157380Smarcel uart_unlock(hwmtx); 253157380Smarcel DELAY(10); 254157380Smarcel uart_lock(hwmtx); 255157380Smarcel } 256157380Smarcel 257157380Smarcel c = uart_getreg(bas, REG_DATA); 258157380Smarcel 259157380Smarcel uart_unlock(hwmtx); 260157380Smarcel 261157380Smarcel return (c); 262119815Smarcel} 263119815Smarcel 264119815Smarcel/* 265119815Smarcel * High-level UART interface. 266119815Smarcel */ 267119815Smarcelstruct z8530_softc { 268119815Smarcel struct uart_softc base; 269119815Smarcel uint8_t tpc; 270128911Smarcel uint8_t txidle; 271119815Smarcel}; 272119815Smarcel 273119815Smarcelstatic int z8530_bus_attach(struct uart_softc *); 274119815Smarcelstatic int z8530_bus_detach(struct uart_softc *); 275119815Smarcelstatic int z8530_bus_flush(struct uart_softc *, int); 276119815Smarcelstatic int z8530_bus_getsig(struct uart_softc *); 277119815Smarcelstatic int z8530_bus_ioctl(struct uart_softc *, int, intptr_t); 278119815Smarcelstatic int z8530_bus_ipend(struct uart_softc *); 279119815Smarcelstatic int z8530_bus_param(struct uart_softc *, int, int, int, int); 280119815Smarcelstatic int z8530_bus_probe(struct uart_softc *); 281119815Smarcelstatic int z8530_bus_receive(struct uart_softc *); 282119815Smarcelstatic int z8530_bus_setsig(struct uart_softc *, int); 283119815Smarcelstatic int z8530_bus_transmit(struct uart_softc *); 284262649Simpstatic void z8530_bus_grab(struct uart_softc *); 285262649Simpstatic void z8530_bus_ungrab(struct uart_softc *); 286119815Smarcel 287119815Smarcelstatic kobj_method_t z8530_methods[] = { 288119815Smarcel KOBJMETHOD(uart_attach, z8530_bus_attach), 289119815Smarcel KOBJMETHOD(uart_detach, z8530_bus_detach), 290119815Smarcel KOBJMETHOD(uart_flush, z8530_bus_flush), 291119815Smarcel KOBJMETHOD(uart_getsig, z8530_bus_getsig), 292119815Smarcel KOBJMETHOD(uart_ioctl, z8530_bus_ioctl), 293119815Smarcel KOBJMETHOD(uart_ipend, z8530_bus_ipend), 294119815Smarcel KOBJMETHOD(uart_param, z8530_bus_param), 295119815Smarcel KOBJMETHOD(uart_probe, z8530_bus_probe), 296119815Smarcel KOBJMETHOD(uart_receive, z8530_bus_receive), 297119815Smarcel KOBJMETHOD(uart_setsig, z8530_bus_setsig), 298119815Smarcel KOBJMETHOD(uart_transmit, z8530_bus_transmit), 299262649Simp KOBJMETHOD(uart_grab, z8530_bus_grab), 300262649Simp KOBJMETHOD(uart_ungrab, z8530_bus_ungrab), 301119815Smarcel { 0, 0 } 302119815Smarcel}; 303119815Smarcel 304119815Smarcelstruct uart_class uart_z8530_class = { 305168281Smarcel "z8530", 306119815Smarcel z8530_methods, 307119815Smarcel sizeof(struct z8530_softc), 308168281Smarcel .uc_ops = &uart_z8530_ops, 309119815Smarcel .uc_range = 2, 310119815Smarcel .uc_rclk = DEFAULT_RCLK 311119815Smarcel}; 312119815Smarcel 313119815Smarcel#define SIGCHG(c, i, s, d) \ 314119815Smarcel if (c) { \ 315119815Smarcel i |= (i & s) ? s : s | d; \ 316119815Smarcel } else { \ 317119815Smarcel i = (i & s) ? (i & ~s) | d : i; \ 318119815Smarcel } 319119815Smarcel 320119815Smarcelstatic int 321119815Smarcelz8530_bus_attach(struct uart_softc *sc) 322119815Smarcel{ 323119815Smarcel struct z8530_softc *z8530 = (struct z8530_softc*)sc; 324119815Smarcel struct uart_bas *bas; 325119815Smarcel struct uart_devinfo *di; 326119815Smarcel 327119815Smarcel bas = &sc->sc_bas; 328119815Smarcel if (sc->sc_sysdev != NULL) { 329119815Smarcel di = sc->sc_sysdev; 330119815Smarcel z8530->tpc = TPC_DTR|TPC_RTS; 331119815Smarcel z8530_param(bas, di->baudrate, di->databits, di->stopbits, 332119815Smarcel di->parity, &z8530->tpc); 333119815Smarcel } else { 334119815Smarcel z8530->tpc = z8530_setup(bas, 9600, 8, 1, UART_PARITY_NONE); 335119815Smarcel z8530->tpc &= ~(TPC_DTR|TPC_RTS); 336119815Smarcel } 337155971Smarcel z8530->txidle = 1; /* Report SER_INT_TXIDLE. */ 338119815Smarcel 339119815Smarcel (void)z8530_bus_getsig(sc); 340119815Smarcel 341119815Smarcel uart_setmreg(bas, WR_IC, IC_BRK | IC_CTS | IC_DCD); 342119815Smarcel uart_barrier(bas); 343141032Smarcel uart_setmreg(bas, WR_IDT, IDT_XIE | IDT_TIE | IDT_RIA); 344119815Smarcel uart_barrier(bas); 345119815Smarcel uart_setmreg(bas, WR_IV, 0); 346119815Smarcel uart_barrier(bas); 347119815Smarcel uart_setmreg(bas, WR_TPC, z8530->tpc); 348119815Smarcel uart_barrier(bas); 349141032Smarcel uart_setmreg(bas, WR_MIC, MIC_NV | MIC_MIE); 350141032Smarcel uart_barrier(bas); 351119815Smarcel return (0); 352119815Smarcel} 353119815Smarcel 354119815Smarcelstatic int 355119815Smarcelz8530_bus_detach(struct uart_softc *sc) 356119815Smarcel{ 357119815Smarcel 358119815Smarcel return (0); 359119815Smarcel} 360119815Smarcel 361119815Smarcelstatic int 362119815Smarcelz8530_bus_flush(struct uart_softc *sc, int what) 363119815Smarcel{ 364119815Smarcel 365119815Smarcel return (0); 366119815Smarcel} 367119815Smarcel 368119815Smarcelstatic int 369119815Smarcelz8530_bus_getsig(struct uart_softc *sc) 370119815Smarcel{ 371119815Smarcel uint32_t new, old, sig; 372119815Smarcel uint8_t bes; 373119815Smarcel 374119815Smarcel do { 375119815Smarcel old = sc->sc_hwsig; 376119815Smarcel sig = old; 377157300Smarcel uart_lock(sc->sc_hwmtx); 378120143Smarcel bes = uart_getmreg(&sc->sc_bas, RR_BES); 379157300Smarcel uart_unlock(sc->sc_hwmtx); 380131043Sphk SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 381131043Sphk SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 382141032Smarcel SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 383155973Smarcel new = sig & ~SER_MASK_DELTA; 384119815Smarcel } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); 385119815Smarcel return (sig); 386119815Smarcel} 387119815Smarcel 388119815Smarcelstatic int 389119815Smarcelz8530_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) 390119815Smarcel{ 391119815Smarcel struct z8530_softc *z8530 = (struct z8530_softc*)sc; 392119815Smarcel struct uart_bas *bas; 393160716Smarcel int baudrate, divisor, error; 394119815Smarcel 395119815Smarcel bas = &sc->sc_bas; 396120143Smarcel error = 0; 397157300Smarcel uart_lock(sc->sc_hwmtx); 398119815Smarcel switch (request) { 399119815Smarcel case UART_IOCTL_BREAK: 400119815Smarcel if (data) 401119815Smarcel z8530->tpc |= TPC_BRK; 402119815Smarcel else 403119815Smarcel z8530->tpc &= ~TPC_BRK; 404119815Smarcel uart_setmreg(bas, WR_TPC, z8530->tpc); 405119815Smarcel uart_barrier(bas); 406119815Smarcel break; 407160716Smarcel case UART_IOCTL_BAUD: 408160716Smarcel divisor = uart_getmreg(bas, RR_TCH); 409160716Smarcel divisor = (divisor << 8) | uart_getmreg(bas, RR_TCL); 410160716Smarcel baudrate = bas->rclk / 2 / (divisor + 2); 411160716Smarcel *(int*)data = baudrate; 412160716Smarcel break; 413119815Smarcel default: 414120143Smarcel error = EINVAL; 415120143Smarcel break; 416119815Smarcel } 417157300Smarcel uart_unlock(sc->sc_hwmtx); 418120143Smarcel return (error); 419119815Smarcel} 420119815Smarcel 421119815Smarcelstatic int 422119815Smarcelz8530_bus_ipend(struct uart_softc *sc) 423119815Smarcel{ 424128911Smarcel struct z8530_softc *z8530 = (struct z8530_softc*)sc; 425119815Smarcel struct uart_bas *bas; 426119815Smarcel int ipend; 427119815Smarcel uint32_t sig; 428141032Smarcel uint8_t bes, ip, iv, src; 429119815Smarcel 430119815Smarcel bas = &sc->sc_bas; 431119815Smarcel ipend = 0; 432141032Smarcel 433157300Smarcel uart_lock(sc->sc_hwmtx); 434141032Smarcel switch (bas->chan) { 435141032Smarcel case 1: 436141032Smarcel ip = uart_getmreg(bas, RR_IP); 437141032Smarcel break; 438141032Smarcel case 2: /* XXX hack!!! */ 439141032Smarcel iv = uart_getmreg(bas, RR_IV) & 0x0E; 440141032Smarcel switch (iv) { 441141032Smarcel case IV_TEB: ip = IP_TIA; break; 442141032Smarcel case IV_XSB: ip = IP_SIA; break; 443141032Smarcel case IV_RAB: ip = IP_RIA; break; 444141032Smarcel default: ip = 0; break; 445141032Smarcel } 446141032Smarcel break; 447141032Smarcel default: 448141032Smarcel ip = 0; 449141032Smarcel break; 450119815Smarcel } 451141032Smarcel 452141032Smarcel if (ip & IP_RIA) 453155971Smarcel ipend |= SER_INT_RXREADY; 454141032Smarcel 455141032Smarcel if (ip & IP_TIA) { 456119815Smarcel uart_setreg(bas, REG_CTRL, CR_RSTTXI); 457141032Smarcel uart_barrier(bas); 458141032Smarcel if (z8530->txidle) { 459155971Smarcel ipend |= SER_INT_TXIDLE; 460155971Smarcel z8530->txidle = 0; /* Mask SER_INT_TXIDLE. */ 461141032Smarcel } 462119815Smarcel } 463141032Smarcel 464141032Smarcel if (ip & IP_SIA) { 465141032Smarcel uart_setreg(bas, REG_CTRL, CR_RSTXSI); 466141032Smarcel uart_barrier(bas); 467141032Smarcel bes = uart_getmreg(bas, RR_BES); 468141032Smarcel if (bes & BES_BRK) 469155971Smarcel ipend |= SER_INT_BREAK; 470141032Smarcel sig = sc->sc_hwsig; 471141032Smarcel SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 472141032Smarcel SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 473141032Smarcel SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 474155973Smarcel if (sig & SER_MASK_DELTA) 475155971Smarcel ipend |= SER_INT_SIGCHG; 476141032Smarcel src = uart_getmreg(bas, RR_SRC); 477141032Smarcel if (src & SRC_OVR) { 478141032Smarcel uart_setreg(bas, REG_CTRL, CR_RSTERR); 479141032Smarcel uart_barrier(bas); 480155971Smarcel ipend |= SER_INT_OVERRUN; 481141032Smarcel } 482119815Smarcel } 483141032Smarcel 484141032Smarcel if (ipend) { 485141032Smarcel uart_setreg(bas, REG_CTRL, CR_RSTIUS); 486141032Smarcel uart_barrier(bas); 487141032Smarcel } 488141032Smarcel 489157300Smarcel uart_unlock(sc->sc_hwmtx); 490141032Smarcel 491119815Smarcel return (ipend); 492119815Smarcel} 493119815Smarcel 494119815Smarcelstatic int 495119815Smarcelz8530_bus_param(struct uart_softc *sc, int baudrate, int databits, 496119815Smarcel int stopbits, int parity) 497119815Smarcel{ 498119815Smarcel struct z8530_softc *z8530 = (struct z8530_softc*)sc; 499119815Smarcel int error; 500119815Smarcel 501157300Smarcel uart_lock(sc->sc_hwmtx); 502119815Smarcel error = z8530_param(&sc->sc_bas, baudrate, databits, stopbits, parity, 503119815Smarcel &z8530->tpc); 504157300Smarcel uart_unlock(sc->sc_hwmtx); 505119815Smarcel return (error); 506119815Smarcel} 507119815Smarcel 508119815Smarcelstatic int 509119815Smarcelz8530_bus_probe(struct uart_softc *sc) 510119815Smarcel{ 511119815Smarcel char buf[80]; 512119815Smarcel int error; 513120452Smarcel char ch; 514119815Smarcel 515119815Smarcel error = z8530_probe(&sc->sc_bas); 516119815Smarcel if (error) 517119815Smarcel return (error); 518119815Smarcel 519248965Sian sc->sc_rxfifosz = 3; 520248965Sian sc->sc_txfifosz = 1; 521248965Sian 522120452Smarcel ch = sc->sc_bas.chan - 1 + 'A'; 523119815Smarcel 524120452Smarcel snprintf(buf, sizeof(buf), "z8530, channel %c", ch); 525119815Smarcel device_set_desc_copy(sc->sc_dev, buf); 526119815Smarcel return (0); 527119815Smarcel} 528119815Smarcel 529119815Smarcelstatic int 530119815Smarcelz8530_bus_receive(struct uart_softc *sc) 531119815Smarcel{ 532119815Smarcel struct uart_bas *bas; 533119815Smarcel int xc; 534119815Smarcel uint8_t bes, src; 535119815Smarcel 536119815Smarcel bas = &sc->sc_bas; 537157300Smarcel uart_lock(sc->sc_hwmtx); 538119815Smarcel bes = uart_getmreg(bas, RR_BES); 539120146Smarcel while (bes & BES_RXA) { 540120146Smarcel if (uart_rx_full(sc)) { 541120146Smarcel sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 542120146Smarcel break; 543120146Smarcel } 544141032Smarcel xc = uart_getreg(bas, REG_DATA); 545141032Smarcel uart_barrier(bas); 546119815Smarcel src = uart_getmreg(bas, RR_SRC); 547119815Smarcel if (src & SRC_FE) 548119815Smarcel xc |= UART_STAT_FRAMERR; 549119815Smarcel if (src & SRC_PE) 550119815Smarcel xc |= UART_STAT_PARERR; 551141032Smarcel if (src & SRC_OVR) 552141032Smarcel xc |= UART_STAT_OVERRUN; 553119815Smarcel uart_rx_put(sc, xc); 554141032Smarcel if (src & (SRC_FE | SRC_PE | SRC_OVR)) { 555119815Smarcel uart_setreg(bas, REG_CTRL, CR_RSTERR); 556120146Smarcel uart_barrier(bas); 557120146Smarcel } 558119815Smarcel bes = uart_getmreg(bas, RR_BES); 559119815Smarcel } 560120146Smarcel /* Discard everything left in the Rx FIFO. */ 561120146Smarcel while (bes & BES_RXA) { 562141032Smarcel (void)uart_getreg(bas, REG_DATA); 563141032Smarcel uart_barrier(bas); 564120146Smarcel src = uart_getmreg(bas, RR_SRC); 565141032Smarcel if (src & (SRC_FE | SRC_PE | SRC_OVR)) { 566120146Smarcel uart_setreg(bas, REG_CTRL, CR_RSTERR); 567120146Smarcel uart_barrier(bas); 568120146Smarcel } 569120146Smarcel bes = uart_getmreg(bas, RR_BES); 570120146Smarcel } 571157300Smarcel uart_unlock(sc->sc_hwmtx); 572119815Smarcel return (0); 573119815Smarcel} 574119815Smarcel 575119815Smarcelstatic int 576119815Smarcelz8530_bus_setsig(struct uart_softc *sc, int sig) 577119815Smarcel{ 578119815Smarcel struct z8530_softc *z8530 = (struct z8530_softc*)sc; 579119815Smarcel struct uart_bas *bas; 580119815Smarcel uint32_t new, old; 581119815Smarcel 582119815Smarcel bas = &sc->sc_bas; 583119815Smarcel do { 584119815Smarcel old = sc->sc_hwsig; 585119815Smarcel new = old; 586131043Sphk if (sig & SER_DDTR) { 587131043Sphk SIGCHG(sig & SER_DTR, new, SER_DTR, 588131043Sphk SER_DDTR); 589119815Smarcel } 590131043Sphk if (sig & SER_DRTS) { 591131043Sphk SIGCHG(sig & SER_RTS, new, SER_RTS, 592131043Sphk SER_DRTS); 593119815Smarcel } 594119815Smarcel } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); 595119815Smarcel 596157300Smarcel uart_lock(sc->sc_hwmtx); 597131043Sphk if (new & SER_DTR) 598119815Smarcel z8530->tpc |= TPC_DTR; 599119815Smarcel else 600119815Smarcel z8530->tpc &= ~TPC_DTR; 601131043Sphk if (new & SER_RTS) 602119815Smarcel z8530->tpc |= TPC_RTS; 603119815Smarcel else 604119815Smarcel z8530->tpc &= ~TPC_RTS; 605119815Smarcel uart_setmreg(bas, WR_TPC, z8530->tpc); 606119815Smarcel uart_barrier(bas); 607157300Smarcel uart_unlock(sc->sc_hwmtx); 608119815Smarcel return (0); 609119815Smarcel} 610119815Smarcel 611119815Smarcelstatic int 612119815Smarcelz8530_bus_transmit(struct uart_softc *sc) 613119815Smarcel{ 614128911Smarcel struct z8530_softc *z8530 = (struct z8530_softc*)sc; 615119815Smarcel struct uart_bas *bas; 616119815Smarcel 617119815Smarcel bas = &sc->sc_bas; 618157300Smarcel uart_lock(sc->sc_hwmtx); 619119815Smarcel while (!(uart_getmreg(bas, RR_BES) & BES_TXE)) 620119815Smarcel ; 621119815Smarcel uart_setreg(bas, REG_DATA, sc->sc_txbuf[0]); 622119815Smarcel uart_barrier(bas); 623119815Smarcel sc->sc_txbusy = 1; 624155971Smarcel z8530->txidle = 1; /* Report SER_INT_TXIDLE again. */ 625157300Smarcel uart_unlock(sc->sc_hwmtx); 626119815Smarcel return (0); 627119815Smarcel} 628262649Simp 629262649Simpstatic void 630262649Simpz8530_bus_grab(struct uart_softc *sc) 631262649Simp{ 632262649Simp struct uart_bas *bas; 633262649Simp 634262649Simp bas = &sc->sc_bas; 635262649Simp uart_lock(sc->sc_hwmtx); 636262649Simp uart_setmreg(bas, WR_IDT, IDT_XIE | IDT_TIE); 637262649Simp uart_barrier(bas); 638262649Simp uart_unlock(sc->sc_hwmtx); 639262649Simp} 640262649Simp 641262649Simpstatic void 642262649Simpz8530_bus_ungrab(struct uart_softc *sc) 643262649Simp{ 644262649Simp struct uart_bas *bas; 645262649Simp 646262649Simp bas = &sc->sc_bas; 647262649Simp uart_lock(sc->sc_hwmtx); 648262649Simp uart_setmreg(bas, WR_IDT, IDT_XIE | IDT_TIE | IDT_RIA); 649262649Simp uart_barrier(bas); 650262649Simp uart_unlock(sc->sc_hwmtx); 651262649Simp} 652