if_txp.c revision 189685
1/* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */ 2 3/*- 4 * Copyright (c) 2001 5 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and 6 * Aaron Campbell <aaron@monkey.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Jason L. Wright, 19 * Theo de Raadt and Aaron Campbell. 20 * 4. Neither the name of the author nor the names of any co-contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37#include <sys/cdefs.h> 38__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 189685 2009-03-11 08:25:18Z yongari $"); 39 40/* 41 * Driver for 3c990 (Typhoon) Ethernet ASIC 42 */ 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/sockio.h> 46#include <sys/mbuf.h> 47#include <sys/malloc.h> 48#include <sys/kernel.h> 49#include <sys/module.h> 50#include <sys/socket.h> 51 52#include <net/if.h> 53#include <net/if_arp.h> 54#include <net/ethernet.h> 55#include <net/if_dl.h> 56#include <net/if_types.h> 57#include <net/if_vlan_var.h> 58 59#include <netinet/in.h> 60#include <netinet/in_systm.h> 61#include <netinet/in_var.h> 62#include <netinet/ip.h> 63#include <netinet/if_ether.h> 64#include <machine/in_cksum.h> 65 66#include <net/if_media.h> 67 68#include <net/bpf.h> 69 70#include <vm/vm.h> /* for vtophys */ 71#include <vm/pmap.h> /* for vtophys */ 72#include <machine/bus.h> 73#include <machine/resource.h> 74#include <sys/bus.h> 75#include <sys/rman.h> 76 77#include <dev/mii/mii.h> 78#include <dev/mii/miivar.h> 79#include <dev/pci/pcireg.h> 80#include <dev/pci/pcivar.h> 81 82#define TXP_USEIOSPACE 83#define __STRICT_ALIGNMENT 84 85#include <dev/txp/if_txpreg.h> 86#include <dev/txp/3c990img.h> 87 88#ifndef lint 89static const char rcsid[] = 90 "$FreeBSD: head/sys/dev/txp/if_txp.c 189685 2009-03-11 08:25:18Z yongari $"; 91#endif 92 93/* 94 * Various supported device vendors/types and their names. 95 */ 96static struct txp_type txp_devs[] = { 97 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_95, 98 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" }, 99 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_97, 100 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" }, 101 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_TXM, 102 "3Com 3cR990B-TXM Etherlink with 3XP Processor" }, 103 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_95, 104 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" }, 105 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_97, 106 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" }, 107 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_SRV, 108 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" }, 109 { 0, 0, NULL } 110}; 111 112static int txp_probe(device_t); 113static int txp_attach(device_t); 114static int txp_detach(device_t); 115static void txp_intr(void *); 116static void txp_tick(void *); 117static int txp_shutdown(device_t); 118static int txp_ioctl(struct ifnet *, u_long, caddr_t); 119static void txp_start(struct ifnet *); 120static void txp_start_locked(struct ifnet *); 121static void txp_stop(struct txp_softc *); 122static void txp_init(void *); 123static void txp_init_locked(struct txp_softc *); 124static void txp_watchdog(struct ifnet *); 125 126static void txp_release_resources(struct txp_softc *); 127static int txp_chip_init(struct txp_softc *); 128static int txp_reset_adapter(struct txp_softc *); 129static int txp_download_fw(struct txp_softc *); 130static int txp_download_fw_wait(struct txp_softc *); 131static int txp_download_fw_section(struct txp_softc *, 132 struct txp_fw_section_header *, int); 133static int txp_alloc_rings(struct txp_softc *); 134static int txp_rxring_fill(struct txp_softc *); 135static void txp_rxring_empty(struct txp_softc *); 136static void txp_set_filter(struct txp_softc *); 137 138static int txp_cmd_desc_numfree(struct txp_softc *); 139static int txp_command(struct txp_softc *, u_int16_t, u_int16_t, u_int32_t, 140 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int); 141static int txp_command2(struct txp_softc *, u_int16_t, u_int16_t, 142 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t, 143 struct txp_rsp_desc **, int); 144static int txp_response(struct txp_softc *, u_int32_t, u_int16_t, u_int16_t, 145 struct txp_rsp_desc **); 146static void txp_rsp_fixup(struct txp_softc *, struct txp_rsp_desc *, 147 struct txp_rsp_desc *); 148static void txp_capabilities(struct txp_softc *); 149 150static void txp_ifmedia_sts(struct ifnet *, struct ifmediareq *); 151static int txp_ifmedia_upd(struct ifnet *); 152#ifdef TXP_DEBUG 153static void txp_show_descriptor(void *); 154#endif 155static void txp_tx_reclaim(struct txp_softc *, struct txp_tx_ring *); 156static void txp_rxbuf_reclaim(struct txp_softc *); 157static void txp_rx_reclaim(struct txp_softc *, struct txp_rx_ring *); 158 159#ifdef TXP_USEIOSPACE 160#define TXP_RES SYS_RES_IOPORT 161#define TXP_RID TXP_PCI_LOIO 162#else 163#define TXP_RES SYS_RES_MEMORY 164#define TXP_RID TXP_PCI_LOMEM 165#endif 166 167static device_method_t txp_methods[] = { 168 /* Device interface */ 169 DEVMETHOD(device_probe, txp_probe), 170 DEVMETHOD(device_attach, txp_attach), 171 DEVMETHOD(device_detach, txp_detach), 172 DEVMETHOD(device_shutdown, txp_shutdown), 173 { 0, 0 } 174}; 175 176static driver_t txp_driver = { 177 "txp", 178 txp_methods, 179 sizeof(struct txp_softc) 180}; 181 182static devclass_t txp_devclass; 183 184DRIVER_MODULE(txp, pci, txp_driver, txp_devclass, 0, 0); 185MODULE_DEPEND(txp, pci, 1, 1, 1); 186MODULE_DEPEND(txp, ether, 1, 1, 1); 187 188static int 189txp_probe(device_t dev) 190{ 191 struct txp_type *t; 192 193 t = txp_devs; 194 195 while(t->txp_name != NULL) { 196 if ((pci_get_vendor(dev) == t->txp_vid) && 197 (pci_get_device(dev) == t->txp_did)) { 198 device_set_desc(dev, t->txp_name); 199 return(BUS_PROBE_DEFAULT); 200 } 201 t++; 202 } 203 204 return(ENXIO); 205} 206 207static int 208txp_attach(device_t dev) 209{ 210 struct txp_softc *sc; 211 struct ifnet *ifp; 212 u_int16_t p1; 213 u_int32_t p2; 214 int error = 0, rid; 215 u_char eaddr[6]; 216 217 sc = device_get_softc(dev); 218 sc->sc_dev = dev; 219 sc->sc_cold = 1; 220 221 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 222 MTX_DEF); 223 callout_init_mtx(&sc->sc_tick, &sc->sc_mtx, 0); 224 225 /* 226 * Map control/status registers. 227 */ 228 pci_enable_busmaster(dev); 229 230 rid = TXP_RID; 231 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, 232 RF_ACTIVE); 233 234 if (sc->sc_res == NULL) { 235 device_printf(dev, "couldn't map ports/memory\n"); 236 error = ENXIO; 237 goto fail; 238 } 239 240 sc->sc_bt = rman_get_bustag(sc->sc_res); 241 sc->sc_bh = rman_get_bushandle(sc->sc_res); 242 243 /* Allocate interrupt */ 244 rid = 0; 245 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 246 RF_SHAREABLE | RF_ACTIVE); 247 248 if (sc->sc_irq == NULL) { 249 device_printf(dev, "couldn't map interrupt\n"); 250 error = ENXIO; 251 goto fail; 252 } 253 254 if (txp_chip_init(sc)) { 255 error = ENXIO; 256 goto fail; 257 } 258 259 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF, 260 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 261 if (sc->sc_fwbuf == NULL) { 262 device_printf(dev, "no memory for firmware\n"); 263 error = ENXIO; 264 goto fail; 265 } 266 error = txp_download_fw(sc); 267 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF); 268 sc->sc_fwbuf = NULL; 269 270 if (error) 271 goto fail; 272 273 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF, 274 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 275 if (sc->sc_ldata == NULL) { 276 device_printf(dev, "no memory for descriptor ring\n"); 277 error = ENXIO; 278 goto fail; 279 } 280 bzero(sc->sc_ldata, sizeof(struct txp_ldata)); 281 282 if (txp_alloc_rings(sc)) { 283 error = ENXIO; 284 goto fail; 285 } 286 287 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 288 NULL, NULL, NULL, 1)) { 289 error = ENXIO; 290 goto fail; 291 } 292 293 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0, 294 &p1, &p2, NULL, 1)) { 295 error = ENXIO; 296 goto fail; 297 } 298 299 eaddr[0] = ((u_int8_t *)&p1)[1]; 300 eaddr[1] = ((u_int8_t *)&p1)[0]; 301 eaddr[2] = ((u_int8_t *)&p2)[3]; 302 eaddr[3] = ((u_int8_t *)&p2)[2]; 303 eaddr[4] = ((u_int8_t *)&p2)[1]; 304 eaddr[5] = ((u_int8_t *)&p2)[0]; 305 306 sc->sc_cold = 0; 307 308 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts); 309 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 310 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 311 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 312 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 313 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 314 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 315 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 316 317 sc->sc_xcvr = TXP_XCVR_AUTO; 318 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0, 319 NULL, NULL, NULL, 0); 320 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); 321 322 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 323 if (ifp == NULL) { 324 device_printf(dev, "can not if_alloc()\n"); 325 error = ENOSPC; 326 goto fail; 327 } 328 ifp->if_softc = sc; 329 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 330 ifp->if_mtu = ETHERMTU; 331 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 332 ifp->if_ioctl = txp_ioctl; 333 ifp->if_start = txp_start; 334 ifp->if_watchdog = txp_watchdog; 335 ifp->if_init = txp_init; 336 ifp->if_baudrate = 100000000; 337 ifp->if_snd.ifq_maxlen = TX_ENTRIES; 338 ifp->if_hwassist = 0; 339 txp_capabilities(sc); 340 341 /* 342 * Attach us everywhere 343 */ 344 ether_ifattach(ifp, eaddr); 345 346 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, 347 NULL, txp_intr, sc, &sc->sc_intrhand); 348 349 if (error) { 350 ether_ifdetach(ifp); 351 device_printf(dev, "couldn't set up irq\n"); 352 goto fail; 353 } 354 355 return(0); 356 357fail: 358 txp_release_resources(sc); 359 mtx_destroy(&sc->sc_mtx); 360 return(error); 361} 362 363static int 364txp_detach(device_t dev) 365{ 366 struct txp_softc *sc; 367 struct ifnet *ifp; 368 int i; 369 370 sc = device_get_softc(dev); 371 ifp = sc->sc_ifp; 372 373 TXP_LOCK(sc); 374 txp_stop(sc); 375 TXP_UNLOCK(sc); 376 txp_shutdown(dev); 377 callout_drain(&sc->sc_tick); 378 379 ifmedia_removeall(&sc->sc_ifmedia); 380 ether_ifdetach(ifp); 381 382 for (i = 0; i < RXBUF_ENTRIES; i++) 383 free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF); 384 385 txp_release_resources(sc); 386 387 mtx_destroy(&sc->sc_mtx); 388 return(0); 389} 390 391static void 392txp_release_resources(struct txp_softc *sc) 393{ 394 device_t dev; 395 396 dev = sc->sc_dev; 397 398 if (sc->sc_intrhand != NULL) 399 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand); 400 401 if (sc->sc_irq != NULL) 402 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 403 404 if (sc->sc_res != NULL) 405 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res); 406 407 if (sc->sc_ldata != NULL) 408 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF); 409 410 if (sc->sc_ifp) 411 if_free(sc->sc_ifp); 412 413 return; 414} 415 416static int 417txp_chip_init(struct txp_softc *sc) 418{ 419 /* disable interrupts */ 420 WRITE_REG(sc, TXP_IER, 0); 421 WRITE_REG(sc, TXP_IMR, 422 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 423 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 424 TXP_INT_LATCH); 425 426 /* ack all interrupts */ 427 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 428 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 429 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 430 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 431 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 432 433 if (txp_reset_adapter(sc)) 434 return (-1); 435 436 /* disable interrupts */ 437 WRITE_REG(sc, TXP_IER, 0); 438 WRITE_REG(sc, TXP_IMR, 439 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 440 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 441 TXP_INT_LATCH); 442 443 /* ack all interrupts */ 444 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 445 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 446 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 447 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 448 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 449 450 return (0); 451} 452 453static int 454txp_reset_adapter(struct txp_softc *sc) 455{ 456 u_int32_t r; 457 int i; 458 459 r = 0; 460 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL); 461 DELAY(1000); 462 WRITE_REG(sc, TXP_SRR, 0); 463 464 /* Should wait max 6 seconds */ 465 for (i = 0; i < 6000; i++) { 466 r = READ_REG(sc, TXP_A2H_0); 467 if (r == STAT_WAITING_FOR_HOST_REQUEST) 468 break; 469 DELAY(1000); 470 } 471 472 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 473 device_printf(sc->sc_dev, "reset hung\n"); 474 return (-1); 475 } 476 477 return (0); 478} 479 480static int 481txp_download_fw(struct txp_softc *sc) 482{ 483 struct txp_fw_file_header *fileheader; 484 struct txp_fw_section_header *secthead; 485 int error, sect; 486 u_int32_t r, i, ier, imr; 487 488 r = 0; 489 error = 0; 490 ier = READ_REG(sc, TXP_IER); 491 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0); 492 493 imr = READ_REG(sc, TXP_IMR); 494 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0); 495 496 for (i = 0; i < 10000; i++) { 497 r = READ_REG(sc, TXP_A2H_0); 498 if (r == STAT_WAITING_FOR_HOST_REQUEST) 499 break; 500 DELAY(50); 501 } 502 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 503 device_printf(sc->sc_dev, "not waiting for host request\n"); 504 error = -1; 505 goto fail; 506 } 507 508 /* Ack the status */ 509 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 510 511 fileheader = (struct txp_fw_file_header *)tc990image; 512 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) { 513 device_printf(sc->sc_dev, "fw invalid magic\n"); 514 error = -1; 515 goto fail; 516 } 517 518 /* Tell boot firmware to get ready for image */ 519 WRITE_REG(sc, TXP_H2A_1, fileheader->addr); 520 WRITE_REG(sc, TXP_H2A_2, fileheader->hmac[0]); 521 WRITE_REG(sc, TXP_H2A_3, fileheader->hmac[1]); 522 WRITE_REG(sc, TXP_H2A_4, fileheader->hmac[2]); 523 WRITE_REG(sc, TXP_H2A_5, fileheader->hmac[3]); 524 WRITE_REG(sc, TXP_H2A_6, fileheader->hmac[4]); 525 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE); 526 527 if (txp_download_fw_wait(sc)) { 528 device_printf(sc->sc_dev, "fw wait failed, initial\n"); 529 error = -1; 530 goto fail; 531 } 532 533 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) + 534 sizeof(struct txp_fw_file_header)); 535 536 for (sect = 0; sect < fileheader->nsections; sect++) { 537 538 if (txp_download_fw_section(sc, secthead, sect)) { 539 error = -1; 540 goto fail; 541 } 542 secthead = (struct txp_fw_section_header *) 543 (((u_int8_t *)secthead) + secthead->nbytes + 544 sizeof(*secthead)); 545 } 546 547 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE); 548 549 for (i = 0; i < 10000; i++) { 550 r = READ_REG(sc, TXP_A2H_0); 551 if (r == STAT_WAITING_FOR_BOOT) 552 break; 553 DELAY(50); 554 } 555 if (r != STAT_WAITING_FOR_BOOT) { 556 device_printf(sc->sc_dev, "not waiting for boot\n"); 557 error = -1; 558 goto fail; 559 } 560 561fail: 562 WRITE_REG(sc, TXP_IER, ier); 563 WRITE_REG(sc, TXP_IMR, imr); 564 565 return (error); 566} 567 568static int 569txp_download_fw_wait(struct txp_softc *sc) 570{ 571 u_int32_t i, r; 572 573 r = 0; 574 for (i = 0; i < 10000; i++) { 575 r = READ_REG(sc, TXP_ISR); 576 if (r & TXP_INT_A2H_0) 577 break; 578 DELAY(50); 579 } 580 581 if (!(r & TXP_INT_A2H_0)) { 582 device_printf(sc->sc_dev, "fw wait failed comm0\n"); 583 return (-1); 584 } 585 586 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 587 588 r = READ_REG(sc, TXP_A2H_0); 589 if (r != STAT_WAITING_FOR_SEGMENT) { 590 device_printf(sc->sc_dev, "fw not waiting for segment\n"); 591 return (-1); 592 } 593 return (0); 594} 595 596static int 597txp_download_fw_section(struct txp_softc *sc, 598 struct txp_fw_section_header *sect, int sectnum) 599{ 600 vm_offset_t dma; 601 int rseg, err = 0; 602 struct mbuf m; 603 u_int16_t csum; 604 605 /* Skip zero length sections */ 606 if (sect->nbytes == 0) 607 return (0); 608 609 /* Make sure we aren't past the end of the image */ 610 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image); 611 if (rseg >= sizeof(tc990image)) { 612 device_printf(sc->sc_dev, "fw invalid section address, " 613 "section %d\n", sectnum); 614 return (-1); 615 } 616 617 /* Make sure this section doesn't go past the end */ 618 rseg += sect->nbytes; 619 if (rseg >= sizeof(tc990image)) { 620 device_printf(sc->sc_dev, "fw truncated section %d\n", 621 sectnum); 622 return (-1); 623 } 624 625 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes); 626 dma = vtophys(sc->sc_fwbuf); 627 628 /* 629 * dummy up mbuf and verify section checksum 630 */ 631 m.m_type = MT_DATA; 632 m.m_next = m.m_nextpkt = NULL; 633 m.m_len = sect->nbytes; 634 m.m_data = sc->sc_fwbuf; 635 m.m_flags = 0; 636 csum = in_cksum(&m, sect->nbytes); 637 if (csum != sect->cksum) { 638 device_printf(sc->sc_dev, "fw section %d, bad " 639 "cksum (expected 0x%x got 0x%x)\n", 640 sectnum, sect->cksum, csum); 641 err = -1; 642 goto bail; 643 } 644 645 WRITE_REG(sc, TXP_H2A_1, sect->nbytes); 646 WRITE_REG(sc, TXP_H2A_2, sect->cksum); 647 WRITE_REG(sc, TXP_H2A_3, sect->addr); 648 WRITE_REG(sc, TXP_H2A_4, 0); 649 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff); 650 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE); 651 652 if (txp_download_fw_wait(sc)) { 653 device_printf(sc->sc_dev, "fw wait failed, " 654 "section %d\n", sectnum); 655 err = -1; 656 } 657 658bail: 659 return (err); 660} 661 662static void 663txp_intr(void *vsc) 664{ 665 struct txp_softc *sc = vsc; 666 struct txp_hostvar *hv = sc->sc_hostvar; 667 u_int32_t isr; 668 669 /* mask all interrupts */ 670 TXP_LOCK(sc); 671 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF | 672 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 673 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 674 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 675 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 676 677 isr = READ_REG(sc, TXP_ISR); 678 while (isr) { 679 WRITE_REG(sc, TXP_ISR, isr); 680 681 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff)) 682 txp_rx_reclaim(sc, &sc->sc_rxhir); 683 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff)) 684 txp_rx_reclaim(sc, &sc->sc_rxlor); 685 686 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx) 687 txp_rxbuf_reclaim(sc); 688 689 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons != 690 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off)))) 691 txp_tx_reclaim(sc, &sc->sc_txhir); 692 693 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons != 694 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off)))) 695 txp_tx_reclaim(sc, &sc->sc_txlor); 696 697 isr = READ_REG(sc, TXP_ISR); 698 } 699 700 /* unmask all interrupts */ 701 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 702 703 txp_start_locked(sc->sc_ifp); 704 TXP_UNLOCK(sc); 705 706 return; 707} 708 709static void 710txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r) 711{ 712 struct ifnet *ifp = sc->sc_ifp; 713 struct txp_rx_desc *rxd; 714 struct mbuf *m; 715 struct txp_swdesc *sd = NULL; 716 u_int32_t roff, woff; 717 718 TXP_LOCK_ASSERT(sc); 719 roff = *r->r_roff; 720 woff = *r->r_woff; 721 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc)); 722 723 while (roff != woff) { 724 725 if (rxd->rx_flags & RX_FLAGS_ERROR) { 726 device_printf(sc->sc_dev, "error 0x%x\n", 727 rxd->rx_stat); 728 ifp->if_ierrors++; 729 goto next; 730 } 731 732 /* retrieve stashed pointer */ 733 sd = rxd->rx_sd; 734 735 m = sd->sd_mbuf; 736 sd->sd_mbuf = NULL; 737 738 m->m_pkthdr.len = m->m_len = rxd->rx_len; 739 740#ifdef __STRICT_ALIGNMENT 741 { 742 /* 743 * XXX Nice chip, except it won't accept "off by 2" 744 * buffers, so we're force to copy. Supposedly 745 * this will be fixed in a newer firmware rev 746 * and this will be temporary. 747 */ 748 struct mbuf *mnew; 749 750 mnew = m_devget(mtod(m, caddr_t), rxd->rx_len, 751 ETHER_ALIGN, ifp, NULL); 752 m_freem(m); 753 if (mnew == NULL) { 754 ifp->if_ierrors++; 755 goto next; 756 } 757 m = mnew; 758 } 759#endif 760 761 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD) 762 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 763 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD) 764 m->m_pkthdr.csum_flags |= 765 CSUM_IP_CHECKED|CSUM_IP_VALID; 766 767 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) || 768 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) { 769 m->m_pkthdr.csum_flags |= 770 CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 771 m->m_pkthdr.csum_data = 0xffff; 772 } 773 774 if (rxd->rx_stat & RX_STAT_VLAN) { 775 m->m_pkthdr.ether_vtag = htons(rxd->rx_vlan >> 16); 776 m->m_flags |= M_VLANTAG; 777 } 778 779 TXP_UNLOCK(sc); 780 (*ifp->if_input)(ifp, m); 781 TXP_LOCK(sc); 782 783next: 784 785 roff += sizeof(struct txp_rx_desc); 786 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) { 787 roff = 0; 788 rxd = r->r_desc; 789 } else 790 rxd++; 791 woff = *r->r_woff; 792 } 793 794 *r->r_roff = woff; 795 796 return; 797} 798 799static void 800txp_rxbuf_reclaim(struct txp_softc *sc) 801{ 802 struct ifnet *ifp = sc->sc_ifp; 803 struct txp_hostvar *hv = sc->sc_hostvar; 804 struct txp_rxbuf_desc *rbd; 805 struct txp_swdesc *sd; 806 u_int32_t i; 807 808 TXP_LOCK_ASSERT(sc); 809 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 810 return; 811 812 i = sc->sc_rxbufprod; 813 rbd = sc->sc_rxbufs + i; 814 815 while (1) { 816 sd = rbd->rb_sd; 817 if (sd->sd_mbuf != NULL) 818 break; 819 820 sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 821 if (sd->sd_mbuf == NULL) 822 return; 823 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 824 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 825 826 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t)) 827 & 0xffffffff; 828 rbd->rb_paddrhi = 0; 829 830 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i); 831 832 if (++i == RXBUF_ENTRIES) { 833 i = 0; 834 rbd = sc->sc_rxbufs; 835 } else 836 rbd++; 837 } 838 839 sc->sc_rxbufprod = i; 840 841 return; 842} 843 844/* 845 * Reclaim mbufs and entries from a transmit ring. 846 */ 847static void 848txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r) 849{ 850 struct ifnet *ifp = sc->sc_ifp; 851 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off)); 852 u_int32_t cons = r->r_cons, cnt = r->r_cnt; 853 struct txp_tx_desc *txd = r->r_desc + cons; 854 struct txp_swdesc *sd = sc->sc_txd + cons; 855 struct mbuf *m; 856 857 TXP_LOCK_ASSERT(sc); 858 while (cons != idx) { 859 if (cnt == 0) 860 break; 861 862 if ((txd->tx_flags & TX_FLAGS_TYPE_M) == 863 TX_FLAGS_TYPE_DATA) { 864 m = sd->sd_mbuf; 865 if (m != NULL) { 866 m_freem(m); 867 txd->tx_addrlo = 0; 868 txd->tx_addrhi = 0; 869 ifp->if_opackets++; 870 } 871 } 872 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 873 874 if (++cons == TX_ENTRIES) { 875 txd = r->r_desc; 876 cons = 0; 877 sd = sc->sc_txd; 878 } else { 879 txd++; 880 sd++; 881 } 882 883 cnt--; 884 } 885 886 r->r_cons = cons; 887 r->r_cnt = cnt; 888 if (cnt == 0) 889 ifp->if_timer = 0; 890} 891 892static int 893txp_shutdown(device_t dev) 894{ 895 struct txp_softc *sc; 896 897 sc = device_get_softc(dev); 898 899 TXP_LOCK(sc); 900 901 /* mask all interrupts */ 902 WRITE_REG(sc, TXP_IMR, 903 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 904 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 905 TXP_INT_LATCH); 906 907 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 908 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 909 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0); 910 TXP_UNLOCK(sc); 911 912 return(0); 913} 914 915static int 916txp_alloc_rings(struct txp_softc *sc) 917{ 918 struct txp_boot_record *boot; 919 struct txp_ldata *ld; 920 u_int32_t r; 921 int i; 922 923 r = 0; 924 ld = sc->sc_ldata; 925 boot = &ld->txp_boot; 926 927 /* boot record */ 928 sc->sc_boot = boot; 929 930 /* host variables */ 931 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar)); 932 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar); 933 boot->br_hostvar_hi = 0; 934 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar; 935 936 /* hi priority tx ring */ 937 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);; 938 boot->br_txhipri_hi = 0; 939 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 940 sc->sc_txhir.r_reg = TXP_H2A_1; 941 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring; 942 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0; 943 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx; 944 945 /* lo priority tx ring */ 946 boot->br_txlopri_lo = vtophys(&ld->txp_txloring); 947 boot->br_txlopri_hi = 0; 948 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 949 sc->sc_txlor.r_reg = TXP_H2A_3; 950 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring; 951 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0; 952 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx; 953 954 /* high priority rx ring */ 955 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring); 956 boot->br_rxhipri_hi = 0; 957 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 958 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring; 959 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx; 960 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx; 961 962 /* low priority rx ring */ 963 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring); 964 boot->br_rxlopri_hi = 0; 965 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 966 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring; 967 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx; 968 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx; 969 970 /* command ring */ 971 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES); 972 boot->br_cmd_lo = vtophys(&ld->txp_cmdring); 973 boot->br_cmd_hi = 0; 974 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 975 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring; 976 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 977 sc->sc_cmdring.lastwrite = 0; 978 979 /* response ring */ 980 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES); 981 boot->br_resp_lo = vtophys(&ld->txp_rspring); 982 boot->br_resp_hi = 0; 983 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc); 984 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring; 985 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc); 986 sc->sc_rspring.lastwrite = 0; 987 988 /* receive buffer ring */ 989 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs); 990 boot->br_rxbuf_hi = 0; 991 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc); 992 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs; 993 994 for (i = 0; i < RXBUF_ENTRIES; i++) { 995 struct txp_swdesc *sd; 996 if (sc->sc_rxbufs[i].rb_sd != NULL) 997 continue; 998 sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc), 999 M_DEVBUF, M_NOWAIT); 1000 if (sc->sc_rxbufs[i].rb_sd == NULL) 1001 return(ENOBUFS); 1002 sd = sc->sc_rxbufs[i].rb_sd; 1003 sd->sd_mbuf = NULL; 1004 } 1005 sc->sc_rxbufprod = 0; 1006 1007 /* zero dma */ 1008 bzero(&ld->txp_zero, sizeof(u_int32_t)); 1009 boot->br_zero_lo = vtophys(&ld->txp_zero); 1010 boot->br_zero_hi = 0; 1011 1012 /* See if it's waiting for boot, and try to boot it */ 1013 for (i = 0; i < 10000; i++) { 1014 r = READ_REG(sc, TXP_A2H_0); 1015 if (r == STAT_WAITING_FOR_BOOT) 1016 break; 1017 DELAY(50); 1018 } 1019 1020 if (r != STAT_WAITING_FOR_BOOT) { 1021 device_printf(sc->sc_dev, "not waiting for boot\n"); 1022 return(ENXIO); 1023 } 1024 1025 WRITE_REG(sc, TXP_H2A_2, 0); 1026 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot)); 1027 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD); 1028 1029 /* See if it booted */ 1030 for (i = 0; i < 10000; i++) { 1031 r = READ_REG(sc, TXP_A2H_0); 1032 if (r == STAT_RUNNING) 1033 break; 1034 DELAY(50); 1035 } 1036 if (r != STAT_RUNNING) { 1037 device_printf(sc->sc_dev, "fw not running\n"); 1038 return(ENXIO); 1039 } 1040 1041 /* Clear TX and CMD ring write registers */ 1042 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL); 1043 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL); 1044 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL); 1045 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL); 1046 1047 return (0); 1048} 1049 1050static int 1051txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1052{ 1053 struct txp_softc *sc = ifp->if_softc; 1054 struct ifreq *ifr = (struct ifreq *)data; 1055 int error = 0; 1056 1057 switch(command) { 1058 case SIOCSIFFLAGS: 1059 TXP_LOCK(sc); 1060 if (ifp->if_flags & IFF_UP) { 1061 txp_init_locked(sc); 1062 } else { 1063 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1064 txp_stop(sc); 1065 } 1066 TXP_UNLOCK(sc); 1067 break; 1068 case SIOCADDMULTI: 1069 case SIOCDELMULTI: 1070 /* 1071 * Multicast list has changed; set the hardware 1072 * filter accordingly. 1073 */ 1074 TXP_LOCK(sc); 1075 txp_set_filter(sc); 1076 TXP_UNLOCK(sc); 1077 error = 0; 1078 break; 1079 case SIOCGIFMEDIA: 1080 case SIOCSIFMEDIA: 1081 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command); 1082 break; 1083 default: 1084 error = ether_ioctl(ifp, command, data); 1085 break; 1086 } 1087 1088 return(error); 1089} 1090 1091static int 1092txp_rxring_fill(struct txp_softc *sc) 1093{ 1094 int i; 1095 struct ifnet *ifp; 1096 struct txp_swdesc *sd; 1097 1098 TXP_LOCK_ASSERT(sc); 1099 ifp = sc->sc_ifp; 1100 1101 for (i = 0; i < RXBUF_ENTRIES; i++) { 1102 sd = sc->sc_rxbufs[i].rb_sd; 1103 sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1104 if (sd->sd_mbuf == NULL) 1105 return(ENOBUFS); 1106 1107 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 1108 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 1109 1110 sc->sc_rxbufs[i].rb_paddrlo = 1111 vtophys(mtod(sd->sd_mbuf, vm_offset_t)); 1112 sc->sc_rxbufs[i].rb_paddrhi = 0; 1113 } 1114 1115 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) * 1116 sizeof(struct txp_rxbuf_desc); 1117 1118 return(0); 1119} 1120 1121static void 1122txp_rxring_empty(struct txp_softc *sc) 1123{ 1124 int i; 1125 struct txp_swdesc *sd; 1126 1127 TXP_LOCK_ASSERT(sc); 1128 if (sc->sc_rxbufs == NULL) 1129 return; 1130 1131 for (i = 0; i < RXBUF_ENTRIES; i++) { 1132 if (&sc->sc_rxbufs[i] == NULL) 1133 continue; 1134 sd = sc->sc_rxbufs[i].rb_sd; 1135 if (sd == NULL) 1136 continue; 1137 if (sd->sd_mbuf != NULL) { 1138 m_freem(sd->sd_mbuf); 1139 sd->sd_mbuf = NULL; 1140 } 1141 } 1142 1143 return; 1144} 1145 1146static void 1147txp_init(void *xsc) 1148{ 1149 struct txp_softc *sc; 1150 1151 sc = xsc; 1152 TXP_LOCK(sc); 1153 txp_init_locked(sc); 1154 TXP_UNLOCK(sc); 1155} 1156 1157static void 1158txp_init_locked(struct txp_softc *sc) 1159{ 1160 struct ifnet *ifp; 1161 u_int16_t p1; 1162 u_int32_t p2; 1163 1164 TXP_LOCK_ASSERT(sc); 1165 ifp = sc->sc_ifp; 1166 1167 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1168 return; 1169 1170 txp_stop(sc); 1171 1172 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 1173 NULL, NULL, NULL, 1); 1174 1175 /* Set station address. */ 1176 ((u_int8_t *)&p1)[1] = IF_LLADDR(sc->sc_ifp)[0]; 1177 ((u_int8_t *)&p1)[0] = IF_LLADDR(sc->sc_ifp)[1]; 1178 ((u_int8_t *)&p2)[3] = IF_LLADDR(sc->sc_ifp)[2]; 1179 ((u_int8_t *)&p2)[2] = IF_LLADDR(sc->sc_ifp)[3]; 1180 ((u_int8_t *)&p2)[1] = IF_LLADDR(sc->sc_ifp)[4]; 1181 ((u_int8_t *)&p2)[0] = IF_LLADDR(sc->sc_ifp)[5]; 1182 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0, 1183 NULL, NULL, NULL, 1); 1184 1185 txp_set_filter(sc); 1186 1187 txp_rxring_fill(sc); 1188 1189 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1190 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1191 1192 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF | 1193 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 1194 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 1195 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 1196 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 1197 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 1198 1199 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1200 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1201 ifp->if_timer = 0; 1202 1203 callout_reset(&sc->sc_tick, hz, txp_tick, sc); 1204} 1205 1206static void 1207txp_tick(void *vsc) 1208{ 1209 struct txp_softc *sc = vsc; 1210 struct ifnet *ifp = sc->sc_ifp; 1211 struct txp_rsp_desc *rsp = NULL; 1212 struct txp_ext_desc *ext; 1213 1214 TXP_LOCK_ASSERT(sc); 1215 txp_rxbuf_reclaim(sc); 1216 1217 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0, 1218 &rsp, 1)) 1219 goto out; 1220 if (rsp->rsp_numdesc != 6) 1221 goto out; 1222 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0, 1223 NULL, NULL, NULL, 1)) 1224 goto out; 1225 ext = (struct txp_ext_desc *)(rsp + 1); 1226 1227 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 + 1228 ext[4].ext_1 + ext[4].ext_4; 1229 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 + 1230 ext[2].ext_1; 1231 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 + 1232 ext[1].ext_3; 1233 ifp->if_opackets += rsp->rsp_par2; 1234 ifp->if_ipackets += ext[2].ext_3; 1235 1236out: 1237 if (rsp != NULL) 1238 free(rsp, M_DEVBUF); 1239 1240 callout_reset(&sc->sc_tick, hz, txp_tick, sc); 1241 1242 return; 1243} 1244 1245static void 1246txp_start(struct ifnet *ifp) 1247{ 1248 struct txp_softc *sc; 1249 1250 sc = ifp->if_softc; 1251 TXP_LOCK(sc); 1252 txp_start_locked(ifp); 1253 TXP_UNLOCK(sc); 1254} 1255 1256static void 1257txp_start_locked(struct ifnet *ifp) 1258{ 1259 struct txp_softc *sc = ifp->if_softc; 1260 struct txp_tx_ring *r = &sc->sc_txhir; 1261 struct txp_tx_desc *txd; 1262 struct txp_frag_desc *fxd; 1263 struct mbuf *m, *m0; 1264 struct txp_swdesc *sd; 1265 u_int32_t firstprod, firstcnt, prod, cnt; 1266 1267 TXP_LOCK_ASSERT(sc); 1268 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1269 IFF_DRV_RUNNING) 1270 return; 1271 1272 prod = r->r_prod; 1273 cnt = r->r_cnt; 1274 1275 while (1) { 1276 IF_DEQUEUE(&ifp->if_snd, m); 1277 if (m == NULL) 1278 break; 1279 1280 firstprod = prod; 1281 firstcnt = cnt; 1282 1283 sd = sc->sc_txd + prod; 1284 sd->sd_mbuf = m; 1285 1286 if ((TX_ENTRIES - cnt) < 4) 1287 goto oactive; 1288 1289 txd = r->r_desc + prod; 1290 1291 txd->tx_flags = TX_FLAGS_TYPE_DATA; 1292 txd->tx_numdesc = 0; 1293 txd->tx_addrlo = 0; 1294 txd->tx_addrhi = 0; 1295 txd->tx_totlen = 0; 1296 txd->tx_pflags = 0; 1297 1298 if (++prod == TX_ENTRIES) 1299 prod = 0; 1300 1301 if (++cnt >= (TX_ENTRIES - 4)) 1302 goto oactive; 1303 1304 if (m->m_flags & M_VLANTAG) { 1305 txd->tx_pflags = TX_PFLAGS_VLAN | 1306 (htons(m->m_pkthdr.ether_vtag) << TX_PFLAGS_VLANTAG_S); 1307 } 1308 1309 if (m->m_pkthdr.csum_flags & CSUM_IP) 1310 txd->tx_pflags |= TX_PFLAGS_IPCKSUM; 1311 1312#if 0 1313 if (m->m_pkthdr.csum_flags & CSUM_TCP) 1314 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM; 1315 if (m->m_pkthdr.csum_flags & CSUM_UDP) 1316 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM; 1317#endif 1318 1319 fxd = (struct txp_frag_desc *)(r->r_desc + prod); 1320 for (m0 = m; m0 != NULL; m0 = m0->m_next) { 1321 if (m0->m_len == 0) 1322 continue; 1323 if (++cnt >= (TX_ENTRIES - 4)) 1324 goto oactive; 1325 1326 txd->tx_numdesc++; 1327 1328 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG; 1329 fxd->frag_rsvd1 = 0; 1330 fxd->frag_len = m0->m_len; 1331 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t)); 1332 fxd->frag_addrhi = 0; 1333 fxd->frag_rsvd2 = 0; 1334 1335 if (++prod == TX_ENTRIES) { 1336 fxd = (struct txp_frag_desc *)r->r_desc; 1337 prod = 0; 1338 } else 1339 fxd++; 1340 1341 } 1342 1343 ifp->if_timer = 5; 1344 1345 ETHER_BPF_MTAP(ifp, m); 1346 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod)); 1347 } 1348 1349 r->r_prod = prod; 1350 r->r_cnt = cnt; 1351 return; 1352 1353oactive: 1354 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1355 r->r_prod = firstprod; 1356 r->r_cnt = firstcnt; 1357 IF_PREPEND(&ifp->if_snd, m); 1358 return; 1359} 1360 1361/* 1362 * Handle simple commands sent to the typhoon 1363 */ 1364static int 1365txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1366 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3, int wait) 1367{ 1368 struct txp_rsp_desc *rsp = NULL; 1369 1370 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait)) 1371 return (-1); 1372 1373 if (!wait) 1374 return (0); 1375 1376 if (out1 != NULL) 1377 *out1 = rsp->rsp_par1; 1378 if (out2 != NULL) 1379 *out2 = rsp->rsp_par2; 1380 if (out3 != NULL) 1381 *out3 = rsp->rsp_par3; 1382 free(rsp, M_DEVBUF); 1383 return (0); 1384} 1385 1386static int 1387txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1388 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn, 1389 struct txp_rsp_desc **rspp, int wait) 1390{ 1391 struct txp_hostvar *hv = sc->sc_hostvar; 1392 struct txp_cmd_desc *cmd; 1393 struct txp_ext_desc *ext; 1394 u_int32_t idx, i; 1395 u_int16_t seq; 1396 1397 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) { 1398 device_printf(sc->sc_dev, "no free cmd descriptors\n"); 1399 return (-1); 1400 } 1401 1402 idx = sc->sc_cmdring.lastwrite; 1403 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1404 bzero(cmd, sizeof(*cmd)); 1405 1406 cmd->cmd_numdesc = in_extn; 1407 cmd->cmd_seq = seq = sc->sc_seq++; 1408 cmd->cmd_id = id; 1409 cmd->cmd_par1 = in1; 1410 cmd->cmd_par2 = in2; 1411 cmd->cmd_par3 = in3; 1412 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD | 1413 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID; 1414 1415 idx += sizeof(struct txp_cmd_desc); 1416 if (idx == sc->sc_cmdring.size) 1417 idx = 0; 1418 1419 for (i = 0; i < in_extn; i++) { 1420 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1421 bcopy(in_extp, ext, sizeof(struct txp_ext_desc)); 1422 in_extp++; 1423 idx += sizeof(struct txp_cmd_desc); 1424 if (idx == sc->sc_cmdring.size) 1425 idx = 0; 1426 } 1427 1428 sc->sc_cmdring.lastwrite = idx; 1429 1430 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite); 1431 1432 if (!wait) 1433 return (0); 1434 1435 for (i = 0; i < 10000; i++) { 1436 idx = hv->hv_resp_read_idx; 1437 if (idx != hv->hv_resp_write_idx) { 1438 *rspp = NULL; 1439 if (txp_response(sc, idx, id, seq, rspp)) 1440 return (-1); 1441 if (*rspp != NULL) 1442 break; 1443 } 1444 DELAY(50); 1445 } 1446 if (i == 1000 || (*rspp) == NULL) { 1447 device_printf(sc->sc_dev, "0x%x command failed\n", id); 1448 return (-1); 1449 } 1450 1451 return (0); 1452} 1453 1454static int 1455txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq, 1456 struct txp_rsp_desc **rspp) 1457{ 1458 struct txp_hostvar *hv = sc->sc_hostvar; 1459 struct txp_rsp_desc *rsp; 1460 1461 while (ridx != hv->hv_resp_write_idx) { 1462 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx); 1463 1464 if (id == rsp->rsp_id && rsp->rsp_seq == seq) { 1465 *rspp = (struct txp_rsp_desc *)malloc( 1466 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1), 1467 M_DEVBUF, M_NOWAIT); 1468 if ((*rspp) == NULL) 1469 return (-1); 1470 txp_rsp_fixup(sc, rsp, *rspp); 1471 return (0); 1472 } 1473 1474 if (rsp->rsp_flags & RSP_FLAGS_ERROR) { 1475 device_printf(sc->sc_dev, "response error!\n"); 1476 txp_rsp_fixup(sc, rsp, NULL); 1477 ridx = hv->hv_resp_read_idx; 1478 continue; 1479 } 1480 1481 switch (rsp->rsp_id) { 1482 case TXP_CMD_CYCLE_STATISTICS: 1483 case TXP_CMD_MEDIA_STATUS_READ: 1484 break; 1485 case TXP_CMD_HELLO_RESPONSE: 1486 device_printf(sc->sc_dev, "hello\n"); 1487 break; 1488 default: 1489 device_printf(sc->sc_dev, "unknown id(0x%x)\n", 1490 rsp->rsp_id); 1491 } 1492 1493 txp_rsp_fixup(sc, rsp, NULL); 1494 ridx = hv->hv_resp_read_idx; 1495 hv->hv_resp_read_idx = ridx; 1496 } 1497 1498 return (0); 1499} 1500 1501static void 1502txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp, 1503 struct txp_rsp_desc *dst) 1504{ 1505 struct txp_rsp_desc *src = rsp; 1506 struct txp_hostvar *hv = sc->sc_hostvar; 1507 u_int32_t i, ridx; 1508 1509 ridx = hv->hv_resp_read_idx; 1510 1511 for (i = 0; i < rsp->rsp_numdesc + 1; i++) { 1512 if (dst != NULL) 1513 bcopy(src, dst++, sizeof(struct txp_rsp_desc)); 1514 ridx += sizeof(struct txp_rsp_desc); 1515 if (ridx == sc->sc_rspring.size) { 1516 src = sc->sc_rspring.base; 1517 ridx = 0; 1518 } else 1519 src++; 1520 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx; 1521 } 1522 1523 hv->hv_resp_read_idx = ridx; 1524} 1525 1526static int 1527txp_cmd_desc_numfree(struct txp_softc *sc) 1528{ 1529 struct txp_hostvar *hv = sc->sc_hostvar; 1530 struct txp_boot_record *br = sc->sc_boot; 1531 u_int32_t widx, ridx, nfree; 1532 1533 widx = sc->sc_cmdring.lastwrite; 1534 ridx = hv->hv_cmd_read_idx; 1535 1536 if (widx == ridx) { 1537 /* Ring is completely free */ 1538 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc); 1539 } else { 1540 if (widx > ridx) 1541 nfree = br->br_cmd_siz - 1542 (widx - ridx + sizeof(struct txp_cmd_desc)); 1543 else 1544 nfree = ridx - widx - sizeof(struct txp_cmd_desc); 1545 } 1546 1547 return (nfree / sizeof(struct txp_cmd_desc)); 1548} 1549 1550static void 1551txp_stop(struct txp_softc *sc) 1552{ 1553 struct ifnet *ifp; 1554 1555 TXP_LOCK_ASSERT(sc); 1556 ifp = sc->sc_ifp; 1557 1558 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1559 1560 callout_stop(&sc->sc_tick); 1561 1562 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1563 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1564 1565 txp_rxring_empty(sc); 1566 1567 return; 1568} 1569 1570static void 1571txp_watchdog(struct ifnet *ifp) 1572{ 1573 return; 1574} 1575 1576static int 1577txp_ifmedia_upd(struct ifnet *ifp) 1578{ 1579 struct txp_softc *sc = ifp->if_softc; 1580 struct ifmedia *ifm = &sc->sc_ifmedia; 1581 u_int16_t new_xcvr; 1582 1583 TXP_LOCK(sc); 1584 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) { 1585 TXP_UNLOCK(sc); 1586 return (EINVAL); 1587 } 1588 1589 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { 1590 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1591 new_xcvr = TXP_XCVR_10_FDX; 1592 else 1593 new_xcvr = TXP_XCVR_10_HDX; 1594 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 1595 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1596 new_xcvr = TXP_XCVR_100_FDX; 1597 else 1598 new_xcvr = TXP_XCVR_100_HDX; 1599 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1600 new_xcvr = TXP_XCVR_AUTO; 1601 } else { 1602 TXP_UNLOCK(sc); 1603 return (EINVAL); 1604 } 1605 1606 /* nothing to do */ 1607 if (sc->sc_xcvr == new_xcvr) { 1608 TXP_UNLOCK(sc); 1609 return (0); 1610 } 1611 1612 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0, 1613 NULL, NULL, NULL, 0); 1614 sc->sc_xcvr = new_xcvr; 1615 TXP_UNLOCK(sc); 1616 1617 return (0); 1618} 1619 1620static void 1621txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1622{ 1623 struct txp_softc *sc = ifp->if_softc; 1624 struct ifmedia *ifm = &sc->sc_ifmedia; 1625 u_int16_t bmsr, bmcr, anar, anlpar; 1626 1627 ifmr->ifm_status = IFM_AVALID; 1628 ifmr->ifm_active = IFM_ETHER; 1629 1630 TXP_LOCK(sc); 1631 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1632 &bmsr, NULL, NULL, 1)) 1633 goto bail; 1634 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1635 &bmsr, NULL, NULL, 1)) 1636 goto bail; 1637 1638 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0, 1639 &bmcr, NULL, NULL, 1)) 1640 goto bail; 1641 1642 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0, 1643 &anlpar, NULL, NULL, 1)) 1644 goto bail; 1645 1646 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANAR, 0, 1647 &anar, NULL, NULL, 1)) 1648 goto bail; 1649 TXP_UNLOCK(sc); 1650 1651 if (bmsr & BMSR_LINK) 1652 ifmr->ifm_status |= IFM_ACTIVE; 1653 1654 if (bmcr & BMCR_ISO) { 1655 ifmr->ifm_active |= IFM_NONE; 1656 ifmr->ifm_status = 0; 1657 return; 1658 } 1659 1660 if (bmcr & BMCR_LOOP) 1661 ifmr->ifm_active |= IFM_LOOP; 1662 1663 if (bmcr & BMCR_AUTOEN) { 1664 if ((bmsr & BMSR_ACOMP) == 0) { 1665 ifmr->ifm_active |= IFM_NONE; 1666 return; 1667 } 1668 1669 anlpar &= anar; 1670 if (anlpar & ANLPAR_TX_FD) 1671 ifmr->ifm_active |= IFM_100_TX|IFM_FDX; 1672 else if (anlpar & ANLPAR_T4) 1673 ifmr->ifm_active |= IFM_100_T4; 1674 else if (anlpar & ANLPAR_TX) 1675 ifmr->ifm_active |= IFM_100_TX; 1676 else if (anlpar & ANLPAR_10_FD) 1677 ifmr->ifm_active |= IFM_10_T|IFM_FDX; 1678 else if (anlpar & ANLPAR_10) 1679 ifmr->ifm_active |= IFM_10_T; 1680 else 1681 ifmr->ifm_active |= IFM_NONE; 1682 } else 1683 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 1684 return; 1685 1686bail: 1687 TXP_UNLOCK(sc); 1688 ifmr->ifm_active |= IFM_NONE; 1689 ifmr->ifm_status &= ~IFM_AVALID; 1690} 1691 1692#ifdef TXP_DEBUG 1693static void 1694txp_show_descriptor(void *d) 1695{ 1696 struct txp_cmd_desc *cmd = d; 1697 struct txp_rsp_desc *rsp = d; 1698 struct txp_tx_desc *txd = d; 1699 struct txp_frag_desc *frgd = d; 1700 1701 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) { 1702 case CMD_FLAGS_TYPE_CMD: 1703 /* command descriptor */ 1704 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1705 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1706 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1707 break; 1708 case CMD_FLAGS_TYPE_RESP: 1709 /* response descriptor */ 1710 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1711 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq, 1712 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3); 1713 break; 1714 case CMD_FLAGS_TYPE_DATA: 1715 /* data header (assuming tx for now) */ 1716 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]", 1717 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen, 1718 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags); 1719 break; 1720 case CMD_FLAGS_TYPE_FRAG: 1721 /* fragment descriptor */ 1722 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]", 1723 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len, 1724 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2); 1725 break; 1726 default: 1727 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1728 cmd->cmd_flags & CMD_FLAGS_TYPE_M, 1729 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1730 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1731 break; 1732 } 1733} 1734#endif 1735 1736static void 1737txp_set_filter(struct txp_softc *sc) 1738{ 1739 struct ifnet *ifp = sc->sc_ifp; 1740 u_int32_t crc, carry, hashbit, hash[2]; 1741 u_int16_t filter; 1742 u_int8_t octet; 1743 int i, j, mcnt = 0; 1744 struct ifmultiaddr *ifma; 1745 char *enm; 1746 1747 if (ifp->if_flags & IFF_PROMISC) { 1748 filter = TXP_RXFILT_PROMISC; 1749 goto setit; 1750 } 1751 1752 filter = TXP_RXFILT_DIRECT; 1753 1754 if (ifp->if_flags & IFF_BROADCAST) 1755 filter |= TXP_RXFILT_BROADCAST; 1756 1757 if (ifp->if_flags & IFF_ALLMULTI) 1758 filter |= TXP_RXFILT_ALLMULTI; 1759 else { 1760 hash[0] = hash[1] = 0; 1761 1762 IF_ADDR_LOCK(ifp); 1763 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1764 if (ifma->ifma_addr->sa_family != AF_LINK) 1765 continue; 1766 1767 enm = LLADDR((struct sockaddr_dl *)ifma->ifma_addr); 1768 mcnt++; 1769 crc = 0xffffffff; 1770 1771 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1772 octet = enm[i]; 1773 for (j = 0; j < 8; j++) { 1774 carry = ((crc & 0x80000000) ? 1 : 0) ^ 1775 (octet & 1); 1776 crc <<= 1; 1777 octet >>= 1; 1778 if (carry) 1779 crc = (crc ^ TXP_POLYNOMIAL) | 1780 carry; 1781 } 1782 } 1783 hashbit = (u_int16_t)(crc & (64 - 1)); 1784 hash[hashbit / 32] |= (1 << hashbit % 32); 1785 } 1786 IF_ADDR_UNLOCK(ifp); 1787 1788 if (mcnt > 0) { 1789 filter |= TXP_RXFILT_HASHMULTI; 1790 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE, 1791 2, hash[0], hash[1], NULL, NULL, NULL, 0); 1792 } 1793 } 1794 1795setit: 1796 1797 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0, 1798 NULL, NULL, NULL, 1); 1799 1800 return; 1801} 1802 1803static void 1804txp_capabilities(struct txp_softc *sc) 1805{ 1806 struct ifnet *ifp = sc->sc_ifp; 1807 struct txp_rsp_desc *rsp = NULL; 1808 struct txp_ext_desc *ext; 1809 1810 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1)) 1811 goto out; 1812 1813 if (rsp->rsp_numdesc != 1) 1814 goto out; 1815 ext = (struct txp_ext_desc *)(rsp + 1); 1816 1817 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK; 1818 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK; 1819 ifp->if_capabilities = 0; 1820 1821 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) { 1822 sc->sc_tx_capability |= OFFLOAD_VLAN; 1823 sc->sc_rx_capability |= OFFLOAD_VLAN; 1824 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 1825 } 1826 1827#if 0 1828 /* not ready yet */ 1829 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) { 1830 sc->sc_tx_capability |= OFFLOAD_IPSEC; 1831 sc->sc_rx_capability |= OFFLOAD_IPSEC; 1832 ifp->if_capabilities |= IFCAP_IPSEC; 1833 } 1834#endif 1835 1836 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) { 1837 sc->sc_tx_capability |= OFFLOAD_IPCKSUM; 1838 sc->sc_rx_capability |= OFFLOAD_IPCKSUM; 1839 ifp->if_capabilities |= IFCAP_HWCSUM; 1840 ifp->if_hwassist |= CSUM_IP; 1841 } 1842 1843 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) { 1844#if 0 1845 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM; 1846#endif 1847 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM; 1848 ifp->if_capabilities |= IFCAP_HWCSUM; 1849 } 1850 1851 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) { 1852#if 0 1853 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM; 1854#endif 1855 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM; 1856 ifp->if_capabilities |= IFCAP_HWCSUM; 1857 } 1858 ifp->if_capenable = ifp->if_capabilities; 1859 1860 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0, 1861 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1)) 1862 goto out; 1863 1864out: 1865 if (rsp != NULL) 1866 free(rsp, M_DEVBUF); 1867 1868 return; 1869} 1870