scc_dev_quicc.c revision 256281 
1/*-
2 * Copyright (c) 2004-2006 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: stable/10/sys/dev/scc/scc_dev_quicc.c 253920 2013-08-03 21:24:52Z marius $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/conf.h>
34#include <machine/bus.h>
35#include <sys/rman.h>
36#include <sys/serial.h>
37
38#include <dev/scc/scc_bfe.h>
39#include <dev/scc/scc_bus.h>
40
41#include <dev/ic/quicc.h>
42
43#include "scc_if.h"
44
45#define	quicc_read2(bas, reg)		\
46	bus_space_read_2((bas)->bst, (bas)->bsh, reg)
47#define	quicc_read4(bas, reg)		\
48	bus_space_read_4((bas)->bst, (bas)->bsh, reg)
49
50#define	quicc_write2(bas, reg, val)	\
51	bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
52#define	quicc_write4(bas, reg, val)	\
53	bus_space_write_4((bas)->bst, (bas)->bsh, reg, val)
54
55static int quicc_bfe_attach(struct scc_softc *, int);
56static int quicc_bfe_enabled(struct scc_softc *, struct scc_chan *);
57static int quicc_bfe_iclear(struct scc_softc *, struct scc_chan *);
58static int quicc_bfe_ipend(struct scc_softc *);
59static int quicc_bfe_probe(struct scc_softc *);
60
61static kobj_method_t quicc_methods[] = {
62	KOBJMETHOD(scc_attach,	quicc_bfe_attach),
63	KOBJMETHOD(scc_enabled,	quicc_bfe_enabled),
64	KOBJMETHOD(scc_iclear,	quicc_bfe_iclear),
65	KOBJMETHOD(scc_ipend,	quicc_bfe_ipend),
66	KOBJMETHOD(scc_probe,	quicc_bfe_probe),
67	KOBJMETHOD_END
68};
69
70struct scc_class scc_quicc_class = {
71	"QUICC class",
72	quicc_methods,
73	sizeof(struct scc_softc),
74	.cl_channels = 4,
75	.cl_class = SCC_CLASS_QUICC,
76	.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
77	.cl_range = 0,
78};
79
80static int
81quicc_bfe_attach(struct scc_softc *sc __unused, int reset __unused)
82{
83
84	return (0);
85}
86
87static int
88quicc_bfe_enabled(struct scc_softc *sc, struct scc_chan *ch)
89{
90	struct scc_bas *bas;
91	int unit;
92	uint16_t val0, val1;
93
94	bas = &sc->sc_bas;
95	unit = ch->ch_nr - 1;
96	val0 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
97	quicc_write2(bas, QUICC_REG_SCC_TODR(unit), ~val0);
98	val1 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
99	quicc_write2(bas, QUICC_REG_SCC_TODR(unit), val0);
100	return (((val0 | val1) == 0x8000) ? 1 : 0);
101}
102
103static int
104quicc_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
105{
106	struct scc_bas *bas;
107	uint16_t rb, st;
108
109	bas = &sc->sc_bas;
110	mtx_lock_spin(&sc->sc_hwmtx);
111	if (ch->ch_ipend & SER_INT_RXREADY) {
112		rb = quicc_read2(bas, QUICC_PRAM_SCC_RBASE(ch->ch_nr - 1));
113		st = quicc_read2(bas, rb);
114		(void)quicc_read4(bas, rb + 4);
115		quicc_write2(bas, rb, st | 0x9000);
116	}
117	mtx_unlock_spin(&sc->sc_hwmtx);
118	return (0);
119}
120
121static int
122quicc_bfe_ipend(struct scc_softc *sc)
123{
124	struct scc_bas *bas;
125	struct scc_chan *ch;
126	int c, ipend;
127	uint16_t scce;
128
129	bas = &sc->sc_bas;
130	ipend = 0;
131	for (c = 0; c < 4; c++) {
132		ch = &sc->sc_chan[c];
133		if (!ch->ch_enabled)
134			continue;
135		ch->ch_ipend = 0;
136		mtx_lock_spin(&sc->sc_hwmtx);
137		scce = quicc_read2(bas, QUICC_REG_SCC_SCCE(c));
138		quicc_write2(bas, QUICC_REG_SCC_SCCE(c), ~0);
139		mtx_unlock_spin(&sc->sc_hwmtx);
140		if (scce & 0x0001)
141			ch->ch_ipend |= SER_INT_RXREADY;
142		if (scce & 0x0002)
143			ch->ch_ipend |= SER_INT_TXIDLE;
144		if (scce & 0x0004)
145			ch->ch_ipend |= SER_INT_OVERRUN;
146		if (scce & 0x0020)
147			ch->ch_ipend |= SER_INT_BREAK;
148		/* XXX SIGNALS */
149		ipend |= ch->ch_ipend;
150	}
151	return (ipend);
152}
153
154static int
155quicc_bfe_probe(struct scc_softc *sc __unused)
156{
157
158	return (0);
159}
160