1139749Simp#-
255939Snsouch# Copyright (c) 1999 Nicolas Souchu
355939Snsouch# All rights reserved.
455939Snsouch#
555939Snsouch# Redistribution and use in source and binary forms, with or without
655939Snsouch# modification, are permitted provided that the following conditions
755939Snsouch# are met:
855939Snsouch# 1. Redistributions of source code must retain the above copyright
955939Snsouch#    notice, this list of conditions and the following disclaimer.
1055939Snsouch# 2. Redistributions in binary form must reproduce the above copyright
1155939Snsouch#    notice, this list of conditions and the following disclaimer in the
1255939Snsouch#    documentation and/or other materials provided with the distribution.
1355939Snsouch#
1455939Snsouch# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1555939Snsouch# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1655939Snsouch# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1755939Snsouch# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1855939Snsouch# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1955939Snsouch# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2055939Snsouch# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2155939Snsouch# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2255939Snsouch# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2355939Snsouch# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2455939Snsouch# SUCH DAMAGE.
2555939Snsouch#
2655939Snsouch# $FreeBSD$
2755939Snsouch#
2855939Snsouch
2959093Sdfr#include <sys/bus.h>
3055939Snsouch#include <dev/ppbus/ppbconf.h>
3155939Snsouch
3255939SnsouchINTERFACE ppbus;
3355939Snsouch
3455939Snsouch#
3555939Snsouch# Do low level i/o operations
3655939Snsouch#
3755939SnsouchMETHOD u_char io {
3855939Snsouch	device_t dev;
3955939Snsouch	int opcode;
4055939Snsouch	u_char *addr;
4155939Snsouch	int cnt;
4255939Snsouch	u_char byte;
4355939Snsouch};
4455939Snsouch
4555939Snsouch#
4655939Snsouch# Execution of a microsequence
4755939Snsouch#
4855939SnsouchMETHOD int exec_microseq {
4955939Snsouch	device_t dev;
5055939Snsouch	struct ppb_microseq **ppb_microseq;
5155939Snsouch};
5255939Snsouch
5355939Snsouch#
5455939Snsouch# Reset EPP timeout
5555939Snsouch#
5655939SnsouchMETHOD int reset_epp {
5755939Snsouch	device_t dev;
5855939Snsouch}
5955939Snsouch
6055939Snsouch#
6155939Snsouch# Set chipset mode
6255939Snsouch#
6355939SnsouchMETHOD int setmode {
6455939Snsouch	device_t dev;
6555939Snsouch	int mode;
6655939Snsouch}
6755939Snsouch
6855939Snsouch#
6955939Snsouch# Synchronize ECP FIFO
7055939Snsouch#
7155939SnsouchMETHOD int ecp_sync {
7255939Snsouch	device_t dev;
7355939Snsouch}
7455939Snsouch
7555939Snsouch#
7655939Snsouch# Do chipset dependent low level read
7755939Snsouch#
7855939SnsouchMETHOD int read {
7955939Snsouch	device_t dev;
8055939Snsouch	char *buf;
8155939Snsouch	int len;
8255939Snsouch	int how;
8355939Snsouch}
8455939Snsouch
8555939Snsouch#
8655939Snsouch# Do chipset dependent low level write
8755939Snsouch#
8855939SnsouchMETHOD int write {
8955939Snsouch	device_t dev;
9055939Snsouch	char *buf;
9155939Snsouch	int len;
9255939Snsouch	int how;
9355939Snsouch}
94