pci_subr.c revision 168157
169783Smsmith/*- 269783Smsmith * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 369783Smsmith * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 469783Smsmith * Copyright (c) 2000 BSDi 569783Smsmith * All rights reserved. 669783Smsmith * 769783Smsmith * Redistribution and use in source and binary forms, with or without 869783Smsmith * modification, are permitted provided that the following conditions 969783Smsmith * are met: 1069783Smsmith * 1. Redistributions of source code must retain the above copyright 1169783Smsmith * notice, this list of conditions and the following disclaimer. 1269783Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1369783Smsmith * notice, this list of conditions and the following disclaimer in the 1469783Smsmith * documentation and/or other materials provided with the distribution. 1569783Smsmith * 3. The name of the author may not be used to endorse or promote products 1669783Smsmith * derived from this software without specific prior written permission. 1769783Smsmith * 1869783Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1969783Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2069783Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2169783Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2269783Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2369783Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2469783Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2569783Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2669783Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2769783Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2869783Smsmith * SUCH DAMAGE. 2969783Smsmith */ 3069783Smsmith 31119418Sobrien#include <sys/cdefs.h> 32119418Sobrien__FBSDID("$FreeBSD: head/sys/dev/pci/pci_pci.c 168157 2007-03-31 20:41:00Z jhb $"); 33119418Sobrien 3469783Smsmith/* 3569783Smsmith * PCI:PCI bridge support. 3669783Smsmith */ 3769783Smsmith 3869783Smsmith#include <sys/param.h> 3969783Smsmith#include <sys/systm.h> 4069783Smsmith#include <sys/kernel.h> 41129876Sphk#include <sys/module.h> 4269783Smsmith#include <sys/bus.h> 43107546Simp#include <machine/bus.h> 44107546Simp#include <sys/rman.h> 45106844Smdodd#include <sys/sysctl.h> 4669783Smsmith 4769783Smsmith#include <machine/resource.h> 4869783Smsmith 49119285Simp#include <dev/pci/pcivar.h> 50119285Simp#include <dev/pci/pcireg.h> 51119285Simp#include <dev/pci/pcib_private.h> 5269783Smsmith 5369783Smsmith#include "pcib_if.h" 5469783Smsmith 5569783Smsmithstatic int pcib_probe(device_t dev); 5669783Smsmith 5769783Smsmithstatic device_method_t pcib_methods[] = { 5869783Smsmith /* Device interface */ 5969783Smsmith DEVMETHOD(device_probe, pcib_probe), 6069783Smsmith DEVMETHOD(device_attach, pcib_attach), 61145661Simp DEVMETHOD(device_detach, bus_generic_detach), 6269783Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 6369783Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 6469783Smsmith DEVMETHOD(device_resume, bus_generic_resume), 6569783Smsmith 6669783Smsmith /* Bus interface */ 6769783Smsmith DEVMETHOD(bus_print_child, bus_generic_print_child), 6869783Smsmith DEVMETHOD(bus_read_ivar, pcib_read_ivar), 6969783Smsmith DEVMETHOD(bus_write_ivar, pcib_write_ivar), 7069783Smsmith DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 7169783Smsmith DEVMETHOD(bus_release_resource, bus_generic_release_resource), 7269783Smsmith DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 7369783Smsmith DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 7469783Smsmith DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 7569783Smsmith DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 7669783Smsmith 7769783Smsmith /* pcib interface */ 7869783Smsmith DEVMETHOD(pcib_maxslots, pcib_maxslots), 7969783Smsmith DEVMETHOD(pcib_read_config, pcib_read_config), 8069783Smsmith DEVMETHOD(pcib_write_config, pcib_write_config), 8169783Smsmith DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt), 82164264Sjhb DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi), 83164264Sjhb DEVMETHOD(pcib_release_msi, pcib_release_msi), 84164264Sjhb DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix), 85166176Sjhb DEVMETHOD(pcib_remap_msix, pcib_remap_msix), 86164264Sjhb DEVMETHOD(pcib_release_msix, pcib_release_msix), 8769783Smsmith 8869783Smsmith { 0, 0 } 8969783Smsmith}; 9069783Smsmith 91154079Sjhbstatic devclass_t pcib_devclass; 9269783Smsmith 93154079SjhbDEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc)); 9469783SmsmithDRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0); 9569783Smsmith 9669783Smsmith/* 97163805Simp * Is the prefetch window open (eg, can we allocate memory in it?) 98163805Simp */ 99163805Simpstatic int 100163805Simppcib_is_prefetch_open(struct pcib_softc *sc) 101163805Simp{ 102163805Simp return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit); 103163805Simp} 104163805Simp 105163805Simp/* 106163805Simp * Is the nonprefetch window open (eg, can we allocate memory in it?) 107163805Simp */ 108163805Simpstatic int 109163805Simppcib_is_nonprefetch_open(struct pcib_softc *sc) 110163805Simp{ 111163805Simp return (sc->membase > 0 && sc->membase < sc->memlimit); 112163805Simp} 113163805Simp 114163805Simp/* 115163805Simp * Is the io window open (eg, can we allocate ports in it?) 116163805Simp */ 117163805Simpstatic int 118163805Simppcib_is_io_open(struct pcib_softc *sc) 119163805Simp{ 120163805Simp return (sc->iobase > 0 && sc->iobase < sc->iolimit); 121163805Simp} 122163805Simp 123163805Simp/* 12469783Smsmith * Generic device interface 12569783Smsmith */ 12669783Smsmithstatic int 12769783Smsmithpcib_probe(device_t dev) 12869783Smsmith{ 12969783Smsmith if ((pci_get_class(dev) == PCIC_BRIDGE) && 13069783Smsmith (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) { 13169783Smsmith device_set_desc(dev, "PCI-PCI bridge"); 13269783Smsmith return(-10000); 13369783Smsmith } 13469783Smsmith return(ENXIO); 13569783Smsmith} 13669783Smsmith 137102441Sjhbvoid 138102441Sjhbpcib_attach_common(device_t dev) 13969783Smsmith{ 14069783Smsmith struct pcib_softc *sc; 141119266Simp uint8_t iolow; 14269783Smsmith 14369783Smsmith sc = device_get_softc(dev); 14469783Smsmith sc->dev = dev; 14569783Smsmith 14669908Smsmith /* 14769908Smsmith * Get current bridge configuration. 14869908Smsmith */ 14969953Smsmith sc->command = pci_read_config(dev, PCIR_COMMAND, 1); 15069908Smsmith sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 15169908Smsmith sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 15269908Smsmith sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 15369908Smsmith sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 15469908Smsmith sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 15569783Smsmith 15669908Smsmith /* 15769908Smsmith * Determine current I/O decode. 15869908Smsmith */ 15969953Smsmith if (sc->command & PCIM_CMD_PORTEN) { 16069953Smsmith iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1); 16169953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 16269953Smsmith sc->iobase = PCI_PPBIOBASE(pci_read_config(dev, PCIR_IOBASEH_1, 2), 16369953Smsmith pci_read_config(dev, PCIR_IOBASEL_1, 1)); 16469953Smsmith } else { 16569953Smsmith sc->iobase = PCI_PPBIOBASE(0, pci_read_config(dev, PCIR_IOBASEL_1, 1)); 16669953Smsmith } 16769908Smsmith 16869953Smsmith iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1); 16969953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 17069953Smsmith sc->iolimit = PCI_PPBIOLIMIT(pci_read_config(dev, PCIR_IOLIMITH_1, 2), 17169953Smsmith pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 17269953Smsmith } else { 17369953Smsmith sc->iolimit = PCI_PPBIOLIMIT(0, pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 17469953Smsmith } 17569908Smsmith } 17669908Smsmith 17769908Smsmith /* 17869908Smsmith * Determine current memory decode. 17969908Smsmith */ 18069953Smsmith if (sc->command & PCIM_CMD_MEMEN) { 18169953Smsmith sc->membase = PCI_PPBMEMBASE(0, pci_read_config(dev, PCIR_MEMBASE_1, 2)); 18269953Smsmith sc->memlimit = PCI_PPBMEMLIMIT(0, pci_read_config(dev, PCIR_MEMLIMIT_1, 2)); 183163256Simp sc->pmembase = PCI_PPBMEMBASE(pci_read_config(dev, PCIR_PMBASEH_1, 4), 184163256Simp pci_read_config(dev, PCIR_PMBASEL_1, 2)); 185163256Simp sc->pmemlimit = PCI_PPBMEMLIMIT(pci_read_config(dev, PCIR_PMLIMITH_1, 4), 186163256Simp pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 18769953Smsmith } 18869908Smsmith 18969908Smsmith /* 19069908Smsmith * Quirk handling. 19169908Smsmith */ 19269908Smsmith switch (pci_get_devid(dev)) { 193124365Simp case 0x12258086: /* Intel 82454KX/GX (Orion) */ 19469908Smsmith { 195119266Simp uint8_t supbus; 19669908Smsmith 19769908Smsmith supbus = pci_read_config(dev, 0x41, 1); 19869908Smsmith if (supbus != 0xff) { 19969908Smsmith sc->secbus = supbus + 1; 20069908Smsmith sc->subbus = supbus + 1; 20169908Smsmith } 202124365Simp break; 20369908Smsmith } 204124365Simp 205124365Simp /* 206124365Simp * The i82380FB mobile docking controller is a PCI-PCI bridge, 207124365Simp * and it is a subtractive bridge. However, the ProgIf is wrong 208124365Simp * so the normal setting of PCIB_SUBTRACTIVE bit doesn't 209124365Simp * happen. There's also a Toshiba bridge that behaves this 210124365Simp * way. 211124365Simp */ 212124365Simp case 0x124b8086: /* Intel 82380FB Mobile */ 213124365Simp case 0x060513d7: /* Toshiba ???? */ 214124365Simp sc->flags |= PCIB_SUBTRACTIVE; 21569908Smsmith break; 216149521Sjkim 217149521Sjkim /* Compaq R3000 BIOS sets wrong subordinate bus number. */ 218149521Sjkim case 0x00dd10de: 219149521Sjkim { 220149521Sjkim char *cp; 221149521Sjkim 222157949Sjkim if ((cp = getenv("smbios.planar.maker")) == NULL) 223149521Sjkim break; 224157949Sjkim if (strncmp(cp, "Compal", 6) != 0) { 225157949Sjkim freeenv(cp); 226149521Sjkim break; 227157949Sjkim } 228157949Sjkim freeenv(cp); 229157949Sjkim if ((cp = getenv("smbios.planar.product")) == NULL) 230157949Sjkim break; 231157949Sjkim if (strncmp(cp, "08A0", 4) != 0) { 232157949Sjkim freeenv(cp); 233157949Sjkim break; 234157949Sjkim } 235157949Sjkim freeenv(cp); 236149521Sjkim if (sc->subbus < 0xa) { 237149521Sjkim pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1); 238149521Sjkim sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 239149521Sjkim } 240149521Sjkim break; 241149521Sjkim } 24269908Smsmith } 24369908Smsmith 244165995Sjhb if (pci_msi_device_blacklisted(dev)) 245165995Sjhb sc->flags |= PCIB_DISABLE_MSI; 246165995Sjhb 247124365Simp /* 248124365Simp * Intel 815, 845 and other chipsets say they are PCI-PCI bridges, 249124365Simp * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM, 250124365Simp * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese. 251124365Simp * This means they act as if they were subtractively decoding 252124365Simp * bridges and pass all transactions. Mark them and real ProgIf 1 253124365Simp * parts as subtractive. 254124365Simp */ 255124365Simp if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 || 256168157Sjhb pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE) 257124365Simp sc->flags |= PCIB_SUBTRACTIVE; 258124365Simp 25969783Smsmith if (bootverbose) { 26069783Smsmith device_printf(dev, " secondary bus %d\n", sc->secbus); 26169783Smsmith device_printf(dev, " subordinate bus %d\n", sc->subbus); 26269783Smsmith device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit); 263163805Simp if (pcib_is_nonprefetch_open(sc)) 264163805Simp device_printf(dev, " memory decode 0x%jx-0x%jx\n", 265163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit); 266163805Simp if (pcib_is_prefetch_open(sc)) 267163805Simp device_printf(dev, " prefetched decode 0x%jx-0x%jx\n", 268163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 269163805Simp else 270163805Simp device_printf(dev, " no prefetched decode\n"); 271124365Simp if (sc->flags & PCIB_SUBTRACTIVE) 272124365Simp device_printf(dev, " Subtractively decoded bridge.\n"); 27369783Smsmith } 27469783Smsmith 27569783Smsmith /* 27669783Smsmith * XXX If the secondary bus number is zero, we should assign a bus number 27769783Smsmith * since the BIOS hasn't, then initialise the bridge. 27869783Smsmith */ 27969783Smsmith 28069783Smsmith /* 28169783Smsmith * XXX If the subordinate bus number is less than the secondary bus number, 28269783Smsmith * we should pick a better value. One sensible alternative would be to 28369783Smsmith * pick 255; the only tradeoff here is that configuration transactions 28469783Smsmith * would be more widely routed than absolutely necessary. 28569783Smsmith */ 286102441Sjhb} 28769783Smsmith 288103042Sjhbint 289102441Sjhbpcib_attach(device_t dev) 290102441Sjhb{ 291102441Sjhb struct pcib_softc *sc; 292102441Sjhb device_t child; 293102441Sjhb 294102441Sjhb pcib_attach_common(dev); 295102441Sjhb sc = device_get_softc(dev); 29669783Smsmith if (sc->secbus != 0) { 297103016Sjhb child = device_add_child(dev, "pci", sc->secbus); 29869783Smsmith if (child != NULL) 29969783Smsmith return(bus_generic_attach(dev)); 30069783Smsmith } 30169783Smsmith 30269783Smsmith /* no secondary bus; we should have fixed this */ 30369783Smsmith return(0); 30469783Smsmith} 30569783Smsmith 306102441Sjhbint 30769783Smsmithpcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 30869783Smsmith{ 30969783Smsmith struct pcib_softc *sc = device_get_softc(dev); 31069783Smsmith 31169783Smsmith switch (which) { 31269783Smsmith case PCIB_IVAR_BUS: 31369783Smsmith *result = sc->secbus; 31469783Smsmith return(0); 31569783Smsmith } 31669783Smsmith return(ENOENT); 31769783Smsmith} 31869783Smsmith 319102441Sjhbint 32069783Smsmithpcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 32169783Smsmith{ 32269783Smsmith struct pcib_softc *sc = device_get_softc(dev); 32369783Smsmith 32469783Smsmith switch (which) { 32569783Smsmith case PCIB_IVAR_BUS: 32669783Smsmith sc->secbus = value; 32769783Smsmith break; 32869783Smsmith } 32969783Smsmith return(ENOENT); 33069783Smsmith} 33169783Smsmith 33269783Smsmith/* 33369783Smsmith * We have to trap resource allocation requests and ensure that the bridge 33469783Smsmith * is set up to, or capable of handling them. 33569783Smsmith */ 336102441Sjhbstruct resource * 33769783Smsmithpcib_alloc_resource(device_t dev, device_t child, int type, int *rid, 338142051Simp u_long start, u_long end, u_long count, u_int flags) 33969783Smsmith{ 340124365Simp struct pcib_softc *sc = device_get_softc(dev); 341164130Sjhb const char *name, *suffix; 342124365Simp int ok; 34369783Smsmith 34469783Smsmith /* 34569783Smsmith * Fail the allocation for this range if it's not supported. 34669783Smsmith */ 347164130Sjhb name = device_get_nameunit(child); 348164130Sjhb if (name == NULL) { 349164130Sjhb name = ""; 350164130Sjhb suffix = ""; 351164130Sjhb } else 352164130Sjhb suffix = " "; 35369783Smsmith switch (type) { 35469783Smsmith case SYS_RES_IOPORT: 355107546Simp ok = 0; 356124365Simp if (!pcib_is_io_open(sc)) 357124365Simp break; 358124365Simp ok = (start >= sc->iobase && end <= sc->iolimit); 359145652Smarcel 360145652Smarcel /* 361145652Smarcel * Make sure we allow access to VGA I/O addresses when the 362145652Smarcel * bridge has the "VGA Enable" bit set. 363145652Smarcel */ 364145652Smarcel if (!ok && pci_is_vga_ioport_range(start, end)) 365145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 366145652Smarcel 367124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 368124365Simp if (!ok) { 369124365Simp if (start < sc->iobase) 370124365Simp start = sc->iobase; 371124365Simp if (end > sc->iolimit) 372124365Simp end = sc->iolimit; 373142051Simp if (start < end) 374142051Simp ok = 1; 375124365Simp } 376106844Smdodd } else { 377124365Simp ok = 1; 378128058Simp#if 1 379124365Simp if (start < sc->iobase && end > sc->iolimit) { 380124365Simp start = sc->iobase; 381124365Simp end = sc->iolimit; 382124365Simp } 383124641Simp#endif 384106844Smdodd } 385124365Simp if (end < start) { 386142051Simp device_printf(dev, "ioport: end (%lx) < start (%lx)\n", 387142051Simp end, start); 388124365Simp start = 0; 389124365Simp end = 0; 390124365Simp ok = 0; 391124365Simp } 392124365Simp if (!ok) { 393164130Sjhb device_printf(dev, "%s%srequested unsupported I/O " 394124365Simp "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n", 395164130Sjhb name, suffix, start, end, sc->iobase, sc->iolimit); 396124365Simp return (NULL); 397124365Simp } 398124365Simp if (bootverbose) 399142051Simp device_printf(dev, 400164130Sjhb "%s%srequested I/O range 0x%lx-0x%lx: in range\n", 401164130Sjhb name, suffix, start, end); 402124365Simp break; 40369783Smsmith 40469783Smsmith case SYS_RES_MEMORY: 405107546Simp ok = 0; 406107546Simp if (pcib_is_nonprefetch_open(sc)) 407124365Simp ok = ok || (start >= sc->membase && end <= sc->memlimit); 408107546Simp if (pcib_is_prefetch_open(sc)) 409124365Simp ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit); 410145652Smarcel 411145652Smarcel /* 412145652Smarcel * Make sure we allow access to VGA memory addresses when the 413145652Smarcel * bridge has the "VGA Enable" bit set. 414145652Smarcel */ 415145652Smarcel if (!ok && pci_is_vga_memory_range(start, end)) 416145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 417145652Smarcel 418124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 419124365Simp if (!ok) { 420124365Simp ok = 1; 421124365Simp if (flags & RF_PREFETCHABLE) { 422124365Simp if (pcib_is_prefetch_open(sc)) { 423124365Simp if (start < sc->pmembase) 424124365Simp start = sc->pmembase; 425124365Simp if (end > sc->pmemlimit) 426124365Simp end = sc->pmemlimit; 427124365Simp } else { 428124365Simp ok = 0; 429124365Simp } 430124365Simp } else { /* non-prefetchable */ 431124365Simp if (pcib_is_nonprefetch_open(sc)) { 432124365Simp if (start < sc->membase) 433124365Simp start = sc->membase; 434124365Simp if (end > sc->memlimit) 435124365Simp end = sc->memlimit; 436124365Simp } else { 437124365Simp ok = 0; 438124365Simp } 439124365Simp } 440107546Simp } 441107546Simp } else if (!ok) { 442124365Simp ok = 1; /* subtractive bridge: always ok */ 443128058Simp#if 1 444124365Simp if (pcib_is_nonprefetch_open(sc)) { 445124365Simp if (start < sc->membase && end > sc->memlimit) { 446124365Simp start = sc->membase; 447124365Simp end = sc->memlimit; 448124365Simp } 449124365Simp } 450124365Simp if (pcib_is_prefetch_open(sc)) { 451124365Simp if (start < sc->pmembase && end > sc->pmemlimit) { 452124365Simp start = sc->pmembase; 453124365Simp end = sc->pmemlimit; 454124365Simp } 455124365Simp } 456124641Simp#endif 457106844Smdodd } 458124365Simp if (end < start) { 459142051Simp device_printf(dev, "memory: end (%lx) < start (%lx)\n", 460142051Simp end, start); 461124365Simp start = 0; 462124365Simp end = 0; 463124365Simp ok = 0; 464124365Simp } 465124365Simp if (!ok && bootverbose) 466124365Simp device_printf(dev, 467164130Sjhb "%s%srequested unsupported memory range %#lx-%#lx " 468163805Simp "(decoding %#jx-%#jx, %#jx-%#jx)\n", 469164130Sjhb name, suffix, start, end, 470163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit, 471163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 472124365Simp if (!ok) 473124365Simp return (NULL); 474124365Simp if (bootverbose) 475164130Sjhb device_printf(dev,"%s%srequested memory range " 476142051Simp "0x%lx-0x%lx: good\n", 477164130Sjhb name, suffix, start, end); 478124365Simp break; 47969908Smsmith 48069783Smsmith default: 481124365Simp break; 48269783Smsmith } 483124365Simp /* 484124365Simp * Bridge is OK decoding this resource, so pass it up. 485124365Simp */ 486142051Simp return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 487142051Simp count, flags)); 48869783Smsmith} 48969783Smsmith 49069783Smsmith/* 49169783Smsmith * PCIB interface. 49269783Smsmith */ 493102441Sjhbint 49469783Smsmithpcib_maxslots(device_t dev) 49569783Smsmith{ 49669908Smsmith return(PCI_SLOTMAX); 49769783Smsmith} 49869783Smsmith 49969783Smsmith/* 50069783Smsmith * Since we are a child of a PCI bus, its parent must support the pcib interface. 50169783Smsmith */ 502119266Simpuint32_t 50369783Smsmithpcib_read_config(device_t dev, int b, int s, int f, int reg, int width) 50469783Smsmith{ 50569783Smsmith return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width)); 50669783Smsmith} 50769783Smsmith 508102441Sjhbvoid 509119266Simppcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width) 51069783Smsmith{ 51169783Smsmith PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width); 51269783Smsmith} 51369783Smsmith 51469783Smsmith/* 51569783Smsmith * Route an interrupt across a PCI bridge. 51669783Smsmith */ 517109229Sbennoint 51869783Smsmithpcib_route_interrupt(device_t pcib, device_t dev, int pin) 51969783Smsmith{ 52069783Smsmith device_t bus; 52169783Smsmith int parent_intpin; 52269783Smsmith int intnum; 52369783Smsmith 52469783Smsmith /* 52569783Smsmith * 52669783Smsmith * The PCI standard defines a swizzle of the child-side device/intpin to 52769783Smsmith * the parent-side intpin as follows. 52869783Smsmith * 52969783Smsmith * device = device on child bus 53069783Smsmith * child_intpin = intpin on child bus slot (0-3) 53169783Smsmith * parent_intpin = intpin on parent bus slot (0-3) 53269783Smsmith * 53369783Smsmith * parent_intpin = (device + child_intpin) % 4 53469783Smsmith */ 535115234Sticso parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4; 53669783Smsmith 53769783Smsmith /* 53869783Smsmith * Our parent is a PCI bus. Its parent must export the pcib interface 53969783Smsmith * which includes the ability to route interrupts. 54069783Smsmith */ 54169783Smsmith bus = device_get_parent(pcib); 54269783Smsmith intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 543131398Sjhb if (PCI_INTERRUPT_VALID(intnum) && bootverbose) { 544102977Sjhb device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 545102977Sjhb pci_get_slot(dev), 'A' + pin - 1, intnum); 54690554Smsmith } 54769783Smsmith return(intnum); 54869783Smsmith} 549107172Sjhb 550164264Sjhb/* Pass request to alloc MSI messages up to the parent bridge. */ 551164264Sjhbint 552164264Sjhbpcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs) 553164264Sjhb{ 554165995Sjhb struct pcib_softc *sc = device_get_softc(dev); 555164264Sjhb device_t bus; 556164264Sjhb 557165995Sjhb if (sc->flags & PCIB_DISABLE_MSI) 558165995Sjhb return (ENXIO); 559164264Sjhb bus = device_get_parent(pcib); 560164264Sjhb return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 561164264Sjhb irqs)); 562164264Sjhb} 563164264Sjhb 564164264Sjhb/* Pass request to release MSI messages up to the parent bridge. */ 565164264Sjhbint 566164264Sjhbpcib_release_msi(device_t pcib, device_t dev, int count, int *irqs) 567164264Sjhb{ 568164264Sjhb device_t bus; 569164264Sjhb 570164264Sjhb bus = device_get_parent(pcib); 571164264Sjhb return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs)); 572164264Sjhb} 573164264Sjhb 574164264Sjhb/* Pass request to alloc an MSI-X message up to the parent bridge. */ 575164264Sjhbint 576164264Sjhbpcib_alloc_msix(device_t pcib, device_t dev, int index, int *irq) 577164264Sjhb{ 578165995Sjhb struct pcib_softc *sc = device_get_softc(dev); 579164264Sjhb device_t bus; 580164264Sjhb 581165995Sjhb if (sc->flags & PCIB_DISABLE_MSI) 582165995Sjhb return (ENXIO); 583164264Sjhb bus = device_get_parent(pcib); 584164264Sjhb return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, index, irq)); 585164264Sjhb} 586164264Sjhb 587166176Sjhb/* Pass request to remap an MSI-X message up to the parent bridge. */ 588166176Sjhbint 589166176Sjhbpcib_remap_msix(device_t pcib, device_t dev, int index, int irq) 590166176Sjhb{ 591166176Sjhb device_t bus; 592166176Sjhb 593166176Sjhb bus = device_get_parent(pcib); 594166176Sjhb return (PCIB_REMAP_MSIX(device_get_parent(bus), dev, index, irq)); 595166176Sjhb} 596166176Sjhb 597164264Sjhb/* Pass request to release an MSI-X message up to the parent bridge. */ 598164264Sjhbint 599164264Sjhbpcib_release_msix(device_t pcib, device_t dev, int irq) 600164264Sjhb{ 601164264Sjhb device_t bus; 602164264Sjhb 603164264Sjhb bus = device_get_parent(pcib); 604164264Sjhb return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq)); 605164264Sjhb} 606164264Sjhb 607107172Sjhb/* 608107172Sjhb * Try to read the bus number of a host-PCI bridge using appropriate config 609107172Sjhb * registers. 610107172Sjhb */ 611107172Sjhbint 612107172Sjhbhost_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 613119266Simp uint8_t *busnum) 614107172Sjhb{ 615119266Simp uint32_t id; 616107172Sjhb 617107172Sjhb id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 618107248Sjhb if (id == 0xffffffff) 619107172Sjhb return (0); 620107172Sjhb 621107172Sjhb switch (id) { 622107172Sjhb case 0x12258086: 623107172Sjhb /* Intel 824?? */ 624107172Sjhb /* XXX This is a guess */ 625107172Sjhb /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 626107172Sjhb *busnum = bus; 627107172Sjhb break; 628107172Sjhb case 0x84c48086: 629107172Sjhb /* Intel 82454KX/GX (Orion) */ 630107172Sjhb *busnum = read_config(bus, slot, func, 0x4a, 1); 631107172Sjhb break; 632107172Sjhb case 0x84ca8086: 633107172Sjhb /* 634107172Sjhb * For the 450nx chipset, there is a whole bundle of 635107172Sjhb * things pretending to be host bridges. The MIOC will 636107172Sjhb * be seen first and isn't really a pci bridge (the 637107172Sjhb * actual busses are attached to the PXB's). We need to 638107172Sjhb * read the registers of the MIOC to figure out the 639107172Sjhb * bus numbers for the PXB channels. 640107172Sjhb * 641107172Sjhb * Since the MIOC doesn't have a pci bus attached, we 642107172Sjhb * pretend it wasn't there. 643107172Sjhb */ 644107172Sjhb return (0); 645107172Sjhb case 0x84cb8086: 646107172Sjhb switch (slot) { 647107172Sjhb case 0x12: 648107172Sjhb /* Intel 82454NX PXB#0, Bus#A */ 649107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd0, 1); 650107172Sjhb break; 651107172Sjhb case 0x13: 652107172Sjhb /* Intel 82454NX PXB#0, Bus#B */ 653107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1; 654107172Sjhb break; 655107172Sjhb case 0x14: 656107172Sjhb /* Intel 82454NX PXB#1, Bus#A */ 657107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd3, 1); 658107172Sjhb break; 659107172Sjhb case 0x15: 660107172Sjhb /* Intel 82454NX PXB#1, Bus#B */ 661107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1; 662107172Sjhb break; 663107172Sjhb } 664107172Sjhb break; 665107172Sjhb 666107172Sjhb /* ServerWorks -- vendor 0x1166 */ 667107172Sjhb case 0x00051166: 668107172Sjhb case 0x00061166: 669107172Sjhb case 0x00081166: 670107172Sjhb case 0x00091166: 671107172Sjhb case 0x00101166: 672107172Sjhb case 0x00111166: 673107172Sjhb case 0x00171166: 674107172Sjhb case 0x01011166: 675107172Sjhb case 0x010f1014: 676107172Sjhb case 0x02011166: 677107172Sjhb case 0x03021014: 678107172Sjhb *busnum = read_config(bus, slot, func, 0x44, 1); 679107172Sjhb break; 680144110Sjhb 681144110Sjhb /* Compaq/HP -- vendor 0x0e11 */ 682144110Sjhb case 0x60100e11: 683144110Sjhb *busnum = read_config(bus, slot, func, 0xc8, 1); 684144110Sjhb break; 685107172Sjhb default: 686107172Sjhb /* Don't know how to read bus number. */ 687107172Sjhb return 0; 688107172Sjhb } 689107172Sjhb 690107172Sjhb return 1; 691107172Sjhb} 692