pci_subr.c revision 124641
169783Smsmith/*- 269783Smsmith * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 369783Smsmith * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 469783Smsmith * Copyright (c) 2000 BSDi 569783Smsmith * All rights reserved. 669783Smsmith * 769783Smsmith * Redistribution and use in source and binary forms, with or without 869783Smsmith * modification, are permitted provided that the following conditions 969783Smsmith * are met: 1069783Smsmith * 1. Redistributions of source code must retain the above copyright 1169783Smsmith * notice, this list of conditions and the following disclaimer. 1269783Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1369783Smsmith * notice, this list of conditions and the following disclaimer in the 1469783Smsmith * documentation and/or other materials provided with the distribution. 1569783Smsmith * 3. The name of the author may not be used to endorse or promote products 1669783Smsmith * derived from this software without specific prior written permission. 1769783Smsmith * 1869783Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1969783Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2069783Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2169783Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2269783Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2369783Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2469783Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2569783Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2669783Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2769783Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2869783Smsmith * SUCH DAMAGE. 2969783Smsmith */ 3069783Smsmith 31119418Sobrien#include <sys/cdefs.h> 32119418Sobrien__FBSDID("$FreeBSD: head/sys/dev/pci/pci_pci.c 124641 2004-01-17 21:54:04Z imp $"); 33119418Sobrien 3469783Smsmith/* 3569783Smsmith * PCI:PCI bridge support. 3669783Smsmith */ 3769783Smsmith 3869783Smsmith#include <sys/param.h> 3969783Smsmith#include <sys/systm.h> 4069783Smsmith#include <sys/kernel.h> 4169783Smsmith#include <sys/bus.h> 42107546Simp#include <machine/bus.h> 43107546Simp#include <sys/rman.h> 44106844Smdodd#include <sys/sysctl.h> 4569783Smsmith 4669783Smsmith#include <machine/resource.h> 4769783Smsmith 48119285Simp#include <dev/pci/pcivar.h> 49119285Simp#include <dev/pci/pcireg.h> 50119285Simp#include <dev/pci/pcib_private.h> 5169783Smsmith 5269783Smsmith#include "pcib_if.h" 5369783Smsmith 5469783Smsmithstatic int pcib_probe(device_t dev); 5569783Smsmith 5669783Smsmithstatic device_method_t pcib_methods[] = { 5769783Smsmith /* Device interface */ 5869783Smsmith DEVMETHOD(device_probe, pcib_probe), 5969783Smsmith DEVMETHOD(device_attach, pcib_attach), 6069783Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 6169783Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 6269783Smsmith DEVMETHOD(device_resume, bus_generic_resume), 6369783Smsmith 6469783Smsmith /* Bus interface */ 6569783Smsmith DEVMETHOD(bus_print_child, bus_generic_print_child), 6669783Smsmith DEVMETHOD(bus_read_ivar, pcib_read_ivar), 6769783Smsmith DEVMETHOD(bus_write_ivar, pcib_write_ivar), 6869783Smsmith DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 6969783Smsmith DEVMETHOD(bus_release_resource, bus_generic_release_resource), 7069783Smsmith DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 7169783Smsmith DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 7269783Smsmith DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 7369783Smsmith DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 7469783Smsmith 7569783Smsmith /* pcib interface */ 7669783Smsmith DEVMETHOD(pcib_maxslots, pcib_maxslots), 7769783Smsmith DEVMETHOD(pcib_read_config, pcib_read_config), 7869783Smsmith DEVMETHOD(pcib_write_config, pcib_write_config), 7969783Smsmith DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt), 8069783Smsmith 8169783Smsmith { 0, 0 } 8269783Smsmith}; 8369783Smsmith 8469783Smsmithstatic driver_t pcib_driver = { 8569783Smsmith "pcib", 8669783Smsmith pcib_methods, 8769783Smsmith sizeof(struct pcib_softc), 8869783Smsmith}; 8969783Smsmith 90102441Sjhbdevclass_t pcib_devclass; 9169783Smsmith 9269783SmsmithDRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0); 9369783Smsmith 9469783Smsmith/* 9569783Smsmith * Generic device interface 9669783Smsmith */ 9769783Smsmithstatic int 9869783Smsmithpcib_probe(device_t dev) 9969783Smsmith{ 10069783Smsmith if ((pci_get_class(dev) == PCIC_BRIDGE) && 10169783Smsmith (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) { 10269783Smsmith device_set_desc(dev, "PCI-PCI bridge"); 10369783Smsmith return(-10000); 10469783Smsmith } 10569783Smsmith return(ENXIO); 10669783Smsmith} 10769783Smsmith 108102441Sjhbvoid 109102441Sjhbpcib_attach_common(device_t dev) 11069783Smsmith{ 11169783Smsmith struct pcib_softc *sc; 112119266Simp uint8_t iolow; 11369783Smsmith 11469783Smsmith sc = device_get_softc(dev); 11569783Smsmith sc->dev = dev; 11669783Smsmith 11769908Smsmith /* 11869908Smsmith * Get current bridge configuration. 11969908Smsmith */ 12069953Smsmith sc->command = pci_read_config(dev, PCIR_COMMAND, 1); 12169908Smsmith sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 12269908Smsmith sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 12369908Smsmith sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 12469908Smsmith sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 12569908Smsmith sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 12669783Smsmith 12769908Smsmith /* 12869908Smsmith * Determine current I/O decode. 12969908Smsmith */ 13069953Smsmith if (sc->command & PCIM_CMD_PORTEN) { 13169953Smsmith iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1); 13269953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 13369953Smsmith sc->iobase = PCI_PPBIOBASE(pci_read_config(dev, PCIR_IOBASEH_1, 2), 13469953Smsmith pci_read_config(dev, PCIR_IOBASEL_1, 1)); 13569953Smsmith } else { 13669953Smsmith sc->iobase = PCI_PPBIOBASE(0, pci_read_config(dev, PCIR_IOBASEL_1, 1)); 13769953Smsmith } 13869908Smsmith 13969953Smsmith iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1); 14069953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 14169953Smsmith sc->iolimit = PCI_PPBIOLIMIT(pci_read_config(dev, PCIR_IOLIMITH_1, 2), 14269953Smsmith pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 14369953Smsmith } else { 14469953Smsmith sc->iolimit = PCI_PPBIOLIMIT(0, pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 14569953Smsmith } 14669908Smsmith } 14769908Smsmith 14869908Smsmith /* 14969908Smsmith * Determine current memory decode. 15069908Smsmith */ 15169953Smsmith if (sc->command & PCIM_CMD_MEMEN) { 15269953Smsmith sc->membase = PCI_PPBMEMBASE(0, pci_read_config(dev, PCIR_MEMBASE_1, 2)); 15369953Smsmith sc->memlimit = PCI_PPBMEMLIMIT(0, pci_read_config(dev, PCIR_MEMLIMIT_1, 2)); 15469953Smsmith sc->pmembase = PCI_PPBMEMBASE((pci_addr_t)pci_read_config(dev, PCIR_PMBASEH_1, 4), 15569953Smsmith pci_read_config(dev, PCIR_PMBASEL_1, 2)); 15669953Smsmith sc->pmemlimit = PCI_PPBMEMLIMIT((pci_addr_t)pci_read_config(dev, PCIR_PMLIMITH_1, 4), 15769953Smsmith pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 15869953Smsmith } 15969908Smsmith 16069908Smsmith /* 16169908Smsmith * Quirk handling. 16269908Smsmith */ 16369908Smsmith switch (pci_get_devid(dev)) { 164124365Simp case 0x12258086: /* Intel 82454KX/GX (Orion) */ 16569908Smsmith { 166119266Simp uint8_t supbus; 16769908Smsmith 16869908Smsmith supbus = pci_read_config(dev, 0x41, 1); 16969908Smsmith if (supbus != 0xff) { 17069908Smsmith sc->secbus = supbus + 1; 17169908Smsmith sc->subbus = supbus + 1; 17269908Smsmith } 173124365Simp break; 17469908Smsmith } 175124365Simp 176124365Simp /* 177124365Simp * The i82380FB mobile docking controller is a PCI-PCI bridge, 178124365Simp * and it is a subtractive bridge. However, the ProgIf is wrong 179124365Simp * so the normal setting of PCIB_SUBTRACTIVE bit doesn't 180124365Simp * happen. There's also a Toshiba bridge that behaves this 181124365Simp * way. 182124365Simp */ 183124365Simp case 0x124b8086: /* Intel 82380FB Mobile */ 184124365Simp case 0x060513d7: /* Toshiba ???? */ 185124365Simp sc->flags |= PCIB_SUBTRACTIVE; 18669908Smsmith break; 18769908Smsmith } 18869908Smsmith 189124365Simp /* 190124365Simp * Intel 815, 845 and other chipsets say they are PCI-PCI bridges, 191124365Simp * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM, 192124365Simp * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese. 193124365Simp * This means they act as if they were subtractively decoding 194124365Simp * bridges and pass all transactions. Mark them and real ProgIf 1 195124365Simp * parts as subtractive. 196124365Simp */ 197124365Simp if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 || 198124365Simp pci_read_config(dev, PCIR_PROGIF, 1) == 1) 199124365Simp sc->flags |= PCIB_SUBTRACTIVE; 200124365Simp 20169783Smsmith if (bootverbose) { 20269783Smsmith device_printf(dev, " secondary bus %d\n", sc->secbus); 20369783Smsmith device_printf(dev, " subordinate bus %d\n", sc->subbus); 20469783Smsmith device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit); 20569783Smsmith device_printf(dev, " memory decode 0x%x-0x%x\n", sc->membase, sc->memlimit); 20669783Smsmith device_printf(dev, " prefetched decode 0x%x-0x%x\n", sc->pmembase, sc->pmemlimit); 207124365Simp if (sc->flags & PCIB_SUBTRACTIVE) 208124365Simp device_printf(dev, " Subtractively decoded bridge.\n"); 20969783Smsmith } 21069783Smsmith 21169783Smsmith /* 21269783Smsmith * XXX If the secondary bus number is zero, we should assign a bus number 21369783Smsmith * since the BIOS hasn't, then initialise the bridge. 21469783Smsmith */ 21569783Smsmith 21669783Smsmith /* 21769783Smsmith * XXX If the subordinate bus number is less than the secondary bus number, 21869783Smsmith * we should pick a better value. One sensible alternative would be to 21969783Smsmith * pick 255; the only tradeoff here is that configuration transactions 22069783Smsmith * would be more widely routed than absolutely necessary. 22169783Smsmith */ 222102441Sjhb} 22369783Smsmith 224103042Sjhbint 225102441Sjhbpcib_attach(device_t dev) 226102441Sjhb{ 227102441Sjhb struct pcib_softc *sc; 228102441Sjhb device_t child; 229102441Sjhb 230102441Sjhb pcib_attach_common(dev); 231102441Sjhb sc = device_get_softc(dev); 23269783Smsmith if (sc->secbus != 0) { 233103016Sjhb child = device_add_child(dev, "pci", sc->secbus); 23469783Smsmith if (child != NULL) 23569783Smsmith return(bus_generic_attach(dev)); 23669783Smsmith } 23769783Smsmith 23869783Smsmith /* no secondary bus; we should have fixed this */ 23969783Smsmith return(0); 24069783Smsmith} 24169783Smsmith 242102441Sjhbint 24369783Smsmithpcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 24469783Smsmith{ 24569783Smsmith struct pcib_softc *sc = device_get_softc(dev); 24669783Smsmith 24769783Smsmith switch (which) { 24869783Smsmith case PCIB_IVAR_BUS: 24969783Smsmith *result = sc->secbus; 25069783Smsmith return(0); 25169783Smsmith } 25269783Smsmith return(ENOENT); 25369783Smsmith} 25469783Smsmith 255102441Sjhbint 25669783Smsmithpcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 25769783Smsmith{ 25869783Smsmith struct pcib_softc *sc = device_get_softc(dev); 25969783Smsmith 26069783Smsmith switch (which) { 26169783Smsmith case PCIB_IVAR_BUS: 26269783Smsmith sc->secbus = value; 26369783Smsmith break; 26469783Smsmith } 26569783Smsmith return(ENOENT); 26669783Smsmith} 26769783Smsmith 26869783Smsmith/* 269107546Simp * Is the prefetch window open (eg, can we allocate memory in it?) 270107546Simp */ 271107546Simpstatic int 272107546Simppcib_is_prefetch_open(struct pcib_softc *sc) 273107546Simp{ 274124365Simp return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit); 275107546Simp} 276107546Simp 277107546Simp/* 278107546Simp * Is the nonprefetch window open (eg, can we allocate memory in it?) 279107546Simp */ 280107546Simpstatic int 281107546Simppcib_is_nonprefetch_open(struct pcib_softc *sc) 282107546Simp{ 283124365Simp return (sc->membase > 0 && sc->membase < sc->memlimit); 284107546Simp} 285107546Simp 286107546Simp/* 287107546Simp * Is the io window open (eg, can we allocate ports in it?) 288107546Simp */ 289107546Simpstatic int 290107546Simppcib_is_io_open(struct pcib_softc *sc) 291107546Simp{ 292124365Simp return (sc->iobase > 0 && sc->iobase < sc->iolimit); 293107546Simp} 294107546Simp 295107546Simp/* 29669783Smsmith * We have to trap resource allocation requests and ensure that the bridge 29769783Smsmith * is set up to, or capable of handling them. 29869783Smsmith */ 299102441Sjhbstruct resource * 30069783Smsmithpcib_alloc_resource(device_t dev, device_t child, int type, int *rid, 30169783Smsmith u_long start, u_long end, u_long count, u_int flags) 30269783Smsmith{ 303124365Simp struct pcib_softc *sc = device_get_softc(dev); 304124365Simp int ok; 30569783Smsmith 30669783Smsmith /* 30769783Smsmith * Fail the allocation for this range if it's not supported. 30869783Smsmith */ 30969783Smsmith switch (type) { 31069783Smsmith case SYS_RES_IOPORT: 311107546Simp ok = 0; 312124365Simp if (!pcib_is_io_open(sc)) 313124365Simp break; 314124365Simp ok = (start >= sc->iobase && end <= sc->iolimit); 315124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 316124365Simp if (!ok) { 317124365Simp if (start < sc->iobase) 318124365Simp start = sc->iobase; 319124365Simp if (end > sc->iolimit) 320124365Simp end = sc->iolimit; 321124365Simp } 322106844Smdodd } else { 323124365Simp ok = 1; 324124641Simp#if 0 325124365Simp if (start < sc->iobase && end > sc->iolimit) { 326124365Simp start = sc->iobase; 327124365Simp end = sc->iolimit; 328124365Simp } 329124641Simp#endif 330106844Smdodd } 331124365Simp if (end < start) { 332124365Simp device_printf(dev, "ioport: end (%lx) < start (%lx)\n", end, start); 333124365Simp start = 0; 334124365Simp end = 0; 335124365Simp ok = 0; 336124365Simp } 337124365Simp if (!ok) { 338124365Simp device_printf(dev, "device %s requested unsupported I/O " 339124365Simp "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n", 340124365Simp device_get_nameunit(child), start, end, 341124365Simp sc->iobase, sc->iolimit); 342124365Simp return (NULL); 343124365Simp } 344124365Simp if (bootverbose) 345124365Simp device_printf(dev, "device %s requested decoded I/O range 0x%lx-0x%lx\n", 346124365Simp device_get_nameunit(child), start, end); 347124365Simp break; 34869783Smsmith 34969783Smsmith case SYS_RES_MEMORY: 350107546Simp ok = 0; 351107546Simp if (pcib_is_nonprefetch_open(sc)) 352124365Simp ok = ok || (start >= sc->membase && end <= sc->memlimit); 353107546Simp if (pcib_is_prefetch_open(sc)) 354124365Simp ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit); 355124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 356124365Simp if (!ok) { 357124365Simp ok = 1; 358124365Simp if (flags & RF_PREFETCHABLE) { 359124365Simp if (pcib_is_prefetch_open(sc)) { 360124365Simp if (start < sc->pmembase) 361124365Simp start = sc->pmembase; 362124365Simp if (end > sc->pmemlimit) 363124365Simp end = sc->pmemlimit; 364124365Simp } else { 365124365Simp ok = 0; 366124365Simp } 367124365Simp } else { /* non-prefetchable */ 368124365Simp if (pcib_is_nonprefetch_open(sc)) { 369124365Simp if (start < sc->membase) 370124365Simp start = sc->membase; 371124365Simp if (end > sc->memlimit) 372124365Simp end = sc->memlimit; 373124365Simp } else { 374124365Simp ok = 0; 375124365Simp } 376124365Simp } 377107546Simp } 378107546Simp } else if (!ok) { 379124365Simp ok = 1; /* subtractive bridge: always ok */ 380124641Simp#if 0 381124365Simp if (pcib_is_nonprefetch_open(sc)) { 382124365Simp if (start < sc->membase && end > sc->memlimit) { 383124365Simp start = sc->membase; 384124365Simp end = sc->memlimit; 385124365Simp } 386124365Simp } 387124365Simp if (pcib_is_prefetch_open(sc)) { 388124365Simp if (start < sc->pmembase && end > sc->pmemlimit) { 389124365Simp start = sc->pmembase; 390124365Simp end = sc->pmemlimit; 391124365Simp } 392124365Simp } 393124641Simp#endif 394106844Smdodd } 395124365Simp if (end < start) { 396124365Simp device_printf(dev, "memory: end (%lx) < start (%lx)\n", end, start); 397124365Simp start = 0; 398124365Simp end = 0; 399124365Simp ok = 0; 400124365Simp } 401124365Simp if (!ok && bootverbose) 402124365Simp device_printf(dev, 403124365Simp "device %s requested unsupported memory range " 404124365Simp "0x%lx-0x%lx (decoding 0x%x-0x%x, 0x%x-0x%x)\n", 405124365Simp device_get_nameunit(child), start, end, 406124365Simp sc->membase, sc->memlimit, sc->pmembase, 407124365Simp sc->pmemlimit); 408124365Simp if (!ok) 409124365Simp return (NULL); 410124365Simp if (bootverbose) 411124365Simp device_printf(dev,"device %s requested decoded memory range 0x%lx-0x%lx\n", 412124365Simp device_get_nameunit(child), start, end); 413124365Simp break; 41469908Smsmith 41569783Smsmith default: 416124365Simp break; 41769783Smsmith } 418124365Simp /* 419124365Simp * Bridge is OK decoding this resource, so pass it up. 420124365Simp */ 421124365Simp return (bus_generic_alloc_resource(dev, child, type, rid, start, end, count, flags)); 42269783Smsmith} 42369783Smsmith 42469783Smsmith/* 42569783Smsmith * PCIB interface. 42669783Smsmith */ 427102441Sjhbint 42869783Smsmithpcib_maxslots(device_t dev) 42969783Smsmith{ 43069908Smsmith return(PCI_SLOTMAX); 43169783Smsmith} 43269783Smsmith 43369783Smsmith/* 43469783Smsmith * Since we are a child of a PCI bus, its parent must support the pcib interface. 43569783Smsmith */ 436119266Simpuint32_t 43769783Smsmithpcib_read_config(device_t dev, int b, int s, int f, int reg, int width) 43869783Smsmith{ 43969783Smsmith return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width)); 44069783Smsmith} 44169783Smsmith 442102441Sjhbvoid 443119266Simppcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width) 44469783Smsmith{ 44569783Smsmith PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width); 44669783Smsmith} 44769783Smsmith 44869783Smsmith/* 44969783Smsmith * Route an interrupt across a PCI bridge. 45069783Smsmith */ 451109229Sbennoint 45269783Smsmithpcib_route_interrupt(device_t pcib, device_t dev, int pin) 45369783Smsmith{ 45469783Smsmith device_t bus; 45569783Smsmith int parent_intpin; 45669783Smsmith int intnum; 45769783Smsmith 45869783Smsmith /* 45969783Smsmith * 46069783Smsmith * The PCI standard defines a swizzle of the child-side device/intpin to 46169783Smsmith * the parent-side intpin as follows. 46269783Smsmith * 46369783Smsmith * device = device on child bus 46469783Smsmith * child_intpin = intpin on child bus slot (0-3) 46569783Smsmith * parent_intpin = intpin on parent bus slot (0-3) 46669783Smsmith * 46769783Smsmith * parent_intpin = (device + child_intpin) % 4 46869783Smsmith */ 469115234Sticso parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4; 47069783Smsmith 47169783Smsmith /* 47269783Smsmith * Our parent is a PCI bus. Its parent must export the pcib interface 47369783Smsmith * which includes the ability to route interrupts. 47469783Smsmith */ 47569783Smsmith bus = device_get_parent(pcib); 47669783Smsmith intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 47790554Smsmith if (PCI_INTERRUPT_VALID(intnum)) { 478102977Sjhb device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 479102977Sjhb pci_get_slot(dev), 'A' + pin - 1, intnum); 48090554Smsmith } 48169783Smsmith return(intnum); 48269783Smsmith} 483107172Sjhb 484107172Sjhb/* 485107172Sjhb * Try to read the bus number of a host-PCI bridge using appropriate config 486107172Sjhb * registers. 487107172Sjhb */ 488107172Sjhbint 489107172Sjhbhost_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 490119266Simp uint8_t *busnum) 491107172Sjhb{ 492119266Simp uint32_t id; 493107172Sjhb 494107172Sjhb id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 495107248Sjhb if (id == 0xffffffff) 496107172Sjhb return (0); 497107172Sjhb 498107172Sjhb switch (id) { 499107172Sjhb case 0x12258086: 500107172Sjhb /* Intel 824?? */ 501107172Sjhb /* XXX This is a guess */ 502107172Sjhb /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 503107172Sjhb *busnum = bus; 504107172Sjhb break; 505107172Sjhb case 0x84c48086: 506107172Sjhb /* Intel 82454KX/GX (Orion) */ 507107172Sjhb *busnum = read_config(bus, slot, func, 0x4a, 1); 508107172Sjhb break; 509107172Sjhb case 0x84ca8086: 510107172Sjhb /* 511107172Sjhb * For the 450nx chipset, there is a whole bundle of 512107172Sjhb * things pretending to be host bridges. The MIOC will 513107172Sjhb * be seen first and isn't really a pci bridge (the 514107172Sjhb * actual busses are attached to the PXB's). We need to 515107172Sjhb * read the registers of the MIOC to figure out the 516107172Sjhb * bus numbers for the PXB channels. 517107172Sjhb * 518107172Sjhb * Since the MIOC doesn't have a pci bus attached, we 519107172Sjhb * pretend it wasn't there. 520107172Sjhb */ 521107172Sjhb return (0); 522107172Sjhb case 0x84cb8086: 523107172Sjhb switch (slot) { 524107172Sjhb case 0x12: 525107172Sjhb /* Intel 82454NX PXB#0, Bus#A */ 526107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd0, 1); 527107172Sjhb break; 528107172Sjhb case 0x13: 529107172Sjhb /* Intel 82454NX PXB#0, Bus#B */ 530107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1; 531107172Sjhb break; 532107172Sjhb case 0x14: 533107172Sjhb /* Intel 82454NX PXB#1, Bus#A */ 534107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd3, 1); 535107172Sjhb break; 536107172Sjhb case 0x15: 537107172Sjhb /* Intel 82454NX PXB#1, Bus#B */ 538107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1; 539107172Sjhb break; 540107172Sjhb } 541107172Sjhb break; 542107172Sjhb 543107172Sjhb /* ServerWorks -- vendor 0x1166 */ 544107172Sjhb case 0x00051166: 545107172Sjhb case 0x00061166: 546107172Sjhb case 0x00081166: 547107172Sjhb case 0x00091166: 548107172Sjhb case 0x00101166: 549107172Sjhb case 0x00111166: 550107172Sjhb case 0x00171166: 551107172Sjhb case 0x01011166: 552107172Sjhb case 0x010f1014: 553107172Sjhb case 0x02011166: 554107172Sjhb case 0x03021014: 555107172Sjhb *busnum = read_config(bus, slot, func, 0x44, 1); 556107172Sjhb break; 557107172Sjhb default: 558107172Sjhb /* Don't know how to read bus number. */ 559107172Sjhb return 0; 560107172Sjhb } 561107172Sjhb 562107172Sjhb return 1; 563107172Sjhb} 564