pci.c revision 9363
1/************************************************************************** 2** 3** $Id: pci.c,v 1.24 1995/06/28 15:59:04 se Exp $ 4** 5** General subroutines for the PCI bus. 6** pci_configure () 7** 8** FreeBSD 9** 10**------------------------------------------------------------------------- 11** 12** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 13** 14** Redistribution and use in source and binary forms, with or without 15** modification, are permitted provided that the following conditions 16** are met: 17** 1. Redistributions of source code must retain the above copyright 18** notice, this list of conditions and the following disclaimer. 19** 2. Redistributions in binary form must reproduce the above copyright 20** notice, this list of conditions and the following disclaimer in the 21** documentation and/or other materials provided with the distribution. 22** 3. The name of the author may not be used to endorse or promote products 23** derived from this software without specific prior written permission. 24** 25** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35** 36*************************************************************************** 37*/ 38 39#define __PCI_C__ "pl13 95/03/21" 40 41#include <pci.h> 42#if NPCI > 0 43 44/*======================================================== 45** 46** #includes and declarations 47** 48**======================================================== 49*/ 50 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/malloc.h> 54#include <sys/errno.h> 55#include <sys/kernel.h> 56#include <sys/proc.h> /* declaration of wakeup(), used by vm.h */ 57#include <sys/devconf.h> 58 59#include <machine/cpu.h> /* bootverbose */ 60 61#include <vm/vm.h> 62#include <vm/vm_param.h> 63 64#include <machine/pmap.h> 65#include <sys/devconf.h> 66 67#include <pci/pcivar.h> 68#include <pci/pcireg.h> 69#include <pci/pcibus.h> 70 71#define PCI_MAX_IRQ (16) 72 73 74/*======================================================== 75** 76** Structs and Functions 77** 78**======================================================== 79*/ 80 81struct pci_devconf { 82 struct kern_devconf pdc_kdc; 83 struct pci_info pdc_pi; 84}; 85 86struct pcicb { 87 struct pcicb *pcicb_next; 88 struct pcicb *pcicb_up; 89 struct pcicb *pcicb_down; 90 pcici_t pcicb_bridge; 91 92 u_long pcicb_seen; 93 u_char pcicb_bus; 94 u_char pcicb_subordinate; 95 u_char pcicb_flags; 96#define PCICB_ISAMEM 0x01 97 u_int pcicb_mfrom; 98 u_int pcicb_mupto; 99 u_int pcicb_mamount; 100 u_short pcicb_pfrom; 101 u_short pcicb_pupto; 102 u_short pcicb_pamount; 103 u_char pcicb_bfrom; 104 u_char pcicb_bupto; 105 106 u_long pcicb_iobase; 107 u_long pcicb_iolimit; 108 u_long pcicb_membase; 109 u_long pcicb_memlimit; 110 u_long pcicb_p_membase; 111 u_long pcicb_p_memlimit; 112}; 113 114static int 115pci_externalize (struct proc *, struct kern_devconf *, void *, size_t); 116 117static int 118pci_internalize (struct proc *, struct kern_devconf *, void *, size_t); 119 120static void 121not_supported (pcici_t tag, u_long type); 122 123static void 124pci_bus_config (void); 125 126static void 127pci_bridge_config (void); 128 129/*======================================================== 130** 131** Variables 132** 133**======================================================== 134*/ 135 136/* 137** log2 of safe burst len (in words) 138*/ 139 140unsigned pci_max_burst_len = 2; 141unsigned pci_mechanism = 0; 142unsigned pci_maxdevice = 0; 143struct pcibus* pcibus; 144 145/*-------------------------------------------------------- 146** 147** Local variables. 148** 149**-------------------------------------------------------- 150*/ 151 152static int pci_conf_count; 153static int pci_info_done; 154static struct pcicb pcibus0 = { 155 NULL, NULL, NULL, 156 { 0 }, 157 0, 0, 0, 0, 158 0, 0, 0, 0, 0, 0, 0, 0, /* real allocation */ 159 0, 0xFFFF, /* iobase/limit */ 160 0x4000000, 0xFFFFFFFFu, /* nonprefetch membase/limit */ 161 0x4000000, 0xFFFFFFFFu /* prefetch membase/limit */ 162}; 163static struct pcicb *pcicb; 164 165/*======================================================== 166** 167** pci_configure () 168** 169** Autoconfiguration of pci devices. 170** 171** May be called more than once. 172** Any device is attached only once. 173** 174** Has to take care of mirrored devices, which are 175** entailed by incomplete decoding of pci address lines. 176** 177**======================================================== 178*/ 179 180void pci_configure() 181{ 182 int i; 183 184 /* 185 ** check pci bus present 186 */ 187 188 for (i=0; i<pcibus_set.ls_length; i++) { 189 if (pci_maxdevice) break; 190 pcibus = (struct pcibus*) pcibus_set.ls_items[i]; 191 pcibus->pb_setup (); 192 } 193 if (!pci_maxdevice) return; 194 195 /* 196 ** hello world .. 197 */ 198 199 for (pcicb = &pcibus0; pcicb != NULL;) { 200 pci_bus_config (); 201 202 if (pcicb->pcicb_down) { 203 pcicb = pcicb->pcicb_down; 204 continue; 205 }; 206 207 while (pcicb && !pcicb->pcicb_next) 208 pcicb = pcicb->pcicb_up; 209 210 if (pcicb) 211 pcicb = pcicb->pcicb_next; 212 } 213 pci_conf_count++; 214} 215 216/*======================================================== 217** 218** Subroutines for configuration. 219** 220**======================================================== 221*/ 222 223static void 224pci_register_io (struct pcicb * cb, u_int base, u_int limit) 225{ 226#ifdef PCI_BRIDGE_DEBUG 227 printf ("register_io: bus=%d base=%x limit=%x\n", 228 cb->pcicb_bus, base, limit); 229#endif 230 231 if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom) 232 cb->pcicb_pfrom = base; 233 if (limit > cb->pcicb_pupto) 234 cb->pcicb_pupto = limit; 235 236 /* 237 ** XXX should set bridge io mapping here 238 ** but it can be mapped in 4k blocks only, 239 ** leading to conflicts with isa/eisa .. 240 */ 241} 242 243static void 244pci_register_memory (struct pcicb * cb, u_int base, u_int limit) 245{ 246#ifdef PCI_BRIDGE_DEBUG 247 printf ("register_mem: bus=%d base=%x limit=%x\n", 248 cb->pcicb_bus, base, limit); 249#endif 250 251 if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom) 252 cb->pcicb_mfrom = base; 253 if (limit > cb->pcicb_mupto) 254 cb->pcicb_mupto = limit; 255 /* 256 ** set the bridges mapping 257 ** 258 ** XXX should handle the 1Mb granularity. 259 */ 260 if (cb->pcicb_bridge.tag) { 261 pci_conf_write(cb->pcicb_bridge, 262 PCI_PCI_BRIDGE_MEM_REG, 263 (cb->pcicb_memlimit & 0xffff0000) | 264 (cb->pcicb_membase >> 16)); 265 printf ("\t[pci%d uses memory from %x to %x]\n", 266 cb->pcicb_bus, 267 (unsigned) cb->pcicb_membase, 268 (unsigned) cb->pcicb_memlimit); 269 } 270} 271 272/* 273** XXX This function is neither complete nor tested. 274** It's only used if the bios hasn't done it's job 275** of mapping the pci devices in the physical memory. 276*/ 277 278static u_int 279pci_memalloc (struct pcicb * cb, u_int addr, u_int size) 280{ 281 u_int result = 0, limit=0, newbase=0; 282#ifdef PCI_BRIDGE_DEBUG 283 printf ("memalloc: bus=%d addr=%x size=%x ..\n", 284 cb->pcicb_bus, addr, size); 285#endif 286 287 if (!cb) goto done; 288 289 if (!cb->pcicb_membase) { 290 printf ("memalloc: bus%d: membase not set.\n", 291 cb->pcicb_bus); 292 goto done; 293 } 294 295 /* 296 ** get upper allocation limit 297 */ 298 limit = cb->pcicb_memlimit; 299 if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit) 300 limit = cb->pcicb_mfrom-1; 301 302 /* 303 ** address fixed, and impossible to allocate ? 304 */ 305 if (addr && addr+size-1 > limit) 306 goto done; 307 308 /* 309 ** get possible address 310 */ 311 312 result = addr; 313 if (!result) result = ((limit + 1) / size - 1) * size; 314 315 /* 316 ** if not local available, request from parent. 317 */ 318 319 if (result < cb->pcicb_membase) { 320 newbase = pci_memalloc (cb->pcicb_up, result, size); 321 if (newbase) cb->pcicb_membase = result; 322 else result=0; 323 } 324done: 325 if (result) 326 pci_register_memory (cb, result, result+size-1); 327 328#ifdef PCI_BRIDGE_DEBUG 329 printf ("memalloc: bus=%d addr=%x size=%x --> %x (limit=%x).\n", 330 cb->pcicb_bus, addr, size, result, limit); 331#endif 332 333 return (result); 334} 335 336/*======================================================== 337** 338** pci_bus_config() 339** 340** Autoconfiguration of one pci bus. 341** 342**======================================================== 343*/ 344 345static void 346pci_bus_config (void) 347{ 348 u_char device; 349 u_char reg; 350 pcici_t tag, mtag; 351 pcidi_t type; 352 u_long data; 353 int unit; 354 int pciint; 355 int irq; 356 char* name=0; 357 358 int dvi; 359 struct pci_device *dvp=0; 360 361 struct pci_devconf *pdcp; 362 363 /* 364 ** first initialize the bridge (bus controller chip) 365 */ 366 pci_bridge_config (); 367 368#ifndef PCI_QUIET 369 printf ("Probing for devices on the %s%d bus:\n", 370 pcibus->pb_name, pcicb->pcicb_bus); 371 if (!pci_info_done) { 372 pci_info_done=1; 373 printf ("\tconfiguration mode %d allows %d devices.\n", 374 pci_mechanism, pci_maxdevice); 375 }; 376#endif 377 for (device=0; device<pci_maxdevice; device ++) { 378 379 if ((pcicb->pcicb_seen >> device) & 1) 380 continue; 381 382 tag = pcibus->pb_tag (pcicb->pcicb_bus, device, 0); 383 type = pcibus->pb_read (tag, PCI_ID_REG); 384 385 if ((!type) || (type==0xfffffffful)) continue; 386 387 /* 388 ** lookup device in ioconfiguration: 389 */ 390 391 for (dvi=0; dvi<pcidevice_set.ls_length; dvi++) { 392 dvp = (struct pci_device*) pcidevice_set.ls_items[dvi]; 393 if ((name=(*dvp->pd_probe)(tag, type))) 394 break; 395 dvp = NULL; 396 }; 397 398 /* 399 ** check for mirrored devices. 400 */ 401 if (device & 0x10) { 402 mtag=pcibus->pb_tag (pcicb->pcicb_bus, 403 (u_char)(device & ~0x10), 0); 404 } else if (device & 0x08) { 405 mtag=pcibus->pb_tag (pcicb->pcicb_bus, 406 (u_char)(device & ~0x08), 0); 407 } else goto real_device; 408 409 if (type!=pcibus->pb_read (mtag, PCI_ID_REG)) 410 goto real_device; 411 412 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) 413 if (pcibus->pb_read(tag,reg)!=pcibus->pb_read(mtag,reg)) 414 goto real_device; 415 416#ifndef PCI_QUIET 417 if (dvp==NULL) continue; 418 printf ("%s? <%s> mirrored on pci%d:%d\n", 419 dvp->pd_name, name, pcicb->pcicb_bus, device); 420#endif 421 continue; 422 423 real_device: 424 425 if (dvp==NULL) { 426#ifndef PCI_QUIET 427 if (pci_conf_count) 428 continue; 429 printf("%s%d:%d: ", pcibus->pb_name, 430 pcicb->pcicb_bus, device); 431 not_supported (tag, type); 432#endif 433 continue; 434 }; 435 436 pcicb->pcicb_seen |= (1ul << device); 437 /* 438 ** Get and increment the unit. 439 */ 440 441 unit = (*dvp->pd_count)++; 442 443 /* 444 ** ignore device ? 445 */ 446 447 if (!*name) continue; 448 449 /* 450 ** Announce this device 451 */ 452 453 printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name, 454 (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff); 455 456 /* 457 ** Get the int pin number (pci interrupt number a-d) 458 ** from the pci configuration space. 459 */ 460 461 data = pcibus->pb_read (tag, PCI_INTERRUPT_REG); 462 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 463 464 if (pciint) { 465 466 printf (" int %c irq ", 0x60+pciint); 467 468 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 469 470 /* 471 ** If it's zero, the isa irq number is unknown, 472 ** and we cannot bind the pci interrupt. 473 */ 474 475 if (irq) 476 printf ("%d", irq); 477 else 478 printf ("??"); 479 }; 480 481 printf (" on pci%d:%d\n", pcicb->pcicb_bus, device); 482 483 /* 484 ** Read the current mapping, 485 ** and update the pcicb fields. 486 */ 487 488 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) { 489 u_int map, addr, size; 490 491 data = pci_conf_read(tag, PCI_CLASS_REG); 492 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 493 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 494 continue; 495 }; 496 497 map = pcibus->pb_read (tag, reg); 498 if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK)) 499 continue; 500 501 pcibus->pb_write (tag, reg, 0xffffffff); 502 data = pcibus->pb_read (tag, reg); 503 pcibus->pb_write (tag, reg, map); 504 505 switch (data & 7) { 506 507 default: 508 continue; 509 case 1: 510 case 5: 511 size = -(data & PCI_MAP_IO_ADDRESS_MASK); 512 addr = map & PCI_MAP_IO_ADDRESS_MASK; 513 514 pci_register_io (pcicb, addr, addr+size-1); 515 pcicb->pcicb_pamount += size; 516 break; 517 518 case 0: 519 case 2: 520 case 4: 521 size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 522 addr = map & PCI_MAP_MEMORY_ADDRESS_MASK; 523 if (addr >= 0x100000) { 524 pci_register_memory 525 (pcicb, addr, addr+size-1); 526 pcicb->pcicb_mamount += size; 527 } else { 528 pcicb->pcicb_flags |= PCICB_ISAMEM; 529 }; 530 break; 531 }; 532 if (!bootverbose) 533 continue; 534 printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n", 535 reg, map&7, addr, size); 536 }; 537 538 /* 539 ** Allocate a devconf structure 540 ** We should, and eventually will, set the 541 ** parent pointer to a pci bus devconf structure, 542 ** and arrange to set the state field dynamically. 543 */ 544 545 pdcp = (struct pci_devconf *) 546 malloc (sizeof (struct pci_devconf),M_DEVBUF,M_WAITOK); 547 bzero(pdcp, sizeof(struct pci_devconf)); 548 549 pdcp -> pdc_pi.pi_bus = pcicb->pcicb_bus; 550 pdcp -> pdc_pi.pi_device = device; 551 552 pdcp -> pdc_kdc.kdc_name = dvp->pd_name; 553 pdcp -> pdc_kdc.kdc_unit = unit; 554 555 pdcp -> pdc_kdc.kdc_md.mddc_devtype = MDDT_PCI; 556 557 pdcp -> pdc_kdc.kdc_externalize = pci_externalize; 558 pdcp -> pdc_kdc.kdc_internalize = pci_internalize; 559 560 pdcp -> pdc_kdc.kdc_datalen = PCI_EXTERNAL_LEN; 561 pdcp -> pdc_kdc.kdc_parentdata = &pdcp->pdc_pi; 562 pdcp -> pdc_kdc.kdc_state = DC_UNKNOWN; 563 pdcp -> pdc_kdc.kdc_description = name; 564 pdcp -> pdc_kdc.kdc_shutdown = dvp->pd_shutdown; 565 566 /* 567 ** And register this device 568 */ 569 570 dev_attach (&pdcp->pdc_kdc); 571 572 /* 573 ** attach device 574 ** may produce additional log messages, 575 ** i.e. when installing subdevices. 576 */ 577 578 (*dvp->pd_attach) (tag, unit); 579 580 /* 581 ** Special processing of certain classes 582 */ 583 584 data = pci_conf_read(tag, PCI_CLASS_REG); 585 586 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 587 struct pcicb *this, **link; 588 unsigned char primary, secondary, subordinate; 589 u_int command; 590 591 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 592 593 /* 594 ** get current configuration of the bridge. 595 */ 596 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 597 primary = PCI_PRIMARY_BUS_EXTRACT (data); 598 secondary = PCI_SECONDARY_BUS_EXTRACT(data); 599 subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data); 600#ifndef PCI_QUIET 601 printf ("\tbridge from pci%d to pci%d through %d.\n", 602 primary, secondary, subordinate); 603 printf ("\tmapping regs: io:%08x mem:%08x pmem:%08x", 604 pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG), 605 pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG), 606 pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG)); 607#endif 608 /* 609 ** check for uninitialized bridge. 610 */ 611 if (secondary == 0 || secondary < primary || 612 pcicb->pcicb_bus != primary) 613 { 614 printf ("\tINCORRECTLY or NEVER CONFIGURED.\n"); 615 /* 616 ** disable this bridge 617 */ 618 pcibus->pb_write (tag, PCI_COMMAND_STATUS_REG, 619 0xffff0000); 620 secondary = 0; 621 subordinate = 0; 622 }; 623 624 /* 625 ** allocate bus descriptor for bus behind the bridge 626 */ 627 link = &pcicb->pcicb_down; 628 while (*link) link = &(*link)->pcicb_next; 629 630 this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK); 631 632 /* 633 ** Initialize this descriptor so far. 634 ** (the initialization is completed just before 635 ** scanning the bus behind the bridge. 636 */ 637 bzero (this, sizeof(*this)); 638 this->pcicb_up = pcicb; 639 this->pcicb_bridge = tag; 640 this->pcicb_bus = secondary; 641 this->pcicb_subordinate = subordinate; 642 643 command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG); 644 645 if (command & PCI_COMMAND_IO_ENABLE){ 646 /* 647 ** Bridge was configured by the bios. 648 ** Read out the mapped io region. 649 */ 650 u_int reg, data, mask; 651 652 reg = pci_conf_read (tag, 653 PCI_PCI_BRIDGE_IO_REG); 654 pci_conf_write(tag, 655 PCI_PCI_BRIDGE_IO_REG, 0xFFFF); 656 data = pci_conf_read (tag, 657 PCI_PCI_BRIDGE_IO_REG); 658 pci_conf_write(tag, 659 PCI_PCI_BRIDGE_IO_REG, reg & 0xffff); 660 661 mask = (0xFF00 ^ (data & 0xFF00)) | 0xFF; 662 663 this->pcicb_iobase = 664 PCI_PPB_IOBASE_EXTRACT (reg); 665 this->pcicb_iolimit = 666 PCI_PPB_IOLIMIT_EXTRACT(reg) | mask; 667 668 /* 669 ** Note the used io space. 670 */ 671 pci_register_io (pcicb, this->pcicb_iobase, 672 this->pcicb_iolimit); 673 674 }; 675 676 if (command & PCI_COMMAND_MEM_ENABLE) { 677 /* 678 ** Bridge was configured by the bios. 679 ** Read out the mapped memory regions. 680 */ 681 u_int reg, data, mask; 682 683 /* 684 ** non prefetchable memory 685 */ 686 reg = pci_conf_read (tag, 687 PCI_PCI_BRIDGE_MEM_REG); 688 pci_conf_write(tag, 689 PCI_PCI_BRIDGE_MEM_REG, 0xFFFFFFFF); 690 data = pci_conf_read (tag, 691 PCI_PCI_BRIDGE_MEM_REG); 692 pci_conf_write(tag, 693 PCI_PCI_BRIDGE_MEM_REG, reg); 694 695 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 696 this->pcicb_membase = 697 PCI_PPB_MEMBASE_EXTRACT (reg); 698 this->pcicb_memlimit = 699 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 700 701 /* 702 ** Register used memory space. 703 */ 704 pci_register_memory (pcicb, 705 this->pcicb_membase, 706 this->pcicb_memlimit); 707 708 /* 709 ** prefetchable memory 710 */ 711 reg = pci_conf_read (tag, 712 PCI_PCI_BRIDGE_PMEM_REG); 713 pci_conf_write(tag, 714 PCI_PCI_BRIDGE_PMEM_REG, 0xFFFFFFFF); 715 data = pci_conf_read (tag, 716 PCI_PCI_BRIDGE_PMEM_REG); 717 pci_conf_write(tag, 718 PCI_PCI_BRIDGE_PMEM_REG, reg); 719 720 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 721 this->pcicb_p_membase= 722 PCI_PPB_MEMBASE_EXTRACT (reg); 723 this->pcicb_p_memlimit= 724 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 725 726 /* 727 ** Register used memory space. 728 */ 729 pci_register_memory (pcicb, 730 this->pcicb_p_membase, 731 this->pcicb_p_memlimit); 732 } 733 734 /* 735 ** Link it in chain. 736 */ 737 *link=this; 738 739 /* 740 ** Update mapping info of parent bus. 741 */ 742 if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom) 743 pcicb->pcicb_bfrom = secondary; 744 if (subordinate > pcicb->pcicb_bupto) 745 pcicb->pcicb_bupto = subordinate; 746 747 break; 748 } 749 } 750 751#ifndef PCI_QUIET 752 if (pcicb->pcicb_mamount) 753 printf ("%s%d: uses %d bytes of memory from %x upto %x.\n", 754 pcibus->pb_name, pcicb->pcicb_bus, 755 pcicb->pcicb_mamount, 756 pcicb->pcicb_mfrom, pcicb->pcicb_mupto); 757 if (pcicb->pcicb_pamount) 758 printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n", 759 pcibus->pb_name, pcicb->pcicb_bus, 760 pcicb->pcicb_pamount, 761 pcicb->pcicb_pfrom, pcicb->pcicb_pupto); 762 if (pcicb->pcicb_bfrom) 763 printf ("%s%d: subordinate busses from %x upto %x.\n", 764 pcibus->pb_name, pcicb->pcicb_bus, 765 pcicb->pcicb_bfrom, pcicb->pcicb_bupto); 766#endif 767} 768 769/*======================================================== 770** 771** pci_bridge_config() 772** 773** Configuration of a pci bridge. 774** 775**======================================================== 776*/ 777 778static void 779pci_bridge_config (void) 780{ 781 pcici_t tag; 782 struct pcicb* parent; 783 784 tag = pcicb->pcicb_bridge; 785 if (!tag.tag) return; 786 787 if (!pcicb->pcicb_bus) { 788 u_int data; 789 /* 790 ** Get the lowest available bus number. 791 */ 792 pcicb->pcicb_bus = ++pcibus0.pcicb_subordinate; 793 794 /* 795 ** and configure the bridge 796 */ 797 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 798 data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus); 799 data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus); 800 data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus); 801 pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data); 802 803 /* 804 ** Propagate the new upper bus number limit. 805 */ 806 for (parent = pcicb->pcicb_up; parent != NULL; 807 parent = parent->pcicb_up) 808 { 809 if (parent->pcicb_subordinate >= pcicb->pcicb_bus) 810 continue; 811 parent->pcicb_subordinate = pcicb->pcicb_bus; 812 if (!parent->pcicb_bridge.tag) 813 continue; 814 data = pci_conf_read 815 (parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG); 816 data = PCI_SUBORDINATE_BUS_INSERT 817 (data, pcicb->pcicb_bus); 818 pci_conf_write (parent->pcicb_bridge, 819 PCI_PCI_BRIDGE_BUS_REG, data); 820 } 821 } 822 823 if (!pcicb->pcicb_membase) { 824 u_int size = 0x100000; 825 pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size); 826 if (pcicb->pcicb_membase) 827 pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1; 828 } 829} 830/*----------------------------------------------------------------- 831** 832** The following functions are provided for the device driver 833** to read/write the configuration space. 834** 835** pci_conf_read(): 836** Read a long word from the pci configuration space. 837** Requires a tag (from pcitag) and the register 838** number (should be a long word alligned one). 839** 840** pci_conf_write(): 841** Writes a long word to the pci configuration space. 842** Requires a tag (from pcitag), the register number 843** (should be a long word alligned one), and a value. 844** 845**----------------------------------------------------------------- 846*/ 847 848u_long 849pci_conf_read (pcici_t tag, u_long reg) 850{ 851 return (pcibus->pb_read (tag, reg)); 852} 853 854void 855pci_conf_write (pcici_t tag, u_long reg, u_long data) 856{ 857 pcibus->pb_write (tag, reg, data); 858} 859 860/*----------------------------------------------------------------------- 861** 862** Map device into port space. 863** 864** Actually the device should have been mapped by the bios. 865** This function only reads and verifies the value. 866** 867** PCI-Specification: 6.2.5.1: address maps 868** 869**----------------------------------------------------------------------- 870*/ 871 872int pci_map_port (pcici_t tag, u_long reg, u_short* pa) 873{ 874 unsigned data, ioaddr, iosize; 875 struct pcicb *link = pcicb; 876 877 /* 878 ** sanity check 879 */ 880 881 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 882 printf ("pci_map_port failed: bad register=0x%x\n", 883 (unsigned)reg); 884 return (0); 885 }; 886 887 /*if (pcicb->pcicb_flags & PCICB_NOIOSET) { 888 printf ("pci_map_port failed: pci%d has not been configured for I/O access\n", 889 pcicb->pcicb_bus); 890 return (0); 891 }*/ 892 893 /* 894 ** get size and type of port 895 ** 896 ** type is in the lowest two bits. 897 ** If device requires 2^n bytes, the next 898 ** n-2 bits are hardwired as 0. 899 */ 900 901 ioaddr = pcibus->pb_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK; 902 if (!ioaddr || ioaddr > 0xfffful) { 903 printf ("pci_map_port failed: not configured by bios.\n"); 904 return (0); 905 }; 906 907 pcibus->pb_write (tag, reg, 0xfffffffful); 908 data = pcibus->pb_read (tag, reg); 909 pcibus->pb_write (tag, reg, ioaddr); 910 911 if ((data & 0x03) != PCI_MAP_IO) { 912 printf ("pci_map_port failed: bad port type=0x%x\n", 913 (unsigned) data); 914 return (0); 915 }; 916 iosize = -(data & PCI_MAP_IO_ADDRESS_MASK); 917 if (ioaddr < pcicb->pcicb_iobase 918 || ioaddr + iosize > pcicb->pcicb_iolimit) { 919 printf ("pci_map_port failed: device's iorange 0x%x-0x%x " 920 "is incompatible with its bridge's range 0x%x-0x%x\n", 921 (unsigned) ioaddr, (unsigned) ioaddr + iosize - 1, 922 (unsigned) pcicb->pcicb_iobase, 923 (unsigned) pcicb->pcicb_iolimit); 924 return (0); 925 } 926 927#ifndef PCI_QUIET 928 printf ("\treg%d: ioaddr=0x%x size=0x%x\n", 929 (unsigned) reg, (unsigned) ioaddr, (unsigned) iosize); 930#endif 931 /* 932 ** set the configuration register of and 933 ** return the address to the driver. 934 ** Make sure to enable each upstream bridge 935 ** so I/O and DMA can go all the way. 936 */ 937 938 for (;;) { 939 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 940 data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 941 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 942 if ((link = link->pcicb_up) == NULL) 943 break; 944 tag = link->pcicb_bridge; 945 } 946 947 *pa = ioaddr; 948 949 return (1); 950} 951 952/*----------------------------------------------------------------------- 953** 954** Map device into virtual and physical space 955** 956** Actually the device should have been mapped by the bios. 957** This function only reads and verifies the value. 958** 959** PCI-Specification: 6.2.5.1: address maps 960** 961**----------------------------------------------------------------------- 962*/ 963 964int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa) 965{ 966 struct pcicb *link = pcicb; 967 unsigned data ,paddr; 968 vm_size_t psize, poffs; 969 vm_offset_t vaddr; 970 971 /* 972 ** sanity check 973 */ 974 975 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 976 printf ("pci_map_mem failed: bad register=0x%x\n", 977 (unsigned)reg); 978 return (0); 979 }; 980 981 /* 982 ** save old mapping, get size and type of memory 983 ** 984 ** type is in the lowest four bits. 985 ** If device requires 2^n bytes, the next 986 ** n-4 bits are read as 0. 987 */ 988 989 paddr = pcibus->pb_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK; 990 pcibus->pb_write (tag, reg, 0xfffffffful); 991 data = pcibus->pb_read (tag, reg); 992 pcibus->pb_write (tag, reg, paddr); 993 994 /* 995 ** check the type 996 */ 997 998 if ((data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT) { 999 printf ("pci_map_mem failed: bad memory type=0x%x\n", 1000 (unsigned) data); 1001 return (0); 1002 }; 1003 1004 /* 1005 ** get the size. 1006 */ 1007 1008 psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 1009 1010 if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) { 1011 paddr = pci_memalloc (pcicb, 0, psize); 1012 if (!paddr) { 1013 printf ("pci_map_mem: not configured by bios.\n"); 1014 return (0); 1015 }; 1016 pci_register_memory (pcicb, paddr, paddr+psize-1); 1017 }; 1018 1019 if (paddr < pcicb->pcicb_membase || 1020 paddr + psize - 1 > pcicb->pcicb_memlimit) { 1021 printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is " 1022 "incompatible with its bridge's memrange 0x%x-0x%x\n", 1023 (unsigned) paddr, 1024 (unsigned) (paddr + psize - 1), 1025 (unsigned) pcicb->pcicb_membase, 1026 (unsigned) pcicb->pcicb_memlimit); 1027/* return (0);*/ 1028/* ACHTUNG: Ist der Code richtig, wenn eine PCI-PCI-Bridge fuer 1029 * die PCI-Slots verwendet wird, aber die Onboard-Devices direkt 1030 * an der CPU-PCI-Bridge haengen (Siehe Compaq Prolinea Problem) ??? 1031 */ 1032 } 1033 pcibus->pb_write (tag, reg, paddr); 1034 1035 /* 1036 ** Truncate paddr to page boundary. 1037 ** (Or does pmap_mapdev the job?) 1038 */ 1039 1040 poffs = paddr - trunc_page (paddr); 1041 vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs); 1042 1043 if (!vaddr) return (0); 1044 1045 vaddr += poffs; 1046 1047#ifndef PCI_QUIET 1048 /* 1049 ** display values. 1050 */ 1051 1052 printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n", 1053 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize); 1054#endif 1055 /* 1056 ** set the configuration register and 1057 ** return the address to the driver 1058 ** Make sure to enable each upstream bridge 1059 ** so memory and DMA can go all the way. 1060 */ 1061 1062 for (;;) { 1063 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1064 data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1065 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 1066 if ((link = link->pcicb_up) == NULL) 1067 break; 1068 tag = link->pcicb_bridge; 1069 } 1070 1071 *va = vaddr; 1072 *pa = paddr; 1073 1074 return (1); 1075} 1076 1077/*------------------------------------------------------------ 1078** 1079** Interface functions for the devconf module. 1080** 1081**------------------------------------------------------------ 1082*/ 1083 1084static int 1085pci_externalize (struct proc *p, struct kern_devconf *kdcp, void *u, size_t l) 1086{ 1087 struct pci_externalize_buffer buffer; 1088 struct pci_info * pip = kdcp->kdc_parentdata; 1089 pcici_t tag; 1090 int i; 1091 1092 if (l < sizeof buffer) { 1093 return ENOMEM; 1094 }; 1095 1096 tag = pcibus->pb_tag (pip->pi_bus, pip->pi_device, 0); 1097 1098 buffer.peb_pci_info = *pip; 1099 1100 for (i=0; i<PCI_EXT_CONF_LEN; i++) { 1101 buffer.peb_config[i] = pcibus->pb_read (tag, i*4); 1102 }; 1103 1104 return copyout(&buffer, u, sizeof buffer); 1105} 1106 1107 1108static int 1109pci_internalize (struct proc *p, struct kern_devconf *kdcp, void *u, size_t s) 1110{ 1111 return EOPNOTSUPP; 1112} 1113 1114/*----------------------------------------------------------------------- 1115** 1116** Pci meta interrupt handler 1117** 1118** This handler assumes level triggered interrupts. 1119** It's possible to build a kernel which handles shared 1120** edge triggered interrupts by the options "PCI_EDGE_INT". 1121** But there is a performance penalty. 1122** 1123** (Of course you can delete the #ifdef PCI_EDGE_INT bracketed 1124** code at all :-) :-) :-) 1125** 1126**----------------------------------------------------------------------- 1127*/ 1128 1129struct pci_int_desc* 1130 pci_int_desc [PCI_MAX_IRQ]; 1131 1132#ifndef NO_SHARED_IRQ 1133 1134static inline unsigned 1135splq (unsigned mask) 1136{ 1137 unsigned temp=cpl; 1138 cpl |= mask; 1139 return temp; 1140} 1141 1142static void 1143pci_int (int irq) 1144{ 1145 struct pci_int_desc * p; 1146 int c, s; 1147#ifdef PCI_EDGE_INT 1148 int i, n; 1149#endif 1150 if (irq<0 || irq >= PCI_MAX_IRQ) { 1151 printf ("pci_int(%d)\n", irq); 1152 return; 1153 }; 1154 1155#ifdef PCI_EDGE_INT 1156 for (i=0; i<1000; i++) { 1157 n = 0; 1158#endif 1159 for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) { 1160 s = splq (*p->pcid_maskptr); 1161 c= (*p->pcid_handler) (p->pcid_argument); 1162 p-> pcid_tally += c; 1163 splx (s); 1164#ifdef PCI_EDGE_INT 1165 n += c; 1166#endif 1167#if 0 1168 if (c && p->pcid_tally<20) 1169 printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n", 1170 irq, p->pcid_handler, s, cpl, c); 1171#endif 1172 }; 1173#ifdef PCI_EDGE_INT 1174 if (!n) return; 1175 }; 1176 printf ("pci_int(%d): permanent interrupt request.\n", irq); 1177#endif 1178} 1179#endif 1180 1181/*----------------------------------------------------------------------- 1182** 1183** Auxiliary function for interrupt (un)mapping. 1184** 1185**----------------------------------------------------------------------- 1186*/ 1187 1188static u_int 1189getirq (pcici_t tag) 1190{ 1191 u_int irq; 1192 1193 irq = PCI_INTERRUPT_LINE_EXTRACT( 1194 pcibus->pb_read (tag, PCI_INTERRUPT_REG)); 1195 1196 if (irq <= 0) { 1197 printf ("\tint line register not set by bios\n"); 1198 return (0); 1199 } 1200 1201 if (irq >= pcibus->pb_maxirq || irq >= PCI_MAX_IRQ) { 1202 printf ("\tirq %d invalid.\n", irq); 1203 return (0); 1204 } 1205 1206 return (irq); 1207} 1208 1209static struct pci_int_desc ** 1210getintdescbytag (u_int irq, pcici_t tag) 1211{ 1212 struct pci_int_desc *p, **pp; 1213 1214 pp=&pci_int_desc[irq]; 1215 while (((p=*pp)) && !sametag(p->pcid_tag,tag)) 1216 pp=&p->pcid_next; 1217 1218 if (!p) return (NULL); 1219 1220 return (pp); 1221} 1222 1223static struct pci_int_desc * 1224getintdescbymptr (u_int irq, unsigned * mptr) 1225{ 1226 struct pci_int_desc *p; 1227 1228 for (p=pci_int_desc[irq];p;p=p->pcid_next) 1229 if (p->pcid_maskptr == mptr) break; 1230 return (p); 1231} 1232 1233/*----------------------------------------------------------------------- 1234** 1235** Map pci interrupt. 1236** 1237**----------------------------------------------------------------------- 1238*/ 1239 1240static unsigned pci_mask0 = 0; 1241 1242int pci_map_int (pcici_t tag, int(*func)(), void* arg, unsigned* maskptr) 1243{ 1244 u_int irq; 1245 int result, oldspl; 1246 unsigned mask; 1247 struct pci_int_desc *tail, *mdp=NULL, *new=NULL; 1248 1249 /* 1250 ** Get irq line from configuration space, 1251 ** and check for consistency. 1252 */ 1253 1254 irq = getirq (tag); 1255 if (irq >= PCI_MAX_IRQ) { 1256 printf ("\tillegal irq %d.\n", irq); 1257 return (0); 1258 }; 1259 mask= 1ul << irq; 1260 1261 /* 1262 ** disable this interrupt. 1263 */ 1264 1265 oldspl = splq (mask); 1266 1267 /* 1268 ** If handler for this tag already installed, 1269 ** remove it first. 1270 */ 1271 1272 if (getintdescbytag (irq, tag) != NULL) 1273 pci_unmap_int (tag); 1274 1275 /* 1276 ** If this irq not yet included in the mask, include it. 1277 */ 1278 1279 mdp = getintdescbymptr (irq, maskptr); 1280 if (!mdp) { 1281 result = pcibus->pb_imaskinc (irq, maskptr); 1282 if (result) 1283 goto conflict; 1284 }; 1285 1286 /* 1287 ** Allocate descriptor and initialize it. 1288 */ 1289 1290 tail = pci_int_desc[irq]; 1291 1292 new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK); 1293 bzero (new, sizeof (*new)); 1294 1295 new->pcid_next = tail; 1296 new->pcid_tag = tag; 1297 new->pcid_handler = func; 1298 new->pcid_argument = arg; 1299 new->pcid_maskptr = maskptr; 1300 new->pcid_tally = 0; 1301 new->pcid_mask = mask; 1302 1303 /* 1304 ** If first handler: install it. 1305 ** If second handler: install shared-int-handler. 1306 */ 1307 1308 if (!tail) { 1309 /* 1310 ** first handler for this irq. 1311 */ 1312 1313 result = pcibus->pb_iattach 1314 (irq, (void(*)()) func, (int) arg, maskptr); 1315 if (result) goto conflict; 1316 1317#ifdef NO_SHARED_IRQ 1318 } else goto conflict; 1319#else 1320 } else if (!tail->pcid_next) { 1321 /* 1322 ** Second handler for this irq. 1323 */ 1324 1325 printf ("\tusing shared irq %d.\n", irq); 1326 1327 /* 1328 ** replace old handler by shared-int-handler. 1329 */ 1330 1331 result = pcibus->pb_idetach (irq,(void(*)())tail->pcid_handler); 1332 if (result) 1333 printf ("\tCANNOT DETACH INT HANDLER.\n"); 1334 1335 result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0); 1336 if (result) { 1337 printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n"); 1338 goto fail; 1339 }; 1340 } 1341#endif 1342 /* 1343 ** Link new descriptor, reenable ints and done. 1344 */ 1345 1346 pci_int_desc[irq] = new; 1347 splx (oldspl); 1348 return (1); 1349 1350 /* 1351 ** Handle some problems. 1352 */ 1353 1354conflict: 1355 printf ("\tirq %d already in use.\n", irq); 1356fail: 1357 /* 1358 ** If descriptor allocated, free it. 1359 ** If included in mask, remove it. 1360 */ 1361 1362 if (free) free (new, M_DEVBUF); 1363 if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr); 1364 splx (oldspl); 1365 return (0); 1366} 1367 1368/*----------------------------------------------------------------------- 1369** 1370** Unmap pci interrupt. 1371** 1372**----------------------------------------------------------------------- 1373*/ 1374 1375int pci_unmap_int (pcici_t tag) 1376{ 1377 int result, oldspl; 1378 struct pci_int_desc *this, **hook, *tail; 1379 unsigned irq; 1380 1381 /* 1382 ** Get irq line from configuration space, 1383 ** and check for consistency. 1384 */ 1385 1386 irq = getirq (tag); 1387 if (irq >= PCI_MAX_IRQ) { 1388 printf ("\tillegal irq %d.\n", irq); 1389 return (0); 1390 }; 1391 1392 /* 1393 ** Search and unlink interrupt descriptor. 1394 */ 1395 1396 hook = getintdescbytag (irq, tag); 1397 if (hook == NULL) { 1398 printf ("\tno irq %d handler for pci %x\n", 1399 irq, tag.tag); 1400 return (0); 1401 }; 1402 1403 this = *hook; 1404 *hook= this->pcid_next; 1405 1406 /* 1407 ** Message 1408 */ 1409 1410 printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n", 1411 irq, this->pcid_handler, this->pcid_argument, 1412 this->pcid_tag.tag, this->pcid_tally); 1413 1414 /* 1415 ** If this irq no longer included in the mask, remove it. 1416 */ 1417 1418 if (!getintdescbymptr (irq, this->pcid_maskptr)) 1419 (void) pcibus->pb_imaskexc (irq, this->pcid_maskptr); 1420 1421 tail = pci_int_desc[irq]; 1422 1423 if (tail == NULL) { 1424 1425 /* 1426 ** Remove the old handler. 1427 */ 1428 1429 result = pcibus->pb_idetach (irq,(void(*)())this->pcid_handler); 1430 if (result) 1431 printf ("\tirq %d: cannot remove handler.\n", irq); 1432 1433 } else if (tail->pcid_next == NULL) { 1434 1435 /* 1436 ** Remove the shared int handler. 1437 ** Install the last remaining handler. 1438 */ 1439 1440 oldspl = splq (1ul << irq); 1441 1442 result = pcibus->pb_idetach (irq, pci_int); 1443 if (result) 1444 printf ("\tirq %d: cannot remove handler.\n", irq); 1445 1446 result = pcibus->pb_iattach (irq, 1447 (void(*)()) tail->pcid_handler, 1448 (int) tail->pcid_argument, 1449 tail->pcid_maskptr); 1450 1451 if (result) 1452 printf ("\tirq %d: cannot install handler.\n", irq); 1453 1454 splx (oldspl); 1455 }; 1456 1457 free (this, M_DEVBUF); 1458 return (1); 1459} 1460 1461/*----------------------------------------------------------- 1462** 1463** Display of unknown devices. 1464** 1465**----------------------------------------------------------- 1466*/ 1467struct vt { 1468 u_short ident; 1469 char* name; 1470}; 1471 1472static struct vt VendorTable[] = { 1473/* {0x0e11, "? 0x0e11"},*/ 1474 {0x1002, "ATI TECHNOLOGIES INC"}, 1475 {0x1011, "DIGITAL EQUIPMENT CORPORATION"}, 1476 {0x101A, "NCR"}, 1477 {0x1022, "AMD"}, 1478 {0x102B, "MATROX"}, 1479/* {0x1039, "? 0x1039"},*/ 1480 {0x1045, "OPTI"}, 1481/* {0x1095, "? 0x1095"},*/ 1482 {0x5333, "S3 INC."}, 1483 {0x8086, "INTEL CORPORATION"}, 1484 {0,0} 1485}; 1486 1487static const char *const majclasses[] = { 1488 "old", "storage", "network", "display", 1489 "multimedia", "memory", "bridge" 1490}; 1491 1492void not_supported (pcici_t tag, u_long type) 1493{ 1494 u_char reg; 1495 u_long data; 1496 struct vt * vp; 1497 1498 /* 1499 ** lookup the names. 1500 */ 1501 1502 for (vp=VendorTable; vp->ident; vp++) 1503 if (vp->ident == (type & 0xffff)) 1504 break; 1505 1506 /* 1507 ** and display them. 1508 */ 1509 1510 if (vp->ident) printf (vp->name); 1511 else printf ("vendor=0x%lx", type & 0xffff); 1512 1513 printf (", device=0x%lx", type >> 16); 1514 1515 data = (pcibus->pb_read(tag, PCI_CLASS_REG) >> 24) & 0xff; 1516 if (data < sizeof(majclasses) / sizeof(majclasses[0])) 1517 printf(", class=%s", majclasses[data]); 1518 1519 printf (" [no driver assigned]\n"); 1520 1521 for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) { 1522 data = pcibus->pb_read (tag, reg); 1523 if ((data&~7)==0) continue; 1524 switch (data&7) { 1525 1526 case 1: 1527 case 5: 1528 printf (" map(%x): io(%lx)\n", 1529 reg, data & ~3); 1530 break; 1531 case 0: 1532 printf (" map(%x): mem32(%lx)\n", 1533 reg, data & ~7); 1534 break; 1535 case 2: 1536 printf (" map(%x): mem20(%lx)\n", 1537 reg, data & ~7); 1538 break; 1539 case 4: 1540 printf (" map(%x): mem64(%lx)\n", 1541 reg, data & ~7); 1542 break; 1543 } 1544 } 1545} 1546#endif /* NPCI */ 1547