pci.c revision 24280
138451Smsmith/**************************************************************************
238451Smsmith**
338451Smsmith**  $Id: pci.c,v 1.66 1997/02/22 09:44:11 peter Exp $
438451Smsmith**
538451Smsmith**  General subroutines for the PCI bus.
638451Smsmith**  pci_configure ()
738451Smsmith**
838451Smsmith**  FreeBSD
938451Smsmith**
1038451Smsmith**-------------------------------------------------------------------------
1138451Smsmith**
1238451Smsmith** Copyright (c) 1994 Wolfgang Stanglmeier.  All rights reserved.
1338451Smsmith**
1438451Smsmith** Redistribution and use in source and binary forms, with or without
1538451Smsmith** modification, are permitted provided that the following conditions
1638451Smsmith** are met:
1738451Smsmith** 1. Redistributions of source code must retain the above copyright
1838451Smsmith**    notice, this list of conditions and the following disclaimer.
1938451Smsmith** 2. Redistributions in binary form must reproduce the above copyright
2038451Smsmith**    notice, this list of conditions and the following disclaimer in the
2138451Smsmith**    documentation and/or other materials provided with the distribution.
2238451Smsmith** 3. The name of the author may not be used to endorse or promote products
2338451Smsmith**    derived from this software without specific prior written permission.
2438451Smsmith**
2538451Smsmith** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
2638451Smsmith** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
2738451Smsmith** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
2838451Smsmith** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2938451Smsmith** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3038451Smsmith** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
3138451Smsmith** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
3238451Smsmith** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3338451Smsmith** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3438451Smsmith** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3538451Smsmith**
3684221Sdillon***************************************************************************
3784221Sdillon*/
3884221Sdillon
3965400Speter#include "pci.h"
4038451Smsmith#if NPCI > 0
4138451Smsmith
4238451Smsmith/*========================================================
4338451Smsmith**
4438451Smsmith**	#includes  and  declarations
4538451Smsmith**
4638451Smsmith**========================================================
4738451Smsmith*/
4838451Smsmith
4938451Smsmith#include <sys/param.h>
5038451Smsmith#include <sys/systm.h>
5138451Smsmith#include <sys/malloc.h>
5238451Smsmith#include <sys/errno.h>
5338451Smsmith#include <sys/kernel.h>
5438451Smsmith#include <sys/proc.h> /* declaration of wakeup(), used by vm.h */
5538451Smsmith#include <sys/conf.h>
5638451Smsmith#ifdef DEVFS
5738451Smsmith#include <sys/devfsext.h>
5892913Sobrien#endif /* DEVFS */
5938451Smsmith#include <sys/fcntl.h>
6038451Smsmith
6138451Smsmith#include <vm/vm.h>
6238451Smsmith#include <vm/vm_param.h>
6338451Smsmith#include <vm/pmap.h>
6438451Smsmith
6538451Smsmith
6638451Smsmith#include <i386/isa/isa_device.h>	/* XXX inthand2_t */
6738451Smsmith
6838451Smsmith#include <pci/pcivar.h>
6938451Smsmith#include <pci/pcireg.h>
7038451Smsmith#include <pci/pcibus.h>
7138451Smsmith#include <pci/pci_ioctl.h>
7238451Smsmith
7338451Smsmith#define PCI_MAX_IRQ	(16)
7438451Smsmith
75
76/*========================================================
77**
78**	Structs and Functions
79**
80**========================================================
81*/
82
83struct pcicb {
84	struct pcicb   *pcicb_next;
85	struct pcicb   *pcicb_up;
86	struct pcicb   *pcicb_down;
87	pcici_t 	pcicb_bridge;
88
89	u_char		pcicb_bus;
90	u_char		pcicb_subordinate;
91	u_int		pcicb_mfrom;
92	u_int		pcicb_mupto;
93	u_int		pcicb_mamount;
94	u_short		pcicb_pfrom;
95	u_short		pcicb_pupto;
96	u_short		pcicb_pamount;
97	u_char		pcicb_bfrom;
98	u_char		pcicb_bupto;
99
100	u_long		pcicb_iobase;
101	u_long		pcicb_iolimit;
102	u_long		pcicb_membase;
103	u_long		pcicb_memlimit;
104	u_long		pcicb_p_membase;
105	u_long		pcicb_p_memlimit;
106};
107
108struct pci_lkm {
109	struct pci_device *dvp;
110	struct pci_lkm	*next;
111};
112
113static void
114not_supported (pcici_t tag, u_long type);
115
116static void
117pci_bus_config (void);
118
119static void
120pci_rescan (void);
121
122static void pci_attach (int bus, int dev, int func,
123			struct pci_device *dvp, const char *name);
124
125static int
126pci_bridge_config (void);
127
128static int
129pci_mfdev (int bus, int device);
130
131static void pci_remember (int bus, int dev, int func, struct pci_device *dvp);
132
133/*========================================================
134**
135**	Variables
136**
137**========================================================
138*/
139
140/*
141**      log2 of safe burst len (in words)
142*/
143
144unsigned pci_max_burst_len = 3; /* 2=16Byte, 3=32Byte, 4=64Byte, ... */
145unsigned pci_mechanism     = 0;
146unsigned pci_maxdevice     = 0;
147unsigned pciroots          = 0; /* XXX pcisupport.c increments this
148				 * for the Orion host to PCI bridge
149				 * UGLY hack ... :( Will be changed :)
150				 */
151/*--------------------------------------------------------
152**
153**	Local variables.
154**
155**--------------------------------------------------------
156*/
157
158static	struct pcibus	*pcibus;
159
160static	int		pci_conf_count;
161static	int		pci_info_done;
162static	int		pcibusmax;
163static	struct pcicb	*pcicb;
164
165static	struct pci_conf *pci_dev_list;
166static	unsigned	pci_dev_list_count;
167static	unsigned	pci_dev_list_size;
168
169static	struct pci_lkm	*pci_lkm_head;
170
171/*-----------------------------------------------------------------
172**
173**	The following functions are provided for the device driver
174**	to read/write the configuration space.
175**
176**	pci_conf_read():
177**		Read a long word from the pci configuration space.
178**		Requires a tag (from pcitag) and the register
179**		number (should be a long word alligned one).
180**
181**	pci_conf_write():
182**		Writes a long word to the pci configuration space.
183**		Requires a tag (from pcitag), the register number
184**		(should be a long word alligned one), and a value.
185**
186**-----------------------------------------------------------------
187*/
188
189u_long
190pci_conf_read  (pcici_t tag, u_long reg)
191{
192    return (pcibus->pb_read (tag, reg));
193}
194
195void
196pci_conf_write (pcici_t tag, u_long reg, u_long data)
197{
198    pcibus->pb_write (tag, reg, data);
199}
200
201/*========================================================
202**
203**	Subroutines for configuration.
204**
205**========================================================
206*/
207
208static void
209pci_register_io (struct pcicb * cb, u_int base, u_int limit)
210{
211#ifdef PCI_BRIDGE_DEBUG
212	if (bootverbose)
213		printf ("register_io:  bus=%d base=%x limit=%x\n",
214			cb->pcicb_bus, base, limit);
215#endif
216
217	if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom)
218		cb->pcicb_pfrom = base;
219	if (limit > cb->pcicb_pupto)
220		cb->pcicb_pupto = limit;
221
222	/*
223	**	XXX should set bridge io mapping here
224	**	but it can be mapped in 4k blocks only,
225	**	leading to conflicts with isa/eisa ..
226	*/
227}
228
229static void
230pci_register_memory (struct pcicb * cb, u_int base, u_int limit)
231{
232#ifdef PCI_BRIDGE_DEBUG
233	if (bootverbose)
234		printf ("register_mem: bus=%d base=%x limit=%x\n",
235			cb->pcicb_bus, base, limit);
236#endif
237
238	if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom)
239		cb->pcicb_mfrom = base;
240	if (limit > cb->pcicb_mupto)
241		cb->pcicb_mupto = limit;
242	/*
243	**	set the bridges mapping
244	**
245	**	XXX should handle the 1Mb granularity.
246	*/
247	if (cb->pcicb_bridge.tag) {
248		pci_conf_write(cb->pcicb_bridge,
249			PCI_PCI_BRIDGE_MEM_REG,
250			(cb->pcicb_memlimit & 0xffff0000) |
251			(cb->pcicb_membase >> 16));
252		if (bootverbose)
253			printf ("\t[pci%d uses memory from %x to %x]\n",
254				cb->pcicb_bus,
255				(unsigned) cb->pcicb_membase,
256				(unsigned) cb->pcicb_memlimit);
257	}
258}
259
260/*
261**	XXX This function is neither complete nor tested.
262**	It's only used if the bios hasn't done it's job
263**	of mapping the pci devices in the physical memory.
264*/
265
266static u_int
267pci_memalloc (struct pcicb * cb, u_int addr, u_int size)
268{
269	u_int result = 0, limit=0, newbase=0;
270#ifdef PCI_BRIDGE_DEBUG
271	if (bootverbose)
272		printf ("memalloc:  bus=%d addr=%x size=%x ..\n",
273			cb->pcicb_bus, addr, size);
274#endif
275
276	if (!cb) goto done;
277
278	if (!cb->pcicb_membase) {
279		printf ("memalloc: bus%d: membase not set.\n",
280			cb->pcicb_bus);
281		goto done;
282	}
283
284	/*
285	**	get upper allocation limit
286	*/
287	limit = cb->pcicb_memlimit;
288	if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit)
289		limit  = cb->pcicb_mfrom-1;
290
291	/*
292	**	address fixed, and impossible to allocate ?
293	*/
294	if (addr && addr+size-1 > limit)
295		goto done;
296
297	/*
298	**	get possible address
299	*/
300
301	result = addr;
302	if (!result) result = ((limit + 1) / size - 1) * size;
303
304	/*
305	**	if not local available, request from parent.
306	*/
307
308	if (result < cb->pcicb_membase) {
309		newbase = pci_memalloc (cb->pcicb_up, result, size);
310		if (newbase) cb->pcicb_membase = result;
311		else result=0;
312	}
313done:
314	if (result)
315		pci_register_memory (cb, result, result+size-1);
316
317#ifdef PCI_BRIDGE_DEBUG
318	printf ("memalloc:  bus=%d addr=%x size=%x --> %x (limit=%x).\n",
319		cb->pcicb_bus, addr, size, result, limit);
320#endif
321
322	return (result);
323}
324
325/*========================================================
326**
327**	pci_bridge_config()
328**
329**	Configuration of a pci bridge.
330**
331**========================================================
332*/
333
334static int
335pci_bridge_config (void)
336{
337	pcici_t tag;
338	struct pcicb* parent;
339
340	tag = pcicb->pcicb_bridge;
341	if (tag.tag) {
342
343	    if (!pcicb->pcicb_bus) {
344		u_int data;
345		/*
346		**	Get the lowest available bus number.
347		*/
348		pcicb->pcicb_bus = ++pcibusmax;
349
350		/*
351		**	and configure the bridge
352		*/
353		data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG);
354		data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus);
355		data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus);
356		data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus);
357		pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data);
358
359		/*
360		**	Propagate the new upper bus number limit.
361		*/
362		for (parent = pcicb->pcicb_up; parent != NULL;
363			parent = parent->pcicb_up)
364		{
365			if (parent->pcicb_subordinate >= pcicb->pcicb_bus)
366				continue;
367			parent->pcicb_subordinate = pcicb->pcicb_bus;
368			if (!parent->pcicb_bridge.tag)
369				continue;
370			data = pci_conf_read
371				(parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG);
372			data = PCI_SUBORDINATE_BUS_INSERT
373				(data, pcicb->pcicb_bus);
374			pci_conf_write (parent->pcicb_bridge,
375				PCI_PCI_BRIDGE_BUS_REG, data);
376		}
377	    }
378
379	    if (!pcicb->pcicb_membase) {
380		u_int size = 0x100000;
381		pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size);
382		if (pcicb->pcicb_membase)
383			pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1;
384	    }
385	}
386	return pcicb->pcicb_bus;
387}
388
389/*========================================================
390**
391**	pci_attach()
392**
393**	Attach one device
394**
395**========================================================
396*/
397
398static void pci_attach (int bus, int dev, int func,
399			struct pci_device *dvp, const char *name)
400{
401	u_long  data;
402	int     unit;
403	u_char	reg;
404	u_char	pciint;
405	int	irq;
406	pcici_t	tag = pcibus->pb_tag (bus, dev, func);
407
408	/*
409	**	Get and increment the unit.
410	*/
411
412	unit = (*dvp->pd_count)++;
413
414	/*
415	**	Announce this device
416	*/
417
418	printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name,
419		(unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff);
420
421	/*
422	**	Get the int pin number (pci interrupt number a-d)
423	**	from the pci configuration space.
424	*/
425
426	data = pci_conf_read (tag, PCI_INTERRUPT_REG);
427	pciint = PCI_INTERRUPT_PIN_EXTRACT(data);
428
429	if (pciint) {
430
431		printf (" int %c irq ", 0x60+pciint);
432
433		irq = PCI_INTERRUPT_LINE_EXTRACT(data);
434
435		/*
436		**	If it's zero, the isa irq number is unknown,
437		**	and we cannot bind the pci interrupt.
438		*/
439
440		if (irq && (irq != 0xff))
441			printf ("%d", irq);
442		else
443			printf ("??");
444	};
445
446	printf (" on pci%d:%d:%d\n", bus, dev, func);
447
448	/*
449	**	Read the current mapping,
450	**	and update the pcicb fields.
451	*/
452
453	for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) {
454		u_int map, addr, size;
455
456		data = pci_conf_read(tag, PCI_CLASS_REG);
457		switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) {
458		case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI:
459			continue;
460		};
461
462		map = pci_conf_read (tag, reg);
463		if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK))
464			continue;
465
466		pci_conf_write (tag, reg, 0xffffffff);
467		data = pci_conf_read (tag, reg);
468		pci_conf_write (tag, reg, map);
469
470		switch (data & 7) {
471
472		default:
473			continue;
474		case 1:
475		case 5:
476			addr = map & PCI_MAP_IO_ADDRESS_MASK;
477			size = -(data & PCI_MAP_IO_ADDRESS_MASK);
478			size &= ~(addr ^ -addr);
479
480			pci_register_io (pcicb, addr, addr+size-1);
481			pcicb->pcicb_pamount += size;
482			break;
483
484		case 0:
485		case 2:
486		case 4:
487			size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK);
488			addr = map & PCI_MAP_MEMORY_ADDRESS_MASK;
489			if (addr >= 0x100000) {
490				pci_register_memory (pcicb, addr, addr+size-1);
491				pcicb->pcicb_mamount += size;
492			};
493			break;
494		};
495		if (bootverbose)
496			printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n",
497				reg, map&7, addr, size);
498	};
499
500	/*
501	**	attach device
502	**	may produce additional log messages,
503	**	i.e. when installing subdevices.
504	*/
505
506	(*dvp->pd_attach) (tag, unit);
507
508	/*
509	**	Special processing of certain classes
510	*/
511
512	data = pci_conf_read(tag, PCI_CLASS_REG);
513
514	switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) {
515		struct pcicb *this, **link;
516		unsigned char primary, secondary, subordinate;
517		u_int command;
518
519	case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI:
520
521		/*
522		**	get current configuration of the bridge.
523		*/
524		data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG);
525		primary     = PCI_PRIMARY_BUS_EXTRACT  (data);
526		secondary   = PCI_SECONDARY_BUS_EXTRACT(data);
527		subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data);
528#ifndef PCI_QUIET
529		if (bootverbose) {
530			printf ("\tbridge from pci%d to pci%d through %d.\n",
531				primary, secondary, subordinate);
532			printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx\n",
533				pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG),
534				pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG),
535				pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG));
536		}
537#endif
538		/*
539		**	check for uninitialized bridge.
540		*/
541		if (!(primary < secondary
542		      && secondary <= subordinate
543		      && bus == primary)) {
544
545			printf ("\tINCORRECTLY or NEVER CONFIGURED.\n");
546			/*
547			**	disable this bridge
548			*/
549			pci_conf_write (tag, PCI_COMMAND_STATUS_REG, 0xffff0000);
550			secondary   = 0;
551			subordinate = 0;
552		};
553
554		/*
555		**  allocate bus descriptor for bus behind the bridge
556		*/
557		link = &pcicb->pcicb_down;
558		while (*link && (*link)->pcicb_bus < secondary)
559			link = &(*link)->pcicb_next;
560
561		this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK);
562
563		/*
564		**	Initialize this descriptor so far.
565		**	(the initialization is completed just before
566		**	scanning the bus behind the bridge.
567		*/
568		bzero (this, sizeof(*this));
569		this->pcicb_next        = *link;
570		this->pcicb_up		= pcicb;
571		this->pcicb_bridge      = tag;
572		this->pcicb_bus 	= secondary;
573		this->pcicb_subordinate = subordinate;
574
575		command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG);
576
577		if (command & PCI_COMMAND_IO_ENABLE){
578			/*
579			**	Bridge was configured by the bios.
580			**	Read out the mapped io region.
581			*/
582			unsigned reg;
583
584			reg = pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG);
585			this->pcicb_iobase  = PCI_PPB_IOBASE_EXTRACT (reg);
586			this->pcicb_iolimit = PCI_PPB_IOLIMIT_EXTRACT(reg);
587
588			/*
589			**	Note the used io space.
590			*/
591			pci_register_io (pcicb, this->pcicb_iobase,
592					 this->pcicb_iolimit);
593
594		};
595
596		if (command & PCI_COMMAND_MEM_ENABLE) {
597			/*
598			**	Bridge was configured by the bios.
599			**	Read out the mapped memory regions.
600			*/
601			unsigned reg;
602
603			/*
604			**	non prefetchable memory
605			*/
606			reg = pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG);
607			this->pcicb_membase  = PCI_PPB_MEMBASE_EXTRACT (reg);
608			this->pcicb_memlimit = PCI_PPB_MEMLIMIT_EXTRACT(reg);
609
610			/*
611			**	Register used memory space.
612			*/
613			pci_register_memory (pcicb,
614					     this->pcicb_membase,
615					     this->pcicb_memlimit);
616
617			/*
618			**	prefetchable memory
619			*/
620			reg = pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG);
621			this->pcicb_p_membase  = PCI_PPB_MEMBASE_EXTRACT (reg);
622			this->pcicb_p_memlimit = PCI_PPB_MEMLIMIT_EXTRACT(reg);
623
624			/*
625			**	Register used memory space.
626			*/
627			pci_register_memory (pcicb,
628					     this->pcicb_p_membase,
629					     this->pcicb_p_memlimit);
630		}
631
632		/*
633		**	Link it in chain.
634		*/
635		*link=this;
636
637		/*
638		**	Update mapping info of parent bus.
639		*/
640		if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom)
641			pcicb->pcicb_bfrom = secondary;
642		if (subordinate > pcicb->pcicb_bupto)
643			pcicb->pcicb_bupto = subordinate;
644	}
645}
646
647/*========================================================
648**
649**	pci_bus_config()
650**
651**	Autoconfiguration of one pci bus.
652**
653**========================================================
654*/
655
656static int
657pci_mfdev (int bus, int device)
658{
659    pcici_t tag0,tag1;
660    unsigned pci_id0, pci_id1;
661
662    /*
663    ** Detect a multi-function device that complies to the PCI 2.0 spec
664    */
665    tag0 = pcibus->pb_tag  (bus, device, 0);
666    if (pci_conf_read (tag0, PCI_HEADER_MISC) & PCI_HEADER_MULTIFUNCTION)
667	return 1;
668
669    /*
670    ** Well, as always: Theory and implementation of PCI ...
671    **
672    ** If there is a valid device ID returned for function 1 AND
673    **		the device ID of function 0 and 1 is different OR
674    **		the first mapping register of 0 and 1 differs,
675    ** then assume a multi-function device anyway ...
676    **
677    ** Example of such a broken device: ISA and IDE chip i83371FB (Triton)
678    */
679    tag1 = pcibus->pb_tag  (bus, device, 1);
680    pci_id1 = pci_conf_read (tag1, PCI_ID_REG);
681
682    if (pci_id1 != 0xffffffff) {
683
684	pci_id0 = pci_conf_read (tag0, PCI_ID_REG);
685
686	if (pci_id0 != pci_id1)
687	    return 1;
688
689	if (pci_conf_read (tag0, PCI_MAP_REG_START)
690			!= pci_conf_read (tag1, PCI_MAP_REG_START))
691	    return 1;
692    }
693    return 0;
694}
695
696static void
697pci_bus_config (void)
698{
699	int	bus_no;
700	u_char  device;
701	u_char	reg;
702	pcici_t tag, mtag;
703	pcidi_t type;
704
705	struct	pci_device *dvp;
706
707	/*
708	**	first initialize the bridge (bus controller chip)
709	*/
710	bus_no = pci_bridge_config ();
711
712	printf ("Probing for devices on PCI bus %d:\n", bus_no);
713#ifndef PCI_QUIET
714	if (bootverbose && !pci_info_done) {
715		pci_info_done=1;
716		printf ("\tconfiguration mode %d allows %d devices.\n",
717			pci_mechanism, pci_maxdevice);
718	};
719#endif
720	for (device=0; device<pci_maxdevice; device ++) {
721	    char *name = NULL;
722	    struct pci_device **dvpp;
723	    int func, maxfunc = 0;
724
725	    for (func=0; func <= maxfunc; func++) {
726		tag  = pcibus->pb_tag  (bus_no, device, func);
727		type = pci_conf_read (tag, PCI_ID_REG);
728
729		if ((!type) || (type==0xfffffffful)) continue;
730
731		/*
732		**	lookup device in ioconfiguration:
733		*/
734
735		dvpp = (struct pci_device **)pcidevice_set.ls_items;
736
737		while (dvp = *dvpp++) {
738			if (dvp->pd_probe) {
739				if (name=(*dvp->pd_probe)(tag, type))
740					break;
741			}
742		};
743		/*
744		**	check for mirrored devices.
745		*/
746		if (func != 0) {
747			goto real_device;
748		}
749		if (device & 0x10) {
750			mtag=pcibus->pb_tag (bus_no,
751				(u_char)(device & ~0x10), 0);
752		} else if (device & 0x08) {
753			mtag=pcibus->pb_tag (bus_no,
754				(u_char)(device & ~0x08), 0);
755		} else goto real_device;
756
757		if (type!=pci_conf_read (mtag, PCI_ID_REG))
758			goto real_device;
759
760		for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4)
761			if (pci_conf_read(tag,reg)!=pci_conf_read(mtag,reg))
762				goto real_device;
763
764#ifndef PCI_QUIET
765		if (dvp==NULL) continue;
766		if (bootverbose)
767			printf ("%s? <%s> mirrored on pci%d:%d\n",
768				dvp->pd_name, name, bus_no, device);
769#endif
770		continue;
771
772	real_device:
773
774#ifndef PCI_QUIET
775#ifdef PCI_BRIDGE_DEBUG
776		if (bootverbose) {
777		    printf ("\tconfig header: 0x%08x 0x%08x 0x%08x 0x%08x\n",
778			    pci_conf_read (tag, 0),
779			    pci_conf_read (tag, 4),
780			    pci_conf_read (tag, 8),
781			    pci_conf_read (tag, 12));
782		}
783#endif
784#endif
785
786		if (func == 0 && pci_mfdev (bus_no, device)) {
787			maxfunc = 7;
788		}
789
790		pci_remember(bus_no, device, func, dvp);
791
792		if (dvp==NULL) {
793#ifndef PCI_QUIET
794			if (pci_conf_count)
795				continue;
796
797			if (maxfunc == 0)
798				printf("%s%d:%d:    ",
799				       pcibus->pb_name, bus_no, device);
800			else
801				printf("%s%d:%d:%d: ",
802				       pcibus->pb_name, bus_no, device, func);
803			not_supported (tag, type);
804#endif
805			continue;
806		};
807
808		if (*name) {
809			pci_attach (bus_no, device, func, dvp, name);
810		}
811	    }
812	}
813
814#ifndef PCI_QUIET
815	if (bootverbose) {
816	    if (pcicb->pcicb_mamount)
817		printf ("%s%d: uses %d bytes of memory from %x upto %x.\n",
818			pcibus->pb_name, bus_no,
819			pcicb->pcicb_mamount,
820			pcicb->pcicb_mfrom, pcicb->pcicb_mupto);
821	    if (pcicb->pcicb_pamount)
822		printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n",
823			pcibus->pb_name, bus_no,
824			pcicb->pcicb_pamount,
825			pcicb->pcicb_pfrom, pcicb->pcicb_pupto);
826	    if (pcicb->pcicb_bfrom)
827		printf ("%s%d: subordinate busses from %x upto %x.\n",
828			pcibus->pb_name, bus_no,
829			pcicb->pcicb_bfrom, pcicb->pcicb_bupto);
830	}
831#endif
832}
833
834/*========================================================
835**
836**	pci_configure ()
837**
838**      Autoconfiguration of pci devices.
839**
840**      Has to take care of mirrored devices, which are
841**      entailed by incomplete decoding of pci address lines.
842**
843**========================================================
844*/
845
846void pci_configure()
847{
848	struct pcibus **pbp = (struct pcibus**) pcibus_set.ls_items;
849
850	/*
851	**	check pci bus present
852	*/
853
854	while (!pci_maxdevice && (pcibus = *pbp++)) {
855		(*pcibus->pb_setup)();
856	}
857
858	if (!pci_maxdevice) return;
859
860	/*
861	**	hello world ..
862	*/
863
864	pciroots = 1;
865	while (pciroots--) {
866
867		pcicb = malloc (sizeof (struct pcicb), M_DEVBUF, M_WAITOK);
868		if (pcicb == NULL) {
869			return;
870		}
871		bzero (pcicb, sizeof (struct pcicb));
872		pcicb->pcicb_bus	= pcibusmax;
873		pcicb->pcicb_iolimit	= 0xffff;
874		pcicb->pcicb_membase	= 0x02000000;
875		pcicb->pcicb_p_membase	= 0x02000000;
876		pcicb->pcicb_memlimit	= 0xffffffff;
877		pcicb->pcicb_p_memlimit	= 0xffffffff;
878
879		while (pcicb != NULL) {
880			pci_bus_config ();
881
882			if (pcibusmax < pcicb->pcicb_bus)
883				(pcibusmax = pcicb->pcicb_bus);
884
885			if (pcicb->pcicb_down) {
886				pcicb = pcicb->pcicb_down;
887				continue;
888			};
889
890			while (pcicb && !pcicb->pcicb_next)
891				pcicb = pcicb->pcicb_up;
892
893			if (pcicb)
894				pcicb = pcicb->pcicb_next;
895		}
896		pcibusmax++;
897	}
898	pci_conf_count++;
899}
900
901/*========================================================
902**
903**	pci_rescan ()
904**
905**      try to find lkm driver for device
906**
907**      May be called more than once.
908**      Any device is attached only once.
909**
910**========================================================
911*/
912
913static void pci_rescan()
914{
915	int i;
916	for (i = 0; i < pci_dev_list_count; i++)
917	{
918		struct pci_lkm *lkm;
919		pcici_t tag;
920		struct pci_device *dvp;
921		pcidi_t type = pci_dev_list[i].pc_devid;
922		char *name = NULL;
923		int bus, dev, func;
924
925		if (pci_dev_list[i].pc_dvp)
926			continue;
927
928		bus = pci_dev_list[i].pc_sel.pc_bus;
929		dev = pci_dev_list[i].pc_sel.pc_dev;
930		func = pci_dev_list[i].pc_sel.pc_func;
931
932		tag = pcibus->pb_tag (bus, dev, func);
933
934		for (lkm  = pci_lkm_head; lkm; lkm = lkm->next) {
935			dvp = lkm->dvp;
936			if (name=(*dvp->pd_probe)(tag, type))
937				break;
938		}
939		if (name && *name) {
940			pcicb = pci_dev_list[i].pc_cb;
941			pci_attach (bus, dev, func, dvp, name);
942			pci_dev_list[i].pc_dvp = dvp;
943		}
944	}
945}
946
947/*========================================================
948**
949**	pci_register_lkm ()
950**
951**      Add LKM PCI driver's struct pci_device to pci_lkm chain
952**
953**========================================================
954*/
955
956int pci_register_lkm (struct pci_device *dvp, int if_revision)
957{
958	struct pci_lkm *lkm;
959
960	if (if_revision != 0) {
961		return -1;
962	}
963
964	if (!dvp || !dvp->pd_probe || !dvp->pd_attach) {
965		return -1;
966	}
967
968	lkm = malloc (sizeof (*lkm), M_DEVBUF, M_WAITOK);
969	if (!lkm) {
970		return -1;
971	}
972
973	lkm->dvp = dvp;
974	lkm->next = pci_lkm_head;
975	pci_lkm_head = lkm;
976	pci_rescan();
977	return 0;
978}
979
980/*-----------------------------------------------------------------------
981**
982**	Map device into port space.
983**
984**	Actually the device should have been mapped by the bios.
985**	This function only reads and verifies the value.
986**
987**	PCI-Specification:  6.2.5.1: address maps
988**
989**-----------------------------------------------------------------------
990*/
991
992int pci_map_port (pcici_t tag, u_long reg, u_short* pa)
993{
994	unsigned data, ioaddr, iosize;
995	struct pcicb *link = pcicb;
996
997	/*
998	**	sanity check
999	*/
1000
1001	if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) {
1002		printf ("pci_map_port failed: bad register=0x%x\n",
1003			(unsigned)reg);
1004		return (0);
1005	};
1006
1007	/*
1008	**	get size and type of port
1009	**
1010	**	type is in the lowest two bits.
1011	**	If device requires 2^n bytes, the next
1012	**	n-2 bits are hardwired as 0.
1013	*/
1014
1015	ioaddr = pci_conf_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK;
1016	if (!ioaddr) {
1017		printf ("pci_map_port failed: not configured by bios.\n");
1018		return (0);
1019	};
1020
1021	pci_conf_write (tag, reg, 0xfffffffful);
1022	data = pci_conf_read (tag, reg);
1023	pci_conf_write (tag, reg, ioaddr);
1024
1025	if ((data & 0x03) != PCI_MAP_IO) {
1026		printf ("pci_map_port failed: bad port type=0x%x\n",
1027			(unsigned) data);
1028		return (0);
1029	};
1030	iosize = -(data &  PCI_MAP_IO_ADDRESS_MASK);
1031	iosize &= ~(ioaddr ^ -ioaddr);
1032	if (ioaddr < pcicb->pcicb_iobase
1033		|| ioaddr + iosize -1 > pcicb->pcicb_iolimit) {
1034		printf ("pci_map_port failed: device's iorange 0x%x-0x%x "
1035			"is incompatible with its bridge's range 0x%x-0x%x\n",
1036			(unsigned) ioaddr, (unsigned) ioaddr + iosize - 1,
1037			(unsigned) pcicb->pcicb_iobase,
1038			(unsigned) pcicb->pcicb_iolimit);
1039		return (0);
1040	}
1041
1042#ifndef PCI_QUIET
1043	if (bootverbose)
1044		printf ("\treg%d: ioaddr=0x%x size=0x%x\n",
1045			(unsigned) reg, (unsigned) ioaddr, (unsigned) iosize);
1046#endif
1047	/*
1048	**	set the configuration register of and
1049	**      return the address to the driver.
1050	**	Make sure to enable each upstream bridge
1051	**	so I/O and DMA can go all the way.
1052	*/
1053
1054	for (;;) {
1055		data =	pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff;
1056		data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
1057		(void)	pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data);
1058		if ((link = link->pcicb_up) == NULL)
1059			break;
1060		tag = link->pcicb_bridge;
1061	}
1062
1063	*pa = ioaddr;
1064
1065	return (1);
1066}
1067
1068/*-----------------------------------------------------------------------
1069**
1070**	Map device into virtual and physical space
1071**
1072**	Actually the device should have been mapped by the bios.
1073**	This function only reads and verifies the value.
1074**
1075**      PCI-Specification:  6.2.5.1: address maps
1076**
1077**-----------------------------------------------------------------------
1078*/
1079
1080int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa)
1081{
1082	struct pcicb *link = pcicb;
1083	unsigned    data ,paddr;
1084	vm_size_t   psize, poffs;
1085	vm_offset_t vaddr;
1086
1087	/*
1088	**	sanity check
1089	*/
1090
1091	if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) {
1092		printf ("pci_map_mem failed: bad register=0x%x\n",
1093			(unsigned)reg);
1094		return (0);
1095	};
1096
1097	/*
1098	**	save old mapping, get size and type of memory
1099	**
1100	**	type is in the lowest four bits.
1101	**	If device requires 2^n bytes, the next
1102	**	n-4 bits are read as 0.
1103	*/
1104
1105	paddr = pci_conf_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK;
1106	pci_conf_write (tag, reg, 0xfffffffful);
1107	data = pci_conf_read (tag, reg);
1108	pci_conf_write (tag, reg, paddr);
1109
1110	/*
1111	**	check the type
1112	*/
1113
1114	if (!((data & PCI_MAP_MEMORY_TYPE_MASK) == PCI_MAP_MEMORY_TYPE_32BIT_1M
1115	      && (paddr & ~0xfffff) == 0)
1116	    && (data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT){
1117		printf ("pci_map_mem failed: bad memory type=0x%x\n",
1118			(unsigned) data);
1119		return (0);
1120	};
1121
1122	/*
1123	**	get the size.
1124	*/
1125
1126	psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK);
1127
1128	if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) {
1129		paddr = pci_memalloc (pcicb, 0, psize);
1130		if (!paddr) {
1131			printf ("pci_map_mem: not configured by bios.\n");
1132			return (0);
1133		};
1134		pci_register_memory (pcicb, paddr, paddr+psize-1);
1135	};
1136
1137	if (paddr < pcicb->pcicb_membase ||
1138		paddr + psize - 1 > pcicb->pcicb_memlimit) {
1139		printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is "
1140			"incompatible with its bridge's memrange 0x%x-0x%x\n",
1141			(unsigned) paddr,
1142			(unsigned) (paddr + psize - 1),
1143			(unsigned) pcicb->pcicb_membase,
1144			(unsigned) pcicb->pcicb_memlimit);
1145/*		return (0);*/
1146/* ACHTUNG: Ist der Code richtig, wenn eine PCI-PCI-Bridge fuer
1147 * die PCI-Slots verwendet wird, aber die Onboard-Devices direkt
1148 * an der CPU-PCI-Bridge haengen (Siehe Compaq Prolinea Problem) ???
1149 */
1150	}
1151	pci_conf_write (tag, reg, paddr);
1152
1153	/*
1154	**	Truncate paddr to page boundary.
1155	**	(Or does pmap_mapdev the job?)
1156	*/
1157
1158	poffs = paddr - trunc_page (paddr);
1159	vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs);
1160
1161	if (!vaddr) return (0);
1162
1163	vaddr += poffs;
1164
1165#ifndef PCI_QUIET
1166	/*
1167	**	display values.
1168	*/
1169
1170	if (bootverbose)
1171		printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n",
1172		 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize);
1173#endif
1174	/*
1175	**      set the configuration register and
1176	**      return the address to the driver
1177	**      Make sure to enable each upstream bridge
1178	**      so memory and DMA can go all the way.
1179	*/
1180
1181	for (;;) {
1182		data =  pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff;
1183		data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
1184		(void)  pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data);
1185		if ((link = link->pcicb_up) == NULL)
1186			break;
1187		tag = link->pcicb_bridge;
1188	}
1189
1190	*va = vaddr;
1191	*pa = paddr;
1192
1193	return (1);
1194}
1195
1196/*-----------------------------------------------------------------------
1197**
1198**	Pci meta interrupt handler
1199**
1200**	This handler assumes level triggered interrupts.
1201**	It's possible to build a kernel which handles shared
1202**	edge triggered interrupts by the options "PCI_EDGE_INT".
1203**	But there is a performance penalty.
1204**
1205**	(Of course you can delete the #ifdef PCI_EDGE_INT bracketed
1206**	code at all :-) :-) :-)
1207**
1208**-----------------------------------------------------------------------
1209*/
1210
1211static struct pci_int_desc*
1212	pci_int_desc [PCI_MAX_IRQ];
1213
1214#ifndef NO_SHARED_IRQ
1215
1216static inline unsigned
1217splq (unsigned mask)
1218{
1219	unsigned temp=cpl;
1220	cpl |= mask;
1221	return temp;
1222}
1223
1224static void
1225pci_int (int irq)
1226{
1227	struct pci_int_desc * p;
1228	int s;
1229
1230	if (irq<0 || irq >= PCI_MAX_IRQ) {
1231		printf ("pci_int: irq %d out of range, ignored\n", irq);
1232		return;
1233	};
1234	for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) {
1235		s = splq (*p->pcid_maskptr);
1236		(*p->pcid_handler) (p->pcid_argument);
1237		p-> pcid_tally++;
1238		splx (s);
1239#if 0
1240		if (p->pcid_tally<20)
1241			printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n",
1242				irq, p->pcid_handler, s, cpl, c);
1243#endif
1244	};
1245}
1246#endif
1247
1248/*-----------------------------------------------------------------------
1249**
1250**	Auxiliary function for interrupt (un)mapping.
1251**
1252**-----------------------------------------------------------------------
1253*/
1254
1255static u_int
1256getirq (pcici_t tag)
1257{
1258	u_int irq;
1259
1260	irq = PCI_INTERRUPT_LINE_EXTRACT(
1261		pci_conf_read (tag, PCI_INTERRUPT_REG));
1262
1263	if (irq == 0 || irq == 0xff) {
1264		printf ("\tint line register not set by bios\n");
1265		return (0xff);
1266	}
1267
1268	if (irq >= PCI_MAX_IRQ) {
1269		printf ("\tirq %d out of bounds (must be < %d).\n",
1270			irq, PCI_MAX_IRQ);
1271		return (0xff);
1272	}
1273
1274	return (irq);
1275}
1276
1277static struct pci_int_desc **
1278getintdescbytag (u_int irq, pcici_t tag)
1279{
1280	struct pci_int_desc *p, **pp;
1281
1282	pp=&pci_int_desc[irq];
1283	while (((p=*pp)) && !sametag(p->pcid_tag,tag))
1284		pp=&p->pcid_next;
1285
1286	if (!p) return (NULL);
1287
1288	return (pp);
1289}
1290
1291static struct pci_int_desc *
1292getintdescbymptr (u_int irq, unsigned * mptr)
1293{
1294	struct pci_int_desc *p;
1295
1296	for (p=pci_int_desc[irq];p;p=p->pcid_next)
1297		if (p->pcid_maskptr == mptr) break;
1298	return (p);
1299}
1300
1301/*-----------------------------------------------------------------------
1302**
1303**	Map pci interrupt.
1304**
1305**-----------------------------------------------------------------------
1306*/
1307
1308static unsigned pci_mask0 = 0;
1309
1310int pci_map_int (pcici_t tag, pci_inthand_t *func, void *arg, unsigned *maskptr)
1311{
1312	u_int irq;
1313	int result, oldspl;
1314	unsigned  mask;
1315	struct pci_int_desc *tail, *mdp=NULL, *new=NULL;
1316
1317	/*
1318	**	Get irq line from configuration space,
1319	**	and check for consistency.
1320	*/
1321
1322	irq = getirq (tag);
1323	if (irq == 0xff) {
1324		return (0);
1325	};
1326	mask= 1ul << irq;
1327
1328	/*
1329	**      disable this interrupt.
1330	*/
1331
1332	oldspl = splq (mask);
1333
1334	/*
1335	**	If handler for this tag already installed,
1336	**	remove it first.
1337	*/
1338
1339	if (getintdescbytag (irq, tag) != NULL)
1340		pci_unmap_int (tag);
1341
1342	/*
1343	**	If this irq not yet included in the mask, include it.
1344	*/
1345
1346	mdp = getintdescbymptr (irq, maskptr);
1347	if (!mdp) {
1348		result = pcibus->pb_imaskinc (irq, maskptr);
1349		if (result)
1350			goto conflict;
1351	};
1352
1353	/*
1354	**	Allocate descriptor and initialize it.
1355	*/
1356
1357	tail = pci_int_desc[irq];
1358
1359	new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK);
1360	bzero (new, sizeof (*new));
1361
1362	new->pcid_next	   = tail;
1363	new->pcid_tag      = tag;
1364	new->pcid_handler  = func;
1365	new->pcid_argument = arg;
1366	new->pcid_maskptr  = maskptr;
1367	new->pcid_tally    = 0;
1368	new->pcid_mask	   = mask;
1369
1370	/*
1371	**	If first handler:   install it.
1372	**	If second handler: install shared-int-handler.
1373	*/
1374
1375	if (!tail) {
1376		/*
1377		**	first handler for this irq.
1378		*/
1379
1380		result = pcibus->pb_iattach
1381			/*
1382			 * XXX if we get here, then `func' must be pci_int
1383			 * so the bogus casts are almost OK since they just
1384			 * undo the bogus casts that were needed to pass
1385			 * pci_int and its arg to pci_map_int().
1386			 */
1387			(irq, (inthand2_t *) func, (int) arg, maskptr);
1388		if (result) goto conflict;
1389
1390#ifdef NO_SHARED_IRQ
1391	} else goto conflict;
1392#else
1393	} else if (!tail->pcid_next) {
1394		/*
1395		**	Second handler for this irq.
1396		*/
1397
1398		if (bootverbose)
1399			printf ("\tusing shared irq %d.\n", irq);
1400
1401		/*
1402		**	replace old handler by shared-int-handler.
1403		*/
1404
1405		result = pcibus->pb_idetach (irq,
1406					     (inthand2_t *) tail->pcid_handler);
1407		if (result)
1408			printf ("\tCANNOT DETACH INT HANDLER.\n");
1409
1410		result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0);
1411		if (result) {
1412			printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n");
1413			goto fail;
1414		};
1415	}
1416#endif
1417	/*
1418	**	Link new descriptor, reenable ints and done.
1419	*/
1420
1421	pci_int_desc[irq]  = new;
1422	splx (oldspl);
1423	return (1);
1424
1425	/*
1426	**	Handle some problems.
1427	*/
1428
1429conflict:
1430	printf ("\tirq %d already in use.\n", irq);
1431fail:
1432	/*
1433	**	If descriptor allocated, free it.
1434	**	If included in mask, remove it.
1435	*/
1436
1437	if (new) free(new, M_DEVBUF);
1438	if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr);
1439	splx (oldspl);
1440	return (0);
1441}
1442
1443/*-----------------------------------------------------------------------
1444**
1445**	Unmap pci interrupt.
1446**
1447**-----------------------------------------------------------------------
1448*/
1449
1450int pci_unmap_int (pcici_t tag)
1451{
1452	int result, oldspl;
1453	struct pci_int_desc *this, **hook, *tail;
1454	unsigned irq;
1455
1456	/*
1457	**	Get irq line from configuration space,
1458	**	and check for consistency.
1459	*/
1460
1461	irq = getirq (tag);
1462	if (irq == 0xff) {
1463		return (0);
1464	};
1465
1466	/*
1467	**	Search and unlink interrupt descriptor.
1468	*/
1469
1470	hook = getintdescbytag (irq, tag);
1471	if (hook == NULL) {
1472		printf ("\tno irq %d handler for pci %x\n",
1473			irq, tag.tag);
1474		return (0);
1475	};
1476
1477	this = *hook;
1478	*hook= this->pcid_next;
1479
1480	/*
1481	**	Message
1482	*/
1483
1484	printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n",
1485		irq, this->pcid_handler, this->pcid_argument,
1486		this->pcid_tag.tag, this->pcid_tally);
1487
1488	/*
1489	**	If this irq no longer included in the mask, remove it.
1490	*/
1491
1492	if (!getintdescbymptr (irq, this->pcid_maskptr))
1493		(void) pcibus->pb_imaskexc (irq, this->pcid_maskptr);
1494
1495	tail = pci_int_desc[irq];
1496
1497	if (tail == NULL) {
1498
1499		/*
1500		**	Remove the old handler.
1501		*/
1502
1503		result = pcibus->pb_idetach (irq,
1504					     (inthand2_t *) this->pcid_handler);
1505		if (result)
1506			printf ("\tirq %d: cannot remove handler.\n", irq);
1507
1508	} else if (tail->pcid_next == NULL) {
1509
1510		/*
1511		**	Remove the shared int handler.
1512		**	Install the last remaining handler.
1513		*/
1514
1515		oldspl = splq (1ul << irq);
1516
1517		result = pcibus->pb_idetach (irq, pci_int);
1518		if (result)
1519			printf ("\tirq %d: cannot remove handler.\n", irq);
1520
1521		result = pcibus->pb_iattach (irq,
1522				(inthand2_t *) tail->pcid_handler,
1523				(int) tail->pcid_argument,
1524				tail->pcid_maskptr);
1525
1526		if (result)
1527			printf ("\tirq %d: cannot install handler.\n", irq);
1528
1529		splx (oldspl);
1530	};
1531
1532	free (this, M_DEVBUF);
1533	return (1);
1534}
1535
1536/*-----------------------------------------------------------
1537**
1538**	Display of unknown devices.
1539**
1540**-----------------------------------------------------------
1541*/
1542struct vt {
1543	u_short	ident;
1544	char*	name;
1545};
1546
1547static struct vt VendorTable[] = {
1548	{0x0e11, "Compaq"},
1549	{0x1000, "NCR/Symbios"},
1550	{0x1002, "ATI Technologies Inc."},
1551	{0x1004, "VLSI"},
1552	{0x100B, "National Semiconductor"},
1553	{0x100E, "Weitek"},
1554	{0x1011, "Digital Equipment Corporation"},
1555	{0x1013, "Cirrus Logic"},
1556	{0x101A, "NCR"},
1557	{0x1022, "AMD"},
1558	{0x102B, "Matrox"},
1559	{0x102C, "Chips & Technologies"},
1560	{0x1039, "Silicon Integrated Systems"},
1561	{0x1042, "SMC"},
1562	{0x1044, "DPT"},
1563	{0x1045, "OPTI"},
1564	{0x104B, "Bus Logic"},
1565	{0x104C, "TI"},
1566	{0x1060, "UMC"},
1567	{0x1080, "Contaq"},
1568	{0x1095, "CMD"},
1569	{0x10b9, "ACER Labs"},
1570	{0x10c8, "NeoMagic"},
1571	{0x1106, "VIA Technologies"},
1572	{0x5333, "S3 Inc."},
1573	{0x8086, "Intel Corporation"},
1574	{0x9004, "Adaptec"},
1575	{0,0}
1576};
1577
1578typedef struct {
1579	const int	subclass;
1580	const char	*name;
1581} subclass_name;
1582
1583/* 0x00 prehistoric subclasses */
1584static const subclass_name old_subclasses[] =
1585{
1586	{ 0x00, "misc"	},
1587	{ 0x01, "vga"	},
1588	{ 0x00, NULL	}
1589};
1590
1591/* 0x01 mass storage subclasses */
1592static const subclass_name storage_subclasses[] =
1593{
1594	{ 0x00, "scsi"	},
1595	{ 0x01, "ide"	},
1596	{ 0x02, "floppy"},
1597	{ 0x03, "ipi"	},
1598	{ 0x80, "misc"	},
1599	{ 0x00, NULL	}
1600};
1601
1602/* 0x02 network subclasses */
1603static const subclass_name network_subclasses[] =
1604{
1605	{ 0x00, "ethernet"	},
1606	{ 0x01, "tokenring"	},
1607	{ 0x02, "fddi"	},
1608	{ 0x80, "misc"	},
1609	{ 0x00, NULL	}
1610};
1611
1612/* 0x03 display subclasses */
1613static const subclass_name display_subclasses[] =
1614{
1615	{ 0x00, "vga"	},
1616	{ 0x01, "xga"	},
1617	{ 0x80, "misc"	},
1618	{ 0x00, NULL	}
1619};
1620
1621/* 0x04 multimedia subclasses */
1622static const subclass_name multimedia_subclasses[] =
1623{
1624	{ 0x00, "video"	},
1625	{ 0x01, "audio"	},
1626	{ 0x80, "misc"	},
1627	{ 0x00, NULL	}
1628};
1629
1630/* 0x05 memory subclasses */
1631static const subclass_name memory_subclasses[] =
1632{
1633	{ 0x00, "ram"	},
1634	{ 0x01, "flash"	},
1635	{ 0x80, "misc"	},
1636	{ 0x00, NULL	}
1637};
1638
1639/* 0x06 bridge subclasses */
1640static const subclass_name bridge_subclasses[] =
1641{
1642	{ 0x00, "host"	},
1643	{ 0x01, "isa"	},
1644	{ 0x02, "eisa"	},
1645	{ 0x03, "mc"	},
1646	{ 0x04, "pci"	},
1647	{ 0x05, "pcmcia"},
1648	{ 0x07, "cardbus"},
1649	{ 0x80, "misc"	},
1650	{ 0x00, NULL	}
1651};
1652
1653static const subclass_name *const subclasses[] = {
1654	old_subclasses,
1655	storage_subclasses,
1656	network_subclasses,
1657	display_subclasses,
1658	multimedia_subclasses,
1659	memory_subclasses,
1660	bridge_subclasses,
1661};
1662
1663static const char *const majclasses[] = {
1664	"old",
1665	"storage",
1666	"network",
1667	"display",
1668	"multimedia",
1669	"memory",
1670	"bridge",
1671	"comms",
1672	"system",
1673	"input",
1674	"docking",
1675	"processor",
1676	"serial"
1677};
1678
1679
1680void not_supported (pcici_t tag, u_long type)
1681{
1682	u_long	reg;
1683	u_long	data;
1684	u_char	class;
1685	u_char	subclass;
1686	struct vt * vp;
1687	int	pciint;
1688	int	irq;
1689
1690	/*
1691	**	lookup the names.
1692	*/
1693
1694	for (vp=VendorTable; vp->ident; vp++)
1695		if (vp->ident == (type & 0xffff))
1696			break;
1697
1698	/*
1699	**	and display them.
1700	*/
1701
1702	if (vp->ident) printf (vp->name);
1703		else   printf ("vendor=0x%04lx", type & 0xffff);
1704
1705	printf (", device=0x%04lx", type >> 16);
1706
1707	data = pci_conf_read(tag, PCI_CLASS_REG);
1708	class = (data >> 24) & 0xff;
1709	subclass = (data >> 16) & 0xff;
1710
1711	if (class < sizeof(majclasses) / sizeof(majclasses[0])) {
1712		printf(", class=%s", majclasses[class]);
1713	} else {
1714		printf(", class=0x%02x", class);
1715	}
1716
1717	if (class < sizeof(subclasses) / sizeof(subclasses[0])) {
1718		const subclass_name *p = subclasses[class];
1719		while (p->name && (p->subclass != subclass))
1720			p++;
1721		if (p->name) {
1722			printf(" (%s)", p->name);
1723		} else {
1724			printf(" (unknown subclass 0x%02lx)", subclass);
1725		}
1726	} else {
1727		printf(", subclass=0x%02x", subclass);
1728	}
1729
1730	data = pci_conf_read (tag, PCI_INTERRUPT_REG);
1731	pciint = PCI_INTERRUPT_PIN_EXTRACT(data);
1732
1733	if (pciint) {
1734
1735		printf (" int %c irq ", 0x60+pciint);
1736
1737		irq = PCI_INTERRUPT_LINE_EXTRACT(data);
1738
1739		/*
1740		**	If it's zero, the isa irq number is unknown,
1741		**	and we cannot bind the pci interrupt.
1742		*/
1743
1744		if (irq && (irq != 0xff))
1745			printf ("%d", irq);
1746		else
1747			printf ("??");
1748	};
1749
1750	if (class != (PCI_CLASS_BRIDGE >> 24))
1751	    printf (" [no driver assigned]");
1752	printf ("\n");
1753
1754	if (bootverbose) {
1755	    if (class == (PCI_CLASS_BRIDGE >> 24)) {
1756		printf ("configuration space registers:");
1757		for (reg = 0; reg < 0x100; reg+=4) {
1758		    if ((reg & 0x0f) == 0) printf ("\n%02x:\t", reg);
1759		    printf ("%08x ", pci_conf_read (tag, reg));
1760		}
1761		printf ("\n");
1762	    } else {
1763		for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) {
1764		    data = pci_conf_read (tag, reg);
1765		    if ((data&~7)==0) continue;
1766		    switch (data&7) {
1767
1768		case 1:
1769		case 5:
1770			printf ("\tmap(%x): io(%04lx)\n",
1771				reg, data & ~3);
1772			break;
1773		case 0:
1774			printf ("\tmap(%x): mem32(%08lx)\n",
1775				reg, data & ~7);
1776			break;
1777		case 2:
1778			printf ("\tmap(%x): mem20(%05lx)\n",
1779				reg, data & ~7);
1780			break;
1781		case 4:
1782			printf ("\tmap(%x): mem64(%08x%08lx)\n",
1783				reg, pci_conf_read (tag, reg +4), data & ~7);
1784			reg += 4;
1785			break;
1786		    }
1787		}
1788	    }
1789	}
1790}
1791
1792/*
1793 * This is the user interface to the PCI configuration space.
1794 */
1795
1796
1797static void
1798pci_remember(int bus, int dev, int func, struct pci_device *dvp)
1799{
1800	struct pci_conf *p;
1801	pcici_t tag;
1802
1803	if (++pci_dev_list_count > pci_dev_list_size) {
1804		struct pci_conf *new;
1805
1806		pci_dev_list_size += 8;
1807		MALLOC(new, struct pci_conf *, pci_dev_list_size * sizeof *new,
1808		       M_DEVL, M_NOWAIT);
1809		if (!new) {
1810			pci_dev_list_size -= 8;
1811			pci_dev_list_count--;
1812			return;
1813		}
1814
1815		if (pci_dev_list) {
1816			bcopy(pci_dev_list, new, ((pci_dev_list_size - 8) *
1817						  sizeof *new));
1818			FREE(pci_dev_list, M_DEVL);
1819		}
1820		pci_dev_list = new;
1821	}
1822
1823	p = &pci_dev_list[pci_dev_list_count - 1];
1824	p->pc_sel.pc_bus = bus;
1825	p->pc_sel.pc_dev = dev;
1826	p->pc_sel.pc_func = func;
1827	p->pc_hdr = (pci_conf_read (tag, PCI_HEADER_MISC) >> 16) & 0xff;
1828	tag = pcibus->pb_tag  (bus, dev, func);
1829	p->pc_devid = pci_conf_read(tag, PCI_ID_REG);
1830	p->pc_dvp = dvp;
1831	p->pc_cb  = pcicb;
1832	if ((p->pc_hdr & 0x7f) == 1) {
1833		p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG1);
1834	} else {
1835		p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG0);
1836	}
1837	p->pc_class = pci_conf_read(tag, PCI_CLASS_REG);
1838}
1839
1840static int
1841pci_open(dev_t dev, int oflags, int devtype, struct proc *p)
1842{
1843	if ((oflags & FWRITE) && securelevel > 0) {
1844		return EPERM;
1845	}
1846
1847	return 0;
1848}
1849
1850static int
1851pci_close(dev_t dev, int flag, int devtype, struct proc *p)
1852{
1853	return 0;
1854}
1855
1856static int
1857pci_ioctl(dev_t dev, int cmd, caddr_t data, int flag, struct proc *p)
1858{
1859	struct pci_conf_io *cio;
1860	struct pci_io *io;
1861	size_t iolen;
1862	int error;
1863	pcici_t tag;
1864
1865	if (cmd != PCIOCGETCONF && !(flag & FWRITE))
1866		return EPERM;
1867
1868	switch(cmd) {
1869	case PCIOCGETCONF:
1870		cio = (struct pci_conf_io *)data;
1871		iolen = min(cio->pci_len,
1872			    pci_dev_list_count * sizeof(struct pci_conf));
1873		cio->pci_len = pci_dev_list_count * sizeof(struct pci_conf);
1874
1875		error = copyout(pci_dev_list, cio->pci_buf, iolen);
1876		break;
1877
1878	case PCIOCREAD:
1879		io = (struct pci_io *)data;
1880		switch(io->pi_width) {
1881		case 4:
1882			tag = pcibus->pb_tag (io->pi_sel.pc_bus,
1883					      io->pi_sel.pc_dev,
1884					      io->pi_sel.pc_func);
1885			io->pi_data = pci_conf_read(tag, io->pi_reg);
1886			error = 0;
1887			break;
1888		case 2:
1889		case 1:
1890		default:
1891			error = ENODEV;
1892			break;
1893		}
1894		break;
1895
1896	case PCIOCWRITE:
1897		io = (struct pci_io *)data;
1898		switch(io->pi_width) {
1899		case 4:
1900			tag = pcibus->pb_tag (io->pi_sel.pc_bus,
1901					      io->pi_sel.pc_dev,
1902					      io->pi_sel.pc_func);
1903			pci_conf_write(tag, io->pi_reg, io->pi_data);
1904			error = 0;
1905			break;
1906		case 2:
1907		case 1:
1908		default:
1909			error = ENODEV;
1910			break;
1911		}
1912		break;
1913
1914	case PCIOCATTACHED:
1915		io = (struct pci_io *)data;
1916		switch(io->pi_width) {
1917		case 4:
1918			{
1919			    int i = pci_dev_list_count;
1920			    struct pci_conf *p = pci_dev_list;
1921			    error = ENODEV;
1922			    while (i--) {
1923				if (io->pi_sel.pc_bus == p->pc_sel.pc_bus &&
1924				    io->pi_sel.pc_dev == p->pc_sel.pc_dev &&
1925				    io->pi_sel.pc_func == p->pc_sel.pc_func) {
1926					io->pi_data = (u_int32_t)p->pc_dvp;
1927					error = 0;
1928					break;
1929				}
1930				p++;
1931			    }
1932			}
1933			break;
1934		case 2:
1935		case 1:
1936		default:
1937			error = ENODEV;
1938			break;
1939		}
1940		break;
1941
1942	default:
1943		error = ENOTTY;
1944		break;
1945	}
1946
1947	return (error);
1948}
1949
1950#define	PCI_CDEV	78
1951
1952static struct cdevsw pcicdev = {
1953	pci_open, pci_close, noread, nowrite, pci_ioctl, nostop, noreset,
1954	nodevtotty, noselect, nommap, nostrategy, "pci", 0, PCI_CDEV
1955};
1956
1957#ifdef DEVFS
1958static void *pci_devfs_token;
1959#endif
1960
1961static void
1962pci_cdevinit(void *dummy)
1963{
1964	dev_t dev;
1965
1966	dev = makedev(PCI_CDEV, 0);
1967	cdevsw_add(&dev, &pcicdev, NULL);
1968#ifdef	DEVFS
1969	pci_devfs_token = devfs_add_devswf(&pcicdev, 0, DV_CHR,
1970					   UID_ROOT, GID_WHEEL, 0644, "pci");
1971#endif
1972}
1973
1974SYSINIT(pcidev, SI_SUB_DRIVERS, SI_ORDER_MIDDLE+PCI_CDEV, pci_cdevinit, NULL);
1975
1976#endif /* NPCI */
1977