pci.c revision 15378
1/************************************************************************** 2** 3** $Id: pci.c,v 1.48 1996/04/14 20:14:36 se Exp $ 4** 5** General subroutines for the PCI bus. 6** pci_configure () 7** 8** FreeBSD 9** 10**------------------------------------------------------------------------- 11** 12** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 13** 14** Redistribution and use in source and binary forms, with or without 15** modification, are permitted provided that the following conditions 16** are met: 17** 1. Redistributions of source code must retain the above copyright 18** notice, this list of conditions and the following disclaimer. 19** 2. Redistributions in binary form must reproduce the above copyright 20** notice, this list of conditions and the following disclaimer in the 21** documentation and/or other materials provided with the distribution. 22** 3. The name of the author may not be used to endorse or promote products 23** derived from this software without specific prior written permission. 24** 25** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35** 36*************************************************************************** 37*/ 38 39#include "pci.h" 40#if NPCI > 0 41 42/*======================================================== 43** 44** #includes and declarations 45** 46**======================================================== 47*/ 48 49#include <sys/param.h> 50#include <sys/systm.h> 51#include <sys/malloc.h> 52#include <sys/errno.h> 53#include <sys/kernel.h> 54#include <sys/sysctl.h> 55#include <sys/proc.h> /* declaration of wakeup(), used by vm.h */ 56#include <sys/devconf.h> 57 58#include <vm/vm.h> 59#include <vm/vm_param.h> 60#include <vm/pmap.h> 61 62#include <sys/devconf.h> 63 64#include <i386/isa/isa_device.h> /* XXX inthand2_t */ 65 66#include <pci/pcivar.h> 67#include <pci/pcireg.h> 68#include <pci/pcibus.h> 69 70#define PCI_MAX_IRQ (16) 71 72 73/*======================================================== 74** 75** Structs and Functions 76** 77**======================================================== 78*/ 79 80struct pci_devconf { 81 struct kern_devconf pdc_kdc; 82 struct pci_info pdc_pi; 83}; 84 85struct pcicb { 86 struct pcicb *pcicb_next; 87 struct pcicb *pcicb_up; 88 struct pcicb *pcicb_down; 89 pcici_t pcicb_bridge; 90 91 u_long pcicb_seen; 92 u_char pcicb_bus; 93 u_char pcicb_subordinate; 94 u_char pcicb_flags; 95#define PCICB_ISAMEM 0x01 96 u_int pcicb_mfrom; 97 u_int pcicb_mupto; 98 u_int pcicb_mamount; 99 u_short pcicb_pfrom; 100 u_short pcicb_pupto; 101 u_short pcicb_pamount; 102 u_char pcicb_bfrom; 103 u_char pcicb_bupto; 104 105 u_long pcicb_iobase; 106 u_long pcicb_iolimit; 107 u_long pcicb_membase; 108 u_long pcicb_memlimit; 109 u_long pcicb_p_membase; 110 u_long pcicb_p_memlimit; 111}; 112 113static int pci_externalize (struct kern_devconf *, struct sysctl_req *); 114 115static int pci_internalize (struct kern_devconf *, struct sysctl_req *); 116 117static void 118not_supported (pcici_t tag, u_long type); 119 120static void 121pci_bus_config (void); 122 123static int 124pci_bridge_config (void); 125 126static int 127pci_mfdev (int bus, int device); 128 129/*======================================================== 130** 131** Variables 132** 133**======================================================== 134*/ 135 136/* 137** log2 of safe burst len (in words) 138*/ 139 140unsigned pci_max_burst_len = 3; /* 2=16Byte, 3=32Byte, 4=64Byte, ... */ 141unsigned pci_mechanism = 0; 142unsigned pci_maxdevice = 0; 143static struct pcibus* pcibus; 144 145/*-------------------------------------------------------- 146** 147** Local variables. 148** 149**-------------------------------------------------------- 150*/ 151 152static int pci_conf_count; 153static int pci_info_done; 154static struct pcicb pcibus0 = { 155 NULL, NULL, NULL, 156 { 0 }, 157 0, 0, 0, 0, 158 0, 0, 0, 0, 0, 0, 0, 0, /* real allocation */ 159 0, 0xFFFF, /* iobase/limit */ 160 0x2000000, 0xFFFFFFFFu, /* nonprefetch membase/limit */ 161 0x2000000, 0xFFFFFFFFu /* prefetch membase/limit */ 162}; 163static struct pcicb *pcicb; 164 165/*----------------------------------------------------------------- 166** 167** The following functions are provided for the device driver 168** to read/write the configuration space. 169** 170** pci_conf_read(): 171** Read a long word from the pci configuration space. 172** Requires a tag (from pcitag) and the register 173** number (should be a long word alligned one). 174** 175** pci_conf_write(): 176** Writes a long word to the pci configuration space. 177** Requires a tag (from pcitag), the register number 178** (should be a long word alligned one), and a value. 179** 180**----------------------------------------------------------------- 181*/ 182 183u_long 184pci_conf_read (pcici_t tag, u_long reg) 185{ 186 return (pcibus->pb_read (tag, reg)); 187} 188 189void 190pci_conf_write (pcici_t tag, u_long reg, u_long data) 191{ 192 pcibus->pb_write (tag, reg, data); 193} 194 195/*======================================================== 196** 197** Subroutines for configuration. 198** 199**======================================================== 200*/ 201 202static void 203pci_register_io (struct pcicb * cb, u_int base, u_int limit) 204{ 205#ifdef PCI_BRIDGE_DEBUG 206 if (bootverbose) 207 printf ("register_io: bus=%d base=%x limit=%x\n", 208 cb->pcicb_bus, base, limit); 209#endif 210 211 if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom) 212 cb->pcicb_pfrom = base; 213 if (limit > cb->pcicb_pupto) 214 cb->pcicb_pupto = limit; 215 216 /* 217 ** XXX should set bridge io mapping here 218 ** but it can be mapped in 4k blocks only, 219 ** leading to conflicts with isa/eisa .. 220 */ 221} 222 223static void 224pci_register_memory (struct pcicb * cb, u_int base, u_int limit) 225{ 226#ifdef PCI_BRIDGE_DEBUG 227 if (bootverbose) 228 printf ("register_mem: bus=%d base=%x limit=%x\n", 229 cb->pcicb_bus, base, limit); 230#endif 231 232 if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom) 233 cb->pcicb_mfrom = base; 234 if (limit > cb->pcicb_mupto) 235 cb->pcicb_mupto = limit; 236 /* 237 ** set the bridges mapping 238 ** 239 ** XXX should handle the 1Mb granularity. 240 */ 241 if (cb->pcicb_bridge.tag) { 242 pci_conf_write(cb->pcicb_bridge, 243 PCI_PCI_BRIDGE_MEM_REG, 244 (cb->pcicb_memlimit & 0xffff0000) | 245 (cb->pcicb_membase >> 16)); 246 if (bootverbose) 247 printf ("\t[pci%d uses memory from %x to %x]\n", 248 cb->pcicb_bus, 249 (unsigned) cb->pcicb_membase, 250 (unsigned) cb->pcicb_memlimit); 251 } 252} 253 254/* 255** XXX This function is neither complete nor tested. 256** It's only used if the bios hasn't done it's job 257** of mapping the pci devices in the physical memory. 258*/ 259 260static u_int 261pci_memalloc (struct pcicb * cb, u_int addr, u_int size) 262{ 263 u_int result = 0, limit=0, newbase=0; 264#ifdef PCI_BRIDGE_DEBUG 265 if (bootverbose) 266 printf ("memalloc: bus=%d addr=%x size=%x ..\n", 267 cb->pcicb_bus, addr, size); 268#endif 269 270 if (!cb) goto done; 271 272 if (!cb->pcicb_membase) { 273 printf ("memalloc: bus%d: membase not set.\n", 274 cb->pcicb_bus); 275 goto done; 276 } 277 278 /* 279 ** get upper allocation limit 280 */ 281 limit = cb->pcicb_memlimit; 282 if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit) 283 limit = cb->pcicb_mfrom-1; 284 285 /* 286 ** address fixed, and impossible to allocate ? 287 */ 288 if (addr && addr+size-1 > limit) 289 goto done; 290 291 /* 292 ** get possible address 293 */ 294 295 result = addr; 296 if (!result) result = ((limit + 1) / size - 1) * size; 297 298 /* 299 ** if not local available, request from parent. 300 */ 301 302 if (result < cb->pcicb_membase) { 303 newbase = pci_memalloc (cb->pcicb_up, result, size); 304 if (newbase) cb->pcicb_membase = result; 305 else result=0; 306 } 307done: 308 if (result) 309 pci_register_memory (cb, result, result+size-1); 310 311#ifdef PCI_BRIDGE_DEBUG 312 printf ("memalloc: bus=%d addr=%x size=%x --> %x (limit=%x).\n", 313 cb->pcicb_bus, addr, size, result, limit); 314#endif 315 316 return (result); 317} 318 319/*======================================================== 320** 321** pci_bridge_config() 322** 323** Configuration of a pci bridge. 324** 325**======================================================== 326*/ 327 328static int 329pci_bridge_config (void) 330{ 331 pcici_t tag; 332 struct pcicb* parent; 333 334 tag = pcicb->pcicb_bridge; 335 if (tag.tag) { 336 337 if (!pcicb->pcicb_bus) { 338 u_int data; 339 /* 340 ** Get the lowest available bus number. 341 */ 342 pcicb->pcicb_bus = ++pcibus0.pcicb_subordinate; 343 344 /* 345 ** and configure the bridge 346 */ 347 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 348 data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus); 349 data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus); 350 data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus); 351 pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data); 352 353 /* 354 ** Propagate the new upper bus number limit. 355 */ 356 for (parent = pcicb->pcicb_up; parent != NULL; 357 parent = parent->pcicb_up) 358 { 359 if (parent->pcicb_subordinate >= pcicb->pcicb_bus) 360 continue; 361 parent->pcicb_subordinate = pcicb->pcicb_bus; 362 if (!parent->pcicb_bridge.tag) 363 continue; 364 data = pci_conf_read 365 (parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG); 366 data = PCI_SUBORDINATE_BUS_INSERT 367 (data, pcicb->pcicb_bus); 368 pci_conf_write (parent->pcicb_bridge, 369 PCI_PCI_BRIDGE_BUS_REG, data); 370 } 371 } 372 373 if (!pcicb->pcicb_membase) { 374 u_int size = 0x100000; 375 pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size); 376 if (pcicb->pcicb_membase) 377 pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1; 378 } 379 } 380 return pcicb->pcicb_bus; 381} 382 383/*======================================================== 384** 385** pci_bus_config() 386** 387** Autoconfiguration of one pci bus. 388** 389**======================================================== 390*/ 391 392static int 393pci_mfdev (int bus, int device) 394{ 395 pcici_t tag0,tag1; 396 int pci_id0, pci_id1; 397 398 /* 399 ** Detect a multi-function device that complies to the PCI 2.0 spec 400 */ 401 tag0 = pcibus->pb_tag (bus, device, 0); 402 if (pci_conf_read (tag0, PCI_HEADER_MISC) & PCI_HEADER_MULTIFUNCTION) 403 return 1; 404 405 /* 406 ** Well, as always: Theory and implementation of PCI ... 407 ** 408 ** If there is a valid device ID returned for function 1 AND 409 ** the device ID of function 0 and 1 is different OR 410 ** the first mapping register of 0 and 1 differs, 411 ** then assume a multi-function device anyway ... 412 ** 413 ** Example of such a broken device: ISA and IDE chip i83371FB (Triton) 414 */ 415 tag1 = pcibus->pb_tag (bus, device, 1); 416 pci_id1 = pci_conf_read (tag1, PCI_ID_REG); 417 418 if (pci_id1 != 0xffffffff) { 419 420 pci_id0 = pci_conf_read (tag0, PCI_ID_REG); 421 422 if (pci_id0 != pci_id1) 423 return 1; 424 425 if (pci_conf_read (tag0, PCI_MAP_REG_START) 426 != pci_conf_read (tag1, PCI_MAP_REG_START)) 427 return 1; 428 } 429 return 0; 430} 431 432static void 433pci_bus_config (void) 434{ 435 int bus_no; 436 u_char device; 437 u_char reg; 438 pcici_t tag, mtag; 439 pcidi_t type; 440 u_long data; 441 int unit; 442 u_char pciint; 443 u_char irq; 444 445 struct pci_device *dvp; 446 447 struct pci_devconf *pdcp; 448 449 /* 450 ** first initialize the bridge (bus controller chip) 451 */ 452 bus_no = pci_bridge_config (); 453 454 printf ("Probing for devices on PCI bus %d:\n", bus_no); 455#ifndef PCI_QUIET 456 if (bootverbose && !pci_info_done) { 457 pci_info_done=1; 458 printf ("\tconfiguration mode %d allows %d devices.\n", 459 pci_mechanism, pci_maxdevice); 460 }; 461#endif 462 for (device=0; device<pci_maxdevice; device ++) { 463 char *name = NULL; 464 struct pci_device **dvpp; 465 int func, maxfunc = 0; 466 467 if ((pcicb->pcicb_seen >> device) & 1) 468 continue; 469 470 for (func=0; func <= maxfunc; func++) { 471 tag = pcibus->pb_tag (bus_no, device, func); 472 type = pci_conf_read (tag, PCI_ID_REG); 473 474 if ((!type) || (type==0xfffffffful)) continue; 475 476 /* 477 ** lookup device in ioconfiguration: 478 */ 479 480 dvpp = (struct pci_device **)pcidevice_set.ls_items; 481 482 while (dvp = *dvpp++) { 483 if (dvp->pd_probe) { 484 if (name=(*dvp->pd_probe)(tag, type)) 485 break; 486 } 487 }; 488 /* 489 ** check for mirrored devices. 490 */ 491 if (func != 0) { 492 goto real_device; 493 } 494 if (device & 0x10) { 495 mtag=pcibus->pb_tag (bus_no, 496 (u_char)(device & ~0x10), 0); 497 } else if (device & 0x08) { 498 mtag=pcibus->pb_tag (bus_no, 499 (u_char)(device & ~0x08), 0); 500 } else goto real_device; 501 502 if (type!=pci_conf_read (mtag, PCI_ID_REG)) 503 goto real_device; 504 505 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) 506 if (pci_conf_read(tag,reg)!=pci_conf_read(mtag,reg)) 507 goto real_device; 508 509#ifndef PCI_QUIET 510 if (dvp==NULL) continue; 511 if (bootverbose) 512 printf ("%s? <%s> mirrored on pci%d:%d\n", 513 dvp->pd_name, name, bus_no, device); 514#endif 515 continue; 516 517 real_device: 518 519#ifndef PCI_QUIET 520#ifdef PCI_BRIDGE_DEBUG 521 if (bootverbose) { 522 printf ("\tconfig header: 0x%08x 0x%08x 0x%08x 0x%08x\n", 523 pci_conf_read (tag, 0), 524 pci_conf_read (tag, 4), 525 pci_conf_read (tag, 8), 526 pci_conf_read (tag, 12)); 527 } 528#endif 529#endif 530 531 if (func == 0 && pci_mfdev (bus_no, device)) { 532 maxfunc = 7; 533 } 534 535 if (dvp==NULL) { 536#ifndef PCI_QUIET 537 if (pci_conf_count) 538 continue; 539 540 if (maxfunc == 0) 541 printf("%s%d:%d: ", 542 pcibus->pb_name, bus_no, device); 543 else 544 printf("%s%d:%d:%d: ", 545 pcibus->pb_name, bus_no, device, func); 546 not_supported (tag, type); 547#endif 548 continue; 549 }; 550 551 pcicb->pcicb_seen |= (1ul << device); 552 553 /* 554 ** Get and increment the unit. 555 */ 556 557 unit = (*dvp->pd_count)++; 558 559 /* 560 ** ignore device ? 561 */ 562 563 if (!*name) continue; 564 565 /* 566 ** Announce this device 567 */ 568 569 printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name, 570 (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff); 571 572 /* 573 ** Get the int pin number (pci interrupt number a-d) 574 ** from the pci configuration space. 575 */ 576 577 data = pci_conf_read (tag, PCI_INTERRUPT_REG); 578 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 579 580 if (pciint) { 581 582 printf (" int %c irq ", 0x60+pciint); 583 584 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 585 586 /* 587 ** If it's zero, the isa irq number is unknown, 588 ** and we cannot bind the pci interrupt. 589 */ 590 591 if (irq && (irq != 0xff)) 592 printf ("%d", irq); 593 else 594 printf ("??"); 595 }; 596 597 if (maxfunc == 0) 598 printf (" on pci%d:%d\n", bus_no, device); 599 else 600 printf (" on pci%d:%d:%d\n", bus_no, device, func); 601 602 /* 603 ** Read the current mapping, 604 ** and update the pcicb fields. 605 */ 606 607 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) { 608 u_int map, addr, size; 609 610 data = pci_conf_read(tag, PCI_CLASS_REG); 611 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 612 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 613 continue; 614 }; 615 616 map = pci_conf_read (tag, reg); 617 if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK)) 618 continue; 619 620 pci_conf_write (tag, reg, 0xffffffff); 621 data = pci_conf_read (tag, reg); 622 pci_conf_write (tag, reg, map); 623 624 switch (data & 7) { 625 626 default: 627 continue; 628 case 1: 629 case 5: 630 addr = map & PCI_MAP_IO_ADDRESS_MASK; 631 size = -(data & PCI_MAP_IO_ADDRESS_MASK); 632 size &= ~(addr ^ -addr); 633 634 pci_register_io (pcicb, addr, addr+size-1); 635 pcicb->pcicb_pamount += size; 636 break; 637 638 case 0: 639 case 2: 640 case 4: 641 size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 642 addr = map & PCI_MAP_MEMORY_ADDRESS_MASK; 643 if (addr >= 0x100000) { 644 pci_register_memory 645 (pcicb, addr, addr+size-1); 646 pcicb->pcicb_mamount += size; 647 } else { 648 pcicb->pcicb_flags |= PCICB_ISAMEM; 649 }; 650 break; 651 }; 652 if (bootverbose) 653 printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n", 654 reg, map&7, addr, size); 655 }; 656 657 /* 658 ** Allocate a devconf structure 659 ** We should, and eventually will, set the 660 ** parent pointer to a pci bus devconf structure, 661 ** and arrange to set the state field dynamically. 662 */ 663 664 pdcp = (struct pci_devconf *) 665 malloc (sizeof (struct pci_devconf),M_DEVBUF,M_WAITOK); 666 bzero(pdcp, sizeof(struct pci_devconf)); 667 668 pdcp -> pdc_pi.pi_bus = bus_no; 669 pdcp -> pdc_pi.pi_device = device; 670 pdcp -> pdc_pi.pi_func = func; 671 672 pdcp -> pdc_kdc.kdc_name = dvp->pd_name; 673 pdcp -> pdc_kdc.kdc_unit = unit; 674 675 pdcp -> pdc_kdc.kdc_md.mddc_devtype = MDDT_PCI; 676 677 pdcp -> pdc_kdc.kdc_externalize = pci_externalize; 678 pdcp -> pdc_kdc.kdc_internalize = pci_internalize; 679 680 pdcp -> pdc_kdc.kdc_datalen = PCI_EXTERNAL_LEN; 681 pdcp -> pdc_kdc.kdc_parentdata = &pdcp->pdc_pi; 682 pdcp -> pdc_kdc.kdc_state = DC_UNKNOWN; 683 pdcp -> pdc_kdc.kdc_description = name; 684 pdcp -> pdc_kdc.kdc_shutdown = dvp->pd_shutdown; 685 686 /* 687 ** And register this device 688 */ 689 690 dev_attach (&pdcp->pdc_kdc); 691 692 /* 693 ** attach device 694 ** may produce additional log messages, 695 ** i.e. when installing subdevices. 696 */ 697 698 (*dvp->pd_attach) (tag, unit); 699 700 /* 701 ** Special processing of certain classes 702 */ 703 704 data = pci_conf_read(tag, PCI_CLASS_REG); 705 706 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 707 struct pcicb *this, **link; 708 unsigned char primary, secondary, subordinate; 709 u_int command; 710 711 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 712 713 /* 714 ** get current configuration of the bridge. 715 */ 716 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 717 primary = PCI_PRIMARY_BUS_EXTRACT (data); 718 secondary = PCI_SECONDARY_BUS_EXTRACT(data); 719 subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data); 720#ifndef PCI_QUIET 721 if (bootverbose) { 722 printf ("\tbridge from pci%d to pci%d through %d.\n", 723 primary, secondary, subordinate); 724 printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx\n", 725 pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG), 726 pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG), 727 pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG)); 728 } 729#endif 730 /* 731 ** check for uninitialized bridge. 732 */ 733 if (!(primary < secondary 734 && secondary <= subordinate 735 && bus_no == primary)) 736 { 737 printf ("\tINCORRECTLY or NEVER CONFIGURED.\n"); 738 /* 739 ** disable this bridge 740 */ 741 pci_conf_write (tag, PCI_COMMAND_STATUS_REG, 742 0xffff0000); 743 secondary = 0; 744 subordinate = 0; 745 }; 746 747 /* 748 ** allocate bus descriptor for bus behind the bridge 749 */ 750 link = &pcicb->pcicb_down; 751 while (*link) link = &(*link)->pcicb_next; 752 753 this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK); 754 755 /* 756 ** Initialize this descriptor so far. 757 ** (the initialization is completed just before 758 ** scanning the bus behind the bridge. 759 */ 760 bzero (this, sizeof(*this)); 761 this->pcicb_up = pcicb; 762 this->pcicb_bridge = tag; 763 this->pcicb_bus = secondary; 764 this->pcicb_subordinate = subordinate; 765 766 command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG); 767 768 if (command & PCI_COMMAND_IO_ENABLE){ 769 /* 770 ** Bridge was configured by the bios. 771 ** Read out the mapped io region. 772 */ 773 u_int reg, data, mask; 774 775 reg = pci_conf_read (tag, 776 PCI_PCI_BRIDGE_IO_REG); 777 pci_conf_write(tag, 778 PCI_PCI_BRIDGE_IO_REG, 0xFFFF); 779 data = pci_conf_read (tag, 780 PCI_PCI_BRIDGE_IO_REG); 781 pci_conf_write(tag, 782 PCI_PCI_BRIDGE_IO_REG, reg & 0xffff); 783 784 mask = (0xFF00 ^ (data & 0xFF00)) | 0xFF; 785 786 this->pcicb_iobase = 787 PCI_PPB_IOBASE_EXTRACT (reg); 788 this->pcicb_iolimit = 789 PCI_PPB_IOLIMIT_EXTRACT(reg) | mask; 790 791 /* 792 ** Note the used io space. 793 */ 794 pci_register_io (pcicb, this->pcicb_iobase, 795 this->pcicb_iolimit); 796 797 }; 798 799 if (command & PCI_COMMAND_MEM_ENABLE) { 800 /* 801 ** Bridge was configured by the bios. 802 ** Read out the mapped memory regions. 803 */ 804 u_int reg, data, mask; 805 806 /* 807 ** non prefetchable memory 808 */ 809 reg = pci_conf_read (tag, 810 PCI_PCI_BRIDGE_MEM_REG); 811 pci_conf_write(tag, 812 PCI_PCI_BRIDGE_MEM_REG, 0xFFFFFFFF); 813 data = pci_conf_read (tag, 814 PCI_PCI_BRIDGE_MEM_REG); 815 pci_conf_write(tag, 816 PCI_PCI_BRIDGE_MEM_REG, reg); 817 818 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 819 this->pcicb_membase = 820 PCI_PPB_MEMBASE_EXTRACT (reg); 821 this->pcicb_memlimit = 822 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 823 824 /* 825 ** Register used memory space. 826 */ 827 pci_register_memory (pcicb, 828 this->pcicb_membase, 829 this->pcicb_memlimit); 830 831 /* 832 ** prefetchable memory 833 */ 834 reg = pci_conf_read (tag, 835 PCI_PCI_BRIDGE_PMEM_REG); 836 pci_conf_write(tag, 837 PCI_PCI_BRIDGE_PMEM_REG, 0xFFFFFFFF); 838 data = pci_conf_read (tag, 839 PCI_PCI_BRIDGE_PMEM_REG); 840 pci_conf_write(tag, 841 PCI_PCI_BRIDGE_PMEM_REG, reg); 842 843 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 844 this->pcicb_p_membase= 845 PCI_PPB_MEMBASE_EXTRACT (reg); 846 this->pcicb_p_memlimit= 847 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 848 849 /* 850 ** Register used memory space. 851 */ 852 pci_register_memory (pcicb, 853 this->pcicb_p_membase, 854 this->pcicb_p_memlimit); 855 } 856 857 /* 858 ** Link it in chain. 859 */ 860 *link=this; 861 862 /* 863 ** Update mapping info of parent bus. 864 */ 865 if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom) 866 pcicb->pcicb_bfrom = secondary; 867 if (subordinate > pcicb->pcicb_bupto) 868 pcicb->pcicb_bupto = subordinate; 869 870 break; 871 } 872 } 873 } 874 875#ifndef PCI_QUIET 876 if (bootverbose) { 877 if (pcicb->pcicb_mamount) 878 printf ("%s%d: uses %d bytes of memory from %x upto %x.\n", 879 pcibus->pb_name, bus_no, 880 pcicb->pcicb_mamount, 881 pcicb->pcicb_mfrom, pcicb->pcicb_mupto); 882 if (pcicb->pcicb_pamount) 883 printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n", 884 pcibus->pb_name, bus_no, 885 pcicb->pcicb_pamount, 886 pcicb->pcicb_pfrom, pcicb->pcicb_pupto); 887 if (pcicb->pcicb_bfrom) 888 printf ("%s%d: subordinate busses from %x upto %x.\n", 889 pcibus->pb_name, bus_no, 890 pcicb->pcicb_bfrom, pcicb->pcicb_bupto); 891 } 892#endif 893} 894 895/*======================================================== 896** 897** pci_configure () 898** 899** Autoconfiguration of pci devices. 900** 901** May be called more than once. 902** Any device is attached only once. 903** 904** Has to take care of mirrored devices, which are 905** entailed by incomplete decoding of pci address lines. 906** 907**======================================================== 908*/ 909 910void pci_configure() 911{ 912 struct pcibus **pbp = (struct pcibus**) pcibus_set.ls_items; 913 914 /* 915 ** check pci bus present 916 */ 917 918 while (!pci_maxdevice && (pcibus = *pbp++)) { 919 (*pcibus->pb_setup)(); 920 } 921 922 if (!pci_maxdevice) return; 923 924 /* 925 ** hello world .. 926 */ 927 928 for (pcicb = &pcibus0; pcicb != NULL;) { 929 pci_bus_config (); 930 931 if (pcicb->pcicb_down) { 932 pcicb = pcicb->pcicb_down; 933 continue; 934 }; 935 936 while (pcicb && !pcicb->pcicb_next) 937 pcicb = pcicb->pcicb_up; 938 939 if (pcicb) 940 pcicb = pcicb->pcicb_next; 941 } 942 pci_conf_count++; 943} 944 945/*----------------------------------------------------------------------- 946** 947** Map device into port space. 948** 949** Actually the device should have been mapped by the bios. 950** This function only reads and verifies the value. 951** 952** PCI-Specification: 6.2.5.1: address maps 953** 954**----------------------------------------------------------------------- 955*/ 956 957int pci_map_port (pcici_t tag, u_long reg, u_short* pa) 958{ 959 unsigned data, ioaddr, iosize; 960 struct pcicb *link = pcicb; 961 962 /* 963 ** sanity check 964 */ 965 966 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 967 printf ("pci_map_port failed: bad register=0x%x\n", 968 (unsigned)reg); 969 return (0); 970 }; 971 972 /*if (pcicb->pcicb_flags & PCICB_NOIOSET) { 973 printf ("pci_map_port failed: pci%d has not been configured for I/O access\n", 974 pcicb->pcicb_bus); 975 return (0); 976 }*/ 977 978 /* 979 ** get size and type of port 980 ** 981 ** type is in the lowest two bits. 982 ** If device requires 2^n bytes, the next 983 ** n-2 bits are hardwired as 0. 984 */ 985 986 ioaddr = pci_conf_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK; 987 if (!ioaddr) { 988 printf ("pci_map_port failed: not configured by bios.\n"); 989 return (0); 990 }; 991 992 pci_conf_write (tag, reg, 0xfffffffful); 993 data = pci_conf_read (tag, reg); 994 pci_conf_write (tag, reg, ioaddr); 995 996 if ((data & 0x03) != PCI_MAP_IO) { 997 printf ("pci_map_port failed: bad port type=0x%x\n", 998 (unsigned) data); 999 return (0); 1000 }; 1001 iosize = -(data & PCI_MAP_IO_ADDRESS_MASK); 1002 iosize &= ~(ioaddr ^ -ioaddr); 1003 if (ioaddr < pcicb->pcicb_iobase 1004 || ioaddr + iosize -1 > pcicb->pcicb_iolimit) { 1005 printf ("pci_map_port failed: device's iorange 0x%x-0x%x " 1006 "is incompatible with its bridge's range 0x%x-0x%x\n", 1007 (unsigned) ioaddr, (unsigned) ioaddr + iosize - 1, 1008 (unsigned) pcicb->pcicb_iobase, 1009 (unsigned) pcicb->pcicb_iolimit); 1010 return (0); 1011 } 1012 1013#ifndef PCI_QUIET 1014 if (bootverbose) 1015 printf ("\treg%d: ioaddr=0x%x size=0x%x\n", 1016 (unsigned) reg, (unsigned) ioaddr, (unsigned) iosize); 1017#endif 1018 /* 1019 ** set the configuration register of and 1020 ** return the address to the driver. 1021 ** Make sure to enable each upstream bridge 1022 ** so I/O and DMA can go all the way. 1023 */ 1024 1025 for (;;) { 1026 data = pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1027 data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1028 (void) pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data); 1029 if ((link = link->pcicb_up) == NULL) 1030 break; 1031 tag = link->pcicb_bridge; 1032 } 1033 1034 *pa = ioaddr; 1035 1036 return (1); 1037} 1038 1039/*----------------------------------------------------------------------- 1040** 1041** Map device into virtual and physical space 1042** 1043** Actually the device should have been mapped by the bios. 1044** This function only reads and verifies the value. 1045** 1046** PCI-Specification: 6.2.5.1: address maps 1047** 1048**----------------------------------------------------------------------- 1049*/ 1050 1051int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa) 1052{ 1053 struct pcicb *link = pcicb; 1054 unsigned data ,paddr; 1055 vm_size_t psize, poffs; 1056 vm_offset_t vaddr; 1057 1058 /* 1059 ** sanity check 1060 */ 1061 1062 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 1063 printf ("pci_map_mem failed: bad register=0x%x\n", 1064 (unsigned)reg); 1065 return (0); 1066 }; 1067 1068 /* 1069 ** save old mapping, get size and type of memory 1070 ** 1071 ** type is in the lowest four bits. 1072 ** If device requires 2^n bytes, the next 1073 ** n-4 bits are read as 0. 1074 */ 1075 1076 paddr = pci_conf_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK; 1077 pci_conf_write (tag, reg, 0xfffffffful); 1078 data = pci_conf_read (tag, reg); 1079 pci_conf_write (tag, reg, paddr); 1080 1081 /* 1082 ** check the type 1083 */ 1084 1085 if ((data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT) { 1086 printf ("pci_map_mem failed: bad memory type=0x%x\n", 1087 (unsigned) data); 1088 return (0); 1089 }; 1090 1091 /* 1092 ** get the size. 1093 */ 1094 1095 psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 1096 1097 if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) { 1098 paddr = pci_memalloc (pcicb, 0, psize); 1099 if (!paddr) { 1100 printf ("pci_map_mem: not configured by bios.\n"); 1101 return (0); 1102 }; 1103 pci_register_memory (pcicb, paddr, paddr+psize-1); 1104 }; 1105 1106 if (paddr < pcicb->pcicb_membase || 1107 paddr + psize - 1 > pcicb->pcicb_memlimit) { 1108 printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is " 1109 "incompatible with its bridge's memrange 0x%x-0x%x\n", 1110 (unsigned) paddr, 1111 (unsigned) (paddr + psize - 1), 1112 (unsigned) pcicb->pcicb_membase, 1113 (unsigned) pcicb->pcicb_memlimit); 1114/* return (0);*/ 1115/* ACHTUNG: Ist der Code richtig, wenn eine PCI-PCI-Bridge fuer 1116 * die PCI-Slots verwendet wird, aber die Onboard-Devices direkt 1117 * an der CPU-PCI-Bridge haengen (Siehe Compaq Prolinea Problem) ??? 1118 */ 1119 } 1120 pci_conf_write (tag, reg, paddr); 1121 1122 /* 1123 ** Truncate paddr to page boundary. 1124 ** (Or does pmap_mapdev the job?) 1125 */ 1126 1127 poffs = paddr - trunc_page (paddr); 1128 vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs); 1129 1130 if (!vaddr) return (0); 1131 1132 vaddr += poffs; 1133 1134#ifndef PCI_QUIET 1135 /* 1136 ** display values. 1137 */ 1138 1139 if (bootverbose) 1140 printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n", 1141 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize); 1142#endif 1143 /* 1144 ** set the configuration register and 1145 ** return the address to the driver 1146 ** Make sure to enable each upstream bridge 1147 ** so memory and DMA can go all the way. 1148 */ 1149 1150 for (;;) { 1151 data = pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1152 data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1153 (void) pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data); 1154 if ((link = link->pcicb_up) == NULL) 1155 break; 1156 tag = link->pcicb_bridge; 1157 } 1158 1159 *va = vaddr; 1160 *pa = paddr; 1161 1162 return (1); 1163} 1164 1165/*------------------------------------------------------------ 1166** 1167** Interface functions for the devconf module. 1168** 1169**------------------------------------------------------------ 1170*/ 1171 1172static int 1173pci_externalize (struct kern_devconf *kdcp, struct sysctl_req *req) 1174{ 1175 struct pci_externalize_buffer buffer; 1176 struct pci_info * pip = kdcp->kdc_parentdata; 1177 pcici_t tag; 1178 int i; 1179 1180 tag = pcibus->pb_tag (pip->pi_bus, pip->pi_device, pip->pi_func); 1181 1182 buffer.peb_pci_info = *pip; 1183 1184 for (i=0; i<PCI_EXT_CONF_LEN; i++) { 1185 buffer.peb_config[i] = pci_conf_read (tag, i*4); 1186 }; 1187 1188 return SYSCTL_OUT(req, &buffer, sizeof buffer); 1189} 1190 1191 1192static int 1193pci_internalize (struct kern_devconf *kdcp, struct sysctl_req *re) 1194{ 1195 return EOPNOTSUPP; 1196} 1197 1198/*----------------------------------------------------------------------- 1199** 1200** Pci meta interrupt handler 1201** 1202** This handler assumes level triggered interrupts. 1203** It's possible to build a kernel which handles shared 1204** edge triggered interrupts by the options "PCI_EDGE_INT". 1205** But there is a performance penalty. 1206** 1207** (Of course you can delete the #ifdef PCI_EDGE_INT bracketed 1208** code at all :-) :-) :-) 1209** 1210**----------------------------------------------------------------------- 1211*/ 1212 1213static struct pci_int_desc* 1214 pci_int_desc [PCI_MAX_IRQ]; 1215 1216#ifndef NO_SHARED_IRQ 1217 1218static inline unsigned 1219splq (unsigned mask) 1220{ 1221 unsigned temp=cpl; 1222 cpl |= mask; 1223 return temp; 1224} 1225 1226static void 1227pci_int (int irq) 1228{ 1229 struct pci_int_desc * p; 1230 int s; 1231 1232 if (irq<0 || irq >= PCI_MAX_IRQ) { 1233 printf ("pci_int: irq %d out of range, ignored\n", irq); 1234 return; 1235 }; 1236 for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) { 1237 s = splq (*p->pcid_maskptr); 1238 (*p->pcid_handler) (p->pcid_argument); 1239 p-> pcid_tally++; 1240 splx (s); 1241#if 0 1242 if (p->pcid_tally<20) 1243 printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n", 1244 irq, p->pcid_handler, s, cpl, c); 1245#endif 1246 }; 1247} 1248#endif 1249 1250/*----------------------------------------------------------------------- 1251** 1252** Auxiliary function for interrupt (un)mapping. 1253** 1254**----------------------------------------------------------------------- 1255*/ 1256 1257static u_int 1258getirq (pcici_t tag) 1259{ 1260 u_int irq; 1261 1262 irq = PCI_INTERRUPT_LINE_EXTRACT( 1263 pci_conf_read (tag, PCI_INTERRUPT_REG)); 1264 1265 if (irq <= 0) { 1266 printf ("\tint line register not set by bios\n"); 1267 return (0); 1268 } 1269 1270 if (irq >= pcibus->pb_maxirq || irq >= PCI_MAX_IRQ) { 1271 printf ("\tirq %d invalid.\n", irq); 1272 return (0); 1273 } 1274 1275 return (irq); 1276} 1277 1278static struct pci_int_desc ** 1279getintdescbytag (u_int irq, pcici_t tag) 1280{ 1281 struct pci_int_desc *p, **pp; 1282 1283 pp=&pci_int_desc[irq]; 1284 while (((p=*pp)) && !sametag(p->pcid_tag,tag)) 1285 pp=&p->pcid_next; 1286 1287 if (!p) return (NULL); 1288 1289 return (pp); 1290} 1291 1292static struct pci_int_desc * 1293getintdescbymptr (u_int irq, unsigned * mptr) 1294{ 1295 struct pci_int_desc *p; 1296 1297 for (p=pci_int_desc[irq];p;p=p->pcid_next) 1298 if (p->pcid_maskptr == mptr) break; 1299 return (p); 1300} 1301 1302/*----------------------------------------------------------------------- 1303** 1304** Map pci interrupt. 1305** 1306**----------------------------------------------------------------------- 1307*/ 1308 1309static unsigned pci_mask0 = 0; 1310 1311int pci_map_int (pcici_t tag, pci_inthand_t *func, void *arg, unsigned *maskptr) 1312{ 1313 u_int irq; 1314 int result, oldspl; 1315 unsigned mask; 1316 struct pci_int_desc *tail, *mdp=NULL, *new=NULL; 1317 1318 /* 1319 ** Get irq line from configuration space, 1320 ** and check for consistency. 1321 */ 1322 1323 irq = getirq (tag); 1324 if (irq >= PCI_MAX_IRQ) { 1325 printf ("\tillegal irq %d.\n", irq); 1326 return (0); 1327 }; 1328 mask= 1ul << irq; 1329 1330 /* 1331 ** disable this interrupt. 1332 */ 1333 1334 oldspl = splq (mask); 1335 1336 /* 1337 ** If handler for this tag already installed, 1338 ** remove it first. 1339 */ 1340 1341 if (getintdescbytag (irq, tag) != NULL) 1342 pci_unmap_int (tag); 1343 1344 /* 1345 ** If this irq not yet included in the mask, include it. 1346 */ 1347 1348 mdp = getintdescbymptr (irq, maskptr); 1349 if (!mdp) { 1350 result = pcibus->pb_imaskinc (irq, maskptr); 1351 if (result) 1352 goto conflict; 1353 }; 1354 1355 /* 1356 ** Allocate descriptor and initialize it. 1357 */ 1358 1359 tail = pci_int_desc[irq]; 1360 1361 new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK); 1362 bzero (new, sizeof (*new)); 1363 1364 new->pcid_next = tail; 1365 new->pcid_tag = tag; 1366 new->pcid_handler = func; 1367 new->pcid_argument = arg; 1368 new->pcid_maskptr = maskptr; 1369 new->pcid_tally = 0; 1370 new->pcid_mask = mask; 1371 1372 /* 1373 ** If first handler: install it. 1374 ** If second handler: install shared-int-handler. 1375 */ 1376 1377 if (!tail) { 1378 /* 1379 ** first handler for this irq. 1380 */ 1381 1382 result = pcibus->pb_iattach 1383 /* 1384 * XXX if we get here, then `func' must be pci_int 1385 * so the bogus casts are almost OK since they just 1386 * undo the bogus casts that were needed to pass 1387 * pci_int and its arg to pci_map_int(). 1388 */ 1389 (irq, (inthand2_t *) func, (int) arg, maskptr); 1390 if (result) goto conflict; 1391 1392#ifdef NO_SHARED_IRQ 1393 } else goto conflict; 1394#else 1395 } else if (!tail->pcid_next) { 1396 /* 1397 ** Second handler for this irq. 1398 */ 1399 1400 if (bootverbose) 1401 printf ("\tusing shared irq %d.\n", irq); 1402 1403 /* 1404 ** replace old handler by shared-int-handler. 1405 */ 1406 1407 result = pcibus->pb_idetach (irq, 1408 (inthand2_t *) tail->pcid_handler); 1409 if (result) 1410 printf ("\tCANNOT DETACH INT HANDLER.\n"); 1411 1412 result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0); 1413 if (result) { 1414 printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n"); 1415 goto fail; 1416 }; 1417 } 1418#endif 1419 /* 1420 ** Link new descriptor, reenable ints and done. 1421 */ 1422 1423 pci_int_desc[irq] = new; 1424 splx (oldspl); 1425 return (1); 1426 1427 /* 1428 ** Handle some problems. 1429 */ 1430 1431conflict: 1432 printf ("\tirq %d already in use.\n", irq); 1433fail: 1434 /* 1435 ** If descriptor allocated, free it. 1436 ** If included in mask, remove it. 1437 */ 1438 1439 if (new) free(new, M_DEVBUF); 1440 if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr); 1441 splx (oldspl); 1442 return (0); 1443} 1444 1445/*----------------------------------------------------------------------- 1446** 1447** Unmap pci interrupt. 1448** 1449**----------------------------------------------------------------------- 1450*/ 1451 1452int pci_unmap_int (pcici_t tag) 1453{ 1454 int result, oldspl; 1455 struct pci_int_desc *this, **hook, *tail; 1456 unsigned irq; 1457 1458 /* 1459 ** Get irq line from configuration space, 1460 ** and check for consistency. 1461 */ 1462 1463 irq = getirq (tag); 1464 if (irq >= PCI_MAX_IRQ) { 1465 printf ("\tillegal irq %d.\n", irq); 1466 return (0); 1467 }; 1468 1469 /* 1470 ** Search and unlink interrupt descriptor. 1471 */ 1472 1473 hook = getintdescbytag (irq, tag); 1474 if (hook == NULL) { 1475 printf ("\tno irq %d handler for pci %x\n", 1476 irq, tag.tag); 1477 return (0); 1478 }; 1479 1480 this = *hook; 1481 *hook= this->pcid_next; 1482 1483 /* 1484 ** Message 1485 */ 1486 1487 printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n", 1488 irq, this->pcid_handler, this->pcid_argument, 1489 this->pcid_tag.tag, this->pcid_tally); 1490 1491 /* 1492 ** If this irq no longer included in the mask, remove it. 1493 */ 1494 1495 if (!getintdescbymptr (irq, this->pcid_maskptr)) 1496 (void) pcibus->pb_imaskexc (irq, this->pcid_maskptr); 1497 1498 tail = pci_int_desc[irq]; 1499 1500 if (tail == NULL) { 1501 1502 /* 1503 ** Remove the old handler. 1504 */ 1505 1506 result = pcibus->pb_idetach (irq, 1507 (inthand2_t *) this->pcid_handler); 1508 if (result) 1509 printf ("\tirq %d: cannot remove handler.\n", irq); 1510 1511 } else if (tail->pcid_next == NULL) { 1512 1513 /* 1514 ** Remove the shared int handler. 1515 ** Install the last remaining handler. 1516 */ 1517 1518 oldspl = splq (1ul << irq); 1519 1520 result = pcibus->pb_idetach (irq, pci_int); 1521 if (result) 1522 printf ("\tirq %d: cannot remove handler.\n", irq); 1523 1524 result = pcibus->pb_iattach (irq, 1525 (inthand2_t *) tail->pcid_handler, 1526 (int) tail->pcid_argument, 1527 tail->pcid_maskptr); 1528 1529 if (result) 1530 printf ("\tirq %d: cannot install handler.\n", irq); 1531 1532 splx (oldspl); 1533 }; 1534 1535 free (this, M_DEVBUF); 1536 return (1); 1537} 1538 1539/*----------------------------------------------------------- 1540** 1541** Display of unknown devices. 1542** 1543**----------------------------------------------------------- 1544*/ 1545struct vt { 1546 u_short ident; 1547 char* name; 1548}; 1549 1550static struct vt VendorTable[] = { 1551 {0x0e11, "Compaq"}, 1552 {0x1000, "NCR/Symbios"}, 1553 {0x1002, "ATI Technologies Inc."}, 1554 {0x1004, "VLSI"}, 1555 {0x100B, "National Semiconductor"}, 1556 {0x100E, "Weitek"}, 1557 {0x1011, "Digital Equipment Corporation"}, 1558 {0x1013, "Cirrus Logic"}, 1559 {0x101A, "NCR"}, 1560 {0x1022, "AMD"}, 1561 {0x102B, "Matrox"}, 1562 {0x102C, "Chips & Technologies"}, 1563 {0x1039, "Silicon Integrated Systems"}, 1564 {0x1042, "SMC"}, 1565 {0x1044, "DPT"}, 1566 {0x1045, "OPTI"}, 1567 {0x104B, "Bus Logic"}, 1568 {0x1060, "UMC"}, 1569 {0x1080, "Contaq"}, 1570 {0x1095, "CMD"}, 1571 {0x10b9, "ACER Labs"}, 1572 {0x1106, "VIA Technologies"}, 1573 {0x5333, "S3 Inc."}, 1574 {0x8086, "Intel Corporation"}, 1575 {0x9004, "Adaptec"}, 1576 {0,0} 1577}; 1578 1579typedef struct { 1580 const int subclass; 1581 const char *name; 1582} subclass_name; 1583 1584/* 0x00 prehistoric subclasses */ 1585static const subclass_name old_subclasses[] = 1586{ 1587 { 0x00, "misc" }, 1588 { 0x01, "vga" }, 1589 { 0x00, NULL } 1590}; 1591 1592/* 0x01 mass storage subclasses */ 1593static const subclass_name storage_subclasses[] = 1594{ 1595 { 0x00, "scsi" }, 1596 { 0x01, "ide" }, 1597 { 0x02, "floppy"}, 1598 { 0x03, "ipi" }, 1599 { 0x80, "misc" }, 1600 { 0x00, NULL } 1601}; 1602 1603/* 0x02 network subclasses */ 1604static const subclass_name network_subclasses[] = 1605{ 1606 { 0x00, "ethernet" }, 1607 { 0x01, "tokenring" }, 1608 { 0x02, "fddi" }, 1609 { 0x80, "misc" }, 1610 { 0x00, NULL } 1611}; 1612 1613/* 0x03 display subclasses */ 1614static const subclass_name display_subclasses[] = 1615{ 1616 { 0x00, "vga" }, 1617 { 0x01, "xga" }, 1618 { 0x80, "misc" }, 1619 { 0x00, NULL } 1620}; 1621 1622/* 0x04 multimedia subclasses */ 1623static const subclass_name multimedia_subclasses[] = 1624{ 1625 { 0x00, "video" }, 1626 { 0x01, "audio" }, 1627 { 0x80, "misc" }, 1628 { 0x00, NULL } 1629}; 1630 1631/* 0x05 memory subclasses */ 1632static const subclass_name memory_subclasses[] = 1633{ 1634 { 0x00, "ram" }, 1635 { 0x01, "flash" }, 1636 { 0x80, "misc" }, 1637 { 0x00, NULL } 1638}; 1639 1640/* 0x06 bridge subclasses */ 1641static const subclass_name bridge_subclasses[] = 1642{ 1643 { 0x00, "host" }, 1644 { 0x01, "isa" }, 1645 { 0x02, "eisa" }, 1646 { 0x03, "mc" }, 1647 { 0x04, "pci" }, 1648 { 0x05, "pcmcia"}, 1649 { 0x80, "misc" }, 1650 { 0x00, NULL } 1651}; 1652 1653static const subclass_name *const subclasses[] = { 1654 old_subclasses, 1655 storage_subclasses, 1656 network_subclasses, 1657 display_subclasses, 1658 multimedia_subclasses, 1659 memory_subclasses, 1660 bridge_subclasses, 1661}; 1662 1663static const char *const majclasses[] = { 1664 "old", 1665 "storage", 1666 "network", 1667 "display", 1668 "multimedia", 1669 "memory", 1670 "bridge" 1671}; 1672 1673 1674void not_supported (pcici_t tag, u_long type) 1675{ 1676 u_long reg; 1677 u_long data; 1678 u_char class; 1679 u_char subclass; 1680 struct vt * vp; 1681 int pciint; 1682 int irq; 1683 1684 /* 1685 ** lookup the names. 1686 */ 1687 1688 for (vp=VendorTable; vp->ident; vp++) 1689 if (vp->ident == (type & 0xffff)) 1690 break; 1691 1692 /* 1693 ** and display them. 1694 */ 1695 1696 if (vp->ident) printf (vp->name); 1697 else printf ("vendor=0x%04lx", type & 0xffff); 1698 1699 printf (", device=0x%04lx", type >> 16); 1700 1701 data = pci_conf_read(tag, PCI_CLASS_REG); 1702 class = (data >> 24) & 0xff; 1703 subclass = (data >> 16) & 0xff; 1704 1705 if (class < sizeof(majclasses) / sizeof(majclasses[0])) { 1706 printf(", class=%s", majclasses[class]); 1707 } else { 1708 printf(", class=0x%02x", class); 1709 } 1710 1711 if (subclass < sizeof(subclasses) / sizeof(subclasses[0])) { 1712 const subclass_name *p = subclasses[class]; 1713 while (p->name && (p->subclass != subclass)) 1714 p++; 1715 if (p->name) { 1716 printf(" (%s)", p->name); 1717 } else { 1718 printf(" (unknown subclass 0x%02lx)", subclass); 1719 } 1720 } else { 1721 printf(", subclass=0x%02x", subclass); 1722 } 1723 1724 data = pci_conf_read (tag, PCI_INTERRUPT_REG); 1725 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 1726 1727 if (pciint) { 1728 1729 printf (" int %c irq ", 0x60+pciint); 1730 1731 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 1732 1733 /* 1734 ** If it's zero, the isa irq number is unknown, 1735 ** and we cannot bind the pci interrupt. 1736 */ 1737 1738 if (irq && (irq != 0xff)) 1739 printf ("%d", irq); 1740 else 1741 printf ("??"); 1742 }; 1743 1744 if (class != (PCI_CLASS_BRIDGE >> 24)) 1745 printf (" [no driver assigned]"); 1746 printf ("\n"); 1747 1748 if (bootverbose) { 1749 if (class == (PCI_CLASS_BRIDGE >> 24)) { 1750 printf ("configuration space registers:"); 1751 for (reg = 0; reg < 0x100; reg+=4) { 1752 if ((reg & 0x0f) == 0) printf ("\n%02x:\t", reg); 1753 printf ("%08x ", pci_conf_read (tag, reg)); 1754 } 1755 printf ("\n"); 1756 } else { 1757 for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) { 1758 data = pci_conf_read (tag, reg); 1759 if ((data&~7)==0) continue; 1760 switch (data&7) { 1761 1762 case 1: 1763 case 5: 1764 printf ("\tmap(%x): io(%04lx)\n", 1765 reg, data & ~3); 1766 break; 1767 case 0: 1768 printf ("\tmap(%x): mem32(%08lx)\n", 1769 reg, data & ~7); 1770 break; 1771 case 2: 1772 printf ("\tmap(%x): mem20(%05lx)\n", 1773 reg, data & ~7); 1774 break; 1775 case 4: 1776 printf ("\tmap(%x): mem64(%08x%08lx)\n", 1777 reg, pci_conf_read (tag, reg +4), data & ~7); 1778 reg += 4; 1779 break; 1780 } 1781 } 1782 } 1783 } 1784} 1785#endif /* NPCI */ 1786