pci.c revision 14153
1/************************************************************************** 2** 3** $Id: pci.c,v 1.45 1996/02/17 23:57:03 se Exp $ 4** 5** General subroutines for the PCI bus. 6** pci_configure () 7** 8** FreeBSD 9** 10**------------------------------------------------------------------------- 11** 12** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 13** 14** Redistribution and use in source and binary forms, with or without 15** modification, are permitted provided that the following conditions 16** are met: 17** 1. Redistributions of source code must retain the above copyright 18** notice, this list of conditions and the following disclaimer. 19** 2. Redistributions in binary form must reproduce the above copyright 20** notice, this list of conditions and the following disclaimer in the 21** documentation and/or other materials provided with the distribution. 22** 3. The name of the author may not be used to endorse or promote products 23** derived from this software without specific prior written permission. 24** 25** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35** 36*************************************************************************** 37*/ 38 39#include "pci.h" 40#if NPCI > 0 41 42/*======================================================== 43** 44** #includes and declarations 45** 46**======================================================== 47*/ 48 49#include <sys/param.h> 50#include <sys/systm.h> 51#include <sys/malloc.h> 52#include <sys/errno.h> 53#include <sys/kernel.h> 54#include <sys/sysctl.h> 55#include <sys/proc.h> /* declaration of wakeup(), used by vm.h */ 56#include <sys/devconf.h> 57 58#include <machine/cpu.h> /* bootverbose */ 59 60#include <vm/vm.h> 61#include <vm/vm_param.h> 62#include <vm/pmap.h> 63 64#include <sys/devconf.h> 65 66#include <i386/isa/isa_device.h> /* XXX inthand2_t */ 67 68#include <pci/pcivar.h> 69#include <pci/pcireg.h> 70#include <pci/pcibus.h> 71 72#define PCI_MAX_IRQ (16) 73 74 75/*======================================================== 76** 77** Structs and Functions 78** 79**======================================================== 80*/ 81 82struct pci_devconf { 83 struct kern_devconf pdc_kdc; 84 struct pci_info pdc_pi; 85}; 86 87struct pcicb { 88 struct pcicb *pcicb_next; 89 struct pcicb *pcicb_up; 90 struct pcicb *pcicb_down; 91 pcici_t pcicb_bridge; 92 93 u_long pcicb_seen; 94 u_char pcicb_bus; 95 u_char pcicb_subordinate; 96 u_char pcicb_flags; 97#define PCICB_ISAMEM 0x01 98 u_int pcicb_mfrom; 99 u_int pcicb_mupto; 100 u_int pcicb_mamount; 101 u_short pcicb_pfrom; 102 u_short pcicb_pupto; 103 u_short pcicb_pamount; 104 u_char pcicb_bfrom; 105 u_char pcicb_bupto; 106 107 u_long pcicb_iobase; 108 u_long pcicb_iolimit; 109 u_long pcicb_membase; 110 u_long pcicb_memlimit; 111 u_long pcicb_p_membase; 112 u_long pcicb_p_memlimit; 113}; 114 115static int pci_externalize (struct kern_devconf *, struct sysctl_req *); 116 117static int pci_internalize (struct kern_devconf *, struct sysctl_req *); 118 119static void 120not_supported (pcici_t tag, u_long type); 121 122static void 123pci_bus_config (void); 124 125static int 126pci_bridge_config (void); 127 128static int 129pci_mfdev (int bus, int device); 130 131/*======================================================== 132** 133** Variables 134** 135**======================================================== 136*/ 137 138/* 139** log2 of safe burst len (in words) 140*/ 141 142unsigned pci_max_burst_len = 3; /* 2=16Byte, 3=32Byte, 4=64Byte, ... */ 143unsigned pci_mechanism = 0; 144unsigned pci_maxdevice = 0; 145static struct pcibus* pcibus; 146 147/*-------------------------------------------------------- 148** 149** Local variables. 150** 151**-------------------------------------------------------- 152*/ 153 154static int pci_conf_count; 155static int pci_info_done; 156static struct pcicb pcibus0 = { 157 NULL, NULL, NULL, 158 { 0 }, 159 0, 0, 0, 0, 160 0, 0, 0, 0, 0, 0, 0, 0, /* real allocation */ 161 0, 0xFFFF, /* iobase/limit */ 162 0x2000000, 0xFFFFFFFFu, /* nonprefetch membase/limit */ 163 0x2000000, 0xFFFFFFFFu /* prefetch membase/limit */ 164}; 165static struct pcicb *pcicb; 166 167/*======================================================== 168** 169** pci_configure () 170** 171** Autoconfiguration of pci devices. 172** 173** May be called more than once. 174** Any device is attached only once. 175** 176** Has to take care of mirrored devices, which are 177** entailed by incomplete decoding of pci address lines. 178** 179**======================================================== 180*/ 181 182void pci_configure() 183{ 184 struct pcibus **pbp = (struct pcibus**) pcibus_set.ls_items; 185 186 /* 187 ** check pci bus present 188 */ 189 190 while (!pci_maxdevice && (pcibus = *pbp++)) { 191 (*pcibus->pb_setup)(); 192 } 193 194 if (!pci_maxdevice) return; 195 196 /* 197 ** hello world .. 198 */ 199 200 for (pcicb = &pcibus0; pcicb != NULL;) { 201 pci_bus_config (); 202 203 if (pcicb->pcicb_down) { 204 pcicb = pcicb->pcicb_down; 205 continue; 206 }; 207 208 while (pcicb && !pcicb->pcicb_next) 209 pcicb = pcicb->pcicb_up; 210 211 if (pcicb) 212 pcicb = pcicb->pcicb_next; 213 } 214 pci_conf_count++; 215} 216 217/*======================================================== 218** 219** Subroutines for configuration. 220** 221**======================================================== 222*/ 223 224static void 225pci_register_io (struct pcicb * cb, u_int base, u_int limit) 226{ 227#ifdef PCI_BRIDGE_DEBUG 228 if (bootverbose) 229 printf ("register_io: bus=%d base=%x limit=%x\n", 230 cb->pcicb_bus, base, limit); 231#endif 232 233 if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom) 234 cb->pcicb_pfrom = base; 235 if (limit > cb->pcicb_pupto) 236 cb->pcicb_pupto = limit; 237 238 /* 239 ** XXX should set bridge io mapping here 240 ** but it can be mapped in 4k blocks only, 241 ** leading to conflicts with isa/eisa .. 242 */ 243} 244 245static void 246pci_register_memory (struct pcicb * cb, u_int base, u_int limit) 247{ 248#ifdef PCI_BRIDGE_DEBUG 249 if (bootverbose) 250 printf ("register_mem: bus=%d base=%x limit=%x\n", 251 cb->pcicb_bus, base, limit); 252#endif 253 254 if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom) 255 cb->pcicb_mfrom = base; 256 if (limit > cb->pcicb_mupto) 257 cb->pcicb_mupto = limit; 258 /* 259 ** set the bridges mapping 260 ** 261 ** XXX should handle the 1Mb granularity. 262 */ 263 if (cb->pcicb_bridge.tag) { 264 pci_conf_write(cb->pcicb_bridge, 265 PCI_PCI_BRIDGE_MEM_REG, 266 (cb->pcicb_memlimit & 0xffff0000) | 267 (cb->pcicb_membase >> 16)); 268 if (bootverbose) 269 printf ("\t[pci%d uses memory from %x to %x]\n", 270 cb->pcicb_bus, 271 (unsigned) cb->pcicb_membase, 272 (unsigned) cb->pcicb_memlimit); 273 } 274} 275 276/* 277** XXX This function is neither complete nor tested. 278** It's only used if the bios hasn't done it's job 279** of mapping the pci devices in the physical memory. 280*/ 281 282static u_int 283pci_memalloc (struct pcicb * cb, u_int addr, u_int size) 284{ 285 u_int result = 0, limit=0, newbase=0; 286#ifdef PCI_BRIDGE_DEBUG 287 if (bootverbose) 288 printf ("memalloc: bus=%d addr=%x size=%x ..\n", 289 cb->pcicb_bus, addr, size); 290#endif 291 292 if (!cb) goto done; 293 294 if (!cb->pcicb_membase) { 295 printf ("memalloc: bus%d: membase not set.\n", 296 cb->pcicb_bus); 297 goto done; 298 } 299 300 /* 301 ** get upper allocation limit 302 */ 303 limit = cb->pcicb_memlimit; 304 if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit) 305 limit = cb->pcicb_mfrom-1; 306 307 /* 308 ** address fixed, and impossible to allocate ? 309 */ 310 if (addr && addr+size-1 > limit) 311 goto done; 312 313 /* 314 ** get possible address 315 */ 316 317 result = addr; 318 if (!result) result = ((limit + 1) / size - 1) * size; 319 320 /* 321 ** if not local available, request from parent. 322 */ 323 324 if (result < cb->pcicb_membase) { 325 newbase = pci_memalloc (cb->pcicb_up, result, size); 326 if (newbase) cb->pcicb_membase = result; 327 else result=0; 328 } 329done: 330 if (result) 331 pci_register_memory (cb, result, result+size-1); 332 333#ifdef PCI_BRIDGE_DEBUG 334 printf ("memalloc: bus=%d addr=%x size=%x --> %x (limit=%x).\n", 335 cb->pcicb_bus, addr, size, result, limit); 336#endif 337 338 return (result); 339} 340 341/*======================================================== 342** 343** pci_bus_config() 344** 345** Autoconfiguration of one pci bus. 346** 347**======================================================== 348*/ 349 350static int 351pci_mfdev (int bus, int device) 352{ 353 pcici_t tag0,tag1; 354 int pci_id0, pci_id1; 355 356 /* 357 ** Detect a multi-function device that complies to the PCI 2.0 spec 358 */ 359 tag0 = pcibus->pb_tag (bus, device, 0); 360 if (pcibus->pb_read (tag0, PCI_HEADER_MISC) & PCI_HEADER_MULTIFUNCTION) 361 return 1; 362 363 /* 364 ** Well, as always: Theory and implementation of PCI ... 365 ** 366 ** If there is a valid device ID returned for function 1 AND 367 ** the device ID of function 0 and 1 is different OR 368 ** the first mapping register of 0 and 1 differs, 369 ** then assume a multi-function device anyway ... 370 ** 371 ** Example of such a broken device: ISA and IDE chip i83371FB (Triton) 372 */ 373 tag1 = pcibus->pb_tag (bus, device, 1); 374 pci_id1 = pcibus->pb_read (tag1, PCI_ID_REG); 375 376 if (pci_id1 != 0xffffffff) { 377 378 pci_id0 = pcibus->pb_read (tag0, PCI_ID_REG); 379 380 if (pci_id0 != pci_id1) 381 return 1; 382 383 if (pcibus->pb_read (tag0, PCI_MAP_REG_START) 384 != pcibus->pb_read (tag1, PCI_MAP_REG_START)) 385 return 1; 386 } 387 return 0; 388} 389 390static void 391pci_bus_config (void) 392{ 393 int bus_no; 394 u_char device; 395 u_char reg; 396 pcici_t tag, mtag; 397 pcidi_t type; 398 u_long data; 399 int unit; 400 u_char pciint; 401 u_char irq; 402 403 struct pci_device *dvp; 404 405 struct pci_devconf *pdcp; 406 407 /* 408 ** first initialize the bridge (bus controller chip) 409 */ 410 bus_no = pci_bridge_config (); 411 412 printf ("Probing for devices on PCI bus %d:\n", bus_no); 413#ifndef PCI_QUIET 414 if (bootverbose && !pci_info_done) { 415 pci_info_done=1; 416 printf ("\tconfiguration mode %d allows %d devices.\n", 417 pci_mechanism, pci_maxdevice); 418 }; 419#endif 420 for (device=0; device<pci_maxdevice; device ++) { 421 char *name = NULL; 422 struct pci_device **dvpp; 423 int func, maxfunc = 0; 424 425 if ((pcicb->pcicb_seen >> device) & 1) 426 continue; 427 428 for (func=0; func <= maxfunc; func++) { 429 tag = pcibus->pb_tag (bus_no, device, func); 430 type = pcibus->pb_read (tag, PCI_ID_REG); 431 432 if ((!type) || (type==0xfffffffful)) continue; 433 434 /* 435 ** lookup device in ioconfiguration: 436 */ 437 438 dvpp = (struct pci_device **)pcidevice_set.ls_items; 439 440 while (dvp = *dvpp++) { 441 if (dvp->pd_probe) { 442 if (name=(*dvp->pd_probe)(tag, type)) 443 break; 444 } 445 }; 446 /* 447 ** check for mirrored devices. 448 */ 449 if (func != 0) { 450 goto real_device; 451 } 452 if (device & 0x10) { 453 mtag=pcibus->pb_tag (bus_no, 454 (u_char)(device & ~0x10), 0); 455 } else if (device & 0x08) { 456 mtag=pcibus->pb_tag (bus_no, 457 (u_char)(device & ~0x08), 0); 458 } else goto real_device; 459 460 if (type!=pcibus->pb_read (mtag, PCI_ID_REG)) 461 goto real_device; 462 463 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) 464 if (pcibus->pb_read(tag,reg)!=pcibus->pb_read(mtag,reg)) 465 goto real_device; 466 467#ifndef PCI_QUIET 468 if (dvp==NULL) continue; 469 if (bootverbose) 470 printf ("%s? <%s> mirrored on pci%d:%d\n", 471 dvp->pd_name, name, bus_no, device); 472#endif 473 continue; 474 475 real_device: 476 477#ifndef PCI_QUIET 478#ifdef PCI_BRIDGE_DEBUG 479 if (bootverbose) { 480 printf ("\tconfig header: 0x%08x 0x%08x 0x%08x 0x%08x\n", 481 pci_conf_read (tag, 0), 482 pci_conf_read (tag, 4), 483 pci_conf_read (tag, 8), 484 pci_conf_read (tag, 12)); 485 } 486#endif 487#endif 488 489 if (func == 0 && pci_mfdev (bus_no, device)) { 490 maxfunc = 7; 491 } 492 493 if (dvp==NULL) { 494#ifndef PCI_QUIET 495 if (pci_conf_count) 496 continue; 497 printf("%s%d:%d: ", pcibus->pb_name, bus_no, device); 498 not_supported (tag, type); 499#endif 500 continue; 501 }; 502 503 pcicb->pcicb_seen |= (1ul << device); 504 505 /* 506 ** Get and increment the unit. 507 */ 508 509 unit = (*dvp->pd_count)++; 510 511 /* 512 ** ignore device ? 513 */ 514 515 if (!*name) continue; 516 517 /* 518 ** Announce this device 519 */ 520 521 printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name, 522 (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff); 523 524 /* 525 ** Get the int pin number (pci interrupt number a-d) 526 ** from the pci configuration space. 527 */ 528 529 data = pcibus->pb_read (tag, PCI_INTERRUPT_REG); 530 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 531 532 if (pciint) { 533 534 printf (" int %c irq ", 0x60+pciint); 535 536 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 537 538 /* 539 ** If it's zero, the isa irq number is unknown, 540 ** and we cannot bind the pci interrupt. 541 */ 542 543 if (irq && (irq != 0xff)) 544 printf ("%d", irq); 545 else 546 printf ("??"); 547 }; 548 549 printf (" on pci%d:%d\n", bus_no, device); 550 551 /* 552 ** Read the current mapping, 553 ** and update the pcicb fields. 554 */ 555 556 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) { 557 u_int map, addr, size; 558 559 data = pci_conf_read(tag, PCI_CLASS_REG); 560 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 561 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 562 continue; 563 }; 564 565 map = pcibus->pb_read (tag, reg); 566 if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK)) 567 continue; 568 569 pcibus->pb_write (tag, reg, 0xffffffff); 570 data = pcibus->pb_read (tag, reg); 571 pcibus->pb_write (tag, reg, map); 572 573 switch (data & 7) { 574 575 default: 576 continue; 577 case 1: 578 case 5: 579 addr = map & PCI_MAP_IO_ADDRESS_MASK; 580 size = -(data & PCI_MAP_IO_ADDRESS_MASK); 581 size &= ~(addr ^ -addr); 582 583 pci_register_io (pcicb, addr, addr+size-1); 584 pcicb->pcicb_pamount += size; 585 break; 586 587 case 0: 588 case 2: 589 case 4: 590 size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 591 addr = map & PCI_MAP_MEMORY_ADDRESS_MASK; 592 if (addr >= 0x100000) { 593 pci_register_memory 594 (pcicb, addr, addr+size-1); 595 pcicb->pcicb_mamount += size; 596 } else { 597 pcicb->pcicb_flags |= PCICB_ISAMEM; 598 }; 599 break; 600 }; 601 if (bootverbose) 602 printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n", 603 reg, map&7, addr, size); 604 }; 605 606 /* 607 ** Allocate a devconf structure 608 ** We should, and eventually will, set the 609 ** parent pointer to a pci bus devconf structure, 610 ** and arrange to set the state field dynamically. 611 */ 612 613 pdcp = (struct pci_devconf *) 614 malloc (sizeof (struct pci_devconf),M_DEVBUF,M_WAITOK); 615 bzero(pdcp, sizeof(struct pci_devconf)); 616 617 pdcp -> pdc_pi.pi_bus = bus_no; 618 pdcp -> pdc_pi.pi_device = device; 619 pdcp -> pdc_pi.pi_func = func; 620 621 pdcp -> pdc_kdc.kdc_name = dvp->pd_name; 622 pdcp -> pdc_kdc.kdc_unit = unit; 623 624 pdcp -> pdc_kdc.kdc_md.mddc_devtype = MDDT_PCI; 625 626 pdcp -> pdc_kdc.kdc_externalize = pci_externalize; 627 pdcp -> pdc_kdc.kdc_internalize = pci_internalize; 628 629 pdcp -> pdc_kdc.kdc_datalen = PCI_EXTERNAL_LEN; 630 pdcp -> pdc_kdc.kdc_parentdata = &pdcp->pdc_pi; 631 pdcp -> pdc_kdc.kdc_state = DC_UNKNOWN; 632 pdcp -> pdc_kdc.kdc_description = name; 633 pdcp -> pdc_kdc.kdc_shutdown = dvp->pd_shutdown; 634 635 /* 636 ** And register this device 637 */ 638 639 dev_attach (&pdcp->pdc_kdc); 640 641 /* 642 ** attach device 643 ** may produce additional log messages, 644 ** i.e. when installing subdevices. 645 */ 646 647 (*dvp->pd_attach) (tag, unit); 648 649 /* 650 ** Special processing of certain classes 651 */ 652 653 data = pci_conf_read(tag, PCI_CLASS_REG); 654 655 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 656 struct pcicb *this, **link; 657 unsigned char primary, secondary, subordinate; 658 u_int command; 659 660 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 661 662 /* 663 ** get current configuration of the bridge. 664 */ 665 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 666 primary = PCI_PRIMARY_BUS_EXTRACT (data); 667 secondary = PCI_SECONDARY_BUS_EXTRACT(data); 668 subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data); 669#ifndef PCI_QUIET 670 if (bootverbose) { 671 printf ("\tbridge from pci%d to pci%d through %d.\n", 672 primary, secondary, subordinate); 673 printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx\n", 674 pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG), 675 pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG), 676 pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG)); 677 } 678#endif 679 /* 680 ** check for uninitialized bridge. 681 */ 682 if (secondary == 0 || secondary < primary || 683 bus_no != primary) 684 { 685 printf ("\tINCORRECTLY or NEVER CONFIGURED.\n"); 686 /* 687 ** disable this bridge 688 */ 689 pcibus->pb_write (tag, PCI_COMMAND_STATUS_REG, 690 0xffff0000); 691 secondary = 0; 692 subordinate = 0; 693 }; 694 695 /* 696 ** allocate bus descriptor for bus behind the bridge 697 */ 698 link = &pcicb->pcicb_down; 699 while (*link) link = &(*link)->pcicb_next; 700 701 this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK); 702 703 /* 704 ** Initialize this descriptor so far. 705 ** (the initialization is completed just before 706 ** scanning the bus behind the bridge. 707 */ 708 bzero (this, sizeof(*this)); 709 this->pcicb_up = pcicb; 710 this->pcicb_bridge = tag; 711 this->pcicb_bus = secondary; 712 this->pcicb_subordinate = subordinate; 713 714 command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG); 715 716 if (command & PCI_COMMAND_IO_ENABLE){ 717 /* 718 ** Bridge was configured by the bios. 719 ** Read out the mapped io region. 720 */ 721 u_int reg, data, mask; 722 723 reg = pci_conf_read (tag, 724 PCI_PCI_BRIDGE_IO_REG); 725 pci_conf_write(tag, 726 PCI_PCI_BRIDGE_IO_REG, 0xFFFF); 727 data = pci_conf_read (tag, 728 PCI_PCI_BRIDGE_IO_REG); 729 pci_conf_write(tag, 730 PCI_PCI_BRIDGE_IO_REG, reg & 0xffff); 731 732 mask = (0xFF00 ^ (data & 0xFF00)) | 0xFF; 733 734 this->pcicb_iobase = 735 PCI_PPB_IOBASE_EXTRACT (reg); 736 this->pcicb_iolimit = 737 PCI_PPB_IOLIMIT_EXTRACT(reg) | mask; 738 739 /* 740 ** Note the used io space. 741 */ 742 pci_register_io (pcicb, this->pcicb_iobase, 743 this->pcicb_iolimit); 744 745 }; 746 747 if (command & PCI_COMMAND_MEM_ENABLE) { 748 /* 749 ** Bridge was configured by the bios. 750 ** Read out the mapped memory regions. 751 */ 752 u_int reg, data, mask; 753 754 /* 755 ** non prefetchable memory 756 */ 757 reg = pci_conf_read (tag, 758 PCI_PCI_BRIDGE_MEM_REG); 759 pci_conf_write(tag, 760 PCI_PCI_BRIDGE_MEM_REG, 0xFFFFFFFF); 761 data = pci_conf_read (tag, 762 PCI_PCI_BRIDGE_MEM_REG); 763 pci_conf_write(tag, 764 PCI_PCI_BRIDGE_MEM_REG, reg); 765 766 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 767 this->pcicb_membase = 768 PCI_PPB_MEMBASE_EXTRACT (reg); 769 this->pcicb_memlimit = 770 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 771 772 /* 773 ** Register used memory space. 774 */ 775 pci_register_memory (pcicb, 776 this->pcicb_membase, 777 this->pcicb_memlimit); 778 779 /* 780 ** prefetchable memory 781 */ 782 reg = pci_conf_read (tag, 783 PCI_PCI_BRIDGE_PMEM_REG); 784 pci_conf_write(tag, 785 PCI_PCI_BRIDGE_PMEM_REG, 0xFFFFFFFF); 786 data = pci_conf_read (tag, 787 PCI_PCI_BRIDGE_PMEM_REG); 788 pci_conf_write(tag, 789 PCI_PCI_BRIDGE_PMEM_REG, reg); 790 791 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 792 this->pcicb_p_membase= 793 PCI_PPB_MEMBASE_EXTRACT (reg); 794 this->pcicb_p_memlimit= 795 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 796 797 /* 798 ** Register used memory space. 799 */ 800 pci_register_memory (pcicb, 801 this->pcicb_p_membase, 802 this->pcicb_p_memlimit); 803 } 804 805 /* 806 ** Link it in chain. 807 */ 808 *link=this; 809 810 /* 811 ** Update mapping info of parent bus. 812 */ 813 if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom) 814 pcicb->pcicb_bfrom = secondary; 815 if (subordinate > pcicb->pcicb_bupto) 816 pcicb->pcicb_bupto = subordinate; 817 818 break; 819 } 820 } 821 } 822 823#ifndef PCI_QUIET 824 if (bootverbose) { 825 if (pcicb->pcicb_mamount) 826 printf ("%s%d: uses %d bytes of memory from %x upto %x.\n", 827 pcibus->pb_name, bus_no, 828 pcicb->pcicb_mamount, 829 pcicb->pcicb_mfrom, pcicb->pcicb_mupto); 830 if (pcicb->pcicb_pamount) 831 printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n", 832 pcibus->pb_name, bus_no, 833 pcicb->pcicb_pamount, 834 pcicb->pcicb_pfrom, pcicb->pcicb_pupto); 835 if (pcicb->pcicb_bfrom) 836 printf ("%s%d: subordinate busses from %x upto %x.\n", 837 pcibus->pb_name, bus_no, 838 pcicb->pcicb_bfrom, pcicb->pcicb_bupto); 839 } 840#endif 841} 842 843/*======================================================== 844** 845** pci_bridge_config() 846** 847** Configuration of a pci bridge. 848** 849**======================================================== 850*/ 851 852static int 853pci_bridge_config (void) 854{ 855 pcici_t tag; 856 struct pcicb* parent; 857 858 tag = pcicb->pcicb_bridge; 859 if (tag.tag) { 860 861 if (!pcicb->pcicb_bus) { 862 u_int data; 863 /* 864 ** Get the lowest available bus number. 865 */ 866 pcicb->pcicb_bus = ++pcibus0.pcicb_subordinate; 867 868 /* 869 ** and configure the bridge 870 */ 871 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 872 data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus); 873 data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus); 874 data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus); 875 pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data); 876 877 /* 878 ** Propagate the new upper bus number limit. 879 */ 880 for (parent = pcicb->pcicb_up; parent != NULL; 881 parent = parent->pcicb_up) 882 { 883 if (parent->pcicb_subordinate >= pcicb->pcicb_bus) 884 continue; 885 parent->pcicb_subordinate = pcicb->pcicb_bus; 886 if (!parent->pcicb_bridge.tag) 887 continue; 888 data = pci_conf_read 889 (parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG); 890 data = PCI_SUBORDINATE_BUS_INSERT 891 (data, pcicb->pcicb_bus); 892 pci_conf_write (parent->pcicb_bridge, 893 PCI_PCI_BRIDGE_BUS_REG, data); 894 } 895 } 896 897 if (!pcicb->pcicb_membase) { 898 u_int size = 0x100000; 899 pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size); 900 if (pcicb->pcicb_membase) 901 pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1; 902 } 903 } 904 return pcicb->pcicb_bus; 905} 906 907/*----------------------------------------------------------------- 908** 909** The following functions are provided for the device driver 910** to read/write the configuration space. 911** 912** pci_conf_read(): 913** Read a long word from the pci configuration space. 914** Requires a tag (from pcitag) and the register 915** number (should be a long word alligned one). 916** 917** pci_conf_write(): 918** Writes a long word to the pci configuration space. 919** Requires a tag (from pcitag), the register number 920** (should be a long word alligned one), and a value. 921** 922**----------------------------------------------------------------- 923*/ 924 925u_long 926pci_conf_read (pcici_t tag, u_long reg) 927{ 928 return (pcibus->pb_read (tag, reg)); 929} 930 931void 932pci_conf_write (pcici_t tag, u_long reg, u_long data) 933{ 934 pcibus->pb_write (tag, reg, data); 935} 936 937/*----------------------------------------------------------------------- 938** 939** Map device into port space. 940** 941** Actually the device should have been mapped by the bios. 942** This function only reads and verifies the value. 943** 944** PCI-Specification: 6.2.5.1: address maps 945** 946**----------------------------------------------------------------------- 947*/ 948 949int pci_map_port (pcici_t tag, u_long reg, u_short* pa) 950{ 951 unsigned data, ioaddr, iosize; 952 struct pcicb *link = pcicb; 953 954 /* 955 ** sanity check 956 */ 957 958 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 959 printf ("pci_map_port failed: bad register=0x%x\n", 960 (unsigned)reg); 961 return (0); 962 }; 963 964 /*if (pcicb->pcicb_flags & PCICB_NOIOSET) { 965 printf ("pci_map_port failed: pci%d has not been configured for I/O access\n", 966 pcicb->pcicb_bus); 967 return (0); 968 }*/ 969 970 /* 971 ** get size and type of port 972 ** 973 ** type is in the lowest two bits. 974 ** If device requires 2^n bytes, the next 975 ** n-2 bits are hardwired as 0. 976 */ 977 978 ioaddr = pcibus->pb_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK; 979 if (!ioaddr) { 980 printf ("pci_map_port failed: not configured by bios.\n"); 981 return (0); 982 }; 983 984 pcibus->pb_write (tag, reg, 0xfffffffful); 985 data = pcibus->pb_read (tag, reg); 986 pcibus->pb_write (tag, reg, ioaddr); 987 988 if ((data & 0x03) != PCI_MAP_IO) { 989 printf ("pci_map_port failed: bad port type=0x%x\n", 990 (unsigned) data); 991 return (0); 992 }; 993 iosize = -(data & PCI_MAP_IO_ADDRESS_MASK); 994 iosize &= ~(ioaddr ^ -ioaddr); 995 if (ioaddr < pcicb->pcicb_iobase 996 || ioaddr + iosize -1 > pcicb->pcicb_iolimit) { 997 printf ("pci_map_port failed: device's iorange 0x%x-0x%x " 998 "is incompatible with its bridge's range 0x%x-0x%x\n", 999 (unsigned) ioaddr, (unsigned) ioaddr + iosize - 1, 1000 (unsigned) pcicb->pcicb_iobase, 1001 (unsigned) pcicb->pcicb_iolimit); 1002 return (0); 1003 } 1004 1005#ifndef PCI_QUIET 1006 if (bootverbose) 1007 printf ("\treg%d: ioaddr=0x%x size=0x%x\n", 1008 (unsigned) reg, (unsigned) ioaddr, (unsigned) iosize); 1009#endif 1010 /* 1011 ** set the configuration register of and 1012 ** return the address to the driver. 1013 ** Make sure to enable each upstream bridge 1014 ** so I/O and DMA can go all the way. 1015 */ 1016 1017 for (;;) { 1018 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1019 data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1020 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 1021 if ((link = link->pcicb_up) == NULL) 1022 break; 1023 tag = link->pcicb_bridge; 1024 } 1025 1026 *pa = ioaddr; 1027 1028 return (1); 1029} 1030 1031/*----------------------------------------------------------------------- 1032** 1033** Map device into virtual and physical space 1034** 1035** Actually the device should have been mapped by the bios. 1036** This function only reads and verifies the value. 1037** 1038** PCI-Specification: 6.2.5.1: address maps 1039** 1040**----------------------------------------------------------------------- 1041*/ 1042 1043int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa) 1044{ 1045 struct pcicb *link = pcicb; 1046 unsigned data ,paddr; 1047 vm_size_t psize, poffs; 1048 vm_offset_t vaddr; 1049 1050 /* 1051 ** sanity check 1052 */ 1053 1054 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 1055 printf ("pci_map_mem failed: bad register=0x%x\n", 1056 (unsigned)reg); 1057 return (0); 1058 }; 1059 1060 /* 1061 ** save old mapping, get size and type of memory 1062 ** 1063 ** type is in the lowest four bits. 1064 ** If device requires 2^n bytes, the next 1065 ** n-4 bits are read as 0. 1066 */ 1067 1068 paddr = pcibus->pb_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK; 1069 pcibus->pb_write (tag, reg, 0xfffffffful); 1070 data = pcibus->pb_read (tag, reg); 1071 pcibus->pb_write (tag, reg, paddr); 1072 1073 /* 1074 ** check the type 1075 */ 1076 1077 if ((data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT) { 1078 printf ("pci_map_mem failed: bad memory type=0x%x\n", 1079 (unsigned) data); 1080 return (0); 1081 }; 1082 1083 /* 1084 ** get the size. 1085 */ 1086 1087 psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 1088 1089 if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) { 1090 paddr = pci_memalloc (pcicb, 0, psize); 1091 if (!paddr) { 1092 printf ("pci_map_mem: not configured by bios.\n"); 1093 return (0); 1094 }; 1095 pci_register_memory (pcicb, paddr, paddr+psize-1); 1096 }; 1097 1098 if (paddr < pcicb->pcicb_membase || 1099 paddr + psize - 1 > pcicb->pcicb_memlimit) { 1100 printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is " 1101 "incompatible with its bridge's memrange 0x%x-0x%x\n", 1102 (unsigned) paddr, 1103 (unsigned) (paddr + psize - 1), 1104 (unsigned) pcicb->pcicb_membase, 1105 (unsigned) pcicb->pcicb_memlimit); 1106/* return (0);*/ 1107/* ACHTUNG: Ist der Code richtig, wenn eine PCI-PCI-Bridge fuer 1108 * die PCI-Slots verwendet wird, aber die Onboard-Devices direkt 1109 * an der CPU-PCI-Bridge haengen (Siehe Compaq Prolinea Problem) ??? 1110 */ 1111 } 1112 pcibus->pb_write (tag, reg, paddr); 1113 1114 /* 1115 ** Truncate paddr to page boundary. 1116 ** (Or does pmap_mapdev the job?) 1117 */ 1118 1119 poffs = paddr - trunc_page (paddr); 1120 vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs); 1121 1122 if (!vaddr) return (0); 1123 1124 vaddr += poffs; 1125 1126#ifndef PCI_QUIET 1127 /* 1128 ** display values. 1129 */ 1130 1131 if (bootverbose) 1132 printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n", 1133 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize); 1134#endif 1135 /* 1136 ** set the configuration register and 1137 ** return the address to the driver 1138 ** Make sure to enable each upstream bridge 1139 ** so memory and DMA can go all the way. 1140 */ 1141 1142 for (;;) { 1143 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1144 data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1145 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 1146 if ((link = link->pcicb_up) == NULL) 1147 break; 1148 tag = link->pcicb_bridge; 1149 } 1150 1151 *va = vaddr; 1152 *pa = paddr; 1153 1154 return (1); 1155} 1156 1157/*------------------------------------------------------------ 1158** 1159** Interface functions for the devconf module. 1160** 1161**------------------------------------------------------------ 1162*/ 1163 1164static int 1165pci_externalize (struct kern_devconf *kdcp, struct sysctl_req *req) 1166{ 1167 struct pci_externalize_buffer buffer; 1168 struct pci_info * pip = kdcp->kdc_parentdata; 1169 pcici_t tag; 1170 int i; 1171 1172 tag = pcibus->pb_tag (pip->pi_bus, pip->pi_device, pip->pi_func); 1173 1174 buffer.peb_pci_info = *pip; 1175 1176 for (i=0; i<PCI_EXT_CONF_LEN; i++) { 1177 buffer.peb_config[i] = pcibus->pb_read (tag, i*4); 1178 }; 1179 1180 return SYSCTL_OUT(req, &buffer, sizeof buffer); 1181} 1182 1183 1184static int 1185pci_internalize (struct kern_devconf *kdcp, struct sysctl_req *re) 1186{ 1187 return EOPNOTSUPP; 1188} 1189 1190/*----------------------------------------------------------------------- 1191** 1192** Pci meta interrupt handler 1193** 1194** This handler assumes level triggered interrupts. 1195** It's possible to build a kernel which handles shared 1196** edge triggered interrupts by the options "PCI_EDGE_INT". 1197** But there is a performance penalty. 1198** 1199** (Of course you can delete the #ifdef PCI_EDGE_INT bracketed 1200** code at all :-) :-) :-) 1201** 1202**----------------------------------------------------------------------- 1203*/ 1204 1205static struct pci_int_desc* 1206 pci_int_desc [PCI_MAX_IRQ]; 1207 1208#ifndef NO_SHARED_IRQ 1209 1210static inline unsigned 1211splq (unsigned mask) 1212{ 1213 unsigned temp=cpl; 1214 cpl |= mask; 1215 return temp; 1216} 1217 1218static void 1219pci_int (int irq) 1220{ 1221 struct pci_int_desc * p; 1222 int s; 1223 1224 if (irq<0 || irq >= PCI_MAX_IRQ) { 1225 printf ("pci_int: irq %d out of range, ignored\n", irq); 1226 return; 1227 }; 1228 for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) { 1229 s = splq (*p->pcid_maskptr); 1230 (*p->pcid_handler) (p->pcid_argument); 1231 p-> pcid_tally++; 1232 splx (s); 1233#if 0 1234 if (p->pcid_tally<20) 1235 printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n", 1236 irq, p->pcid_handler, s, cpl, c); 1237#endif 1238 }; 1239} 1240#endif 1241 1242/*----------------------------------------------------------------------- 1243** 1244** Auxiliary function for interrupt (un)mapping. 1245** 1246**----------------------------------------------------------------------- 1247*/ 1248 1249static u_int 1250getirq (pcici_t tag) 1251{ 1252 u_int irq; 1253 1254 irq = PCI_INTERRUPT_LINE_EXTRACT( 1255 pcibus->pb_read (tag, PCI_INTERRUPT_REG)); 1256 1257 if (irq <= 0) { 1258 printf ("\tint line register not set by bios\n"); 1259 return (0); 1260 } 1261 1262 if (irq >= pcibus->pb_maxirq || irq >= PCI_MAX_IRQ) { 1263 printf ("\tirq %d invalid.\n", irq); 1264 return (0); 1265 } 1266 1267 return (irq); 1268} 1269 1270static struct pci_int_desc ** 1271getintdescbytag (u_int irq, pcici_t tag) 1272{ 1273 struct pci_int_desc *p, **pp; 1274 1275 pp=&pci_int_desc[irq]; 1276 while (((p=*pp)) && !sametag(p->pcid_tag,tag)) 1277 pp=&p->pcid_next; 1278 1279 if (!p) return (NULL); 1280 1281 return (pp); 1282} 1283 1284static struct pci_int_desc * 1285getintdescbymptr (u_int irq, unsigned * mptr) 1286{ 1287 struct pci_int_desc *p; 1288 1289 for (p=pci_int_desc[irq];p;p=p->pcid_next) 1290 if (p->pcid_maskptr == mptr) break; 1291 return (p); 1292} 1293 1294/*----------------------------------------------------------------------- 1295** 1296** Map pci interrupt. 1297** 1298**----------------------------------------------------------------------- 1299*/ 1300 1301static unsigned pci_mask0 = 0; 1302 1303int pci_map_int (pcici_t tag, pci_inthand_t *func, void *arg, unsigned *maskptr) 1304{ 1305 u_int irq; 1306 int result, oldspl; 1307 unsigned mask; 1308 struct pci_int_desc *tail, *mdp=NULL, *new=NULL; 1309 1310 /* 1311 ** Get irq line from configuration space, 1312 ** and check for consistency. 1313 */ 1314 1315 irq = getirq (tag); 1316 if (irq >= PCI_MAX_IRQ) { 1317 printf ("\tillegal irq %d.\n", irq); 1318 return (0); 1319 }; 1320 mask= 1ul << irq; 1321 1322 /* 1323 ** disable this interrupt. 1324 */ 1325 1326 oldspl = splq (mask); 1327 1328 /* 1329 ** If handler for this tag already installed, 1330 ** remove it first. 1331 */ 1332 1333 if (getintdescbytag (irq, tag) != NULL) 1334 pci_unmap_int (tag); 1335 1336 /* 1337 ** If this irq not yet included in the mask, include it. 1338 */ 1339 1340 mdp = getintdescbymptr (irq, maskptr); 1341 if (!mdp) { 1342 result = pcibus->pb_imaskinc (irq, maskptr); 1343 if (result) 1344 goto conflict; 1345 }; 1346 1347 /* 1348 ** Allocate descriptor and initialize it. 1349 */ 1350 1351 tail = pci_int_desc[irq]; 1352 1353 new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK); 1354 bzero (new, sizeof (*new)); 1355 1356 new->pcid_next = tail; 1357 new->pcid_tag = tag; 1358 new->pcid_handler = func; 1359 new->pcid_argument = arg; 1360 new->pcid_maskptr = maskptr; 1361 new->pcid_tally = 0; 1362 new->pcid_mask = mask; 1363 1364 /* 1365 ** If first handler: install it. 1366 ** If second handler: install shared-int-handler. 1367 */ 1368 1369 if (!tail) { 1370 /* 1371 ** first handler for this irq. 1372 */ 1373 1374 result = pcibus->pb_iattach 1375 /* 1376 * XXX if we get here, then `func' must be pci_int 1377 * so the bogus casts are almost OK since they just 1378 * undo the bogus casts that were needed to pass 1379 * pci_int and its arg to pci_map_int(). 1380 */ 1381 (irq, (inthand2_t *) func, (int) arg, maskptr); 1382 if (result) goto conflict; 1383 1384#ifdef NO_SHARED_IRQ 1385 } else goto conflict; 1386#else 1387 } else if (!tail->pcid_next) { 1388 /* 1389 ** Second handler for this irq. 1390 */ 1391 1392 if (bootverbose) 1393 printf ("\tusing shared irq %d.\n", irq); 1394 1395 /* 1396 ** replace old handler by shared-int-handler. 1397 */ 1398 1399 result = pcibus->pb_idetach (irq, 1400 (inthand2_t *) tail->pcid_handler); 1401 if (result) 1402 printf ("\tCANNOT DETACH INT HANDLER.\n"); 1403 1404 result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0); 1405 if (result) { 1406 printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n"); 1407 goto fail; 1408 }; 1409 } 1410#endif 1411 /* 1412 ** Link new descriptor, reenable ints and done. 1413 */ 1414 1415 pci_int_desc[irq] = new; 1416 splx (oldspl); 1417 return (1); 1418 1419 /* 1420 ** Handle some problems. 1421 */ 1422 1423conflict: 1424 printf ("\tirq %d already in use.\n", irq); 1425fail: 1426 /* 1427 ** If descriptor allocated, free it. 1428 ** If included in mask, remove it. 1429 */ 1430 1431 if (new) free(new, M_DEVBUF); 1432 if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr); 1433 splx (oldspl); 1434 return (0); 1435} 1436 1437/*----------------------------------------------------------------------- 1438** 1439** Unmap pci interrupt. 1440** 1441**----------------------------------------------------------------------- 1442*/ 1443 1444int pci_unmap_int (pcici_t tag) 1445{ 1446 int result, oldspl; 1447 struct pci_int_desc *this, **hook, *tail; 1448 unsigned irq; 1449 1450 /* 1451 ** Get irq line from configuration space, 1452 ** and check for consistency. 1453 */ 1454 1455 irq = getirq (tag); 1456 if (irq >= PCI_MAX_IRQ) { 1457 printf ("\tillegal irq %d.\n", irq); 1458 return (0); 1459 }; 1460 1461 /* 1462 ** Search and unlink interrupt descriptor. 1463 */ 1464 1465 hook = getintdescbytag (irq, tag); 1466 if (hook == NULL) { 1467 printf ("\tno irq %d handler for pci %x\n", 1468 irq, tag.tag); 1469 return (0); 1470 }; 1471 1472 this = *hook; 1473 *hook= this->pcid_next; 1474 1475 /* 1476 ** Message 1477 */ 1478 1479 printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n", 1480 irq, this->pcid_handler, this->pcid_argument, 1481 this->pcid_tag.tag, this->pcid_tally); 1482 1483 /* 1484 ** If this irq no longer included in the mask, remove it. 1485 */ 1486 1487 if (!getintdescbymptr (irq, this->pcid_maskptr)) 1488 (void) pcibus->pb_imaskexc (irq, this->pcid_maskptr); 1489 1490 tail = pci_int_desc[irq]; 1491 1492 if (tail == NULL) { 1493 1494 /* 1495 ** Remove the old handler. 1496 */ 1497 1498 result = pcibus->pb_idetach (irq, 1499 (inthand2_t *) this->pcid_handler); 1500 if (result) 1501 printf ("\tirq %d: cannot remove handler.\n", irq); 1502 1503 } else if (tail->pcid_next == NULL) { 1504 1505 /* 1506 ** Remove the shared int handler. 1507 ** Install the last remaining handler. 1508 */ 1509 1510 oldspl = splq (1ul << irq); 1511 1512 result = pcibus->pb_idetach (irq, pci_int); 1513 if (result) 1514 printf ("\tirq %d: cannot remove handler.\n", irq); 1515 1516 result = pcibus->pb_iattach (irq, 1517 (inthand2_t *) tail->pcid_handler, 1518 (int) tail->pcid_argument, 1519 tail->pcid_maskptr); 1520 1521 if (result) 1522 printf ("\tirq %d: cannot install handler.\n", irq); 1523 1524 splx (oldspl); 1525 }; 1526 1527 free (this, M_DEVBUF); 1528 return (1); 1529} 1530 1531/*----------------------------------------------------------- 1532** 1533** Display of unknown devices. 1534** 1535**----------------------------------------------------------- 1536*/ 1537struct vt { 1538 u_short ident; 1539 char* name; 1540}; 1541 1542static struct vt VendorTable[] = { 1543 {0x0e11, "Compaq"}, 1544 {0x1000, "NCR/Symbios"}, 1545 {0x1002, "ATI Technologies Inc."}, 1546 {0x1004, "VLSI"}, 1547 {0x100B, "National Semiconductor"}, 1548 {0x100E, "Weitek"}, 1549 {0x1011, "Digital Equipment Corporation"}, 1550 {0x1013, "Cirrus Logic"}, 1551 {0x101A, "NCR"}, 1552 {0x1022, "AMD"}, 1553 {0x102B, "Matrox"}, 1554 {0x102C, "Chips & Technologies"}, 1555 {0x1039, "Silicon Integrated Systems"}, 1556 {0x1042, "SMC"}, 1557 {0x1044, "DPT"}, 1558 {0x1045, "OPTI"}, 1559 {0x104B, "Bus Logic"}, 1560 {0x1060, "UMC"}, 1561 {0x1080, "Contaq"}, 1562 {0x1095, "CMD"}, 1563 {0x10b9, "ACER Labs"}, 1564 {0x1106, "VIA Technologies"}, 1565 {0x5333, "S3 Inc."}, 1566 {0x8086, "Intel Corporation"}, 1567 {0x9004, "Adaptec"}, 1568 {0,0} 1569}; 1570 1571typedef struct { 1572 const int subclass; 1573 const char *name; 1574} subclass_name; 1575 1576/* 0x00 prehistoric subclasses */ 1577static const subclass_name old_subclasses[] = 1578{ 1579 { 0x00, "misc" }, 1580 { 0x01, "vga" }, 1581 { 0x00, NULL } 1582}; 1583 1584/* 0x01 mass storage subclasses */ 1585static const subclass_name storage_subclasses[] = 1586{ 1587 { 0x00, "scsi" }, 1588 { 0x01, "ide" }, 1589 { 0x02, "floppy"}, 1590 { 0x03, "ipi" }, 1591 { 0x80, "misc" }, 1592 { 0x00, NULL } 1593}; 1594 1595/* 0x02 network subclasses */ 1596static const subclass_name network_subclasses[] = 1597{ 1598 { 0x00, "ethernet" }, 1599 { 0x01, "tokenring" }, 1600 { 0x02, "fddi" }, 1601 { 0x80, "misc" }, 1602 { 0x00, NULL } 1603}; 1604 1605/* 0x03 display subclasses */ 1606static const subclass_name display_subclasses[] = 1607{ 1608 { 0x00, "vga" }, 1609 { 0x01, "xga" }, 1610 { 0x80, "misc" }, 1611 { 0x00, NULL } 1612}; 1613 1614/* 0x04 multimedia subclasses */ 1615static const subclass_name multimedia_subclasses[] = 1616{ 1617 { 0x00, "video" }, 1618 { 0x01, "audio" }, 1619 { 0x80, "misc" }, 1620 { 0x00, NULL } 1621}; 1622 1623/* 0x05 memory subclasses */ 1624static const subclass_name memory_subclasses[] = 1625{ 1626 { 0x00, "ram" }, 1627 { 0x01, "flash" }, 1628 { 0x80, "misc" }, 1629 { 0x00, NULL } 1630}; 1631 1632/* 0x06 bridge subclasses */ 1633static const subclass_name bridge_subclasses[] = 1634{ 1635 { 0x00, "host" }, 1636 { 0x01, "isa" }, 1637 { 0x02, "eisa" }, 1638 { 0x03, "mc" }, 1639 { 0x04, "pci" }, 1640 { 0x05, "pcmcia"}, 1641 { 0x80, "misc" }, 1642 { 0x00, NULL } 1643}; 1644 1645static const subclass_name *const subclasses[] = { 1646 old_subclasses, 1647 storage_subclasses, 1648 network_subclasses, 1649 display_subclasses, 1650 multimedia_subclasses, 1651 memory_subclasses, 1652 bridge_subclasses, 1653}; 1654 1655static const char *const majclasses[] = { 1656 "old", 1657 "storage", 1658 "network", 1659 "display", 1660 "multimedia", 1661 "memory", 1662 "bridge" 1663}; 1664 1665 1666void not_supported (pcici_t tag, u_long type) 1667{ 1668 u_long reg; 1669 u_long data; 1670 u_char class; 1671 u_char subclass; 1672 struct vt * vp; 1673 int pciint; 1674 int irq; 1675 1676 /* 1677 ** lookup the names. 1678 */ 1679 1680 for (vp=VendorTable; vp->ident; vp++) 1681 if (vp->ident == (type & 0xffff)) 1682 break; 1683 1684 /* 1685 ** and display them. 1686 */ 1687 1688 if (vp->ident) printf (vp->name); 1689 else printf ("vendor=0x%04lx", type & 0xffff); 1690 1691 printf (", device=0x%04lx", type >> 16); 1692 1693 data = pcibus->pb_read(tag, PCI_CLASS_REG); 1694 class = (data >> 24) & 0xff; 1695 subclass = (data >> 16) & 0xff; 1696 1697 if (class < sizeof(majclasses) / sizeof(majclasses[0])) { 1698 printf(", class=%s", majclasses[class]); 1699 } else { 1700 printf(", class=0x%02x", class); 1701 } 1702 1703 if (subclass < sizeof(subclasses) / sizeof(subclasses[0])) { 1704 const subclass_name *p = subclasses[class]; 1705 while (p->name && (p->subclass != subclass)) 1706 p++; 1707 if (p->name) { 1708 printf(" (%s)", p->name); 1709 } else { 1710 printf(" (unknown subclass 0x%02lx)", subclass); 1711 } 1712 } else { 1713 printf(", subclass=0x%02x", subclass); 1714 } 1715 1716 data = pcibus->pb_read (tag, PCI_INTERRUPT_REG); 1717 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 1718 1719 if (pciint) { 1720 1721 printf (" int %c irq ", 0x60+pciint); 1722 1723 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 1724 1725 /* 1726 ** If it's zero, the isa irq number is unknown, 1727 ** and we cannot bind the pci interrupt. 1728 */ 1729 1730 if (irq && (irq != 0xff)) 1731 printf ("%d", irq); 1732 else 1733 printf ("??"); 1734 }; 1735 1736 if (class != (PCI_CLASS_BRIDGE >> 24)) 1737 printf (" [no driver assigned]"); 1738 printf ("\n"); 1739 1740 if (bootverbose) { 1741 if (class == (PCI_CLASS_BRIDGE >> 24)) { 1742 printf ("configuration space registers:"); 1743 for (reg = 0; reg < 0x100; reg+=4) { 1744 if ((reg & 0x0f) == 0) printf ("\n%02x:\t", reg); 1745 printf ("%08x ", pcibus->pb_read (tag, reg)); 1746 } 1747 printf ("\n"); 1748 } else { 1749 for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) { 1750 data = pcibus->pb_read (tag, reg); 1751 if ((data&~7)==0) continue; 1752 switch (data&7) { 1753 1754 case 1: 1755 case 5: 1756 printf ("\tmap(%x): io(%04lx)\n", 1757 reg, data & ~3); 1758 break; 1759 case 0: 1760 printf ("\tmap(%x): mem32(%08lx)\n", 1761 reg, data & ~7); 1762 break; 1763 case 2: 1764 printf ("\tmap(%x): mem20(%05lx)\n", 1765 reg, data & ~7); 1766 break; 1767 case 4: 1768 printf ("\tmap(%x): mem64(%08x%08lx)\n", 1769 reg, pcibus->pb_read (tag, reg +4), data & ~7); 1770 reg += 4; 1771 break; 1772 } 1773 } 1774 } 1775 } 1776} 1777#endif /* NPCI */ 1778