pci.c revision 14133
1/**************************************************************************
2**
3**  $Id: pci.c,v 1.44 1996/01/30 01:14:29 se Exp $
4**
5**  General subroutines for the PCI bus.
6**  pci_configure ()
7**
8**  FreeBSD
9**
10**-------------------------------------------------------------------------
11**
12** Copyright (c) 1994 Wolfgang Stanglmeier.  All rights reserved.
13**
14** Redistribution and use in source and binary forms, with or without
15** modification, are permitted provided that the following conditions
16** are met:
17** 1. Redistributions of source code must retain the above copyright
18**    notice, this list of conditions and the following disclaimer.
19** 2. Redistributions in binary form must reproduce the above copyright
20**    notice, this list of conditions and the following disclaimer in the
21**    documentation and/or other materials provided with the distribution.
22** 3. The name of the author may not be used to endorse or promote products
23**    derived from this software without specific prior written permission.
24**
25** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35**
36***************************************************************************
37*/
38
39#include "pci.h"
40#if NPCI > 0
41
42/*========================================================
43**
44**	#includes  and  declarations
45**
46**========================================================
47*/
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/malloc.h>
52#include <sys/errno.h>
53#include <sys/kernel.h>
54#include <sys/sysctl.h>
55#include <sys/proc.h> /* declaration of wakeup(), used by vm.h */
56#include <sys/devconf.h>
57
58#include <machine/cpu.h> /* bootverbose */
59
60#include <vm/vm.h>
61#include <vm/vm_param.h>
62#include <vm/pmap.h>
63
64#include <sys/devconf.h>
65
66#include <i386/isa/isa_device.h>	/* XXX inthand2_t */
67
68#include <pci/pcivar.h>
69#include <pci/pcireg.h>
70#include <pci/pcibus.h>
71
72#define PCI_MAX_IRQ	(16)
73
74
75/*========================================================
76**
77**	Structs and Functions
78**
79**========================================================
80*/
81
82struct pci_devconf {
83	struct kern_devconf pdc_kdc;
84	struct pci_info     pdc_pi;
85};
86
87struct pcicb {
88	struct pcicb   *pcicb_next;
89	struct pcicb   *pcicb_up;
90	struct pcicb   *pcicb_down;
91	pcici_t 	pcicb_bridge;
92
93	u_long		pcicb_seen;
94	u_char		pcicb_bus;
95	u_char		pcicb_subordinate;
96	u_char		pcicb_flags;
97#define  PCICB_ISAMEM	0x01
98	u_int		pcicb_mfrom;
99	u_int		pcicb_mupto;
100	u_int		pcicb_mamount;
101	u_short		pcicb_pfrom;
102	u_short		pcicb_pupto;
103	u_short		pcicb_pamount;
104	u_char		pcicb_bfrom;
105	u_char		pcicb_bupto;
106
107	u_long		pcicb_iobase;
108	u_long		pcicb_iolimit;
109	u_long		pcicb_membase;
110	u_long		pcicb_memlimit;
111	u_long		pcicb_p_membase;
112	u_long		pcicb_p_memlimit;
113};
114
115static int pci_externalize (struct kern_devconf *, struct sysctl_req *);
116
117static int pci_internalize (struct kern_devconf *, struct sysctl_req *);
118
119static void
120not_supported (pcici_t tag, u_long type);
121
122static void
123pci_bus_config (void);
124
125static int
126pci_bridge_config (void);
127
128static int
129pci_mfdev (int bus, int device);
130
131/*========================================================
132**
133**	Variables
134**
135**========================================================
136*/
137
138/*
139**      log2 of safe burst len (in words)
140*/
141
142unsigned pci_max_burst_len = 3; /* 2=16Byte, 3=32Byte, 4=64Byte, ... */
143unsigned pci_mechanism     = 0;
144unsigned pci_maxdevice     = 0;
145static struct pcibus* pcibus;
146
147/*--------------------------------------------------------
148**
149**	Local variables.
150**
151**--------------------------------------------------------
152*/
153
154static	int		pci_conf_count;
155static	int		pci_info_done;
156static	struct pcicb	pcibus0 = {
157    NULL, NULL, NULL,
158    { 0 },
159    0, 0, 0, 0,
160    0, 0, 0, 0, 0, 0, 0, 0,	/* real allocation */
161    0, 0xFFFF,			/* iobase/limit */
162    0x2000000, 0xFFFFFFFFu,	/* nonprefetch membase/limit */
163    0x2000000, 0xFFFFFFFFu	/* prefetch membase/limit */
164};
165static	struct pcicb   *pcicb;
166
167/*========================================================
168**
169**	pci_configure ()
170**
171**      Autoconfiguration of pci devices.
172**
173**      May be called more than once.
174**      Any device is attached only once.
175**
176**      Has to take care of mirrored devices, which are
177**      entailed by incomplete decoding of pci address lines.
178**
179**========================================================
180*/
181
182void pci_configure()
183{
184	struct pcibus **pbp = (struct pcibus**) pcibus_set.ls_items;
185
186	/*
187	**	check pci bus present
188	*/
189
190	while (!pci_maxdevice && (pcibus = *pbp++)) {
191		(*pcibus->pb_setup)();
192	}
193
194	if (!pci_maxdevice) return;
195
196	/*
197	**	hello world ..
198	*/
199
200	for (pcicb = &pcibus0; pcicb != NULL;) {
201		pci_bus_config ();
202
203		if (pcicb->pcicb_down) {
204			pcicb = pcicb->pcicb_down;
205			continue;
206		};
207
208		while (pcicb && !pcicb->pcicb_next)
209			pcicb = pcicb->pcicb_up;
210
211		if (pcicb)
212			pcicb = pcicb->pcicb_next;
213	}
214	pci_conf_count++;
215}
216
217/*========================================================
218**
219**	Subroutines for configuration.
220**
221**========================================================
222*/
223
224static void
225pci_register_io (struct pcicb * cb, u_int base, u_int limit)
226{
227#ifdef PCI_BRIDGE_DEBUG
228	if (bootverbose)
229		printf ("register_io:  bus=%d base=%x limit=%x\n",
230			cb->pcicb_bus, base, limit);
231#endif
232
233	if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom)
234		cb->pcicb_pfrom = base;
235	if (limit > cb->pcicb_pupto)
236		cb->pcicb_pupto = limit;
237
238	/*
239	**	XXX should set bridge io mapping here
240	**	but it can be mapped in 4k blocks only,
241	**	leading to conflicts with isa/eisa ..
242	*/
243}
244
245static void
246pci_register_memory (struct pcicb * cb, u_int base, u_int limit)
247{
248#ifdef PCI_BRIDGE_DEBUG
249	if (bootverbose)
250		printf ("register_mem: bus=%d base=%x limit=%x\n",
251			cb->pcicb_bus, base, limit);
252#endif
253
254	if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom)
255		cb->pcicb_mfrom = base;
256	if (limit > cb->pcicb_mupto)
257		cb->pcicb_mupto = limit;
258	/*
259	**	set the bridges mapping
260	**
261	**	XXX should handle the 1Mb granularity.
262	*/
263	if (cb->pcicb_bridge.tag) {
264		pci_conf_write(cb->pcicb_bridge,
265			PCI_PCI_BRIDGE_MEM_REG,
266			(cb->pcicb_memlimit & 0xffff0000) |
267			(cb->pcicb_membase >> 16));
268		if (bootverbose)
269			printf ("\t[pci%d uses memory from %x to %x]\n",
270				cb->pcicb_bus,
271				(unsigned) cb->pcicb_membase,
272				(unsigned) cb->pcicb_memlimit);
273	}
274}
275
276/*
277**	XXX This function is neither complete nor tested.
278**	It's only used if the bios hasn't done it's job
279**	of mapping the pci devices in the physical memory.
280*/
281
282static u_int
283pci_memalloc (struct pcicb * cb, u_int addr, u_int size)
284{
285	u_int result = 0, limit=0, newbase=0;
286#ifdef PCI_BRIDGE_DEBUG
287	if (bootverbose)
288		printf ("memalloc:  bus=%d addr=%x size=%x ..\n",
289			cb->pcicb_bus, addr, size);
290#endif
291
292	if (!cb) goto done;
293
294	if (!cb->pcicb_membase) {
295		printf ("memalloc: bus%d: membase not set.\n",
296			cb->pcicb_bus);
297		goto done;
298	}
299
300	/*
301	**	get upper allocation limit
302	*/
303	limit = cb->pcicb_memlimit;
304	if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit)
305		limit  = cb->pcicb_mfrom-1;
306
307	/*
308	**	address fixed, and impossible to allocate ?
309	*/
310	if (addr && addr+size-1 > limit)
311		goto done;
312
313	/*
314	**	get possible address
315	*/
316
317	result = addr;
318	if (!result) result = ((limit + 1) / size - 1) * size;
319
320	/*
321	**	if not local available, request from parent.
322	*/
323
324	if (result < cb->pcicb_membase) {
325		newbase = pci_memalloc (cb->pcicb_up, result, size);
326		if (newbase) cb->pcicb_membase = result;
327		else result=0;
328	}
329done:
330	if (result)
331		pci_register_memory (cb, result, result+size-1);
332
333#ifdef PCI_BRIDGE_DEBUG
334	printf ("memalloc:  bus=%d addr=%x size=%x --> %x (limit=%x).\n",
335		cb->pcicb_bus, addr, size, result, limit);
336#endif
337
338	return (result);
339}
340
341/*========================================================
342**
343**	pci_bus_config()
344**
345**	Autoconfiguration of one pci bus.
346**
347**========================================================
348*/
349
350static int
351pci_mfdev (int bus, int device)
352{
353    pcici_t tag0,tag1;
354    int	pci_id0, pci_id1;
355
356    /*
357    ** Detect a multi-function device that complies to the PCI 2.0 spec
358    */
359    tag0 = pcibus->pb_tag  (bus, device, 0);
360    if (pcibus->pb_read (tag0, PCI_HEADER_MISC) & PCI_HEADER_MULTIFUNCTION)
361	return 1;
362
363    /*
364    ** Well, as always: Theory and implementation of PCI ...
365    **
366    ** If there is a valid device ID returned for function 1 AND
367    **		the device ID of function 0 and 1 is different OR
368    **		the first mapping register of 0 and 1 differs,
369    ** then assume a multi-function device anyway ...
370    **
371    ** Example of such a broken device: ISA and IDE chip i83371FB (Triton)
372    */
373    tag1 = pcibus->pb_tag  (bus, device, 1);
374    pci_id1 = pcibus->pb_read (tag1, PCI_ID_REG);
375
376    if (pci_id1 != 0xffffffff) {
377
378	pci_id0 = pcibus->pb_read (tag0, PCI_ID_REG);
379
380	if (pci_id0 != pci_id1)
381	    return 1;
382
383	if (pcibus->pb_read (tag0, PCI_MAP_REG_START)
384			!= pcibus->pb_read (tag1, PCI_MAP_REG_START))
385	    return 1;
386    }
387    return 0;
388}
389
390static void
391pci_bus_config (void)
392{
393	int	bus_no;
394	u_char  device;
395	u_char	reg;
396	pcici_t tag, mtag;
397	pcidi_t type;
398	u_long  data;
399	int     unit;
400	u_char	pciint;
401	u_char	irq;
402
403	struct	pci_device *dvp;
404
405	struct	pci_devconf *pdcp;
406
407	/*
408	**	first initialize the bridge (bus controller chip)
409	*/
410	bus_no = pci_bridge_config ();
411
412	printf ("Probing for devices on PCI bus %d:\n", bus_no);
413#ifndef PCI_QUIET
414	if (bootverbose && !pci_info_done) {
415		pci_info_done=1;
416		printf ("\tconfiguration mode %d allows %d devices.\n",
417			pci_mechanism, pci_maxdevice);
418	};
419#endif
420	for (device=0; device<pci_maxdevice; device ++) {
421	    char *name = NULL;
422	    struct pci_device **dvpp;
423	    int func, maxfunc = 0;
424
425	    if ((pcicb->pcicb_seen >> device) & 1)
426	    	continue;
427
428	    for (func=0; func <= maxfunc; func++) {
429		tag  = pcibus->pb_tag  (bus_no, device, func);
430		type = pcibus->pb_read (tag, PCI_ID_REG);
431
432		if ((!type) || (type==0xfffffffful)) continue;
433
434		/*
435		**	lookup device in ioconfiguration:
436		*/
437
438		dvpp = (struct pci_device **)pcidevice_set.ls_items;
439
440		while (dvp = *dvpp++) {
441			if (dvp->pd_probe) {
442				if (name=(*dvp->pd_probe)(tag, type))
443					break;
444			}
445		};
446		/*
447		**	check for mirrored devices.
448		*/
449		if (func != 0) {
450			goto real_device;
451		}
452		if (device & 0x10) {
453			mtag=pcibus->pb_tag (bus_no,
454				(u_char)(device & ~0x10), 0);
455		} else if (device & 0x08) {
456			mtag=pcibus->pb_tag (bus_no,
457				(u_char)(device & ~0x08), 0);
458		} else goto real_device;
459
460		if (type!=pcibus->pb_read (mtag, PCI_ID_REG))
461			goto real_device;
462
463		for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4)
464			if (pcibus->pb_read(tag,reg)!=pcibus->pb_read(mtag,reg))
465				goto real_device;
466
467#ifndef PCI_QUIET
468		if (dvp==NULL) continue;
469		if (bootverbose)
470			printf ("%s? <%s> mirrored on pci%d:%d\n",
471				dvp->pd_name, name, bus_no, device);
472#endif
473		continue;
474
475	real_device:
476
477#ifndef PCI_QUIET
478#ifdef PCI_BRIDGE_DEBUG
479		if (bootverbose) {
480		    printf ("\tconfig header: 0x%08x 0x%08x 0x%08x 0x%08x\n",
481			    pci_conf_read (tag, 0),
482			    pci_conf_read (tag, 4),
483			    pci_conf_read (tag, 8),
484			    pci_conf_read (tag, 12));
485		}
486#endif
487#endif
488
489		if (func == 0 && pci_mfdev (bus_no, device)) {
490			maxfunc = 7;
491		}
492
493		if (dvp==NULL) {
494#ifndef PCI_QUIET
495			if (pci_conf_count)
496				continue;
497			printf("%s%d:%d: ", pcibus->pb_name, bus_no, device);
498			not_supported (tag, type);
499#endif
500			continue;
501		};
502
503		pcicb->pcicb_seen |= (1ul << device);
504
505		/*
506		**	Get and increment the unit.
507		*/
508
509		unit = (*dvp->pd_count)++;
510
511		/*
512		**	ignore device ?
513		*/
514
515		if (!*name) continue;
516
517		/*
518		**	Announce this device
519		*/
520
521		printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name,
522			(unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff);
523
524		/*
525		**	Get the int pin number (pci interrupt number a-d)
526		**	from the pci configuration space.
527		*/
528
529		data = pcibus->pb_read (tag, PCI_INTERRUPT_REG);
530		pciint = PCI_INTERRUPT_PIN_EXTRACT(data);
531
532		if (pciint) {
533
534			printf (" int %c irq ", 0x60+pciint);
535
536			irq = PCI_INTERRUPT_LINE_EXTRACT(data);
537
538			/*
539			**	If it's zero, the isa irq number is unknown,
540			**	and we cannot bind the pci interrupt.
541			*/
542
543			if (irq && (irq != 0xff))
544				printf ("%d", irq);
545			else
546				printf ("??");
547		};
548
549		printf (" on pci%d:%d\n", bus_no, device);
550
551		/*
552		**	Read the current mapping,
553		**	and update the pcicb fields.
554		*/
555
556		for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) {
557			u_int map, addr, size;
558
559			data = pci_conf_read(tag, PCI_CLASS_REG);
560			switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) {
561			case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI:
562				continue;
563			};
564
565			map = pcibus->pb_read (tag, reg);
566			if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK))
567				continue;
568
569			pcibus->pb_write (tag, reg, 0xffffffff);
570			data = pcibus->pb_read (tag, reg);
571			pcibus->pb_write (tag, reg, map);
572
573			switch (data & 7) {
574
575			default:
576				continue;
577			case 1:
578			case 5:
579				size = -(data & PCI_MAP_IO_ADDRESS_MASK);
580				addr = map & PCI_MAP_IO_ADDRESS_MASK;
581
582				pci_register_io (pcicb, addr, addr+size-1);
583				pcicb->pcicb_pamount += size;
584				break;
585
586			case 0:
587			case 2:
588			case 4:
589				size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK);
590				addr = map & PCI_MAP_MEMORY_ADDRESS_MASK;
591				if (addr >= 0x100000) {
592					pci_register_memory
593						(pcicb, addr, addr+size-1);
594					pcicb->pcicb_mamount += size;
595				} else {
596					pcicb->pcicb_flags |= PCICB_ISAMEM;
597				};
598				break;
599			};
600			if (bootverbose)
601				printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n",
602					reg, map&7, addr, size);
603		};
604
605		/*
606		**	Allocate a devconf structure
607		**	We should, and eventually will, set the
608		**	parent pointer to a pci bus devconf structure,
609		**	and arrange to set the state field dynamically.
610		*/
611
612		pdcp = (struct pci_devconf *)
613			malloc (sizeof (struct pci_devconf),M_DEVBUF,M_WAITOK);
614		bzero(pdcp, sizeof(struct pci_devconf));
615
616		pdcp -> pdc_pi.pi_bus    = bus_no;
617		pdcp -> pdc_pi.pi_device = device;
618		pdcp -> pdc_pi.pi_func   = func;
619
620		pdcp -> pdc_kdc.kdc_name = dvp->pd_name;
621		pdcp -> pdc_kdc.kdc_unit = unit;
622
623		pdcp -> pdc_kdc.kdc_md.mddc_devtype = MDDT_PCI;
624
625		pdcp -> pdc_kdc.kdc_externalize = pci_externalize;
626		pdcp -> pdc_kdc.kdc_internalize = pci_internalize;
627
628		pdcp -> pdc_kdc.kdc_datalen     = PCI_EXTERNAL_LEN;
629		pdcp -> pdc_kdc.kdc_parentdata  = &pdcp->pdc_pi;
630		pdcp -> pdc_kdc.kdc_state       = DC_UNKNOWN;
631		pdcp -> pdc_kdc.kdc_description = name;
632		pdcp -> pdc_kdc.kdc_shutdown	= dvp->pd_shutdown;
633
634		/*
635		**	And register this device
636		*/
637
638		dev_attach (&pdcp->pdc_kdc);
639
640		/*
641		**	attach device
642		**	may produce additional log messages,
643		**	i.e. when installing subdevices.
644		*/
645
646		(*dvp->pd_attach) (tag, unit);
647
648		/*
649		**	Special processing of certain classes
650		*/
651
652		data = pci_conf_read(tag, PCI_CLASS_REG);
653
654		switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) {
655			struct pcicb *this, **link;
656			unsigned char primary, secondary, subordinate;
657			u_int command;
658
659		case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI:
660
661			/*
662			**	get current configuration of the bridge.
663			*/
664			data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG);
665			primary     = PCI_PRIMARY_BUS_EXTRACT  (data);
666			secondary   = PCI_SECONDARY_BUS_EXTRACT(data);
667			subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data);
668#ifndef PCI_QUIET
669			if (bootverbose) {
670			    printf ("\tbridge from pci%d to pci%d through %d.\n",
671				primary, secondary, subordinate);
672			    printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx\n",
673				pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG),
674				pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG),
675				pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG));
676			}
677#endif
678			/*
679			**	check for uninitialized bridge.
680			*/
681			if (secondary == 0 || secondary < primary ||
682				bus_no != primary)
683			{
684				printf ("\tINCORRECTLY or NEVER CONFIGURED.\n");
685				/*
686				**	disable this bridge
687				*/
688				pcibus->pb_write (tag, PCI_COMMAND_STATUS_REG,
689							0xffff0000);
690				secondary   = 0;
691				subordinate = 0;
692			};
693
694			/*
695			**  allocate bus descriptor for bus behind the bridge
696			*/
697			link = &pcicb->pcicb_down;
698			while (*link) link = &(*link)->pcicb_next;
699
700			this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK);
701
702			/*
703			**	Initialize this descriptor so far.
704			**	(the initialization is completed just before
705			**	scanning the bus behind the bridge.
706			*/
707			bzero (this, sizeof(*this));
708			this->pcicb_up		= pcicb;
709			this->pcicb_bridge      = tag;
710			this->pcicb_bus 	= secondary;
711			this->pcicb_subordinate = subordinate;
712
713			command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG);
714
715			if (command & PCI_COMMAND_IO_ENABLE){
716				/*
717				**	Bridge was configured by the bios.
718				**	Read out the mapped io region.
719				*/
720				u_int reg, data, mask;
721
722				reg = pci_conf_read (tag,
723					PCI_PCI_BRIDGE_IO_REG);
724				pci_conf_write(tag,
725					PCI_PCI_BRIDGE_IO_REG, 0xFFFF);
726				data = pci_conf_read (tag,
727					PCI_PCI_BRIDGE_IO_REG);
728				pci_conf_write(tag,
729					PCI_PCI_BRIDGE_IO_REG, reg & 0xffff);
730
731				mask = (0xFF00 ^ (data & 0xFF00)) | 0xFF;
732
733				this->pcicb_iobase  =
734					PCI_PPB_IOBASE_EXTRACT (reg);
735				this->pcicb_iolimit =
736					PCI_PPB_IOLIMIT_EXTRACT(reg) | mask;
737
738				/*
739				**	Note the used io space.
740				*/
741				pci_register_io (pcicb, this->pcicb_iobase,
742						this->pcicb_iolimit);
743
744			};
745
746			if (command & PCI_COMMAND_MEM_ENABLE) {
747				/*
748				**	Bridge was configured by the bios.
749				**	Read out the mapped memory regions.
750				*/
751				u_int reg, data, mask;
752
753				/*
754				**	non prefetchable memory
755				*/
756				reg = pci_conf_read (tag,
757					PCI_PCI_BRIDGE_MEM_REG);
758				pci_conf_write(tag,
759					PCI_PCI_BRIDGE_MEM_REG, 0xFFFFFFFF);
760				data = pci_conf_read (tag,
761					PCI_PCI_BRIDGE_MEM_REG);
762				pci_conf_write(tag,
763					PCI_PCI_BRIDGE_MEM_REG, reg);
764
765				mask = 0xFFFFFFFF ^ (data & 0xFFFF0000);
766				this->pcicb_membase  =
767					PCI_PPB_MEMBASE_EXTRACT (reg);
768				this->pcicb_memlimit =
769					PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask;
770
771				/*
772				**	Register used memory space.
773				*/
774				pci_register_memory (pcicb,
775					this->pcicb_membase,
776					this->pcicb_memlimit);
777
778				/*
779				**	prefetchable memory
780				*/
781				reg = pci_conf_read (tag,
782					PCI_PCI_BRIDGE_PMEM_REG);
783				pci_conf_write(tag,
784					PCI_PCI_BRIDGE_PMEM_REG, 0xFFFFFFFF);
785				data = pci_conf_read (tag,
786					PCI_PCI_BRIDGE_PMEM_REG);
787				pci_conf_write(tag,
788					PCI_PCI_BRIDGE_PMEM_REG, reg);
789
790				mask = 0xFFFFFFFF ^ (data & 0xFFFF0000);
791				this->pcicb_p_membase=
792					PCI_PPB_MEMBASE_EXTRACT (reg);
793				this->pcicb_p_memlimit=
794					PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask;
795
796				/*
797				**	Register used memory space.
798				*/
799				pci_register_memory (pcicb,
800					this->pcicb_p_membase,
801					this->pcicb_p_memlimit);
802			}
803
804			/*
805			**	Link it in chain.
806			*/
807			*link=this;
808
809			/*
810			**	Update mapping info of parent bus.
811			*/
812			if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom)
813				pcicb->pcicb_bfrom = secondary;
814			if (subordinate > pcicb->pcicb_bupto)
815				pcicb->pcicb_bupto = subordinate;
816
817			break;
818		}
819	    }
820	}
821
822#ifndef PCI_QUIET
823	if (bootverbose) {
824	    if (pcicb->pcicb_mamount)
825		printf ("%s%d: uses %d bytes of memory from %x upto %x.\n",
826			pcibus->pb_name, bus_no,
827			pcicb->pcicb_mamount,
828			pcicb->pcicb_mfrom, pcicb->pcicb_mupto);
829	    if (pcicb->pcicb_pamount)
830		printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n",
831			pcibus->pb_name, bus_no,
832			pcicb->pcicb_pamount,
833			pcicb->pcicb_pfrom, pcicb->pcicb_pupto);
834	    if (pcicb->pcicb_bfrom)
835		printf ("%s%d: subordinate busses from %x upto %x.\n",
836			pcibus->pb_name, bus_no,
837			pcicb->pcicb_bfrom, pcicb->pcicb_bupto);
838	}
839#endif
840}
841
842/*========================================================
843**
844**	pci_bridge_config()
845**
846**	Configuration of a pci bridge.
847**
848**========================================================
849*/
850
851static int
852pci_bridge_config (void)
853{
854	pcici_t tag;
855	struct pcicb* parent;
856
857	tag = pcicb->pcicb_bridge;
858	if (tag.tag) {
859
860	    if (!pcicb->pcicb_bus) {
861		u_int data;
862		/*
863		**	Get the lowest available bus number.
864		*/
865		pcicb->pcicb_bus = ++pcibus0.pcicb_subordinate;
866
867		/*
868		**	and configure the bridge
869		*/
870		data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG);
871		data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus);
872		data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus);
873		data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus);
874		pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data);
875
876		/*
877		**	Propagate the new upper bus number limit.
878		*/
879		for (parent = pcicb->pcicb_up; parent != NULL;
880			parent = parent->pcicb_up)
881		{
882			if (parent->pcicb_subordinate >= pcicb->pcicb_bus)
883				continue;
884			parent->pcicb_subordinate = pcicb->pcicb_bus;
885			if (!parent->pcicb_bridge.tag)
886				continue;
887			data = pci_conf_read
888				(parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG);
889			data = PCI_SUBORDINATE_BUS_INSERT
890				(data, pcicb->pcicb_bus);
891			pci_conf_write (parent->pcicb_bridge,
892				PCI_PCI_BRIDGE_BUS_REG, data);
893		}
894	    }
895
896	    if (!pcicb->pcicb_membase) {
897		u_int size = 0x100000;
898		pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size);
899		if (pcicb->pcicb_membase)
900			pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1;
901	    }
902	}
903	return pcicb->pcicb_bus;
904}
905
906/*-----------------------------------------------------------------
907**
908**	The following functions are provided for the device driver
909**	to read/write the configuration space.
910**
911**	pci_conf_read():
912**		Read a long word from the pci configuration space.
913**		Requires a tag (from pcitag) and the register
914**		number (should be a long word alligned one).
915**
916**	pci_conf_write():
917**		Writes a long word to the pci configuration space.
918**		Requires a tag (from pcitag), the register number
919**		(should be a long word alligned one), and a value.
920**
921**-----------------------------------------------------------------
922*/
923
924u_long
925pci_conf_read  (pcici_t tag, u_long reg)
926{
927	return (pcibus->pb_read (tag, reg));
928}
929
930void
931pci_conf_write (pcici_t tag, u_long reg, u_long data)
932{
933	pcibus->pb_write (tag, reg, data);
934}
935
936/*-----------------------------------------------------------------------
937**
938**	Map device into port space.
939**
940**	Actually the device should have been mapped by the bios.
941**	This function only reads and verifies the value.
942**
943**	PCI-Specification:  6.2.5.1: address maps
944**
945**-----------------------------------------------------------------------
946*/
947
948int pci_map_port (pcici_t tag, u_long reg, u_short* pa)
949{
950	unsigned data, ioaddr, iosize;
951	struct pcicb *link = pcicb;
952
953	/*
954	**	sanity check
955	*/
956
957	if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) {
958		printf ("pci_map_port failed: bad register=0x%x\n",
959			(unsigned)reg);
960		return (0);
961	};
962
963	/*if (pcicb->pcicb_flags & PCICB_NOIOSET) {
964		printf ("pci_map_port failed: pci%d has not been configured for I/O access\n",
965			pcicb->pcicb_bus);
966		return (0);
967	}*/
968
969	/*
970	**	get size and type of port
971	**
972	**	type is in the lowest two bits.
973	**	If device requires 2^n bytes, the next
974	**	n-2 bits are hardwired as 0.
975	*/
976
977	ioaddr = pcibus->pb_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK;
978	if (!ioaddr || ioaddr > 0xfffful) {
979		printf ("pci_map_port failed: not configured by bios.\n");
980		return (0);
981	};
982
983	pcibus->pb_write (tag, reg, 0xfffffffful);
984	data = pcibus->pb_read (tag, reg);
985	pcibus->pb_write (tag, reg, ioaddr);
986
987	if ((data & 0x03) != PCI_MAP_IO) {
988		printf ("pci_map_port failed: bad port type=0x%x\n",
989			(unsigned) data);
990		return (0);
991	};
992	iosize = -(data &  PCI_MAP_IO_ADDRESS_MASK);
993	if (ioaddr < pcicb->pcicb_iobase
994		|| ioaddr + iosize -1 > pcicb->pcicb_iolimit) {
995		printf ("pci_map_port failed: device's iorange 0x%x-0x%x "
996			"is incompatible with its bridge's range 0x%x-0x%x\n",
997			(unsigned) ioaddr, (unsigned) ioaddr + iosize - 1,
998			(unsigned) pcicb->pcicb_iobase,
999			(unsigned) pcicb->pcicb_iolimit);
1000		return (0);
1001	}
1002
1003#ifndef PCI_QUIET
1004	if (bootverbose)
1005		printf ("\treg%d: ioaddr=0x%x size=0x%x\n",
1006			(unsigned) reg, (unsigned) ioaddr, (unsigned) iosize);
1007#endif
1008	/*
1009	**	set the configuration register of and
1010	**      return the address to the driver.
1011	**	Make sure to enable each upstream bridge
1012	**	so I/O and DMA can go all the way.
1013	*/
1014
1015	for (;;) {
1016		data =	pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff;
1017		data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
1018		(void)	pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data);
1019		if ((link = link->pcicb_up) == NULL)
1020			break;
1021		tag = link->pcicb_bridge;
1022	}
1023
1024	*pa = ioaddr;
1025
1026	return (1);
1027}
1028
1029/*-----------------------------------------------------------------------
1030**
1031**	Map device into virtual and physical space
1032**
1033**	Actually the device should have been mapped by the bios.
1034**	This function only reads and verifies the value.
1035**
1036**      PCI-Specification:  6.2.5.1: address maps
1037**
1038**-----------------------------------------------------------------------
1039*/
1040
1041int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa)
1042{
1043	struct pcicb *link = pcicb;
1044	unsigned    data ,paddr;
1045	vm_size_t   psize, poffs;
1046	vm_offset_t vaddr;
1047
1048	/*
1049	**	sanity check
1050	*/
1051
1052	if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) {
1053		printf ("pci_map_mem failed: bad register=0x%x\n",
1054			(unsigned)reg);
1055		return (0);
1056	};
1057
1058	/*
1059	**	save old mapping, get size and type of memory
1060	**
1061	**	type is in the lowest four bits.
1062	**	If device requires 2^n bytes, the next
1063	**	n-4 bits are read as 0.
1064	*/
1065
1066	paddr = pcibus->pb_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK;
1067	pcibus->pb_write (tag, reg, 0xfffffffful);
1068	data = pcibus->pb_read (tag, reg);
1069	pcibus->pb_write (tag, reg, paddr);
1070
1071	/*
1072	**	check the type
1073	*/
1074
1075	if ((data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT) {
1076		printf ("pci_map_mem failed: bad memory type=0x%x\n",
1077			(unsigned) data);
1078		return (0);
1079	};
1080
1081	/*
1082	**	get the size.
1083	*/
1084
1085	psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK);
1086
1087	if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) {
1088		paddr = pci_memalloc (pcicb, 0, psize);
1089		if (!paddr) {
1090			printf ("pci_map_mem: not configured by bios.\n");
1091			return (0);
1092		};
1093		pci_register_memory (pcicb, paddr, paddr+psize-1);
1094	};
1095
1096	if (paddr < pcicb->pcicb_membase ||
1097		paddr + psize - 1 > pcicb->pcicb_memlimit) {
1098		printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is "
1099			"incompatible with its bridge's memrange 0x%x-0x%x\n",
1100			(unsigned) paddr,
1101			(unsigned) (paddr + psize - 1),
1102			(unsigned) pcicb->pcicb_membase,
1103			(unsigned) pcicb->pcicb_memlimit);
1104/*		return (0);*/
1105/* ACHTUNG: Ist der Code richtig, wenn eine PCI-PCI-Bridge fuer
1106 * die PCI-Slots verwendet wird, aber die Onboard-Devices direkt
1107 * an der CPU-PCI-Bridge haengen (Siehe Compaq Prolinea Problem) ???
1108 */
1109	}
1110	pcibus->pb_write (tag, reg, paddr);
1111
1112	/*
1113	**	Truncate paddr to page boundary.
1114	**	(Or does pmap_mapdev the job?)
1115	*/
1116
1117	poffs = paddr - trunc_page (paddr);
1118	vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs);
1119
1120	if (!vaddr) return (0);
1121
1122	vaddr += poffs;
1123
1124#ifndef PCI_QUIET
1125	/*
1126	**	display values.
1127	*/
1128
1129	if (bootverbose)
1130		printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n",
1131		 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize);
1132#endif
1133	/*
1134	**      set the configuration register and
1135	**      return the address to the driver
1136	**      Make sure to enable each upstream bridge
1137	**      so memory and DMA can go all the way.
1138	*/
1139
1140	for (;;) {
1141		data =  pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff;
1142		data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
1143		(void)  pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data);
1144		if ((link = link->pcicb_up) == NULL)
1145			break;
1146		tag = link->pcicb_bridge;
1147	}
1148
1149	*va = vaddr;
1150	*pa = paddr;
1151
1152	return (1);
1153}
1154
1155/*------------------------------------------------------------
1156**
1157**	Interface functions for the devconf module.
1158**
1159**------------------------------------------------------------
1160*/
1161
1162static int
1163pci_externalize (struct kern_devconf *kdcp, struct sysctl_req *req)
1164{
1165	struct pci_externalize_buffer buffer;
1166	struct pci_info * pip = kdcp->kdc_parentdata;
1167	pcici_t tag;
1168	int	i;
1169
1170	tag = pcibus->pb_tag (pip->pi_bus, pip->pi_device, pip->pi_func);
1171
1172	buffer.peb_pci_info	= *pip;
1173
1174	for (i=0; i<PCI_EXT_CONF_LEN; i++) {
1175		buffer.peb_config[i] = pcibus->pb_read (tag, i*4);
1176	};
1177
1178	return SYSCTL_OUT(req, &buffer, sizeof buffer);
1179}
1180
1181
1182static int
1183pci_internalize (struct kern_devconf *kdcp, struct sysctl_req *re)
1184{
1185	return EOPNOTSUPP;
1186}
1187
1188/*-----------------------------------------------------------------------
1189**
1190**	Pci meta interrupt handler
1191**
1192**	This handler assumes level triggered interrupts.
1193**	It's possible to build a kernel which handles shared
1194**	edge triggered interrupts by the options "PCI_EDGE_INT".
1195**	But there is a performance penalty.
1196**
1197**	(Of course you can delete the #ifdef PCI_EDGE_INT bracketed
1198**	code at all :-) :-) :-)
1199**
1200**-----------------------------------------------------------------------
1201*/
1202
1203static struct pci_int_desc*
1204	pci_int_desc [PCI_MAX_IRQ];
1205
1206#ifndef NO_SHARED_IRQ
1207
1208static inline unsigned
1209splq (unsigned mask)
1210{
1211	unsigned temp=cpl;
1212	cpl |= mask;
1213	return temp;
1214}
1215
1216static void
1217pci_int (int irq)
1218{
1219	struct pci_int_desc * p;
1220	int s;
1221
1222	if (irq<0 || irq >= PCI_MAX_IRQ) {
1223		printf ("pci_int: irq %d out of range, ignored\n", irq);
1224		return;
1225	};
1226	for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) {
1227		s = splq (*p->pcid_maskptr);
1228		(*p->pcid_handler) (p->pcid_argument);
1229		p-> pcid_tally++;
1230		splx (s);
1231#if 0
1232		if (p->pcid_tally<20)
1233			printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n",
1234				irq, p->pcid_handler, s, cpl, c);
1235#endif
1236	};
1237}
1238#endif
1239
1240/*-----------------------------------------------------------------------
1241**
1242**	Auxiliary function for interrupt (un)mapping.
1243**
1244**-----------------------------------------------------------------------
1245*/
1246
1247static u_int
1248getirq (pcici_t tag)
1249{
1250	u_int irq;
1251
1252	irq = PCI_INTERRUPT_LINE_EXTRACT(
1253		pcibus->pb_read (tag, PCI_INTERRUPT_REG));
1254
1255	if (irq <= 0) {
1256		printf ("\tint line register not set by bios\n");
1257		return (0);
1258	}
1259
1260	if (irq >= pcibus->pb_maxirq || irq >= PCI_MAX_IRQ) {
1261		printf ("\tirq %d invalid.\n", irq);
1262		return (0);
1263	}
1264
1265	return (irq);
1266}
1267
1268static struct pci_int_desc **
1269getintdescbytag (u_int irq, pcici_t tag)
1270{
1271	struct pci_int_desc *p, **pp;
1272
1273	pp=&pci_int_desc[irq];
1274	while (((p=*pp)) && !sametag(p->pcid_tag,tag))
1275		pp=&p->pcid_next;
1276
1277	if (!p) return (NULL);
1278
1279	return (pp);
1280}
1281
1282static struct pci_int_desc *
1283getintdescbymptr (u_int irq, unsigned * mptr)
1284{
1285	struct pci_int_desc *p;
1286
1287	for (p=pci_int_desc[irq];p;p=p->pcid_next)
1288		if (p->pcid_maskptr == mptr) break;
1289	return (p);
1290}
1291
1292/*-----------------------------------------------------------------------
1293**
1294**	Map pci interrupt.
1295**
1296**-----------------------------------------------------------------------
1297*/
1298
1299static unsigned pci_mask0 = 0;
1300
1301int pci_map_int (pcici_t tag, pci_inthand_t *func, void *arg, unsigned *maskptr)
1302{
1303	u_int irq;
1304	int result, oldspl;
1305	unsigned  mask;
1306	struct pci_int_desc *tail, *mdp=NULL, *new=NULL;
1307
1308	/*
1309	**	Get irq line from configuration space,
1310	**	and check for consistency.
1311	*/
1312
1313	irq = getirq (tag);
1314	if (irq >= PCI_MAX_IRQ) {
1315		printf ("\tillegal irq %d.\n", irq);
1316		return (0);
1317	};
1318	mask= 1ul << irq;
1319
1320	/*
1321	**      disable this interrupt.
1322	*/
1323
1324	oldspl = splq (mask);
1325
1326	/*
1327	**	If handler for this tag already installed,
1328	**	remove it first.
1329	*/
1330
1331	if (getintdescbytag (irq, tag) != NULL)
1332		pci_unmap_int (tag);
1333
1334	/*
1335	**	If this irq not yet included in the mask, include it.
1336	*/
1337
1338	mdp = getintdescbymptr (irq, maskptr);
1339	if (!mdp) {
1340		result = pcibus->pb_imaskinc (irq, maskptr);
1341		if (result)
1342			goto conflict;
1343	};
1344
1345	/*
1346	**	Allocate descriptor and initialize it.
1347	*/
1348
1349	tail = pci_int_desc[irq];
1350
1351	new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK);
1352	bzero (new, sizeof (*new));
1353
1354	new->pcid_next	   = tail;
1355	new->pcid_tag      = tag;
1356	new->pcid_handler  = func;
1357	new->pcid_argument = arg;
1358	new->pcid_maskptr  = maskptr;
1359	new->pcid_tally    = 0;
1360	new->pcid_mask	   = mask;
1361
1362	/*
1363	**	If first handler:   install it.
1364	**	If second handler: install shared-int-handler.
1365	*/
1366
1367	if (!tail) {
1368		/*
1369		**	first handler for this irq.
1370		*/
1371
1372		result = pcibus->pb_iattach
1373			/*
1374			 * XXX if we get here, then `func' must be pci_int
1375			 * so the bogus casts are almost OK since they just
1376			 * undo the bogus casts that were needed to pass
1377			 * pci_int and its arg to pci_map_int().
1378			 */
1379			(irq, (inthand2_t *) func, (int) arg, maskptr);
1380		if (result) goto conflict;
1381
1382#ifdef NO_SHARED_IRQ
1383	} else goto conflict;
1384#else
1385	} else if (!tail->pcid_next) {
1386		/*
1387		**	Second handler for this irq.
1388		*/
1389
1390		if (bootverbose)
1391			printf ("\tusing shared irq %d.\n", irq);
1392
1393		/*
1394		**	replace old handler by shared-int-handler.
1395		*/
1396
1397		result = pcibus->pb_idetach (irq,
1398					     (inthand2_t *) tail->pcid_handler);
1399		if (result)
1400			printf ("\tCANNOT DETACH INT HANDLER.\n");
1401
1402		result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0);
1403		if (result) {
1404			printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n");
1405			goto fail;
1406		};
1407	}
1408#endif
1409	/*
1410	**	Link new descriptor, reenable ints and done.
1411	*/
1412
1413	pci_int_desc[irq]  = new;
1414	splx (oldspl);
1415	return (1);
1416
1417	/*
1418	**	Handle some problems.
1419	*/
1420
1421conflict:
1422	printf ("\tirq %d already in use.\n", irq);
1423fail:
1424	/*
1425	**	If descriptor allocated, free it.
1426	**	If included in mask, remove it.
1427	*/
1428
1429	if (new) free(new, M_DEVBUF);
1430	if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr);
1431	splx (oldspl);
1432	return (0);
1433}
1434
1435/*-----------------------------------------------------------------------
1436**
1437**	Unmap pci interrupt.
1438**
1439**-----------------------------------------------------------------------
1440*/
1441
1442int pci_unmap_int (pcici_t tag)
1443{
1444	int result, oldspl;
1445	struct pci_int_desc *this, **hook, *tail;
1446	unsigned irq;
1447
1448	/*
1449	**	Get irq line from configuration space,
1450	**	and check for consistency.
1451	*/
1452
1453	irq = getirq (tag);
1454	if (irq >= PCI_MAX_IRQ) {
1455		printf ("\tillegal irq %d.\n", irq);
1456		return (0);
1457	};
1458
1459	/*
1460	**	Search and unlink interrupt descriptor.
1461	*/
1462
1463	hook = getintdescbytag (irq, tag);
1464	if (hook == NULL) {
1465		printf ("\tno irq %d handler for pci %x\n",
1466			irq, tag.tag);
1467		return (0);
1468	};
1469
1470	this = *hook;
1471	*hook= this->pcid_next;
1472
1473	/*
1474	**	Message
1475	*/
1476
1477	printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n",
1478		irq, this->pcid_handler, this->pcid_argument,
1479		this->pcid_tag.tag, this->pcid_tally);
1480
1481	/*
1482	**	If this irq no longer included in the mask, remove it.
1483	*/
1484
1485	if (!getintdescbymptr (irq, this->pcid_maskptr))
1486		(void) pcibus->pb_imaskexc (irq, this->pcid_maskptr);
1487
1488	tail = pci_int_desc[irq];
1489
1490	if (tail == NULL) {
1491
1492		/*
1493		**	Remove the old handler.
1494		*/
1495
1496		result = pcibus->pb_idetach (irq,
1497					     (inthand2_t *) this->pcid_handler);
1498		if (result)
1499			printf ("\tirq %d: cannot remove handler.\n", irq);
1500
1501	} else if (tail->pcid_next == NULL) {
1502
1503		/*
1504		**	Remove the shared int handler.
1505		**	Install the last remaining handler.
1506		*/
1507
1508		oldspl = splq (1ul << irq);
1509
1510		result = pcibus->pb_idetach (irq, pci_int);
1511		if (result)
1512			printf ("\tirq %d: cannot remove handler.\n", irq);
1513
1514		result = pcibus->pb_iattach (irq,
1515				(inthand2_t *) tail->pcid_handler,
1516				(int) tail->pcid_argument,
1517				tail->pcid_maskptr);
1518
1519		if (result)
1520			printf ("\tirq %d: cannot install handler.\n", irq);
1521
1522		splx (oldspl);
1523	};
1524
1525	free (this, M_DEVBUF);
1526	return (1);
1527}
1528
1529/*-----------------------------------------------------------
1530**
1531**	Display of unknown devices.
1532**
1533**-----------------------------------------------------------
1534*/
1535struct vt {
1536	u_short	ident;
1537	char*	name;
1538};
1539
1540static struct vt VendorTable[] = {
1541	{0x0e11, "Compaq"},
1542	{0x1000, "NCR/Symbios"},
1543	{0x1002, "ATI Technologies Inc."},
1544	{0x1004, "VLSI"},
1545	{0x100B, "National Semiconductor"},
1546	{0x100E, "Weitek"},
1547	{0x1011, "Digital Equipment Corporation"},
1548	{0x1013, "Cirrus Logic"},
1549	{0x101A, "NCR"},
1550	{0x1022, "AMD"},
1551	{0x102B, "Matrox"},
1552	{0x102C, "Chips & Technologies"},
1553	{0x1039, "Silicon Integrated Systems"},
1554	{0x1042, "SMC"},
1555	{0x1044, "DPT"},
1556	{0x1045, "OPTI"},
1557	{0x104B, "Bus Logic"},
1558	{0x1060, "UMC"},
1559	{0x1080, "Contaq"},
1560	{0x1095, "CMD"},
1561	{0x10b9, "ACER Labs"},
1562	{0x1106, "VIA Technologies"},
1563	{0x5333, "S3 Inc."},
1564	{0x8086, "Intel Corporation"},
1565	{0x9004, "Adaptec"},
1566	{0,0}
1567};
1568
1569typedef struct {
1570	const int	subclass;
1571	const char	*name;
1572} subclass_name;
1573
1574/* 0x00 prehistoric subclasses */
1575static const subclass_name old_subclasses[] =
1576{
1577	{ 0x00, "misc"	},
1578	{ 0x01, "vga"	},
1579	{ 0x00, NULL	}
1580};
1581
1582/* 0x01 mass storage subclasses */
1583static const subclass_name storage_subclasses[] =
1584{
1585	{ 0x00, "scsi"	},
1586	{ 0x01, "ide"	},
1587	{ 0x02, "floppy"},
1588	{ 0x03, "ipi"	},
1589	{ 0x80, "misc"	},
1590	{ 0x00, NULL	}
1591};
1592
1593/* 0x02 network subclasses */
1594static const subclass_name network_subclasses[] =
1595{
1596	{ 0x00, "ethernet"	},
1597	{ 0x01, "tokenring"	},
1598	{ 0x02, "fddi"	},
1599	{ 0x80, "misc"	},
1600	{ 0x00, NULL	}
1601};
1602
1603/* 0x03 display subclasses */
1604static const subclass_name display_subclasses[] =
1605{
1606	{ 0x00, "vga"	},
1607	{ 0x01, "xga"	},
1608	{ 0x80, "misc"	},
1609	{ 0x00, NULL	}
1610};
1611
1612/* 0x04 multimedia subclasses */
1613static const subclass_name multimedia_subclasses[] =
1614{
1615	{ 0x00, "video"	},
1616	{ 0x01, "audio"	},
1617	{ 0x80, "misc"	},
1618	{ 0x00, NULL	}
1619};
1620
1621/* 0x05 memory subclasses */
1622static const subclass_name memory_subclasses[] =
1623{
1624	{ 0x00, "ram"	},
1625	{ 0x01, "flash"	},
1626	{ 0x80, "misc"	},
1627	{ 0x00, NULL	}
1628};
1629
1630/* 0x06 bridge subclasses */
1631static const subclass_name bridge_subclasses[] =
1632{
1633	{ 0x00, "host"	},
1634	{ 0x01, "isa"	},
1635	{ 0x02, "eisa"	},
1636	{ 0x03, "mc"	},
1637	{ 0x04, "pci"	},
1638	{ 0x05, "pcmcia"},
1639	{ 0x80, "misc"	},
1640	{ 0x00, NULL	}
1641};
1642
1643static const subclass_name *const subclasses[] = {
1644	old_subclasses,
1645	storage_subclasses,
1646	network_subclasses,
1647	display_subclasses,
1648	multimedia_subclasses,
1649	memory_subclasses,
1650	bridge_subclasses,
1651};
1652
1653static const char *const majclasses[] = {
1654	"old",
1655	"storage",
1656	"network",
1657	"display",
1658	"multimedia",
1659	"memory",
1660	"bridge"
1661};
1662
1663
1664void not_supported (pcici_t tag, u_long type)
1665{
1666	u_long	reg;
1667	u_long	data;
1668	u_char	class;
1669	u_char	subclass;
1670	struct vt * vp;
1671	int	pciint;
1672	int	irq;
1673
1674	/*
1675	**	lookup the names.
1676	*/
1677
1678	for (vp=VendorTable; vp->ident; vp++)
1679		if (vp->ident == (type & 0xffff))
1680			break;
1681
1682	/*
1683	**	and display them.
1684	*/
1685
1686	if (vp->ident) printf (vp->name);
1687		else   printf ("vendor=0x%04lx", type & 0xffff);
1688
1689	printf (", device=0x%04lx", type >> 16);
1690
1691	data = pcibus->pb_read(tag, PCI_CLASS_REG);
1692	class = (data >> 24) & 0xff;
1693	subclass = (data >> 16) & 0xff;
1694
1695	if (class < sizeof(majclasses) / sizeof(majclasses[0])) {
1696		printf(", class=%s", majclasses[class]);
1697	} else {
1698		printf(", class=0x%02x", class);
1699	}
1700
1701	if (subclass < sizeof(subclasses) / sizeof(subclasses[0])) {
1702		const subclass_name *p = subclasses[class];
1703		while (p->name && (p->subclass != subclass))
1704			p++;
1705		if (p->name) {
1706			printf(" (%s)", p->name);
1707		} else {
1708			printf(" (unknown subclass 0x%02lx)", subclass);
1709		}
1710	} else {
1711		printf(", subclass=0x%02x", subclass);
1712	}
1713
1714	data = pcibus->pb_read (tag, PCI_INTERRUPT_REG);
1715	pciint = PCI_INTERRUPT_PIN_EXTRACT(data);
1716
1717	if (pciint) {
1718
1719		printf (" int %c irq ", 0x60+pciint);
1720
1721		irq = PCI_INTERRUPT_LINE_EXTRACT(data);
1722
1723		/*
1724		**	If it's zero, the isa irq number is unknown,
1725		**	and we cannot bind the pci interrupt.
1726		*/
1727
1728		if (irq && (irq != 0xff))
1729			printf ("%d", irq);
1730		else
1731			printf ("??");
1732	};
1733
1734	if (class != (PCI_CLASS_BRIDGE >> 24))
1735	    printf (" [no driver assigned]");
1736	printf ("\n");
1737
1738	if (bootverbose) {
1739	    if (class == (PCI_CLASS_BRIDGE >> 24)) {
1740		printf ("configuration space registers:");
1741		for (reg = 0; reg < 0x100; reg+=4) {
1742		    if ((reg & 0x0f) == 0) printf ("\n%02x:\t", reg);
1743		    printf ("%08x ", pcibus->pb_read (tag, reg));
1744		}
1745		printf ("\n");
1746	    } else {
1747		for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) {
1748		    data = pcibus->pb_read (tag, reg);
1749		    if ((data&~7)==0) continue;
1750		    switch (data&7) {
1751
1752		case 1:
1753		case 5:
1754			printf ("\tmap(%x): io(%04lx)\n",
1755				reg, data & ~3);
1756			break;
1757		case 0:
1758			printf ("\tmap(%x): mem32(%08lx)\n",
1759				reg, data & ~7);
1760			break;
1761		case 2:
1762			printf ("\tmap(%x): mem20(%05lx)\n",
1763				reg, data & ~7);
1764			break;
1765		case 4:
1766			printf ("\tmap(%x): mem64(%08x%08lx)\n",
1767				reg, pcibus->pb_read (tag, reg +4), data & ~7);
1768			reg += 4;
1769			break;
1770		    }
1771		}
1772	    }
1773	}
1774}
1775#endif /* NPCI */
1776