mmc.c revision 187546
1189765Sgabor/*-
2189765Sgabor * Copyright (c) 2006 Bernd Walter.  All rights reserved.
3189765Sgabor * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
4189765Sgabor *
5189765Sgabor * Redistribution and use in source and binary forms, with or without
6189765Sgabor * modification, are permitted provided that the following conditions
7189765Sgabor * are met:
8189765Sgabor * 1. Redistributions of source code must retain the above copyright
9189765Sgabor *    notice, this list of conditions and the following disclaimer.
10189765Sgabor * 2. Redistributions in binary form must reproduce the above copyright
11189765Sgabor *    notice, this list of conditions and the following disclaimer in the
12189765Sgabor *    documentation and/or other materials provided with the distribution.
13189765Sgabor *
14189765Sgabor * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15189765Sgabor * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16189765Sgabor * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17190410Snetchild * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18189765Sgabor * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19189765Sgabor * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20189765Sgabor * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21189765Sgabor * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22189765Sgabor * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23189765Sgabor * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24189765Sgabor *
25189765Sgabor * Portions of this software may have been developed with reference to
26189765Sgabor * the SD Simplified Specification.  The following disclaimer may apply:
27189883Sgabor *
28189765Sgabor * The following conditions apply to the release of the simplified
29189765Sgabor * specification ("Simplified Specification") by the SD Card Association and
30189765Sgabor * the SD Group. The Simplified Specification is a subset of the complete SD
31189765Sgabor * Specification which is owned by the SD Card Association and the SD
32189765Sgabor * Group. This Simplified Specification is provided on a non-confidential
33189883Sgabor * basis subject to the disclaimers below. Any implementation of the
34189765Sgabor * Simplified Specification may require a license from the SD Card
35189765Sgabor * Association, SD Group, SD-3C LLC or other third parties.
36189765Sgabor *
37189765Sgabor * Disclaimers:
38189765Sgabor *
39189765Sgabor * The information contained in the Simplified Specification is presented only
40189765Sgabor * as a standard specification for SD Cards and SD Host/Ancillary products and
41189765Sgabor * is provided "AS-IS" without any representations or warranties of any
42189765Sgabor * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
43189765Sgabor * Card Association for any damages, any infringements of patents or other
44189765Sgabor * right of the SD Group, SD-3C LLC, the SD Card Association or any third
45189765Sgabor * parties, which may result from its use. No license is granted by
46189765Sgabor * implication, estoppel or otherwise under any patent or other rights of the
47189765Sgabor * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
48189765Sgabor * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
49189765Sgabor * or the SD Card Association to disclose or distribute any technical
50189765Sgabor * information, know-how or other confidential information to any third party.
51189765Sgabor */
52189765Sgabor
53189883Sgabor#include <sys/cdefs.h>
54189765Sgabor__FBSDID("$FreeBSD: head/sys/dev/mmc/mmc.c 187546 2009-01-21 17:34:14Z imp $");
55189765Sgabor
56189765Sgabor#include <sys/param.h>
57189883Sgabor#include <sys/systm.h>
58189765Sgabor#include <sys/kernel.h>
59190410Snetchild#include <sys/malloc.h>
60189765Sgabor#include <sys/lock.h>
61189765Sgabor#include <sys/module.h>
62189765Sgabor#include <sys/mutex.h>
63189765Sgabor#include <sys/bus.h>
64189765Sgabor#include <sys/endian.h>
65189765Sgabor
66189765Sgabor#include <dev/mmc/mmcreg.h>
67189765Sgabor#include <dev/mmc/mmcbrvar.h>
68189765Sgabor#include <dev/mmc/mmcvar.h>
69189765Sgabor#include "mmcbr_if.h"
70189765Sgabor#include "mmcbus_if.h"
71189765Sgabor
72189765Sgaborstruct mmc_softc {
73189883Sgabor	device_t dev;
74189765Sgabor	struct mtx sc_mtx;
75190410Snetchild	struct intr_config_hook config_intrhook;
76189765Sgabor	device_t owner;
77189765Sgabor	uint32_t last_rca;
78189765Sgabor};
79190410Snetchild
80189765Sgabor/*
81189765Sgabor * Per-card data
82189765Sgabor */
83189765Sgaborstruct mmc_ivars {
84189765Sgabor	uint32_t raw_cid[4];	/* Raw bits of the CID */
85189765Sgabor	uint32_t raw_csd[4];	/* Raw bits of the CSD */
86189765Sgabor	uint32_t raw_scr[2];	/* Raw bits of the SCR */
87189765Sgabor	uint8_t raw_ext_csd[512];	/* Raw bits of the EXT_CSD */
88189765Sgabor	uint32_t raw_sd_status[16];	/* Raw bits of the SD_STATUS */
89189765Sgabor	uint16_t rca;
90189765Sgabor	enum mmc_card_mode mode;
91189765Sgabor	struct mmc_cid cid;	/* cid decoded */
92189765Sgabor	struct mmc_csd csd;	/* csd decoded */
93189765Sgabor	struct mmc_scr scr;	/* scr decoded */
94189765Sgabor	struct mmc_sd_status sd_status;	/* SD_STATUS decoded */
95189765Sgabor	u_char read_only;	/* True when the device is read-only */
96189765Sgabor	u_char bus_width;	/* Bus width to use */
97189765Sgabor	u_char timing;		/* Bus timing support */
98189765Sgabor	u_char high_cap;	/* High Capacity card (block addressed) */
99189765Sgabor	uint32_t sec_count;	/* Card capacity in 512byte blocks */
100189765Sgabor	uint32_t tran_speed;	/* Max speed in normal mode */
101189883Sgabor	uint32_t hs_tran_speed;	/* Max speed in high speed mode */
102189765Sgabor	uint32_t erase_sector;	/* Card native erase sector size */
103189765Sgabor};
104189765Sgabor
105189765Sgabor#define CMD_RETRIES	3
106189765Sgabor
107189765Sgabor/* bus entry points */
108189765Sgaborstatic int mmc_probe(device_t dev);
109189765Sgaborstatic int mmc_attach(device_t dev);
110189765Sgaborstatic int mmc_detach(device_t dev);
111189765Sgaborstatic int mmc_suspend(device_t dev);
112189765Sgaborstatic int mmc_resume(device_t dev);
113189765Sgabor
114189765Sgabor#define MMC_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
115189765Sgabor#define	MMC_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
116189765Sgabor#define MMC_LOCK_INIT(_sc)					\
117189765Sgabor	mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev),	\
118189765Sgabor	    "mmc", MTX_DEF)
119189765Sgabor#define MMC_LOCK_DESTROY(_sc)	mtx_destroy(&_sc->sc_mtx);
120189765Sgabor#define MMC_ASSERT_LOCKED(_sc)	mtx_assert(&_sc->sc_mtx, MA_OWNED);
121189765Sgabor#define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
122189765Sgabor
123189765Sgaborstatic int mmc_calculate_clock(struct mmc_softc *sc);
124189765Sgaborstatic void mmc_delayed_attach(void *);
125189765Sgaborstatic void mmc_power_down(struct mmc_softc *sc);
126189765Sgaborstatic int mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd,
127189765Sgabor    int retries);
128189765Sgaborstatic int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
129189765Sgabor    uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
130189765Sgaborstatic int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
131189765Sgaborstatic int mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width);
132189765Sgaborstatic int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr);
133189765Sgaborstatic void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
134189765Sgaborstatic int mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd);
135189765Sgaborstatic void mmc_scan(struct mmc_softc *sc);
136189765Sgaborstatic int mmc_delete_cards(struct mmc_softc *sc);
137189765Sgabor
138189765Sgaborstatic void
139189765Sgabormmc_ms_delay(int ms)
140189765Sgabor{
141189765Sgabor	DELAY(1000 * ms);	/* XXX BAD */
142189765Sgabor}
143189765Sgabor
144189765Sgaborstatic int
145189883Sgabormmc_probe(device_t dev)
146189765Sgabor{
147189765Sgabor
148189765Sgabor	device_set_desc(dev, "MMC/SD bus");
149189765Sgabor	return (0);
150189765Sgabor}
151189765Sgabor
152189765Sgaborstatic int
153189883Sgabormmc_attach(device_t dev)
154189765Sgabor{
155189765Sgabor	struct mmc_softc *sc;
156189765Sgabor
157189765Sgabor	sc = device_get_softc(dev);
158189765Sgabor	sc->dev = dev;
159189765Sgabor	MMC_LOCK_INIT(sc);
160189765Sgabor
161189765Sgabor	/* We'll probe and attach our children later, but before / mount */
162189765Sgabor	sc->config_intrhook.ich_func = mmc_delayed_attach;
163189765Sgabor	sc->config_intrhook.ich_arg = sc;
164189765Sgabor	if (config_intrhook_establish(&sc->config_intrhook) != 0)
165189765Sgabor		device_printf(dev, "config_intrhook_establish failed\n");
166189765Sgabor	return (0);
167190410Snetchild}
168189765Sgabor
169189765Sgaborstatic int
170189765Sgabormmc_detach(device_t dev)
171189765Sgabor{
172189765Sgabor	struct mmc_softc *sc = device_get_softc(dev);
173189765Sgabor	int err;
174189765Sgabor
175189765Sgabor	if ((err = mmc_delete_cards(sc)) != 0)
176189883Sgabor		return (err);
177189883Sgabor	mmc_power_down(sc);
178189765Sgabor	MMC_LOCK_DESTROY(sc);
179189883Sgabor
180189765Sgabor	return (0);
181189883Sgabor}
182189883Sgabor
183189883Sgaborstatic int
184189765Sgabormmc_suspend(device_t dev)
185189765Sgabor{
186189765Sgabor	struct mmc_softc *sc = device_get_softc(dev);
187189765Sgabor	int err;
188189765Sgabor
189189765Sgabor	err = bus_generic_suspend(dev);
190189765Sgabor	if (err)
191189765Sgabor	        return (err);
192189765Sgabor	mmc_power_down(sc);
193189765Sgabor	return (0);
194189765Sgabor}
195189765Sgabor
196189765Sgaborstatic int
197189765Sgabormmc_resume(device_t dev)
198189765Sgabor{
199189765Sgabor	struct mmc_softc *sc = device_get_softc(dev);
200189765Sgabor
201189765Sgabor	mmc_scan(sc);
202189765Sgabor	return (bus_generic_resume(dev));
203189765Sgabor}
204189765Sgabor
205189765Sgaborstatic int
206189765Sgabormmc_acquire_bus(device_t busdev, device_t dev)
207189765Sgabor{
208189765Sgabor	struct mmc_softc *sc;
209189765Sgabor	struct mmc_ivars *ivar;
210189765Sgabor	int err;
211190410Snetchild	int rca;
212189765Sgabor
213189765Sgabor	err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
214189765Sgabor	if (err)
215189765Sgabor		return (err);
216189765Sgabor	sc = device_get_softc(busdev);
217189765Sgabor	MMC_LOCK(sc);
218189765Sgabor	if (sc->owner)
219189765Sgabor		panic("mmc: host bridge didn't seralize us.");
220189765Sgabor	sc->owner = dev;
221189765Sgabor	MMC_UNLOCK(sc);
222189765Sgabor
223189765Sgabor	if (busdev != dev) {
224189765Sgabor		/*
225189765Sgabor		 * Keep track of the last rca that we've selected.  If
226189765Sgabor		 * we're asked to do it again, don't.  We never
227189765Sgabor		 * unselect unless the bus code itself wants the mmc
228189765Sgabor		 * bus, and constantly reselecting causes problems.
229189765Sgabor		 */
230189765Sgabor		rca = mmc_get_rca(dev);
231189765Sgabor		if (sc->last_rca != rca) {
232189765Sgabor			mmc_select_card(sc, rca);
233189883Sgabor			sc->last_rca = rca;
234189765Sgabor			/* Prepare bus width for the new card. */
235189883Sgabor			ivar = device_get_ivars(dev);
236189765Sgabor			if (bootverbose) {
237189883Sgabor				device_printf(busdev,
238189765Sgabor				    "setting bus width to %d bits\n",
239189765Sgabor				    (ivar->bus_width == bus_width_4) ? 4 :
240189765Sgabor				    (ivar->bus_width == bus_width_8) ? 8 : 1);
241189765Sgabor			}
242189765Sgabor			mmc_set_card_bus_width(sc, rca, ivar->bus_width);
243189883Sgabor			mmcbr_set_bus_width(busdev, ivar->bus_width);
244189765Sgabor			mmcbr_update_ios(busdev);
245189765Sgabor		}
246189765Sgabor	} else {
247189765Sgabor		/*
248189765Sgabor		 * If there's a card selected, stand down.
249189765Sgabor		 */
250		if (sc->last_rca != 0) {
251			mmc_select_card(sc, 0);
252			sc->last_rca = 0;
253		}
254	}
255
256	return (0);
257}
258
259static int
260mmc_release_bus(device_t busdev, device_t dev)
261{
262	struct mmc_softc *sc;
263	int err;
264
265	sc = device_get_softc(busdev);
266
267	MMC_LOCK(sc);
268	if (!sc->owner)
269		panic("mmc: releasing unowned bus.");
270	if (sc->owner != dev)
271		panic("mmc: you don't own the bus.  game over.");
272	MMC_UNLOCK(sc);
273	err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
274	if (err)
275		return (err);
276	MMC_LOCK(sc);
277	sc->owner = NULL;
278	MMC_UNLOCK(sc);
279	return (0);
280}
281
282static uint32_t
283mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
284{
285
286	return (ocr & MMC_OCR_VOLTAGE);
287}
288
289static int
290mmc_highest_voltage(uint32_t ocr)
291{
292	int i;
293
294	for (i = 30; i >= 0; i--)
295		if (ocr & (1 << i))
296			return (i);
297	return (-1);
298}
299
300static void
301mmc_wakeup(struct mmc_request *req)
302{
303	struct mmc_softc *sc;
304
305	sc = (struct mmc_softc *)req->done_data;
306	MMC_LOCK(sc);
307	req->flags |= MMC_REQ_DONE;
308	MMC_UNLOCK(sc);
309	wakeup(req);
310}
311
312static int
313mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
314{
315
316	req->done = mmc_wakeup;
317	req->done_data = sc;
318	MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
319	MMC_LOCK(sc);
320	while ((req->flags & MMC_REQ_DONE) == 0)
321		msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
322	MMC_UNLOCK(sc);
323	return (0);
324}
325
326static int
327mmc_wait_for_request(device_t brdev, device_t reqdev, struct mmc_request *req)
328{
329	struct mmc_softc *sc = device_get_softc(brdev);
330
331	return (mmc_wait_for_req(sc, req));
332}
333
334static int
335mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd, int retries)
336{
337	struct mmc_request mreq;
338
339	memset(&mreq, 0, sizeof(mreq));
340	memset(cmd->resp, 0, sizeof(cmd->resp));
341	cmd->retries = retries;
342	mreq.cmd = cmd;
343	if (bootverbose)
344		device_printf(sc->dev, "CMD: %#x ARG %#x\n", cmd->opcode,
345		    cmd->arg);
346	mmc_wait_for_req(sc, &mreq);
347	return (cmd->error);
348}
349
350static int
351mmc_wait_for_app_cmd(struct mmc_softc *sc, uint32_t rca,
352    struct mmc_command *cmd, int retries)
353{
354	struct mmc_command appcmd;
355	int err = MMC_ERR_NONE, i;
356
357	for (i = 0; i <= retries; i++) {
358		appcmd.opcode = MMC_APP_CMD;
359		appcmd.arg = rca << 16;
360		appcmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
361		appcmd.data = NULL;
362		mmc_wait_for_cmd(sc, &appcmd, 0);
363		err = appcmd.error;
364		if (err != MMC_ERR_NONE)
365			continue;
366		if (!(appcmd.resp[0] & R1_APP_CMD))
367			return MMC_ERR_FAILED;
368		mmc_wait_for_cmd(sc, cmd, 0);
369		err = cmd->error;
370		if (err == MMC_ERR_NONE)
371			break;
372	}
373	return (err);
374}
375
376static int
377mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
378    uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
379{
380	struct mmc_command cmd;
381	int err;
382
383	memset(&cmd, 0, sizeof(cmd));
384	cmd.opcode = opcode;
385	cmd.arg = arg;
386	cmd.flags = flags;
387	cmd.data = NULL;
388	err = mmc_wait_for_cmd(sc, &cmd, retries);
389	if (err)
390		return (err);
391	if (cmd.error)
392		return (cmd.error);
393	if (resp) {
394		if (flags & MMC_RSP_136)
395			memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
396		else
397			*resp = cmd.resp[0];
398	}
399	return (0);
400}
401
402static void
403mmc_idle_cards(struct mmc_softc *sc)
404{
405	device_t dev;
406	struct mmc_command cmd;
407
408	dev = sc->dev;
409	mmcbr_set_chip_select(dev, cs_high);
410	mmcbr_update_ios(dev);
411	mmc_ms_delay(1);
412
413	memset(&cmd, 0, sizeof(cmd));
414	cmd.opcode = MMC_GO_IDLE_STATE;
415	cmd.arg = 0;
416	cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
417	cmd.data = NULL;
418	mmc_wait_for_cmd(sc, &cmd, 0);
419	mmc_ms_delay(1);
420
421	mmcbr_set_chip_select(dev, cs_dontcare);
422	mmcbr_update_ios(dev);
423	mmc_ms_delay(1);
424}
425
426static int
427mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
428{
429	struct mmc_command cmd;
430	int err = MMC_ERR_NONE, i;
431
432	memset(&cmd, 0, sizeof(cmd));
433	cmd.opcode = ACMD_SD_SEND_OP_COND;
434	cmd.arg = ocr;
435	cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
436	cmd.data = NULL;
437
438	for (i = 0; i < 100; i++) {
439		err = mmc_wait_for_app_cmd(sc, 0, &cmd, CMD_RETRIES);
440		if (err != MMC_ERR_NONE)
441			break;
442		if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
443		    (ocr & MMC_OCR_VOLTAGE) == 0)
444			break;
445		err = MMC_ERR_TIMEOUT;
446		mmc_ms_delay(10);
447	}
448	if (rocr && err == MMC_ERR_NONE)
449		*rocr = cmd.resp[0];
450	return (err);
451}
452
453static int
454mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
455{
456	struct mmc_command cmd;
457	int err = MMC_ERR_NONE, i;
458
459	memset(&cmd, 0, sizeof(cmd));
460	cmd.opcode = MMC_SEND_OP_COND;
461	cmd.arg = ocr;
462	cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
463	cmd.data = NULL;
464
465	for (i = 0; i < 100; i++) {
466		err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
467		if (err != MMC_ERR_NONE)
468			break;
469		if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
470		    (ocr & MMC_OCR_VOLTAGE) == 0)
471			break;
472		err = MMC_ERR_TIMEOUT;
473		mmc_ms_delay(10);
474	}
475	if (rocr && err == MMC_ERR_NONE)
476		*rocr = cmd.resp[0];
477	return (err);
478}
479
480static int
481mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
482{
483	struct mmc_command cmd;
484	int err;
485
486	memset(&cmd, 0, sizeof(cmd));
487	cmd.opcode = SD_SEND_IF_COND;
488	cmd.arg = (vhs << 8) + 0xAA;
489	cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
490	cmd.data = NULL;
491
492	err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
493	return (err);
494}
495
496static void
497mmc_power_up(struct mmc_softc *sc)
498{
499	device_t dev;
500
501	dev = sc->dev;
502	mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
503	mmcbr_set_bus_mode(dev, opendrain);
504	mmcbr_set_chip_select(dev, cs_dontcare);
505	mmcbr_set_bus_width(dev, bus_width_1);
506	mmcbr_set_power_mode(dev, power_up);
507	mmcbr_set_clock(dev, 0);
508	mmcbr_update_ios(dev);
509	mmc_ms_delay(1);
510
511	mmcbr_set_clock(dev, mmcbr_get_f_min(sc->dev));
512	mmcbr_set_timing(dev, bus_timing_normal);
513	mmcbr_set_power_mode(dev, power_on);
514	mmcbr_update_ios(dev);
515	mmc_ms_delay(2);
516}
517
518static void
519mmc_power_down(struct mmc_softc *sc)
520{
521	device_t dev = sc->dev;
522
523	mmcbr_set_bus_mode(dev, opendrain);
524	mmcbr_set_chip_select(dev, cs_dontcare);
525	mmcbr_set_bus_width(dev, bus_width_1);
526	mmcbr_set_power_mode(dev, power_off);
527	mmcbr_set_clock(dev, 0);
528	mmcbr_set_timing(dev, bus_timing_normal);
529	mmcbr_update_ios(dev);
530}
531
532static int
533mmc_select_card(struct mmc_softc *sc, uint16_t rca)
534{
535	int flags;
536
537	flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
538	return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
539	    flags, NULL, CMD_RETRIES));
540}
541
542static int
543mmc_switch(struct mmc_softc *sc, uint8_t set, uint8_t index, uint8_t value)
544{
545	struct mmc_command cmd;
546	int err;
547
548	cmd.opcode = MMC_SWITCH_FUNC;
549	cmd.arg = (MMC_SWITCH_FUNC_WR << 24) |
550	    (index << 16) |
551	    (value << 8) |
552	    set;
553	cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
554	cmd.data = NULL;
555	err = mmc_wait_for_cmd(sc, &cmd, 0);
556	return (err);
557}
558
559static int
560mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, uint8_t *res)
561{
562	int err;
563	struct mmc_command cmd;
564	struct mmc_data data;
565
566	memset(&cmd, 0, sizeof(struct mmc_command));
567	memset(&data, 0, sizeof(struct mmc_data));
568
569	memset(res, 0, 64);
570	cmd.opcode = SD_SWITCH_FUNC;
571	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
572	cmd.arg = mode << 31;
573	cmd.arg |= 0x00FFFFFF;
574	cmd.arg &= ~(0xF << (grp * 4));
575	cmd.arg |= value << (grp * 4);
576	cmd.data = &data;
577
578	data.data = res;
579	data.len = 64;
580	data.flags = MMC_DATA_READ;
581
582	err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
583	return (err);
584}
585
586static int
587mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width)
588{
589	struct mmc_command cmd;
590	int err;
591	uint8_t	value;
592
593	if (mmcbr_get_mode(sc->dev) == mode_sd) {
594		memset(&cmd, 0, sizeof(struct mmc_command));
595		cmd.opcode = ACMD_SET_BUS_WIDTH;
596		cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
597		switch (width) {
598		case bus_width_1:
599			cmd.arg = SD_BUS_WIDTH_1;
600			break;
601		case bus_width_4:
602			cmd.arg = SD_BUS_WIDTH_4;
603			break;
604		default:
605			return (MMC_ERR_INVALID);
606		}
607		err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
608	} else {
609		switch (width) {
610		case bus_width_1:
611			value = EXT_CSD_BUS_WIDTH_1;
612			break;
613		case bus_width_4:
614			value = EXT_CSD_BUS_WIDTH_4;
615			break;
616		case bus_width_8:
617			value = EXT_CSD_BUS_WIDTH_8;
618			break;
619		default:
620			return (MMC_ERR_INVALID);
621		}
622		err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
623		    value);
624	}
625	return (err);
626}
627
628static int
629mmc_set_timing(struct mmc_softc *sc, int timing)
630{
631	int err;
632	uint8_t	value;
633	u_char switch_res[64];
634
635	switch (timing) {
636	case bus_timing_normal:
637		value = 0;
638		break;
639	case bus_timing_hs:
640		value = 1;
641		break;
642	default:
643		return (MMC_ERR_INVALID);
644	}
645	if (mmcbr_get_mode(sc->dev) == mode_sd)
646		err = mmc_sd_switch(sc, 1, 0, value, switch_res);
647	else
648		err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL,
649		    EXT_CSD_HS_TIMING, value);
650	return (err);
651}
652
653static int
654mmc_test_bus_width(struct mmc_softc *sc)
655{
656	struct mmc_command cmd;
657	struct mmc_data data;
658	int err;
659	uint8_t buf[8];
660	uint8_t	p8[8] =   { 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
661	uint8_t	p8ok[8] = { 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
662	uint8_t	p4[4] =   { 0x5A, 0x00, 0x00, 0x00, };
663	uint8_t	p4ok[4] = { 0xA5, 0x00, 0x00, 0x00, };
664
665	if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
666		mmcbr_set_bus_width(sc->dev, bus_width_8);
667		mmcbr_update_ios(sc->dev);
668
669		cmd.opcode = MMC_BUSTEST_W;
670		cmd.arg = 0;
671		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
672		cmd.data = &data;
673
674		data.data = p8;
675		data.len = 8;
676		data.flags = MMC_DATA_WRITE;
677		mmc_wait_for_cmd(sc, &cmd, 0);
678
679		cmd.opcode = MMC_BUSTEST_R;
680		cmd.arg = 0;
681		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
682		cmd.data = &data;
683
684		data.data = buf;
685		data.len = 8;
686		data.flags = MMC_DATA_READ;
687		err = mmc_wait_for_cmd(sc, &cmd, 0);
688
689		mmcbr_set_bus_width(sc->dev, bus_width_1);
690		mmcbr_update_ios(sc->dev);
691
692		if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
693			return (bus_width_8);
694	}
695
696	if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
697		mmcbr_set_bus_width(sc->dev, bus_width_4);
698		mmcbr_update_ios(sc->dev);
699
700		cmd.opcode = MMC_BUSTEST_W;
701		cmd.arg = 0;
702		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
703		cmd.data = &data;
704
705		data.data = p4;
706		data.len = 4;
707		data.flags = MMC_DATA_WRITE;
708		mmc_wait_for_cmd(sc, &cmd, 0);
709
710		cmd.opcode = MMC_BUSTEST_R;
711		cmd.arg = 0;
712		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
713		cmd.data = &data;
714
715		data.data = buf;
716		data.len = 4;
717		data.flags = MMC_DATA_READ;
718		err = mmc_wait_for_cmd(sc, &cmd, 0);
719
720		mmcbr_set_bus_width(sc->dev, bus_width_1);
721		mmcbr_update_ios(sc->dev);
722
723		if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
724			return (bus_width_4);
725	}
726	return (bus_width_1);
727}
728
729static uint32_t
730mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
731{
732	const int i = (bit_len / 32) - (start / 32) - 1;
733	const int shift = start & 31;
734	uint32_t retval = bits[i] >> shift;
735	if (size + shift > 32)
736		retval |= bits[i - 1] << (32 - shift);
737	return (retval & ((1 << size) - 1));
738}
739
740static void
741mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
742{
743	int i;
744
745	/* There's no version info, so we take it on faith */
746	memset(cid, 0, sizeof(*cid));
747	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
748	cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
749	for (i = 0; i < 5; i++)
750		cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
751	cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
752	cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
753	cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2001;
754	cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
755}
756
757static void
758mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid)
759{
760	int i;
761
762	/* There's no version info, so we take it on faith */
763	memset(cid, 0, sizeof(*cid));
764	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
765	cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
766	for (i = 0; i < 6; i++)
767		cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
768	cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
769	cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
770	cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
771	cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997;
772}
773
774static const int exp[8] = {
775	1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
776};
777static const int mant[16] = {
778	10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
779};
780static const int cur_min[8] = {
781	500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
782};
783static const int cur_max[8] = {
784	1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
785};
786
787static void
788mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
789{
790	int v;
791	int m;
792	int e;
793
794	memset(csd, 0, sizeof(*csd));
795	csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
796	if (v == 0) {
797		m = mmc_get_bits(raw_csd, 128, 115, 4);
798		e = mmc_get_bits(raw_csd, 128, 112, 3);
799		csd->tacc = exp[e] * mant[m] + 9 / 10;
800		csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
801		m = mmc_get_bits(raw_csd, 128, 99, 4);
802		e = mmc_get_bits(raw_csd, 128, 96, 3);
803		csd->tran_speed = exp[e] * 10000 * mant[m];
804		csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
805		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
806		csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
807		csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
808		csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
809		csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
810		csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
811		csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
812		csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
813		csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
814		m = mmc_get_bits(raw_csd, 128, 62, 12);
815		e = mmc_get_bits(raw_csd, 128, 47, 3);
816		csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
817		csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
818		csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
819		csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
820		csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
821		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
822		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
823		csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
824	} else if (v == 1) {
825		m = mmc_get_bits(raw_csd, 128, 115, 4);
826		e = mmc_get_bits(raw_csd, 128, 112, 3);
827		csd->tacc = exp[e] * mant[m] + 9 / 10;
828		csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
829		m = mmc_get_bits(raw_csd, 128, 99, 4);
830		e = mmc_get_bits(raw_csd, 128, 96, 3);
831		csd->tran_speed = exp[e] * 10000 * mant[m];
832		csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
833		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
834		csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
835		csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
836		csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
837		csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
838		csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) *
839		    512 * 1024;
840		csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
841		csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
842		csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
843		csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
844		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
845		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
846		csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
847	} else
848		panic("unknown SD CSD version");
849}
850
851static void
852mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
853{
854	int m;
855	int e;
856
857	memset(csd, 0, sizeof(*csd));
858	csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
859	csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
860	m = mmc_get_bits(raw_csd, 128, 115, 4);
861	e = mmc_get_bits(raw_csd, 128, 112, 3);
862	csd->tacc = exp[e] * mant[m] + 9 / 10;
863	csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
864	m = mmc_get_bits(raw_csd, 128, 99, 4);
865	e = mmc_get_bits(raw_csd, 128, 96, 3);
866	csd->tran_speed = exp[e] * 10000 * mant[m];
867	csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
868	csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
869	csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
870	csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
871	csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
872	csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
873	csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
874	csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
875	csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
876	csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
877	m = mmc_get_bits(raw_csd, 128, 62, 12);
878	e = mmc_get_bits(raw_csd, 128, 47, 3);
879	csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
880	csd->erase_blk_en = 0;
881	csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
882	    (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
883	csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
884	csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
885	csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
886	csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
887	csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
888}
889
890static void
891mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
892{
893	unsigned int scr_struct;
894
895	memset(scr, 0, sizeof(*scr));
896
897	scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
898	if (scr_struct != 0) {
899		printf("Unrecognised SCR structure version %d\n",
900		    scr_struct);
901		return;
902	}
903	scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
904	scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
905}
906
907static void
908mmc_app_decode_sd_status(uint32_t *raw_sd_status,
909    struct mmc_sd_status *sd_status)
910{
911
912	memset(sd_status, 0, sizeof(*sd_status));
913
914	sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
915	sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
916	sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
917	sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
918	sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
919	sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
920	sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
921	sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
922	sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
923	sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
924}
925
926static int
927mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
928{
929	struct mmc_command cmd;
930	int err;
931
932	cmd.opcode = MMC_ALL_SEND_CID;
933	cmd.arg = 0;
934	cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
935	cmd.data = NULL;
936	err = mmc_wait_for_cmd(sc, &cmd, 0);
937	memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
938	return (err);
939}
940
941static int
942mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcid)
943{
944	struct mmc_command cmd;
945	int err;
946
947	cmd.opcode = MMC_SEND_CSD;
948	cmd.arg = rca << 16;
949	cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
950	cmd.data = NULL;
951	err = mmc_wait_for_cmd(sc, &cmd, 0);
952	memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
953	return (err);
954}
955
956static int
957mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
958{
959	int err;
960	struct mmc_command cmd;
961	struct mmc_data data;
962
963	memset(&cmd, 0, sizeof(struct mmc_command));
964	memset(&data, 0, sizeof(struct mmc_data));
965
966	memset(rawscr, 0, 8);
967	cmd.opcode = ACMD_SEND_SCR;
968	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
969	cmd.arg = 0;
970	cmd.data = &data;
971
972	data.data = rawscr;
973	data.len = 8;
974	data.flags = MMC_DATA_READ;
975
976	err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
977	rawscr[0] = be32toh(rawscr[0]);
978	rawscr[1] = be32toh(rawscr[1]);
979	return (err);
980}
981
982static int
983mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd)
984{
985	int err;
986	struct mmc_command cmd;
987	struct mmc_data data;
988
989	memset(&cmd, 0, sizeof(struct mmc_command));
990	memset(&data, 0, sizeof(struct mmc_data));
991
992	memset(rawextcsd, 0, 512);
993	cmd.opcode = MMC_SEND_EXT_CSD;
994	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
995	cmd.arg = 0;
996	cmd.data = &data;
997
998	data.data = rawextcsd;
999	data.len = 512;
1000	data.flags = MMC_DATA_READ;
1001
1002	err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
1003	return (err);
1004}
1005
1006static int
1007mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1008{
1009	int err, i;
1010	struct mmc_command cmd;
1011	struct mmc_data data;
1012
1013	memset(&cmd, 0, sizeof(struct mmc_command));
1014	memset(&data, 0, sizeof(struct mmc_data));
1015
1016	memset(rawsdstatus, 0, 64);
1017	cmd.opcode = ACMD_SD_STATUS;
1018	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1019	cmd.arg = 0;
1020	cmd.data = &data;
1021
1022	data.data = rawsdstatus;
1023	data.len = 64;
1024	data.flags = MMC_DATA_READ;
1025
1026	err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
1027	for (i = 0; i < 16; i++)
1028	    rawsdstatus[i] = be32toh(rawsdstatus[i]);
1029	return (err);
1030}
1031
1032static int
1033mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1034{
1035	struct mmc_command cmd;
1036	int err;
1037
1038	cmd.opcode = MMC_SET_RELATIVE_ADDR;
1039	cmd.arg = resp << 16;
1040	cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1041	cmd.data = NULL;
1042	err = mmc_wait_for_cmd(sc, &cmd, 0);
1043	return (err);
1044}
1045
1046static int
1047mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1048{
1049	struct mmc_command cmd;
1050	int err;
1051
1052	cmd.opcode = SD_SEND_RELATIVE_ADDR;
1053	cmd.arg = 0;
1054	cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1055	cmd.data = NULL;
1056	err = mmc_wait_for_cmd(sc, &cmd, 0);
1057	*resp = cmd.resp[0];
1058	return (err);
1059}
1060
1061static void
1062mmc_discover_cards(struct mmc_softc *sc)
1063{
1064	struct mmc_ivars *ivar = NULL;
1065	device_t *devlist;
1066	int err, i, devcount, newcard;
1067	uint32_t raw_cid[4];
1068	uint32_t resp, sec_count;
1069	device_t child;
1070	uint16_t rca = 2;
1071	u_char switch_res[64];
1072
1073	while (1) {
1074		err = mmc_all_send_cid(sc, raw_cid);
1075		if (err == MMC_ERR_TIMEOUT)
1076			break;
1077		if (err != MMC_ERR_NONE) {
1078			device_printf(sc->dev, "Error reading CID %d\n", err);
1079			break;
1080		}
1081		newcard = 1;
1082		if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1083			return;
1084		for (i = 0; i < devcount; i++) {
1085			ivar = device_get_ivars(devlist[i]);
1086			if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 0) {
1087				newcard = 0;
1088				break;
1089			}
1090		}
1091		free(devlist, M_TEMP);
1092		if (newcard) {
1093			ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1094			    M_WAITOK | M_ZERO);
1095			if (!ivar)
1096				return;
1097			memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1098		}
1099		if (mmcbr_get_ro(sc->dev))
1100			ivar->read_only = 1;
1101		ivar->bus_width = bus_width_1;
1102		ivar->mode = mmcbr_get_mode(sc->dev);
1103		if (ivar->mode == mode_sd) {
1104			mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1105			mmc_send_relative_addr(sc, &resp);
1106			ivar->rca = resp >> 16;
1107			/* Get card CSD. */
1108			mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1109			mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1110			ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1111			if (ivar->csd.csd_structure > 0)
1112				ivar->high_cap = 1;
1113			ivar->tran_speed = ivar->csd.tran_speed;
1114			ivar->erase_sector = ivar->csd.erase_sector *
1115			    ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1116			/* Get card SCR. Card must be selected to fetch it. */
1117			mmc_select_card(sc, ivar->rca);
1118			mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1119			mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1120			/* Get card switch capabilities. */
1121			if ((ivar->scr.sda_vsn >= 1) &&
1122			    (ivar->csd.ccc & (1<<10))) {
1123				mmc_sd_switch(sc, 0, 0, 0xF, switch_res);
1124				if (switch_res[13] & 2) {
1125					ivar->timing = bus_timing_hs;
1126					ivar->hs_tran_speed = 50000000;
1127				}
1128			}
1129			mmc_app_sd_status(sc, ivar->rca, ivar->raw_sd_status);
1130			mmc_app_decode_sd_status(ivar->raw_sd_status,
1131			    &ivar->sd_status);
1132			if (ivar->sd_status.au_size != 0) {
1133				ivar->erase_sector =
1134				    16 << ivar->sd_status.au_size;
1135			}
1136			mmc_select_card(sc, 0);
1137			/* Find max supported bus width. */
1138			if ((mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) &&
1139			    (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1140				ivar->bus_width = bus_width_4;
1141			if (newcard) {
1142				/* Add device. */
1143				child = device_add_child(sc->dev, NULL, -1);
1144				device_set_ivars(child, ivar);
1145			}
1146			return;
1147		}
1148		mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid);
1149		ivar->rca = rca++;
1150		mmc_set_relative_addr(sc, ivar->rca);
1151		/* Get card CSD. */
1152		mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1153		mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1154		ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1155		ivar->tran_speed = ivar->csd.tran_speed;
1156		ivar->erase_sector = ivar->csd.erase_sector *
1157		    ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1158		/* Only MMC >= 4.x cards support EXT_CSD. */
1159		if (ivar->csd.spec_vers >= 4) {
1160			/* Card must be selected to fetch EXT_CSD. */
1161			mmc_select_card(sc, ivar->rca);
1162			mmc_send_ext_csd(sc, ivar->raw_ext_csd);
1163			/* Handle extended capacity from EXT_CSD */
1164			sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] +
1165			    (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1166			    (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1167			    (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1168			if (sec_count != 0) {
1169				ivar->sec_count = sec_count;
1170				ivar->high_cap = 1;
1171			}
1172			/* Get card speed in high speed mode. */
1173			ivar->timing = bus_timing_hs;
1174			if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE]
1175			    & EXT_CSD_CARD_TYPE_52)
1176				ivar->hs_tran_speed = 52000000;
1177			else if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE]
1178			    & EXT_CSD_CARD_TYPE_26)
1179				ivar->hs_tran_speed = 26000000;
1180			else
1181				ivar->hs_tran_speed = ivar->tran_speed;
1182			/* Find max supported bus width. */
1183			ivar->bus_width = mmc_test_bus_width(sc);
1184			mmc_select_card(sc, 0);
1185			/* Handle HC erase sector size. */
1186			if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1187				ivar->erase_sector = 1024 *
1188				    ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1189				mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL,
1190				    EXT_CSD_ERASE_GRP_DEF, 1);
1191			}
1192		} else {
1193			ivar->bus_width = bus_width_1;
1194			ivar->timing = bus_timing_normal;
1195		}
1196		if (newcard) {
1197			/* Add device. */
1198			child = device_add_child(sc->dev, NULL, -1);
1199			device_set_ivars(child, ivar);
1200		}
1201	}
1202}
1203
1204static void
1205mmc_rescan_cards(struct mmc_softc *sc)
1206{
1207	struct mmc_ivars *ivar = NULL;
1208	device_t *devlist;
1209	int err, i, devcount;
1210
1211	if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1212		return;
1213	for (i = 0; i < devcount; i++) {
1214		ivar = device_get_ivars(devlist[i]);
1215		if (mmc_select_card(sc, ivar->rca)) {
1216			device_delete_child(sc->dev, devlist[i]);
1217			free(ivar, M_DEVBUF);
1218		}
1219	}
1220	free(devlist, M_TEMP);
1221	mmc_select_card(sc, 0);
1222}
1223
1224static int
1225mmc_delete_cards(struct mmc_softc *sc)
1226{
1227	struct mmc_ivars *ivar;
1228	device_t *devlist;
1229	int err, i, devcount;
1230
1231	if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1232		return (err);
1233	for (i = 0; i < devcount; i++) {
1234		ivar = device_get_ivars(devlist[i]);
1235		device_delete_child(sc->dev, devlist[i]);
1236		free(ivar, M_DEVBUF);
1237	}
1238	free(devlist, M_TEMP);
1239	return (0);
1240}
1241
1242static void
1243mmc_go_discovery(struct mmc_softc *sc)
1244{
1245	uint32_t ocr;
1246	device_t dev;
1247	int err;
1248
1249	dev = sc->dev;
1250	if (mmcbr_get_power_mode(dev) != power_on) {
1251		/*
1252		 * First, try SD modes
1253		 */
1254		mmcbr_set_mode(dev, mode_sd);
1255		mmc_power_up(sc);
1256		mmcbr_set_bus_mode(dev, pushpull);
1257		if (bootverbose)
1258			device_printf(sc->dev, "Idle cards for SD probe\n");
1259		mmc_idle_cards(sc);
1260		err = mmc_send_if_cond(sc, 1);
1261		if (bootverbose)
1262			device_printf(sc->dev, "SD: SEND_IF_CONF %d\n", err);
1263		if (mmc_send_app_op_cond(sc, err ? 0 : MMC_OCR_CCS, &ocr) !=
1264		    MMC_ERR_NONE) {
1265			/*
1266			 * Failed, try MMC
1267			 */
1268			mmcbr_set_mode(dev, mode_mmc);
1269			if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE)
1270				ocr = 0; /* Failed both, powerdown. */
1271		}
1272		mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
1273		if (mmcbr_get_ocr(dev) != 0)
1274			mmc_idle_cards(sc);
1275	} else {
1276		mmcbr_set_bus_mode(dev, opendrain);
1277		mmcbr_set_clock(dev, mmcbr_get_f_min(dev));
1278		mmcbr_update_ios(dev);
1279		/* XXX recompute vdd based on new cards? */
1280	}
1281	/*
1282	 * Make sure that we have a mutually agreeable voltage to at least
1283	 * one card on the bus.
1284	 */
1285	if (mmcbr_get_ocr(dev) == 0) {
1286		mmc_delete_cards(sc);
1287		mmc_power_down(sc);
1288		return;
1289	}
1290	/*
1291	 * Reselect the cards after we've idled them above.
1292	 */
1293	if (mmcbr_get_mode(dev) == mode_sd) {
1294		err = mmc_send_if_cond(sc, 1);
1295		mmc_send_app_op_cond(sc,
1296		    (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
1297	} else
1298		mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL);
1299	mmc_discover_cards(sc);
1300	mmc_rescan_cards(sc);
1301
1302	mmcbr_set_bus_mode(dev, pushpull);
1303	mmcbr_update_ios(dev);
1304	mmc_calculate_clock(sc);
1305	bus_generic_attach(dev);
1306/*	mmc_update_children_sysctl(dev);*/
1307}
1308
1309static int
1310mmc_calculate_clock(struct mmc_softc *sc)
1311{
1312	int max_dtr, max_hs_dtr, max_timing;
1313	int nkid, i, f_min, f_max;
1314	device_t *kids;
1315	struct mmc_ivars *ivar;
1316
1317	f_min = mmcbr_get_f_min(sc->dev);
1318	f_max = mmcbr_get_f_max(sc->dev);
1319	max_dtr = max_hs_dtr = f_max;
1320	if ((mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED))
1321		max_timing = bus_timing_hs;
1322	else
1323		max_timing = bus_timing_normal;
1324	if (device_get_children(sc->dev, &kids, &nkid) != 0)
1325		panic("can't get children");
1326	for (i = 0; i < nkid; i++) {
1327		ivar = device_get_ivars(kids[i]);
1328		if (ivar->timing < max_timing)
1329			max_timing = ivar->timing;
1330		if (ivar->tran_speed < max_dtr)
1331			max_dtr = ivar->tran_speed;
1332		if (ivar->hs_tran_speed < max_hs_dtr)
1333			max_hs_dtr = ivar->hs_tran_speed;
1334	}
1335	for (i = 0; i < nkid; i++) {
1336		ivar = device_get_ivars(kids[i]);
1337		if (ivar->timing == bus_timing_normal)
1338			continue;
1339		mmc_select_card(sc, ivar->rca);
1340		mmc_set_timing(sc, max_timing);
1341	}
1342	mmc_select_card(sc, 0);
1343	free(kids, M_TEMP);
1344	if (max_timing == bus_timing_hs)
1345		max_dtr = max_hs_dtr;
1346	if (bootverbose) {
1347		device_printf(sc->dev,
1348		    "setting transfer rate to %d.%03dMHz%s\n",
1349		    max_dtr / 1000000, (max_dtr / 1000) % 1000,
1350		    max_timing == bus_timing_hs ? " (high speed timing)" : "");
1351	}
1352	mmcbr_set_timing(sc->dev, max_timing);
1353	mmcbr_set_clock(sc->dev, max_dtr);
1354	mmcbr_update_ios(sc->dev);
1355	return max_dtr;
1356}
1357
1358static void
1359mmc_scan(struct mmc_softc *sc)
1360{
1361	device_t dev = sc->dev;
1362
1363	mmc_acquire_bus(dev, dev);
1364	mmc_go_discovery(sc);
1365	mmc_release_bus(dev, dev);
1366}
1367
1368static int
1369mmc_read_ivar(device_t bus, device_t child, int which, u_char *result)
1370{
1371	struct mmc_ivars *ivar = device_get_ivars(child);
1372
1373	switch (which) {
1374	default:
1375		return (EINVAL);
1376	case MMC_IVAR_DSR_IMP:
1377		*(int *)result = ivar->csd.dsr_imp;
1378		break;
1379	case MMC_IVAR_MEDIA_SIZE:
1380		*(off_t *)result = ivar->sec_count;
1381		break;
1382	case MMC_IVAR_RCA:
1383		*(int *)result = ivar->rca;
1384		break;
1385	case MMC_IVAR_SECTOR_SIZE:
1386		*(int *)result = MMC_SECTOR_SIZE;
1387		break;
1388	case MMC_IVAR_TRAN_SPEED:
1389		*(int *)result = mmcbr_get_clock(bus);
1390		break;
1391	case MMC_IVAR_READ_ONLY:
1392		*(int *)result = ivar->read_only;
1393		break;
1394	case MMC_IVAR_HIGH_CAP:
1395		*(int *)result = ivar->high_cap;
1396		break;
1397	case MMC_IVAR_CARD_TYPE:
1398		*(int *)result = ivar->mode;
1399		break;
1400	case MMC_IVAR_BUS_WIDTH:
1401		*(int *)result = ivar->bus_width;
1402		break;
1403	case MMC_IVAR_ERASE_SECTOR:
1404		*(int *)result = ivar->erase_sector;
1405		break;
1406	case MMC_IVAR_MAX_DATA:
1407		*(int *)result = mmcbr_get_max_data(bus);
1408		break;
1409	}
1410	return (0);
1411}
1412
1413static int
1414mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
1415{
1416	/*
1417	 * None are writable ATM
1418	 */
1419	return (EINVAL);
1420}
1421
1422
1423static void
1424mmc_delayed_attach(void *xsc)
1425{
1426	struct mmc_softc *sc = xsc;
1427
1428	mmc_scan(sc);
1429	config_intrhook_disestablish(&sc->config_intrhook);
1430}
1431
1432static device_method_t mmc_methods[] = {
1433	/* device_if */
1434	DEVMETHOD(device_probe, mmc_probe),
1435	DEVMETHOD(device_attach, mmc_attach),
1436	DEVMETHOD(device_detach, mmc_detach),
1437	DEVMETHOD(device_suspend, mmc_suspend),
1438	DEVMETHOD(device_resume, mmc_resume),
1439
1440	/* Bus interface */
1441	DEVMETHOD(bus_read_ivar, mmc_read_ivar),
1442	DEVMETHOD(bus_write_ivar, mmc_write_ivar),
1443
1444	/* MMC Bus interface */
1445	DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
1446	DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
1447	DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
1448
1449	{0, 0},
1450};
1451
1452static driver_t mmc_driver = {
1453	"mmc",
1454	mmc_methods,
1455	sizeof(struct mmc_softc),
1456};
1457static devclass_t mmc_devclass;
1458
1459
1460DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, 0, 0);
1461DRIVER_MODULE(mmc, sdhci, mmc_driver, mmc_devclass, 0, 0);
1462