mlxreg.h revision 52225
151973Smsmith/*- 251973Smsmith * Copyright (c) 1999 Michael Smith 351973Smsmith * All rights reserved. 451973Smsmith * 551973Smsmith * Redistribution and use in source and binary forms, with or without 651973Smsmith * modification, are permitted provided that the following conditions 751973Smsmith * are met: 851973Smsmith * 1. Redistributions of source code must retain the above copyright 951973Smsmith * notice, this list of conditions and the following disclaimer. 1051973Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1151973Smsmith * notice, this list of conditions and the following disclaimer in the 1251973Smsmith * documentation and/or other materials provided with the distribution. 1351973Smsmith * 1451973Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1551973Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1651973Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1751973Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1851973Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1951973Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2051973Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2151973Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2251973Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2351973Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2451973Smsmith * SUCH DAMAGE. 2551973Smsmith * 2651973Smsmith * $FreeBSD: head/sys/dev/mlx/mlxreg.h 52225 1999-10-14 02:54:06Z msmith $ 2751973Smsmith */ 2851973Smsmith 2951973Smsmith/* 3051973Smsmith * Selected command codes. 3151973Smsmith */ 3251973Smsmith#define MLX_CMD_ENQUIRY 0x53 3351973Smsmith#define MLX_CMD_ENQUIRY2 0x1c 3451973Smsmith#define MLX_CMD_ENQSYSDRIVE 0x19 3551973Smsmith#define MLX_CMD_READOLDSG 0xb6 3651973Smsmith#define MLX_CMD_WRITEOLDSG 0xb7 3751973Smsmith#define MLX_CMD_FLUSH 0x0a 3851973Smsmith#define MLX_CMD_LOGOP 0x72 3951973Smsmith#define MLX_CMD_REBUILDASYNC 0x16 4051973Smsmith#define MLX_CMD_CHECKASYNC 0x1e 4151973Smsmith#define MLX_CMD_REBUILDSTAT 0x0c 4251973Smsmith#define MLX_CMD_STOPCHANNEL 0x13 4351973Smsmith#define MLX_CMD_STARTCHANNEL 0x12 4451973Smsmith 4551973Smsmith/* 4651973Smsmith * Status values. 4751973Smsmith */ 4851973Smsmith#define MLX_STATUS_OK 0x0000 4951973Smsmith#define MLX_STATUS_RDWROFFLINE 0x0002 /* read/write claims drive is offline */ 5051973Smsmith#define MLX_STATUS_WEDGED 0xdead /* controller not listening */ 5151973Smsmith#define MLX_STATUS_BUSY 0xffff /* command is in controller */ 5251973Smsmith 5351973Smsmith/* 5452225Smsmith * Accessor defines for the V3 interface. 5552225Smsmith */ 5652225Smsmith#define MLX_V3_MAILBOX 0x00 5752225Smsmith#define MLX_V3_STATUS_IDENT 0x0d 5852225Smsmith#define MLX_V3_STATUS 0x0e 5952225Smsmith#define MLX_V3_IDBR 0x40 6052225Smsmith#define MLX_V3_ODBR 0x41 6152225Smsmith#define MLX_V3_IER 0x43 6252225Smsmith 6352225Smsmith#define MLX_V3_PUT_MAILBOX(sc, idx, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_MAILBOX + idx, val) 6452225Smsmith#define MLX_V3_GET_STATUS_IDENT(sc) bus_space_read_1 (sc->mlx_btag, sc->mlx_bhandle, MLX_V3_STATUS_IDENT) 6552225Smsmith#define MLX_V3_GET_STATUS(sc) bus_space_read_2 (sc->mlx_btag, sc->mlx_bhandle, MLX_V3_STATUS) 6652225Smsmith#define MLX_V3_GET_IDBR(sc) bus_space_read_1 (sc->mlx_btag, sc->mlx_bhandle, MLX_V3_IDBR) 6752225Smsmith#define MLX_V3_PUT_IDBR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_IDBR, val) 6852225Smsmith#define MLX_V3_GET_ODBR(sc) bus_space_read_1 (sc->mlx_btag, sc->mlx_bhandle, MLX_V3_ODBR) 6952225Smsmith#define MLX_V3_PUT_ODBR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_ODBR, val) 7052225Smsmith#define MLX_V3_PUT_IER(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_IER, val) 7152225Smsmith 7252225Smsmith#define MLX_V3_IDB_FULL (1<<0) /* mailbox is full */ 7352225Smsmith#define MLX_V3_IDB_SACK (1<<1) /* acknowledge status read */ 7452225Smsmith 7552225Smsmith#define MLX_V3_ODB_SAVAIL (1<<0) /* status is available */ 7652225Smsmith 7752225Smsmith/* 7852225Smsmith * Accessor defines for the V4 interface. 7952225Smsmith */ 8052225Smsmith#define MLX_V4_MAILBOX 0x1000 8152225Smsmith#define MLX_V4_STATUS_IDENT 0x1018 8252225Smsmith#define MLX_V4_STATUS 0x101a 8352225Smsmith#define MLX_V4_IDBR 0x0020 8452225Smsmith#define MLX_V4_ODBR 0x002c 8552225Smsmith#define MLX_V4_IER 0x0034 8652225Smsmith 8752225Smsmith/* use longword access? */ 8852225Smsmith#define MLX_V4_PUT_MAILBOX(sc, idx, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_MAILBOX + idx, val) 8952225Smsmith#define MLX_V4_GET_STATUS_IDENT(sc) bus_space_read_1 (sc->mlx_btag, sc->mlx_bhandle, MLX_V4_STATUS_IDENT) 9052225Smsmith#define MLX_V4_GET_STATUS(sc) bus_space_read_2 (sc->mlx_btag, sc->mlx_bhandle, MLX_V4_STATUS) 9152225Smsmith#define MLX_V4_GET_IDBR(sc) bus_space_read_4 (sc->mlx_btag, sc->mlx_bhandle, MLX_V4_IDBR) 9252225Smsmith#define MLX_V4_PUT_IDBR(sc, val) bus_space_write_4(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_IDBR, val) 9352225Smsmith#define MLX_V4_GET_ODBR(sc) bus_space_read_4 (sc->mlx_btag, sc->mlx_bhandle, MLX_V4_ODBR) 9452225Smsmith#define MLX_V4_PUT_ODBR(sc, val) bus_space_write_4(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_ODBR, val) 9552225Smsmith#define MLX_V4_PUT_IER(sc, val) bus_space_write_4(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_IER, val) 9652225Smsmith 9752225Smsmith#define MLX_V4_IDB_FULL (1<<0) /* mailbox is full */ 9852225Smsmith 9952225Smsmith#define MLX_V4_IDB_HWMBOX_CMD (1<<0) /* posted hardware mailbox command */ 10052225Smsmith#define MLX_V4_IDB_SACK (1<<1) /* acknowledge status read */ 10152225Smsmith#define MLX_V4_IDB_MEMMBOX_CMD (1<<4) /* posted memory mailbox command */ 10252225Smsmith 10352225Smsmith#define MLX_V4_ODB_HWSAVAIL (1<<0) /* status is available for hardware mailbox */ 10452225Smsmith#define MLX_V4_ODB_MEMSAVAIL (1<<1) /* status is available for memory mailbox */ 10552225Smsmith 10652225Smsmith#define MLX_V4_ODB_HWMBOX_ACK (1<<0) /* ack status read from hardware mailbox */ 10752225Smsmith#define MLX_V4_ODB_MEMMBOX_ACK (1<<1) /* ack status read from memory mailbox */ 10852225Smsmith 10952225Smsmith#define MLX_V4_IER_MASK 0xfb /* message unit interrupt mask */ 11052225Smsmith#define MLX_V4_IER_DISINT (1<<2) /* interrupt disable bit */ 11152225Smsmith 11252225Smsmith/* 11351973Smsmith * Scatter-gather list format, type 1, kind 00. 11451973Smsmith */ 11551973Smsmithstruct mlx_sgentry 11651973Smsmith{ 11751973Smsmith u_int32_t sg_addr; 11851973Smsmith u_int32_t sg_count; 11951973Smsmith} __attribute__ ((packed)); 12051973Smsmith 12151973Smsmith/* 12251973Smsmith * Command result buffers, as placed in system memory by the controller. 12351973Smsmith */ 12451973Smsmithstruct mlx_enquiry /* MLX_CMD_ENQUIRY */ 12551973Smsmith{ 12651973Smsmith u_int8_t me_num_sys_drvs; 12751973Smsmith u_int8_t res1[3]; 12851973Smsmith u_int32_t me_drvsize[32]; 12951973Smsmith u_int16_t me_flash_age; 13051973Smsmith u_int8_t me_status_flags; 13151973Smsmith#define MLX_ENQ_SFLAG_DEFWRERR (1<<0) /* deferred write error indicator */ 13251973Smsmith#define MLX_ENQ_SFLAG_BATTLOW (1<<1) /* battery low */ 13351973Smsmith u_int8_t res2; 13451973Smsmith u_int8_t me_fwminor; 13551973Smsmith u_int8_t me_fwmajor; 13651973Smsmith u_int8_t me_rebuild_flag; 13751973Smsmith u_int8_t me_max_commands; 13851973Smsmith u_int8_t me_offline_sd_count; 13951973Smsmith u_int8_t res3; 14051973Smsmith u_int16_t me_event_log_seq_num; 14151973Smsmith u_int8_t me_critical_sd_count; 14251973Smsmith u_int8_t res4[3]; 14351973Smsmith u_int8_t me_dead_count; 14451973Smsmith u_int8_t res5; 14551973Smsmith u_int8_t me_rebuild_count; 14651973Smsmith u_int8_t me_misc_flags; 14751973Smsmith#define MLX_ENQ_MISC_BBU (1<<3) /* battery backup present */ 14851973Smsmith struct 14951973Smsmith { 15051973Smsmith u_int8_t dd_targ; 15151973Smsmith u_int8_t dd_chan; 15251973Smsmith } __attribute__ ((packed)) me_dead[20]; 15351973Smsmith} __attribute__ ((packed)); 15451973Smsmith 15551973Smsmithstruct mlx_enquiry2 /* MLX_CMD_ENQUIRY2 */ 15651973Smsmith{ 15751973Smsmith u_int32_t me_hardware_id; 15851973Smsmith u_int32_t me_firmware_id; 15951973Smsmith u_int32_t res1; 16051973Smsmith u_int8_t me_configured_channels; 16151973Smsmith u_int8_t me_actual_channels; 16251973Smsmith u_int8_t me_max_targets; 16351973Smsmith u_int8_t me_max_tags; 16451973Smsmith u_int8_t me_max_sys_drives; 16551973Smsmith u_int8_t me_max_arms; 16651973Smsmith u_int8_t me_max_spans; 16751973Smsmith u_int8_t res2; 16851973Smsmith u_int32_t res3; 16951973Smsmith u_int32_t me_mem_size; 17051973Smsmith u_int32_t me_cache_size; 17151973Smsmith u_int32_t me_flash_size; 17251973Smsmith u_int32_t me_nvram_size; 17351973Smsmith u_int16_t me_mem_type; 17451973Smsmith u_int16_t me_clock_speed; 17551973Smsmith u_int16_t me_mem_speed; 17651973Smsmith u_int16_t me_hardware_speed; 17751973Smsmith u_int8_t res4[10]; 17851973Smsmith u_int16_t me_max_commands; 17951973Smsmith u_int16_t me_max_sg; 18051973Smsmith u_int16_t me_max_dp; 18151973Smsmith u_int16_t me_max_iod; 18251973Smsmith u_int16_t me_max_comb; 18351973Smsmith u_int8_t me_latency; 18451973Smsmith u_int8_t res5; 18551973Smsmith u_int8_t me_scsi_timeout; 18651973Smsmith u_int8_t res6; 18751973Smsmith u_int16_t me_min_freelines; 18851973Smsmith u_int8_t res7[8]; 18951973Smsmith u_int8_t me_rate_const; 19051973Smsmith u_int8_t res8[11]; 19151973Smsmith u_int16_t me_physblk; 19251973Smsmith u_int16_t me_logblk; 19351973Smsmith u_int16_t me_maxblk; 19451973Smsmith u_int16_t me_blocking_factor; 19551973Smsmith u_int16_t me_cacheline; 19651973Smsmith u_int8_t me_scsi_cap; 19751973Smsmith u_int8_t res9[5]; 19851973Smsmith u_int16_t me_fimware_build; 19951973Smsmith u_int8_t me_fault_mgmt_type; 20051973Smsmith u_int8_t res10; 20151973Smsmith u_int32_t me_firmware_features; 20251973Smsmith u_int8_t res11[8]; 20351973Smsmith} __attribute__ ((packed)); 20451973Smsmith 20551973Smsmithstruct mlx_enq_sys_drive /* MLX_CMD_ENQSYSDRIVE returns an array of 32 of these */ 20651973Smsmith{ 20751973Smsmith u_int32_t sd_size; 20851973Smsmith u_int8_t sd_state; 20951973Smsmith u_int8_t sd_raidlevel; 21051973Smsmith u_int16_t res1; 21151973Smsmith} __attribute__ ((packed)); 21251973Smsmith 21351973Smsmithstruct mlx_eventlog_entry /* MLX_CMD_LOGOP/MLX_LOGOP_GET */ 21451973Smsmith{ 21551973Smsmith u_int8_t el_type; 21651973Smsmith u_int8_t el_length; 21751973Smsmith u_char el_target:5; 21851973Smsmith u_char el_channel:3; 21951973Smsmith u_char el_lun:6; 22051973Smsmith u_char res1:2; 22151973Smsmith u_int16_t el_seqno; 22251973Smsmith u_char el_errorcode:7; 22351973Smsmith u_char el_valid:1; 22451973Smsmith u_int8_t el_segment; 22551973Smsmith u_char el_sensekey:4; 22651973Smsmith u_char res2:1; 22751973Smsmith u_char el_ILI:1; 22851973Smsmith u_char el_EOM:1; 22951973Smsmith u_char el_filemark:1; 23051973Smsmith u_int8_t el_information[4]; 23151973Smsmith u_int8_t el_addsense; 23251973Smsmith u_int8_t el_csi[4]; 23351973Smsmith u_int8_t el_asc; 23451973Smsmith u_int8_t el_asq; 23551973Smsmith u_int8_t res3[12]; 23651973Smsmith} __attribute__ ((packed)); 23751973Smsmith 23851973Smsmith#define MLX_LOGOP_GET 0x00 /* operation codes for MLX_CMD_LOGOP */ 23951973Smsmith#define MLX_LOGMSG_SENSE 0x00 /* log message contents codes */ 24051973Smsmith 24151973Smsmithstruct mlx_rebuild_stat /* MLX_CMD_REBUILDSTAT */ 24251973Smsmith{ 24351973Smsmith u_int32_t rb_drive; 24451973Smsmith u_int32_t rb_size; 24551973Smsmith u_int32_t rb_remaining; 24651973Smsmith} __attribute__ ((packed)); 24751973Smsmith 248