1177595Sweongyo/*-
2177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc.
3177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting
4177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
5177595Sweongyo * All rights reserved.
6177595Sweongyo *
7177595Sweongyo * Redistribution and use in source and binary forms, with or without
8177595Sweongyo * modification, are permitted provided that the following conditions
9177595Sweongyo * are met:
10177595Sweongyo * 1. Redistributions of source code must retain the above copyright
11177595Sweongyo *    notice, this list of conditions and the following disclaimer,
12177595Sweongyo *    without modification.
13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14177595Sweongyo *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15177595Sweongyo *    redistribution must be conditioned upon including a substantially
16177595Sweongyo *    similar Disclaimer requirement for further binary redistribution.
17177595Sweongyo *
18177595Sweongyo * NO WARRANTY
19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES.
30177595Sweongyo *
31177595Sweongyo * $FreeBSD$
32177595Sweongyo */
33177595Sweongyo
34177595Sweongyo#ifndef _DEV_MALOHAL_H
35177595Sweongyo#define _DEV_MALOHAL_H
36177595Sweongyo
37177595Sweongyo#define MALO_NUM_TX_QUEUES			1
38177595Sweongyo#define MALO_MAX_TXWCB_QUEUES			MALO_NUM_TX_QUEUES
39177595Sweongyo
40177595Sweongyo/* size of f/w command buffer */
41177595Sweongyo#define	MALO_CMDBUF_SIZE			0x4000
42177595Sweongyo
43177595Sweongyo#define MALO_FW_CHECK_USECS			(5 * 1000)	/* 5ms */
44177595Sweongyo#define MALO_FW_MAX_NUM_CHECKS			200
45177595Sweongyo
46177595Sweongyo/*
47177595Sweongyo * Calibration data builtin to the firmware.  The firmware image
48177595Sweongyo * has a single set of calibration tables that we retrieve right
49177595Sweongyo * after download.  This can be overriden by the driver (e.g. for
50177595Sweongyo * a different regdomain and/or tx power setup).
51177595Sweongyo */
52177595Sweongyostruct malo_hal_caldata {
53177595Sweongyo	/* pt is short for `power target'.  */
54177595Sweongyo#define	MALO_PWTAGETRATETABLE20M		(14 * 4)
55177595Sweongyo	uint8_t	pt_ratetable_20m[MALO_PWTAGETRATETABLE20M];
56177595Sweongyo};
57177595Sweongyo
58177595Sweongyo/*
59177595Sweongyo * Get Hardware/Firmware capabilities.
60177595Sweongyo */
61177595Sweongyostruct malo_hal_hwspec {
62177595Sweongyo	uint8_t		hwversion;		/* version of the HW */
63177595Sweongyo	uint8_t		hostinterface;	/* host interface */
64177595Sweongyo	uint16_t	maxnum_wcb;		/* max # of WCB FW handles */
65177595Sweongyo	/* max # of mcast addresses FW handles*/
66177595Sweongyo	uint16_t	maxnum_mcaddr;
67177595Sweongyo	uint16_t	maxnum_tx_wcb;	/* max # of tx descs per WCB */
68177595Sweongyo	/* MAC address programmed in HW */
69177595Sweongyo	uint8_t		macaddr[6];
70177595Sweongyo	uint16_t	regioncode;		/* EEPROM region code */
71177595Sweongyo	uint16_t	num_antenna;	/* Number of antenna used */
72177595Sweongyo	uint32_t	fw_releasenum;	/* firmware release number */
73177595Sweongyo	uint32_t	wcbbase0;
74177595Sweongyo	uint32_t	rxdesc_read;
75177595Sweongyo	uint32_t	rxdesc_write;
76177595Sweongyo	uint32_t	ul_fw_awakecookie;
77177595Sweongyo	uint32_t	wcbbase[4];
78177595Sweongyo};
79177595Sweongyo
80177595Sweongyo/*
81177595Sweongyo * Supply tx/rx dma-related settings to the firmware.
82177595Sweongyo */
83177595Sweongyostruct malo_hal_txrxdma {
84177595Sweongyo	uint32_t	maxnum_wcb;		/* max # of WCB FW handles */
85177595Sweongyo	uint32_t	maxnum_txwcb;		/* max # of tx descs per WCB */
86177595Sweongyo	uint32_t	rxdesc_read;
87177595Sweongyo	uint32_t	rxdesc_write;
88177595Sweongyo	uint32_t	wcbbase[4];
89177595Sweongyo};
90177595Sweongyo
91177595Sweongyo/*
92177595Sweongyo * Get Hardware Statistics.
93177595Sweongyo *
94177595Sweongyo * Items marked with ! are deprecated and not ever updated.  In
95177595Sweongyo * some cases this is because work has been moved to the host (e.g.
96177595Sweongyo * rx defragmentation).
97177595Sweongyo *
98177595Sweongyo * XXX low/up cases.
99177595Sweongyo */
100177595Sweongyostruct malo_hal_hwstats {
101177595Sweongyo	uint32_t	TxRetrySuccesses;	/* tx success w/ 1 retry */
102177595Sweongyo	uint32_t	TxMultipleRetrySuccesses;/* tx success w/ >1 retry */
103177595Sweongyo	uint32_t	TxFailures;		/* tx fail due to no ACK */
104177595Sweongyo	uint32_t	RTSSuccesses;		/* CTS rx'd for RTS */
105177595Sweongyo	uint32_t	RTSFailures;		/* CTS not rx'd for RTS */
106177595Sweongyo	uint32_t	AckFailures;		/* same as TxFailures */
107177595Sweongyo	uint32_t	RxDuplicateFrames;	/* rx discard for dup seqno */
108177595Sweongyo	uint32_t	FCSErrorCount;		/* rx discard for bad FCS */
109177595Sweongyo	uint32_t	TxWatchDogTimeouts;	/* MAC tx hang (f/w recovery) */
110177595Sweongyo	uint32_t	RxOverflows;		/* no f/w buffer for rx data */
111177595Sweongyo	uint32_t	RxFragErrors;		/* !rx fail due to defrag */
112177595Sweongyo	uint32_t	RxMemErrors;		/* out of mem or desc corrupted
113177595Sweongyo						   in some way */
114177595Sweongyo	uint32_t	RxPointerErrors;	/* MAC internal ptr problem */
115177595Sweongyo	uint32_t	TxUnderflows;		/* !tx underflow on dma */
116177595Sweongyo	uint32_t	TxDone;			/* MAC tx ops completed
117177595Sweongyo						   (possibly w/ error) */
118177595Sweongyo	uint32_t	TxDoneBufTryPut;	/* ! */
119177595Sweongyo	uint32_t	TxDoneBufPut;		/* same as TxDone */
120177595Sweongyo	uint32_t	Wait4TxBuf;		/* !no f/w buf avail when
121177595Sweongyo						    supplied a tx descriptor */
122177595Sweongyo	uint32_t	TxAttempts;		/* tx descriptors processed */
123177595Sweongyo	uint32_t	TxSuccesses;		/* tx attempts successful */
124177595Sweongyo	uint32_t	TxFragments;		/* tx with fragmentation */
125177595Sweongyo	uint32_t	TxMulticasts;		/* tx multicast frames */
126177595Sweongyo	uint32_t	RxNonCtlPkts;		/* rx non-control frames */
127177595Sweongyo	uint32_t	RxMulticasts;		/* rx multicast frames */
128177595Sweongyo	uint32_t	RxUndecryptableFrames;	/* rx failed due to crypto */
129177595Sweongyo	uint32_t 	RxICVErrors;		/* rx failed due to ICV check */
130177595Sweongyo	uint32_t	RxExcludedFrames;	/* rx discarded, e.g. bssid */
131177595Sweongyo};
132177595Sweongyo
133177595Sweongyo/*
134177595Sweongyo * Set Antenna Configuration (legacy operation).
135177595Sweongyo *
136218909Sbrucec * The RX antenna can be selected using the bitmask
137177595Sweongyo * ant (bit 0 = antenna 1, bit 1 = antenna 2, etc.)
138177595Sweongyo * (diversity?XXX)
139177595Sweongyo */
140177595Sweongyoenum malo_hal_antenna {
141177595Sweongyo	MHA_ANTENNATYPE_RX	= 1,
142177595Sweongyo	MHA_ANTENNATYPE_TX	= 2,
143177595Sweongyo};
144177595Sweongyo
145177595Sweongyo/*
146177595Sweongyo * Set Radio Configuration.
147177595Sweongyo *
148177595Sweongyo * onoff != 0 turns radio on; otherwise off.
149177595Sweongyo * if radio is enabled, the preamble is set too.
150177595Sweongyo */
151177595Sweongyoenum malo_hal_preamble {
152177595Sweongyo	MHP_LONG_PREAMBLE	= 1,
153177595Sweongyo	MHP_SHORT_PREAMBLE	= 3,
154177595Sweongyo	MHP_AUTO_PREAMBLE	= 5,
155177595Sweongyo};
156177595Sweongyo
157177595Sweongyostruct malo_hal_channel_flags {
158177595Sweongyo	uint32_t		freqband : 6,
159177595Sweongyo#define MALO_FREQ_BAND_2DOT4GHZ	0x1
160177595Sweongyo				: 26;		/* reserved */
161177595Sweongyo};
162177595Sweongyo
163177595Sweongyostruct malo_hal_channel {
164177595Sweongyo	uint32_t		channel;
165177595Sweongyo	struct malo_hal_channel_flags flags;
166177595Sweongyo};
167177595Sweongyo
168177595Sweongyostruct malo_hal_txrate {
169177595Sweongyo	uint8_t			mcastrate;	/* rate for multicast frames */
170177595Sweongyo	uint8_t			mgtrate;	/* rate for management frames */
171177595Sweongyo	struct {
172177595Sweongyo		uint8_t		trycount;	/* try this many times */
173177595Sweongyo		uint8_t		rate;		/* use this tx rate */
174177595Sweongyo	} rateseries[4];			/* rate series */
175177595Sweongyo};
176177595Sweongyo
177177595Sweongyostruct malo_hal {
178177595Sweongyo	device_t		mh_dev;
179177595Sweongyo
180177595Sweongyo	bus_space_handle_t	mh_ioh;		/* BAR 1 copied from softc */
181177595Sweongyo	bus_space_tag_t		mh_iot;
182177595Sweongyo	uint32_t		mh_imask;	/* interrupt mask */
183177595Sweongyo	int			mh_flags;
184177595Sweongyo#define	MHF_CALDATA		0x0001		/* cal data retrieved */
185177595Sweongyo#define	MHF_FWHANG		0x0002		/* fw appears hung */
186177595Sweongyo
187177595Sweongyo	char			mh_mtxname[12];
188177595Sweongyo	struct mtx		mh_mtx;
189177595Sweongyo	bus_dma_tag_t		mh_dmat;	/* bus DMA tag for cmd buffer */
190177595Sweongyo	bus_dmamap_t		mh_dmamap;	/* DMA map for cmd buffer */
191177595Sweongyo	uint16_t		*mh_cmdbuf;	/* f/w cmd buffer */
192177595Sweongyo	bus_addr_t		mh_cmdaddr;	/* physaddr of cmd buffer */
193177595Sweongyo
194177595Sweongyo	struct malo_hal_caldata	mh_caldata;
195177595Sweongyo
196177595Sweongyo	int			mh_debug;
197177595Sweongyo#define MALO_HAL_DEBUG_SENDCMD	0x00000001
198177595Sweongyo#define MALO_HAL_DEBUG_CMDDONE	0x00000002
199177595Sweongyo#define MALO_HAL_DEBUG_IGNHANG	0X00000004
200177595Sweongyo};
201177595Sweongyo
202177595Sweongyo#define MALO_HAL_LOCK(mh)		mtx_lock(&mh->mh_mtx)
203177595Sweongyo#define MALO_HAL_LOCK_ASSERT(mh)	mtx_assert(&mh->mh_mtx, MA_OWNED)
204177595Sweongyo#define MALO_HAL_UNLOCK(mh)		mtx_unlock(&mh->mh_mtx)
205177595Sweongyo
206177595Sweongyostruct malo_hal *malo_hal_attach(device_t, uint16_t,
207177595Sweongyo	    bus_space_handle_t, bus_space_tag_t,
208177595Sweongyo	    bus_dma_tag_t);
209177595Sweongyoint	malo_hal_fwload(struct malo_hal *, char *, char *);
210177595Sweongyoint	malo_hal_gethwspecs(struct malo_hal *,
211177595Sweongyo	    struct malo_hal_hwspec *);
212177595Sweongyovoid	malo_hal_detach(struct malo_hal *);
213177595Sweongyovoid	malo_hal_intrset(struct malo_hal *, uint32_t);
214177595Sweongyoint	malo_hal_setantenna(struct malo_hal *,
215177595Sweongyo	    enum malo_hal_antenna, int);
216177595Sweongyoint	malo_hal_setradio(struct malo_hal *, int,
217177595Sweongyo	    enum malo_hal_preamble);
218177595Sweongyoint	malo_hal_setchannel(struct malo_hal *,
219177595Sweongyo	    const struct malo_hal_channel *);
220177595Sweongyoint	malo_hal_setmaxtxpwr(struct malo_hal *, uint16_t);
221177595Sweongyoint	malo_hal_settxpower(struct malo_hal *, const struct malo_hal_channel *);
222177595Sweongyoint	malo_hal_setpromisc(struct malo_hal *, int);
223177595Sweongyoint	malo_hal_setassocid(struct malo_hal *,
224177595Sweongyo	    const uint8_t[], uint16_t);
225177595Sweongyovoid	malo_hal_txstart(struct malo_hal *, int);
226177595Sweongyovoid	malo_hal_getisr(struct malo_hal *, uint32_t *);
227177595Sweongyovoid	malo_hal_cmddone(struct malo_hal *);
228177595Sweongyoint	malo_hal_prescan(struct malo_hal *);
229177595Sweongyoint	malo_hal_postscan(struct malo_hal *, uint8_t *, uint8_t);
230177595Sweongyoint	malo_hal_set_slot(struct malo_hal *, int);
231177595Sweongyoint	malo_hal_set_rate(struct malo_hal *, uint16_t, uint8_t);
232177595Sweongyoint	malo_hal_setmcast(struct malo_hal *, int, const uint8_t[]);
233177595Sweongyo
234177595Sweongyo#endif
235