ixgbe.h revision 240968
1179055Sjfv/****************************************************************************** 2171384Sjfv 3230775Sjfv Copyright (c) 2001-2012, Intel Corporation 4179055Sjfv All rights reserved. 5179055Sjfv 6179055Sjfv Redistribution and use in source and binary forms, with or without 7179055Sjfv modification, are permitted provided that the following conditions are met: 8179055Sjfv 9179055Sjfv 1. Redistributions of source code must retain the above copyright notice, 10179055Sjfv this list of conditions and the following disclaimer. 11179055Sjfv 12179055Sjfv 2. Redistributions in binary form must reproduce the above copyright 13179055Sjfv notice, this list of conditions and the following disclaimer in the 14179055Sjfv documentation and/or other materials provided with the distribution. 15179055Sjfv 16179055Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17179055Sjfv contributors may be used to endorse or promote products derived from 18179055Sjfv this software without specific prior written permission. 19179055Sjfv 20179055Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21179055Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22179055Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23179055Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24179055Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25179055Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26179055Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27179055Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28179055Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29179055Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30179055Sjfv POSSIBILITY OF SUCH DAMAGE. 31171384Sjfv 32179055Sjfv******************************************************************************/ 33179055Sjfv/*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 240968 2012-09-26 18:11:43Z jhb $*/ 34171384Sjfv 35185352Sjfv 36171384Sjfv#ifndef _IXGBE_H_ 37171384Sjfv#define _IXGBE_H_ 38171384Sjfv 39171384Sjfv 40171384Sjfv#include <sys/param.h> 41171384Sjfv#include <sys/systm.h> 42194875Sjfv#if __FreeBSD_version >= 800000 43194875Sjfv#include <sys/buf_ring.h> 44194875Sjfv#endif 45171384Sjfv#include <sys/mbuf.h> 46171384Sjfv#include <sys/protosw.h> 47171384Sjfv#include <sys/socket.h> 48171384Sjfv#include <sys/malloc.h> 49171384Sjfv#include <sys/kernel.h> 50171384Sjfv#include <sys/module.h> 51171384Sjfv#include <sys/sockio.h> 52171384Sjfv 53171384Sjfv#include <net/if.h> 54171384Sjfv#include <net/if_arp.h> 55171384Sjfv#include <net/bpf.h> 56171384Sjfv#include <net/ethernet.h> 57171384Sjfv#include <net/if_dl.h> 58171384Sjfv#include <net/if_media.h> 59171384Sjfv 60171384Sjfv#include <net/bpf.h> 61171384Sjfv#include <net/if_types.h> 62171384Sjfv#include <net/if_vlan_var.h> 63171384Sjfv 64171384Sjfv#include <netinet/in_systm.h> 65171384Sjfv#include <netinet/in.h> 66171384Sjfv#include <netinet/if_ether.h> 67171384Sjfv#include <netinet/ip.h> 68171384Sjfv#include <netinet/ip6.h> 69171384Sjfv#include <netinet/tcp.h> 70190873Sjfv#include <netinet/tcp_lro.h> 71171384Sjfv#include <netinet/udp.h> 72171384Sjfv 73171384Sjfv#include <machine/in_cksum.h> 74171384Sjfv 75171384Sjfv#include <sys/bus.h> 76171384Sjfv#include <machine/bus.h> 77171384Sjfv#include <sys/rman.h> 78171384Sjfv#include <machine/resource.h> 79171384Sjfv#include <vm/vm.h> 80171384Sjfv#include <vm/pmap.h> 81171384Sjfv#include <machine/clock.h> 82171384Sjfv#include <dev/pci/pcivar.h> 83171384Sjfv#include <dev/pci/pcireg.h> 84171384Sjfv#include <sys/proc.h> 85171384Sjfv#include <sys/sysctl.h> 86171384Sjfv#include <sys/endian.h> 87171384Sjfv#include <sys/taskqueue.h> 88179055Sjfv#include <sys/pcpu.h> 89194875Sjfv#include <sys/smp.h> 90194875Sjfv#include <machine/smp.h> 91171384Sjfv 92194875Sjfv#ifdef IXGBE_IEEE1588 93194875Sjfv#include <sys/ieee1588.h> 94190873Sjfv#endif 95190873Sjfv 96171384Sjfv#include "ixgbe_api.h" 97171384Sjfv 98171384Sjfv/* Tunables */ 99171384Sjfv 100171384Sjfv/* 101172043Sjfv * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 102171384Sjfv * number of transmit descriptors allocated by the driver. Increasing this 103171384Sjfv * value allows the driver to queue more transmits. Each descriptor is 16 104172043Sjfv * bytes. Performance tests have show the 2K value to be optimal for top 105172043Sjfv * performance. 106171384Sjfv */ 107190873Sjfv#define DEFAULT_TXD 1024 108172043Sjfv#define PERFORM_TXD 2048 109171384Sjfv#define MAX_TXD 4096 110171384Sjfv#define MIN_TXD 64 111171384Sjfv 112171384Sjfv/* 113172043Sjfv * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 114172043Sjfv * number of receive descriptors allocated for each RX queue. Increasing this 115171384Sjfv * value allows the driver to buffer more incoming packets. Each descriptor 116172043Sjfv * is 16 bytes. A receive buffer is also allocated for each descriptor. 117171384Sjfv * 118172043Sjfv * Note: with 8 rings and a dual port card, it is possible to bump up 119172043Sjfv * against the system mbuf pool limit, you can tune nmbclusters 120172043Sjfv * to adjust for this. 121171384Sjfv */ 122190873Sjfv#define DEFAULT_RXD 1024 123172043Sjfv#define PERFORM_RXD 2048 124171384Sjfv#define MAX_RXD 4096 125171384Sjfv#define MIN_RXD 64 126171384Sjfv 127172043Sjfv/* Alignment for rings */ 128172043Sjfv#define DBA_ALIGN 128 129172043Sjfv 130171384Sjfv/* 131171384Sjfv * This parameter controls the maximum no of times the driver will loop in 132171384Sjfv * the isr. Minimum Value = 1 133171384Sjfv */ 134185352Sjfv#define MAX_LOOP 10 135171384Sjfv 136171384Sjfv/* 137200239Sjfv * This is the max watchdog interval, ie. the time that can 138200239Sjfv * pass between any two TX clean operations, such only happening 139200239Sjfv * when the TX hardware is functioning. 140171384Sjfv */ 141200239Sjfv#define IXGBE_WATCHDOG (10 * hz) 142171384Sjfv 143171384Sjfv/* 144171384Sjfv * This parameters control when the driver calls the routine to reclaim 145171384Sjfv * transmit descriptors. 146171384Sjfv */ 147171384Sjfv#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 148171384Sjfv#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 149171384Sjfv 150171384Sjfv#define IXGBE_MAX_FRAME_SIZE 0x3F00 151171384Sjfv 152172043Sjfv/* Flow control constants */ 153200239Sjfv#define IXGBE_FC_PAUSE 0xFFFF 154172043Sjfv#define IXGBE_FC_HI 0x20000 155172043Sjfv#define IXGBE_FC_LO 0x10000 156171384Sjfv 157239940Sscottl/* 158239940Sscottl * Used for optimizing small rx mbufs. Effort is made to keep the copy 159239940Sscottl * small and aligned for the CPU L1 cache. 160239940Sscottl * 161239940Sscottl * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 162239940Sscottl * 32 byte alignment needed for the fast bcopy results in 8 bytes being 163239940Sscottl * wasted. Getting 64 byte alignment, which _should_ be ideal for 164239940Sscottl * modern Intel CPUs, results in 40 bytes wasted and a significant drop 165239940Sscottl * in observed efficiency of the optimization, 97.9% -> 81.8%. 166239940Sscottl */ 167239940Sscottl#define IXGBE_RX_COPY_LEN 160 168239940Sscottl#define IXGBE_RX_COPY_ALIGN (MHLEN - IXGBE_RX_COPY_LEN) 169239940Sscottl 170221189Sjfv/* Keep older OS drivers building... */ 171221189Sjfv#if !defined(SYSCTL_ADD_UQUAD) 172221189Sjfv#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 173221189Sjfv#endif 174221189Sjfv 175171384Sjfv/* Defines for printing debug information */ 176171384Sjfv#define DEBUG_INIT 0 177171384Sjfv#define DEBUG_IOCTL 0 178171384Sjfv#define DEBUG_HW 0 179171384Sjfv 180171384Sjfv#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 181171384Sjfv#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 182171384Sjfv#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 183171384Sjfv#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 184171384Sjfv#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 185171384Sjfv#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 186171384Sjfv#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 187171384Sjfv#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 188171384Sjfv#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 189171384Sjfv 190171384Sjfv#define MAX_NUM_MULTICAST_ADDRESSES 128 191190873Sjfv#define IXGBE_82598_SCATTER 100 192190873Sjfv#define IXGBE_82599_SCATTER 32 193185352Sjfv#define MSIX_82598_BAR 3 194185352Sjfv#define MSIX_82599_BAR 4 195234620Sbz#define IXGBE_TSO_SIZE 262140 196171384Sjfv#define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 197205720Sjfv#define IXGBE_RX_HDR 128 198194875Sjfv#define IXGBE_VFTA_SIZE 128 199194875Sjfv#define IXGBE_BR_SIZE 4096 200230775Sjfv#define IXGBE_QUEUE_MIN_FREE 32 201230775Sjfv#define IXGBE_QUEUE_IDLE 1 202230775Sjfv#define IXGBE_QUEUE_WORKING 2 203230775Sjfv#define IXGBE_QUEUE_HUNG 4 204230775Sjfv#define IXGBE_QUEUE_DEPLETED 8 205171384Sjfv 206205904Sjfv/* Offload bits in mbuf flag */ 207205904Sjfv#if __FreeBSD_version >= 800000 208205904Sjfv#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 209205904Sjfv#else 210205904Sjfv#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 211205904Sjfv#endif 212205904Sjfv 213172043Sjfv/* For 6.X code compatibility */ 214190873Sjfv#if !defined(ETHER_BPF_MTAP) 215190873Sjfv#define ETHER_BPF_MTAP BPF_MTAP 216190873Sjfv#endif 217190873Sjfv 218172043Sjfv#if __FreeBSD_version < 700000 219172043Sjfv#define CSUM_TSO 0 220172043Sjfv#define IFCAP_TSO4 0 221172043Sjfv#endif 222172043Sjfv 223171384Sjfv/* 224171384Sjfv * Interrupt Moderation parameters 225171384Sjfv */ 226185352Sjfv#define IXGBE_LOW_LATENCY 128 227185352Sjfv#define IXGBE_AVE_LATENCY 400 228185352Sjfv#define IXGBE_BULK_LATENCY 1200 229185352Sjfv#define IXGBE_LINK_ITR 2000 230171384Sjfv 231171384Sjfv/* 232185352Sjfv ***************************************************************************** 233171384Sjfv * vendor_info_array 234171384Sjfv * 235171384Sjfv * This array contains the list of Subvendor/Subdevice IDs on which the driver 236171384Sjfv * should load. 237171384Sjfv * 238185352Sjfv ***************************************************************************** 239171384Sjfv */ 240171384Sjfvtypedef struct _ixgbe_vendor_info_t { 241171384Sjfv unsigned int vendor_id; 242171384Sjfv unsigned int device_id; 243171384Sjfv unsigned int subvendor_id; 244171384Sjfv unsigned int subdevice_id; 245171384Sjfv unsigned int index; 246185352Sjfv} ixgbe_vendor_info_t; 247171384Sjfv 248171384Sjfv 249171384Sjfvstruct ixgbe_tx_buf { 250190873Sjfv u32 eop_index; 251171384Sjfv struct mbuf *m_head; 252171384Sjfv bus_dmamap_t map; 253171384Sjfv}; 254171384Sjfv 255171384Sjfvstruct ixgbe_rx_buf { 256171384Sjfv struct mbuf *m_head; 257185352Sjfv struct mbuf *m_pack; 258205720Sjfv struct mbuf *fmp; 259208282Sjfv bus_dmamap_t hmap; 260208282Sjfv bus_dmamap_t pmap; 261239940Sscottl u_int flags; 262239940Sscottl#define IXGBE_RX_COPY 0x01 263239940Sscottl uint64_t paddr; 264171384Sjfv}; 265171384Sjfv 266171384Sjfv/* 267171384Sjfv * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 268171384Sjfv */ 269171384Sjfvstruct ixgbe_dma_alloc { 270171384Sjfv bus_addr_t dma_paddr; 271171384Sjfv caddr_t dma_vaddr; 272171384Sjfv bus_dma_tag_t dma_tag; 273171384Sjfv bus_dmamap_t dma_map; 274171384Sjfv bus_dma_segment_t dma_seg; 275171384Sjfv bus_size_t dma_size; 276171384Sjfv int dma_nseg; 277171384Sjfv}; 278171384Sjfv 279171384Sjfv/* 280205720Sjfv** Driver queue struct: this is the interrupt container 281205720Sjfv** for the associated tx and rx ring. 282205720Sjfv*/ 283205720Sjfvstruct ix_queue { 284205720Sjfv struct adapter *adapter; 285205720Sjfv u32 msix; /* This queue's MSIX vector */ 286205720Sjfv u32 eims; /* This queue's EIMS bit */ 287205720Sjfv u32 eitr_setting; 288205720Sjfv struct resource *res; 289205720Sjfv void *tag; 290205720Sjfv struct tx_ring *txr; 291205720Sjfv struct rx_ring *rxr; 292205720Sjfv struct task que_task; 293205720Sjfv struct taskqueue *tq; 294205720Sjfv u64 irqs; 295205720Sjfv}; 296205720Sjfv 297205720Sjfv/* 298205720Sjfv * The transmit ring, one per queue 299171384Sjfv */ 300171384Sjfvstruct tx_ring { 301171384Sjfv struct adapter *adapter; 302179055Sjfv struct mtx tx_mtx; 303171384Sjfv u32 me; 304215911Sjfv int queue_status; 305200239Sjfv int watchdog_time; 306171384Sjfv union ixgbe_adv_tx_desc *tx_base; 307171384Sjfv struct ixgbe_dma_alloc txdma; 308200239Sjfv u32 next_avail_desc; 309200239Sjfv u32 next_to_clean; 310171384Sjfv struct ixgbe_tx_buf *tx_buffers; 311179055Sjfv volatile u16 tx_avail; 312179055Sjfv u32 txd_cmd; 313171384Sjfv bus_dma_tag_t txtag; 314185352Sjfv char mtx_name[16]; 315194875Sjfv#if __FreeBSD_version >= 800000 316194875Sjfv struct buf_ring *br; 317240968Sjhb struct task txq_task; 318194875Sjfv#endif 319200239Sjfv#ifdef IXGBE_FDIR 320200239Sjfv u16 atr_sample; 321200239Sjfv u16 atr_count; 322200239Sjfv#endif 323205720Sjfv u32 bytes; /* used for AIM */ 324205720Sjfv u32 packets; 325179055Sjfv /* Soft Stats */ 326205720Sjfv u64 no_desc_avail; 327185352Sjfv u64 total_packets; 328171384Sjfv}; 329171384Sjfv 330171384Sjfv 331171384Sjfv/* 332171384Sjfv * The Receive ring, one per rx queue 333171384Sjfv */ 334171384Sjfvstruct rx_ring { 335179055Sjfv struct adapter *adapter; 336179055Sjfv struct mtx rx_mtx; 337179055Sjfv u32 me; 338179055Sjfv union ixgbe_adv_rx_desc *rx_base; 339179055Sjfv struct ixgbe_dma_alloc rxdma; 340179055Sjfv struct lro_ctrl lro; 341194875Sjfv bool lro_enabled; 342194875Sjfv bool hdr_split; 343200239Sjfv bool hw_rsc; 344205720Sjfv bool discard; 345230775Sjfv bool vtag_strip; 346205720Sjfv u32 next_to_refresh; 347205720Sjfv u32 next_to_check; 348205720Sjfv char mtx_name[16]; 349179055Sjfv struct ixgbe_rx_buf *rx_buffers; 350208282Sjfv bus_dma_tag_t htag; 351208282Sjfv bus_dma_tag_t ptag; 352185352Sjfv 353185352Sjfv u32 bytes; /* Used for AIM calc */ 354205720Sjfv u32 packets; 355185352Sjfv 356171384Sjfv /* Soft stats */ 357179055Sjfv u64 rx_irq; 358185352Sjfv u64 rx_split_packets; 359239940Sscottl u64 rx_copies; 360185352Sjfv u64 rx_packets; 361185352Sjfv u64 rx_bytes; 362205720Sjfv u64 rx_discarded; 363200239Sjfv u64 rsc_num; 364200239Sjfv#ifdef IXGBE_FDIR 365200239Sjfv u64 flm; 366200239Sjfv#endif 367171384Sjfv}; 368171384Sjfv 369171384Sjfv/* Our adapter structure */ 370171384Sjfvstruct adapter { 371205720Sjfv struct ifnet *ifp; 372205720Sjfv struct ixgbe_hw hw; 373171384Sjfv 374171384Sjfv struct ixgbe_osdep osdep; 375205720Sjfv struct device *dev; 376171384Sjfv 377205720Sjfv struct resource *pci_mem; 378205720Sjfv struct resource *msix_mem; 379179055Sjfv 380171384Sjfv /* 381194875Sjfv * Interrupt resources: this set is 382194875Sjfv * either used for legacy, or for Link 383194875Sjfv * when doing MSIX 384171384Sjfv */ 385205720Sjfv void *tag; 386205720Sjfv struct resource *res; 387171384Sjfv 388205720Sjfv struct ifmedia media; 389205720Sjfv struct callout timer; 390205720Sjfv int msix; 391205720Sjfv int if_flags; 392179055Sjfv 393205720Sjfv struct mtx core_mtx; 394179055Sjfv 395205720Sjfv eventhandler_tag vlan_attach; 396205720Sjfv eventhandler_tag vlan_detach; 397194875Sjfv 398205720Sjfv u16 num_vlans; 399205720Sjfv u16 num_queues; 400194875Sjfv 401215911Sjfv /* 402215911Sjfv ** Shadow VFTA table, this is needed because 403215911Sjfv ** the real vlan filter table gets cleared during 404215911Sjfv ** a soft reset and the driver needs to be able 405215911Sjfv ** to repopulate it. 406215911Sjfv */ 407215911Sjfv u32 shadow_vfta[IXGBE_VFTA_SIZE]; 408215911Sjfv 409215911Sjfv /* Info about the interface */ 410205720Sjfv u32 optics; 411230775Sjfv u32 fc; /* local flow ctrl setting */ 412209609Sjfv int advertise; /* link speeds */ 413205720Sjfv bool link_active; 414205720Sjfv u16 max_frame_size; 415217593Sjfv u16 num_segs; 416205720Sjfv u32 link_speed; 417205720Sjfv bool link_up; 418205720Sjfv u32 linkvec; 419171384Sjfv 420185352Sjfv /* Mbuf cluster size */ 421205720Sjfv u32 rx_mbuf_sz; 422171384Sjfv 423190873Sjfv /* Support for pluggable optics */ 424205720Sjfv bool sfp_probe; 425205720Sjfv struct task link_task; /* Link tasklet */ 426205720Sjfv struct task mod_task; /* SFP tasklet */ 427205720Sjfv struct task msf_task; /* Multispeed Fiber */ 428200239Sjfv#ifdef IXGBE_FDIR 429200239Sjfv int fdir_reinit; 430200239Sjfv struct task fdir_task; 431200239Sjfv#endif 432190873Sjfv struct taskqueue *tq; 433185352Sjfv 434171384Sjfv /* 435205720Sjfv ** Queues: 436205720Sjfv ** This is the irq holder, it has 437205720Sjfv ** and RX/TX pair or rings associated 438205720Sjfv ** with it. 439205720Sjfv */ 440205720Sjfv struct ix_queue *queues; 441205720Sjfv 442205720Sjfv /* 443171384Sjfv * Transmit rings: 444171384Sjfv * Allocated at run time, an array of rings. 445171384Sjfv */ 446205720Sjfv struct tx_ring *tx_rings; 447205720Sjfv int num_tx_desc; 448171384Sjfv 449171384Sjfv /* 450171384Sjfv * Receive rings: 451171384Sjfv * Allocated at run time, an array of rings. 452171384Sjfv */ 453205720Sjfv struct rx_ring *rx_rings; 454205720Sjfv int num_rx_desc; 455205720Sjfv u64 que_mask; 456205720Sjfv u32 rx_process_limit; 457171384Sjfv 458215914Sjfv /* Multicast array memory */ 459215914Sjfv u8 *mta; 460215914Sjfv 461171384Sjfv /* Misc stats maintained by the driver */ 462205720Sjfv unsigned long dropped_pkts; 463205720Sjfv unsigned long mbuf_defrag_failed; 464205720Sjfv unsigned long mbuf_header_failed; 465205720Sjfv unsigned long mbuf_packet_failed; 466205720Sjfv unsigned long no_tx_map_avail; 467205720Sjfv unsigned long no_tx_dma_setup; 468205720Sjfv unsigned long watchdog_events; 469205720Sjfv unsigned long tso_tx; 470205720Sjfv unsigned long link_irq; 471171384Sjfv 472205720Sjfv struct ixgbe_hw_stats stats; 473171384Sjfv}; 474171384Sjfv 475190873Sjfv/* Precision Time Sync (IEEE 1588) defines */ 476190873Sjfv#define ETHERTYPE_IEEE1588 0x88F7 477190873Sjfv#define PICOSECS_PER_TICK 20833 478190873Sjfv#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 479190873Sjfv#define IXGBE_ADVTXD_TSTAMP 0x00080000 480190873Sjfv 481190873Sjfv 482179055Sjfv#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 483179055Sjfv mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 484179055Sjfv#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 485200239Sjfv#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 486200239Sjfv#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 487179055Sjfv#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 488200239Sjfv#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 489200239Sjfv#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 490200239Sjfv#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 491179055Sjfv#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 492179055Sjfv#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 493179055Sjfv#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 494179055Sjfv#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 495179055Sjfv#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 496179055Sjfv 497179055Sjfv 498190873Sjfvstatic inline bool 499190873Sjfvixgbe_is_sfp(struct ixgbe_hw *hw) 500190873Sjfv{ 501190873Sjfv switch (hw->phy.type) { 502190873Sjfv case ixgbe_phy_sfp_avago: 503190873Sjfv case ixgbe_phy_sfp_ftl: 504190873Sjfv case ixgbe_phy_sfp_intel: 505190873Sjfv case ixgbe_phy_sfp_unknown: 506205720Sjfv case ixgbe_phy_sfp_passive_tyco: 507205720Sjfv case ixgbe_phy_sfp_passive_unknown: 508190873Sjfv return TRUE; 509190873Sjfv default: 510190873Sjfv return FALSE; 511190873Sjfv } 512190873Sjfv} 513190873Sjfv 514208762Sjfv/* Workaround to make 8.0 buildable */ 515217129Sjfv#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 516208762Sjfvstatic __inline int 517208762Sjfvdrbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 518208762Sjfv{ 519208762Sjfv#ifdef ALTQ 520208762Sjfv if (ALTQ_IS_ENABLED(&ifp->if_snd)) 521208762Sjfv return (1); 522208762Sjfv#endif 523208762Sjfv return (!buf_ring_empty(br)); 524208762Sjfv} 525208762Sjfv#endif 526208762Sjfv 527221041Sjfv/* 528221041Sjfv** Find the number of unrefreshed RX descriptors 529221041Sjfv*/ 530221041Sjfvstatic inline u16 531221041Sjfvixgbe_rx_unrefreshed(struct rx_ring *rxr) 532221041Sjfv{ 533221041Sjfv struct adapter *adapter = rxr->adapter; 534221041Sjfv 535221041Sjfv if (rxr->next_to_check > rxr->next_to_refresh) 536221041Sjfv return (rxr->next_to_check - rxr->next_to_refresh - 1); 537221041Sjfv else 538221041Sjfv return ((adapter->num_rx_desc + rxr->next_to_check) - 539221041Sjfv rxr->next_to_refresh - 1); 540221041Sjfv} 541221041Sjfv 542171384Sjfv#endif /* _IXGBE_H_ */ 543