ips.h revision 140923
1/*- 2 * Copyright (c) 2002 Adaptec Inc. 3 * All rights reserved. 4 * 5 * Written by: David Jeffery 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ips/ips.h 140923 2005-01-28 05:02:13Z scottl $ 29 */ 30 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/kernel.h> 35#include <sys/module.h> 36#include <sys/bus.h> 37#include <sys/conf.h> 38#include <sys/types.h> 39#include <sys/queue.h> 40#include <sys/bio.h> 41#include <sys/malloc.h> 42#include <sys/mutex.h> 43#include <sys/sema.h> 44#include <sys/time.h> 45 46#include <machine/bus_memio.h> 47#include <machine/bus.h> 48#include <sys/rman.h> 49#include <machine/resource.h> 50 51#include <dev/pci/pcireg.h> 52#include <dev/pci/pcivar.h> 53 54MALLOC_DECLARE(M_IPSBUF); 55 56/* 57 * IPS CONSTANTS 58 */ 59#define IPS_VENDOR_ID 0x1014 60#define IPS_VENDOR_ID_ADAPTEC 0x9005 61#define IPS_MORPHEUS_DEVICE_ID 0x01BD 62#define IPS_COPPERHEAD_DEVICE_ID 0x002E 63#define IPS_MARCO_DEVICE_ID 0x0250 64#define IPS_CSL 0xff 65#define IPS_POCL 0x30 66 67/* amounts of memory to allocate for certain commands */ 68#define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t)) 69#define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t)) 70#define IPS_COMMAND_LEN 24 71#define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS) 72#define IPS_NVRAM_PAGE_SIZE 128 73/* various flags */ 74#define IPS_STATIC_FLAG 0x01 75 76/* states for the card to be in */ 77#define IPS_DEV_OPEN 0x01 78#define IPS_TIMEOUT 0x02 /* command time out, need reset */ 79#define IPS_OFFLINE 0x04 /* can't reset card/card failure */ 80#define IPS_STATIC_BUSY 0x08 81 82/* max number of commands set to something low for now */ 83#define IPS_MAX_CMD_NUM 128 84#define IPS_MAX_NUM_DRIVES 8 85#define IPS_MAX_SG_ELEMENTS 32 86#define IPS_MAX_IOBUF_SIZE (64 * 1024) 87#define IPS_BLKSIZE 512 88 89/* logical drive states */ 90 91#define IPS_LD_OFFLINE 0x02 92#define IPS_LD_OKAY 0x03 93#define IPS_LD_DEGRADED 0x04 94#define IPS_LD_FREE 0x00 95#define IPS_LD_SYS 0x06 96#define IPS_LD_CRS 0x24 97 98/* register offsets */ 99#define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */ 100#define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */ 101#define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */ 102#define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */ 103#define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */ 104#define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */ 105#define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */ 106#define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */ 107#define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */ 108 109#define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */ 110#define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */ 111#define COPPER_REG_CBSP 0x07 /* ? Reg. */ 112#define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */ 113#define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/ 114#define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */ 115#define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */ 116#define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */ 117#define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */ 118#define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */ 119 120/* bit definitions */ 121#define MORPHEUS_BIT_POST1 0x01 122#define MORPHEUS_BIT_POST2 0x02 123#define MORPHEUS_BIT_CMD_IRQ 0x08 124 125#define COPPER_CMD_START 0x101A 126#define COPPER_SEM_BIT 0x08 127#define COPPER_EI_BIT 0x80 128#define COPPER_EBM_BIT 0x02 129#define COPPER_RESET_BIT 0x80 130#define COPPER_GHI_BIT 0x04 131#define COPPER_SCE_BIT 0x01 132#define COPPER_OP_BIT 0x01 133#define COPPER_ILE_BIT 0x10 134 135/* status defines */ 136#define IPS_POST1_OK 0x8000 137#define IPS_POST2_OK 0x000f 138 139/* command op codes */ 140#define IPS_READ_CMD 0x02 141#define IPS_WRITE_CMD 0x03 142#define IPS_ADAPTER_INFO_CMD 0x05 143#define IPS_CACHE_FLUSH_CMD 0x0A 144#define IPS_REBUILD_STATUS_CMD 0x0C 145#define IPS_ERROR_TABLE_CMD 0x17 146#define IPS_DRIVE_INFO_CMD 0x19 147#define IPS_SUBSYS_PARAM_CMD 0x40 148#define IPS_CONFIG_SYNC_CMD 0x58 149#define IPS_SG_READ_CMD 0x82 150#define IPS_SG_WRITE_CMD 0x83 151#define IPS_RW_NVRAM_CMD 0xBC 152#define IPS_FFDC_CMD 0xD7 153 154/* error information returned by the adapter */ 155#define IPS_MIN_ERROR 0x02 156#define IPS_ERROR_STATUS 0x13000200 /* ahh, magic numbers */ 157 158#define IPS_OS_FREEBSD 8 159#define IPS_VERSION_MAJOR "0.90" 160#define IPS_VERSION_MINOR ".10" 161 162/* Adapter Types */ 163#define IPS_ADAPTER_COPPERHEAD 0x01 164#define IPS_ADAPTER_COPPERHEAD2 0x02 165#define IPS_ADAPTER_COPPERHEADOB1 0x03 166#define IPS_ADAPTER_COPPERHEADOB2 0x04 167#define IPS_ADAPTER_CLARINET 0x05 168#define IPS_ADAPTER_CLARINETLITE 0x06 169#define IPS_ADAPTER_TROMBONE 0x07 170#define IPS_ADAPTER_MORPHEUS 0x08 171#define IPS_ADAPTER_MORPHEUSLITE 0x09 172#define IPS_ADAPTER_NEO 0x0A 173#define IPS_ADAPTER_NEOLITE 0x0B 174#define IPS_ADAPTER_SARASOTA2 0x0C 175#define IPS_ADAPTER_SARASOTA1 0x0D 176#define IPS_ADAPTER_MARCO 0x0E 177#define IPS_ADAPTER_SEBRING 0x0F 178#define IPS_ADAPTER_MAX_T IPS_ADAPTER_SEBRING 179 180/* values for ffdc_settime (from gmtime) */ 181#define IPS_SECSPERMIN 60 182#define IPS_MINSPERHOUR 60 183#define IPS_HOURSPERDAY 24 184#define IPS_DAYSPERWEEK 7 185#define IPS_DAYSPERNYEAR 365 186#define IPS_DAYSPERLYEAR 366 187#define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR) 188#define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY) 189#define IPS_MONSPERYEAR 12 190#define IPS_EPOCH_YEAR 1970 191#define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400) 192#define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0)) 193 194/* 195 * IPS MACROS 196 */ 197 198#define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset) 199#define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset) 200#define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset) 201 202#define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value) 203#define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value) 204#define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value) 205 206/* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */ 207#define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status)) 208 209#define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ) 210 211#define COMMAND_ERROR(status) (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR) 212 213#ifndef IPS_DEBUG 214#define DEVICE_PRINTF(x...) 215#define PRINTF(x...) 216#else 217#define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x) 218#define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x) 219#endif 220/* 221 * IPS STRUCTS 222 */ 223 224struct ips_softc; 225 226typedef struct{ 227 u_int8_t command; 228 u_int8_t id; 229 u_int8_t drivenum; 230 u_int8_t reserve2; 231 u_int32_t lba; 232 u_int32_t buffaddr; 233 u_int32_t reserve3; 234} __attribute__ ((packed)) ips_generic_cmd; 235 236typedef struct{ 237 u_int8_t command; 238 u_int8_t id; 239 u_int8_t drivenum; 240 u_int8_t segnum; 241 u_int32_t lba; 242 u_int32_t buffaddr; 243 u_int16_t length; 244 u_int16_t reserve1; 245} __attribute__ ((packed)) ips_io_cmd; 246 247typedef struct{ 248 u_int8_t command; 249 u_int8_t id; 250 u_int8_t pagenum; 251 u_int8_t rw; 252 u_int32_t reserve1; 253 u_int32_t buffaddr; 254 u_int32_t reserve3; 255} __attribute__ ((packed)) ips_rw_nvram_cmd; 256 257typedef struct{ 258 u_int8_t command; 259 u_int8_t id; 260 u_int8_t drivenum; 261 u_int8_t reserve1; 262 u_int32_t reserve2; 263 u_int32_t buffaddr; 264 u_int32_t reserve3; 265} __attribute__ ((packed)) ips_drive_cmd; 266 267typedef struct{ 268 u_int8_t command; 269 u_int8_t id; 270 u_int8_t reserve1; 271 u_int8_t commandtype; 272 u_int32_t reserve2; 273 u_int32_t buffaddr; 274 u_int32_t reserve3; 275} __attribute__((packed)) ips_adapter_info_cmd; 276 277typedef struct{ 278 u_int8_t command; 279 u_int8_t id; 280 u_int8_t reset_count; 281 u_int8_t reset_type; 282 u_int8_t second; 283 u_int8_t minute; 284 u_int8_t hour; 285 u_int8_t day; 286 u_int8_t reserve1[4]; 287 u_int8_t month; 288 u_int8_t yearH; 289 u_int8_t yearL; 290 u_int8_t reserve2; 291} __attribute__((packed)) ips_adapter_ffdc_cmd; 292 293typedef union{ 294 ips_generic_cmd generic_cmd; 295 ips_drive_cmd drive_cmd; 296 ips_adapter_info_cmd adapter_info_cmd; 297} ips_cmd_buff_t; 298 299typedef struct { 300 u_int32_t signature; 301 u_int8_t reserved; 302 u_int8_t adapter_slot; 303 u_int16_t adapter_type; 304 u_int8_t bios_high[4]; 305 u_int8_t bios_low[4]; 306 u_int16_t reserve2; 307 u_int8_t reserve3; 308 u_int8_t operating_system; 309 u_int8_t driver_high[4]; 310 u_int8_t driver_low[4]; 311 u_int8_t reserve4[100]; 312}__attribute__((packed)) ips_nvram_page5; 313 314typedef struct{ 315 u_int32_t addr; 316 u_int32_t len; 317} ips_sg_element_t; 318 319typedef struct{ 320 u_int8_t drivenum; 321 u_int8_t merge_id; 322 u_int8_t raid_lvl; 323 u_int8_t state; 324 u_int32_t sector_count; 325} __attribute__((packed)) ips_drive_t; 326 327typedef struct{ 328 u_int8_t drivecount; 329 u_int8_t reserve1; 330 u_int16_t reserve2; 331 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 332}__attribute__((packed)) ips_drive_info_t; 333 334typedef struct{ 335 u_int8_t drivecount; 336 u_int8_t miscflags; 337 u_int8_t SLTflags; 338 u_int8_t BSTflags; 339 u_int8_t pwr_chg_count; 340 u_int8_t wrong_addr_count; 341 u_int8_t unident_count; 342 u_int8_t nvram_dev_chg_count; 343 u_int8_t codeblock_version[8]; 344 u_int8_t bootblock_version[8]; 345 u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES]; 346 u_int8_t max_concurrent_cmds; 347 u_int8_t max_phys_devices; 348 u_int16_t flash_prog_count; 349 u_int8_t defunct_disks; 350 u_int8_t rebuildflags; 351 u_int8_t offline_drivecount; 352 u_int8_t critical_drivecount; 353 u_int16_t config_update_count; 354 u_int8_t blockedflags; 355 u_int8_t psdn_error; 356 u_int16_t addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */ 357}__attribute__((packed)) ips_adapter_info_t; 358 359typedef struct { 360 u_int32_t status[IPS_MAX_CMD_NUM]; 361 u_int32_t base_phys_addr; 362 int nextstatus; 363 bus_dma_tag_t dmatag; 364 bus_dmamap_t dmamap; 365} ips_copper_queue_t; 366 367typedef union { 368 struct { 369 u_int8_t reserved; 370 u_int8_t command_id; 371 u_int8_t basic_status; 372 u_int8_t extended_status; 373 } fields; 374 volatile u_int32_t value; 375} ips_cmd_status_t; 376 377/* used to keep track of current commands to the card */ 378typedef struct ips_command{ 379 u_int8_t command_number; 380 u_int8_t id; 381 u_int8_t timeout; 382 struct ips_softc * sc; 383 bus_dma_tag_t data_dmatag; 384 bus_dmamap_t data_dmamap; 385 bus_dmamap_t command_dmamap; 386 void * command_buffer; 387 u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/ 388 ips_cmd_status_t status; 389 SLIST_ENTRY(ips_command) next; 390 void * data_buffer; 391 void * arg; 392 void (* callback)(struct ips_command *command); 393}ips_command_t; 394 395typedef struct ips_softc{ 396 struct resource * iores; 397 struct resource * irqres; 398 struct intr_config_hook ips_ich; 399 int configured; 400 int state; 401 int iotype; 402 int rid; 403 int irqrid; 404 void * irqcookie; 405 bus_space_tag_t bustag; 406 bus_space_handle_t bushandle; 407 bus_dma_tag_t adapter_dmatag; 408 bus_dma_tag_t command_dmatag; 409 bus_dma_tag_t sg_dmatag; 410 device_t dev; 411 struct cdev *device_file; 412 struct callout_handle timer; 413 u_int16_t adapter_type; 414 ips_adapter_info_t adapter_info; 415 device_t diskdev[IPS_MAX_NUM_DRIVES]; 416 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 417 u_int8_t drivecount; 418 u_int16_t ffdc_resetcount; 419 struct timeval ffdc_resettime; 420 u_int8_t next_drive; 421 u_int8_t max_cmds; 422 volatile u_int8_t used_commands; 423 ips_command_t *commandarray; 424 ips_command_t *staticcmd; 425 SLIST_HEAD(command_list, ips_command) free_cmd_list; 426 int (* ips_adapter_reinit)(struct ips_softc *sc, 427 int force); 428 void (* ips_adapter_intr)(void *sc); 429 void (* ips_issue_cmd)(ips_command_t *command); 430 ips_copper_queue_t * copper_queue; 431 struct mtx queue_mtx; 432 struct bio_queue_head queue; 433 struct sema cmd_sema; 434 435}ips_softc_t; 436 437/* function defines from ips_ioctl.c */ 438extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr, 439 int32_t flags); 440/* function defines from ips_disk.c */ 441extern void ipsd_finish(struct bio *iobuf); 442 443/* function defines from ips_commands.c */ 444extern int ips_flush_cache(ips_softc_t *sc); 445extern void ips_start_io_request(ips_softc_t *sc); 446extern int ips_get_drive_info(ips_softc_t *sc); 447extern int ips_get_adapter_info(ips_softc_t *sc); 448extern int ips_ffdc_reset(ips_softc_t *sc); 449extern int ips_update_nvram(ips_softc_t *sc); 450extern int ips_clear_adapter(ips_softc_t *sc); 451 452/* function defines from ips.c */ 453extern int ips_get_free_cmd(ips_softc_t *sc, ips_command_t **command, unsigned long flags); 454extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command); 455extern int ips_adapter_init(ips_softc_t *sc); 456extern int ips_morpheus_reinit(ips_softc_t *sc, int force); 457extern int ips_adapter_free(ips_softc_t *sc); 458extern void ips_morpheus_intr(void *sc); 459extern void ips_issue_morpheus_cmd(ips_command_t *command); 460extern int ips_copperhead_reinit(ips_softc_t *sc, int force); 461extern void ips_copperhead_intr(void *sc); 462extern void ips_issue_copperhead_cmd(ips_command_t *command); 463 464