iicbus_if.m revision 38774
138774Snsouch#
238774Snsouch# Copyright (c) 1998 Nicolas Souchu
338774Snsouch# All rights reserved.
438774Snsouch#
538774Snsouch# Redistribution and use in source and binary forms, with or without
638774Snsouch# modification, are permitted provided that the following conditions
738774Snsouch# are met:
838774Snsouch# 1. Redistributions of source code must retain the above copyright
938774Snsouch#    notice, this list of conditions and the following disclaimer.
1038774Snsouch# 2. Redistributions in binary form must reproduce the above copyright
1138774Snsouch#    notice, this list of conditions and the following disclaimer in the
1238774Snsouch#    documentation and/or other materials provided with the distribution.
1338774Snsouch#
1438774Snsouch# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1538774Snsouch# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1638774Snsouch# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1738774Snsouch# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1838774Snsouch# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1938774Snsouch# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2038774Snsouch# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2138774Snsouch# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2238774Snsouch# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2338774Snsouch# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2438774Snsouch# SUCH DAMAGE.
2538774Snsouch#
2638774Snsouch#	$Id: iicbus_if.m,v 1.1.2.4 1998/08/13 17:10:43 son Exp $
2738774Snsouch#
2838774Snsouch
2938774SnsouchINTERFACE iicbus
3038774Snsouch
3138774Snsouch#
3238774Snsouch# Interprete interrupt
3338774Snsouch#
3438774SnsouchMETHOD int intr {
3538774Snsouch	device_t dev;
3638774Snsouch	int event;
3738774Snsouch	char *buf;
3838774Snsouch};
3938774Snsouch
4038774Snsouch#
4138774Snsouch# Send REPEATED_START condition
4238774Snsouch#
4338774SnsouchMETHOD int repeated_start {
4438774Snsouch	device_t dev;
4538774Snsouch	u_char slave;
4638774Snsouch};
4738774Snsouch
4838774Snsouch#
4938774Snsouch# Send START condition
5038774Snsouch#
5138774SnsouchMETHOD int start {
5238774Snsouch	device_t dev;
5338774Snsouch	u_char slave;
5438774Snsouch};
5538774Snsouch
5638774Snsouch#
5738774Snsouch# Send STOP condition
5838774Snsouch#
5938774SnsouchMETHOD int stop {
6038774Snsouch	device_t dev;
6138774Snsouch};
6238774Snsouch
6338774Snsouch#
6438774Snsouch# Read from I2C bus
6538774Snsouch#
6638774SnsouchMETHOD int read {
6738774Snsouch	device_t dev;
6838774Snsouch	char *buf;
6938774Snsouch	int len;
7038774Snsouch	int *bytes;
7138774Snsouch};
7238774Snsouch
7338774Snsouch#
7438774Snsouch# Write to the I2C bus
7538774Snsouch#
7638774SnsouchMETHOD int write {
7738774Snsouch	device_t dev;
7838774Snsouch	char *buf;
7938774Snsouch	int len;
8038774Snsouch	int *bytes;
8138774Snsouch};
8238774Snsouch
8338774Snsouch#
8438774Snsouch# Reset I2C bus
8538774Snsouch#
8638774SnsouchMETHOD int reset {
8738774Snsouch	device_t dev;
8838774Snsouch	u_char speed;
8938774Snsouch};
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