if_ed.c revision 521
1/* 2 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 3 * adapters. By David Greenman, 29-April-1993 4 * 5 * Copyright (C) 1993, David Greenman. This software may be used, modified, 6 * copied, distributed, and sold, in both source and binary form provided 7 * that the above copyright and these terms are retained. Under no 8 * circumstances is the author responsible for the proper functioning 9 * of this software, nor does the author assume any responsibility 10 * for damages incurred with its use. 11 * 12 * Currently supports the Western Digital/SMC 8003 and 8013 series, 13 * the 3Com 3c503, the NE1000 and NE2000, and a variety of similar 14 * clones. 15 * 16 * Thanks to Charles Hannum for proving to me with example code that the 17 * NE1000/2000 support could be added with minimal impact. Without 18 * this, I wouldn't have proceeded in this direction. 19 * 20 */ 21 22/* 23 * $Id: if_ed.c,v 2.3 93/09/29 15:10:16 davidg Exp Locker: davidg $ 24 */ 25 26/* 27 * Modification history 28 * 29 * Revision 2.3 93/09/29 15:10:16 davidg 30 * credit Charles Hannum 31 * 32 * Revision 2.2 93/09/29 13:23:25 davidg 33 * added no multi-buffer override for 3c503 34 * 35 * Revision 2.1 93/09/29 12:32:12 davidg 36 * changed multi-buffer count for 16bit 3c503's from 5 to 2 after 37 * noticing that the transmitter becomes idle because of so many 38 * packets to load. 39 * 40 * Revision 2.0 93/09/29 00:00:19 davidg 41 * many changes, rewrites, additions, etc. Now supports the 42 * NE1000, NE2000, WD8003, WD8013, 3C503, 16bit 3C503, and 43 * a variety of similar clones. 16bit 3c503 now does multi 44 * transmit buffers. Nearly every part of the driver has 45 * changed in some way since rev 1.30. 46 * 47 * Revision 1.1 93/06/14 22:21:24 davidg 48 * Beta release of device driver for SMC/WD80x3 and 3C503 ethernet boards. 49 * 50 */ 51 52#include "ed.h" 53#if NED > 0 54/* bpfilter included here in case it is needed in future net includes */ 55#include "bpfilter.h" 56 57#include "param.h" 58#include "systm.h" 59#include "errno.h" 60#include "ioctl.h" 61#include "mbuf.h" 62#include "socket.h" 63#include "syslog.h" 64 65#include "net/if.h" 66#include "net/if_dl.h" 67#include "net/if_types.h" 68#include "net/netisr.h" 69 70#ifdef INET 71#include "netinet/in.h" 72#include "netinet/in_systm.h" 73#include "netinet/in_var.h" 74#include "netinet/ip.h" 75#include "netinet/if_ether.h" 76#endif 77 78#ifdef NS 79#include "netns/ns.h" 80#include "netns/ns_if.h" 81#endif 82 83#if NBPFILTER > 0 84#include "net/bpf.h" 85#include "net/bpfdesc.h" 86#endif 87 88#include "i386/isa/isa.h" 89#include "i386/isa/isa_device.h" 90#include "i386/isa/icu.h" 91#include "i386/isa/if_edreg.h" 92 93#include "i386/include/pio.h" 94 95/* For backwards compatibility */ 96#ifndef IFF_ALTPHYS 97#define IFF_ALTPHYS IFF_LLC0 98#endif 99 100/* 101 * ed_softc: per line info and status 102 */ 103struct ed_softc { 104 struct arpcom arpcom; /* ethernet common */ 105 106 char *type_str; /* pointer to type string */ 107 u_char vendor; /* interface vendor */ 108 u_char type; /* interface type code */ 109 110 u_short asic_addr; /* ASIC I/O bus address */ 111 u_short nic_addr; /* NIC (DS8390) I/O bus address */ 112 113/* 114 * The following 'proto' variable is part of a work-around for 8013EBT asics 115 * being write-only. It's sort of a prototype/shadow of the real thing. 116 */ 117 u_char wd_laar_proto; 118 u_char isa16bit; /* width of access to card 0=8 or 1=16 */ 119 120 caddr_t bpf; /* BPF "magic cookie" */ 121 caddr_t mem_start; /* NIC memory start address */ 122 caddr_t mem_end; /* NIC memory end address */ 123 u_long mem_size; /* total NIC memory size */ 124 caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ 125 126 u_char mem_shared; /* NIC memory is shared with host */ 127 u_char xmit_busy; /* transmitter is busy */ 128 u_char txb_cnt; /* number of transmit buffers */ 129 u_char txb_inuse; /* number of TX buffers currently in-use*/ 130 131 u_char txb_new; /* pointer to where new buffer will be added */ 132 u_char txb_next_tx; /* pointer to next buffer ready to xmit */ 133 u_short txb_len[8]; /* buffered xmit buffer lengths */ 134 u_char tx_page_start; /* first page of TX buffer area */ 135 u_char rec_page_start; /* first page of RX ring-buffer */ 136 u_char rec_page_stop; /* last page of RX ring-buffer */ 137 u_char next_packet; /* pointer to next unread RX packet */ 138} ed_softc[NED]; 139 140int ed_attach(), ed_init(), edintr(), ed_ioctl(), ed_probe(), 141 ed_start(), ed_reset(), ed_watchdog(); 142 143static void ed_stop(); 144 145static inline void ed_rint(); 146static inline void ed_xmit(); 147static inline char *ed_ring_copy(); 148 149void ed_pio_readmem(), ed_pio_writemem(); 150u_short ed_pio_write_mbufs(); 151 152extern int ether_output(); 153 154struct trailer_header { 155 u_short ether_type; 156 u_short ether_residual; 157}; 158 159struct isa_driver eddriver = { 160 ed_probe, 161 ed_attach, 162 "ed" 163}; 164/* 165 * Interrupt conversion table for WD/SMC ASIC 166 * (IRQ* are defined in icu.h) 167 */ 168static unsigned short ed_intr_mask[] = { 169 IRQ9, 170 IRQ3, 171 IRQ5, 172 IRQ7, 173 IRQ10, 174 IRQ11, 175 IRQ15, 176 IRQ4 177}; 178 179#define ETHER_MIN_LEN 64 180#define ETHER_MAX_LEN 1518 181#define ETHER_ADDR_LEN 6 182#define ETHER_HDR_SIZE 14 183 184/* 185 * Determine if the device is present 186 * 187 * on entry: 188 * a pointer to an isa_device struct 189 * on exit: 190 * NULL if device not found 191 * or # of i/o addresses used (if found) 192 */ 193int 194ed_probe(isa_dev) 195 struct isa_device *isa_dev; 196{ 197 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 198 int nports; 199 200 if (nports = ed_probe_WD80x3(isa_dev)) 201 return (nports); 202 203 if (nports = ed_probe_3Com(isa_dev)) 204 return (nports); 205 206 if (nports = ed_probe_Novell(isa_dev)) 207 return (nports); 208} 209 210/* 211 * Generic probe routine for testing for the existance of a DS8390. 212 * Must be called after the NIC has just been reset. This routine 213 * works by looking at certain register values that are gauranteed 214 * to be initialized a certain way after power-up or reset. Seems 215 * not to currently work on the 83C690. 216 * 217 * Specifically: 218 * 219 * Register reset bits set bits 220 * Command Register (CR) TXP, STA RD2, STP 221 * Interrupt Status (ISR) RST 222 * Interrupt Mask (IMR) All bits 223 * Data Control (DCR) LAS 224 * Transmit Config. (TCR) LB1, LB0 225 * 226 * We only look at the CR and ISR registers, however, because looking at 227 * the others would require changing register pages (which would be 228 * intrusive if this isn't an 8390). 229 * 230 * Return 1 if 8390 was found, 0 if not. 231 */ 232 233int 234ed_probe_generic8390(sc) 235 struct ed_softc *sc; 236{ 237 if ((inb(sc->nic_addr + ED_P0_CR) & 238 (ED_CR_RD2|ED_CR_TXP|ED_CR_STA|ED_CR_STP)) != 239 (ED_CR_RD2|ED_CR_STP)) 240 return (0); 241 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) 242 return (0); 243 244 return(1); 245} 246 247/* 248 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards 249 */ 250int 251ed_probe_WD80x3(isa_dev) 252 struct isa_device *isa_dev; 253{ 254 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 255 int i; 256 u_int memsize; 257 u_char iptr, isa16bit, sum; 258 259 sc->asic_addr = isa_dev->id_iobase; 260 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; 261 262 /* 263 * Attempt to do a checksum over the station address PROM. 264 * If it fails, it's probably not a SMC/WD board. There 265 * is a problem with this, though: some clone WD boards 266 * don't pass the checksum test. Danpex boards for one. 267 * XXX - We need to do additional checking for this case. 268 */ 269 for (sum = 0, i = 0; i < 8; ++i) 270 sum += inb(sc->asic_addr + ED_WD_PROM + i); 271 272 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) 273 return(0); 274 275 /* reset card to force it into a known state. */ 276 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST); 277 DELAY(100); 278 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); 279 /* wait in the case this card is reading it's EEROM */ 280 DELAY(5000); 281 282 sc->vendor = ED_VENDOR_WD_SMC; 283 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID); 284 285 /* 286 * Set initial values for width/size. 287 */ 288 switch (sc->type) { 289 case ED_TYPE_WD8003S: 290 sc->type_str = "WD8003S"; 291 memsize = 8192; 292 isa16bit = 0; 293 break; 294 case ED_TYPE_WD8003E: 295 sc->type_str = "WD8003E"; 296 memsize = 8192; 297 isa16bit = 0; 298 break; 299 case ED_TYPE_WD8013EBT: 300 sc->type_str = "WD8013EBT"; 301 memsize = 16384; 302 isa16bit = 1; 303 break; 304 case ED_TYPE_WD8013EP: /* also WD8003EP */ 305 if (inb(sc->asic_addr + ED_WD_ICR) 306 & ED_WD_ICR_16BIT) { 307 isa16bit = 1; 308 memsize = 16384; 309 sc->type_str = "WD8013EP"; 310 } else { 311 isa16bit = 0; 312 memsize = 8192; 313 sc->type_str = "WD8003EP"; 314 } 315 break; 316 case ED_TYPE_WD8013WC: 317 sc->type_str = "WD8013WC"; 318 memsize = 16384; 319 isa16bit = 1; 320 break; 321 case ED_TYPE_WD8013EBP: 322 sc->type_str = "WD8013EBP"; 323 memsize = 16384; 324 isa16bit = 1; 325 break; 326 case ED_TYPE_WD8013EPC: 327 sc->type_str = "WD8013EPC"; 328 memsize = 16384; 329 isa16bit = 1; 330 break; 331 default: 332 sc->type_str = ""; 333 memsize = 8192; 334 isa16bit = 0; 335 break; 336 } 337 /* 338 * Make some adjustments to initial values depending on what is 339 * found in the ICR. 340 */ 341 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) 342 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { 343 isa16bit = 0; 344 memsize = 8192; 345 } 346 347#if ED_DEBUG 348 printf("type=%s isa16bit=%d memsize=%d id_msize=%d\n", 349 sc->type_str,isa16bit,memsize,isa_dev->id_msize); 350 for (i=0; i<8; i++) 351 printf("%x -> %x\n", i, inb(sc->asic_addr + i)); 352#endif 353 /* 354 * Allow the user to override the autoconfiguration 355 */ 356 if (isa_dev->id_msize) 357 memsize = isa_dev->id_msize; 358 /* 359 * (note that if the user specifies both of the following flags 360 * that '8bit' mode intentionally has precedence) 361 */ 362 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) 363 isa16bit = 1; 364 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE) 365 isa16bit = 0; 366 367 /* 368 * Check 83C584 interrupt configuration register if this board has one 369 * XXX - we could also check the IO address register. But why 370 * bother...if we get past this, it *has* to be correct. 371 */ 372 if (sc->type & ED_WD_SOFTCONFIG) { 373 /* 374 * Assemble together the encoded interrupt number. 375 */ 376 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | 377 ((inb(isa_dev->id_iobase + ED_WD_IRR) & 378 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); 379 /* 380 * Translate it using translation table, and check for correctness. 381 */ 382 if (ed_intr_mask[iptr] != isa_dev->id_irq) { 383 printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n", 384 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, ffs(ed_intr_mask[iptr]) - 1); 385 return(0); 386 } 387 /* 388 * Enable the interrupt. 389 */ 390 outb(isa_dev->id_iobase + ED_WD_IRR, 391 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); 392 } 393 394 sc->isa16bit = isa16bit; 395 396#ifdef notyet /* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */ 397 /* 398 * The following allows the WD/SMC boards to be used in Programmed I/O 399 * mode - without mapping the NIC memory shared. ...Not the prefered 400 * way, but it might be the only way. 401 */ 402 if (isa_dev->id_flags & ED_FLAGS_FORCE_PIO) { 403 sc->mem_shared = 0; 404 isa_dev->id_maddr = 0; 405 } else { 406 sc->mem_shared = 1; 407 } 408#else 409 sc->mem_shared = 1; 410#endif 411 isa_dev->id_msize = memsize; 412 413 sc->mem_start = (caddr_t)isa_dev->id_maddr; 414 415 /* 416 * allocate one xmit buffer if < 16k, two buffers otherwise 417 */ 418 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) { 419 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); 420 sc->txb_cnt = 1; 421 sc->rec_page_start = ED_TXBUF_SIZE; 422 } else { 423 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE * 2); 424 sc->txb_cnt = 2; 425 sc->rec_page_start = ED_TXBUF_SIZE * 2; 426 } 427 sc->mem_size = memsize; 428 sc->mem_end = sc->mem_start + memsize; 429 sc->rec_page_stop = memsize / ED_PAGE_SIZE; 430 sc->tx_page_start = ED_WD_PAGE_OFFSET; 431 432 /* 433 * Get station address from on-board ROM 434 */ 435 for (i = 0; i < ETHER_ADDR_LEN; ++i) 436 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); 437 438 if (sc->mem_shared) { 439 /* 440 * Set address and enable interface shared memory. 441 */ 442 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & 443 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); 444 445 /* 446 * Set upper address bits and 8/16 bit access to shared memory 447 */ 448 if (isa16bit) { 449 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 450 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | 451 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 452 } else { 453 if ((sc->type & ED_WD_SOFTCONFIG) || (sc->type == ED_TYPE_WD8013EBT)) { 454 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 455 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 456 } 457 } 458 459 /* 460 * Now zero memory and verify that it is clear 461 */ 462 bzero(sc->mem_start, memsize); 463 464 for (i = 0; i < memsize; ++i) 465 if (sc->mem_start[i]) { 466 printf("ed%d: failed to clear shared memory at %x - check configuration\n", 467 isa_dev->id_unit, kvtop(sc->mem_start + i)); 468 469 /* 470 * Disable 16 bit access to shared memory 471 */ 472 if (isa16bit) 473 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 474 ~ED_WD_LAAR_M16EN)); 475 476 return(0); 477 } 478 479 /* 480 * Disable 16bit access to shared memory - we leave it disabled so 481 * that 1) machines reboot properly when the board is set 482 * 16 bit mode and there are conflicting 8bit devices/ROMS 483 * in the same 128k address space as this boards shared 484 * memory. and 2) so that other 8 bit devices with shared 485 * memory can be used in this 128k region, too. 486 */ 487 if (isa16bit) 488 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 489 ~ED_WD_LAAR_M16EN)); 490 491 } 492 493 return (ED_WD_IO_PORTS); 494} 495 496/* 497 * Probe and vendor-specific initialization routine for 3Com 3c503 boards 498 */ 499int 500ed_probe_3Com(isa_dev) 501 struct isa_device *isa_dev; 502{ 503 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 504 int i; 505 u_int memsize; 506 u_char isa16bit, sum; 507 508 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; 509 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; 510 511 /* 512 * Verify that the kernel configured I/O address matches the board 513 * configured address 514 */ 515 switch (inb(sc->asic_addr + ED_3COM_BCFR)) { 516 case ED_3COM_BCFR_300: 517 if (isa_dev->id_iobase != 0x300) 518 return(0); 519 break; 520 case ED_3COM_BCFR_310: 521 if (isa_dev->id_iobase != 0x310) 522 return(0); 523 break; 524 case ED_3COM_BCFR_330: 525 if (isa_dev->id_iobase != 0x330) 526 return(0); 527 break; 528 case ED_3COM_BCFR_350: 529 if (isa_dev->id_iobase != 0x350) 530 return(0); 531 break; 532 case ED_3COM_BCFR_250: 533 if (isa_dev->id_iobase != 0x250) 534 return(0); 535 break; 536 case ED_3COM_BCFR_280: 537 if (isa_dev->id_iobase != 0x280) 538 return(0); 539 break; 540 case ED_3COM_BCFR_2A0: 541 if (isa_dev->id_iobase != 0x2a0) 542 return(0); 543 break; 544 case ED_3COM_BCFR_2E0: 545 if (isa_dev->id_iobase != 0x2e0) 546 return(0); 547 break; 548 default: 549 return(0); 550 } 551 552 /* 553 * Verify that the kernel shared memory address matches the 554 * board configured address. 555 */ 556 switch (inb(sc->asic_addr + ED_3COM_PCFR)) { 557 case ED_3COM_PCFR_DC000: 558 if (kvtop(isa_dev->id_maddr) != 0xdc000) 559 return(0); 560 break; 561 case ED_3COM_PCFR_D8000: 562 if (kvtop(isa_dev->id_maddr) != 0xd8000) 563 return(0); 564 break; 565 case ED_3COM_PCFR_CC000: 566 if (kvtop(isa_dev->id_maddr) != 0xcc000) 567 return(0); 568 break; 569 case ED_3COM_PCFR_C8000: 570 if (kvtop(isa_dev->id_maddr) != 0xc8000) 571 return(0); 572 break; 573 default: 574 return(0); 575 } 576 577 578 /* 579 * Reset NIC and ASIC. Enable on-board transceiver throughout reset 580 * sequence because it'll lock up if the cable isn't connected 581 * if we don't. 582 */ 583 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); 584 585 /* 586 * Wait for a while, then un-reset it 587 */ 588 DELAY(50); 589 /* 590 * The 3Com ASIC defaults to rather strange settings for the CR after 591 * a reset - it's important to set it again after the following 592 * outb (this is done when we map the PROM below). 593 */ 594 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 595 596 /* 597 * Wait a bit for the NIC to recover from the reset 598 */ 599 DELAY(5000); 600 601 sc->vendor = ED_VENDOR_3COM; 602 sc->type_str = "3c503"; 603 604 sc->mem_shared = 1; 605 606 /* 607 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k 608 * window to it. 609 */ 610 memsize = 8192; 611 612 /* 613 * Get station address from on-board ROM 614 */ 615 /* 616 * First, map ethernet address PROM over the top of where the NIC 617 * registers normally appear. 618 */ 619 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); 620 621 for (i = 0; i < ETHER_ADDR_LEN; ++i) 622 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i); 623 624 /* 625 * Unmap PROM - select NIC registers. The proper setting of the 626 * tranceiver is set in ed_init so that the attach code 627 * is given a chance to set the default based on a compile-time 628 * config option 629 */ 630 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 631 632 /* 633 * Determine if this is an 8bit or 16bit board 634 */ 635 636 /* 637 * select page 0 registers 638 */ 639 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); 640 641 /* 642 * Attempt to clear WTS bit. If it doesn't clear, then this is a 643 * 16bit board. 644 */ 645 outb(sc->nic_addr + ED_P0_DCR, 0); 646 647 /* 648 * select page 2 registers 649 */ 650 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP); 651 652 /* 653 * The 3c503 forces the WTS bit to a one if this is a 16bit board 654 */ 655 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS) 656 isa16bit = 1; 657 else 658 isa16bit = 0; 659 660 /* 661 * select page 0 registers 662 */ 663 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP); 664 665 sc->mem_start = (caddr_t)isa_dev->id_maddr; 666 sc->mem_size = memsize; 667 sc->mem_end = sc->mem_start + memsize; 668 669 /* 670 * We have an entire 8k window to put the transmit buffers on the 671 * 16bit boards. But since the 16bit 3c503's shared memory 672 * is only fast enough to overlap the loading of one full-size 673 * packet, trying to load more than 2 buffers can actually 674 * leave the transmitter idle during the load. So 2 seems 675 * the best value. (Although a mix of variable-sized packets 676 * might change this assumption. Nonetheless, we optimize for 677 * linear transfers of same-size packets.) 678 */ 679 if (isa16bit) { 680 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) 681 sc->txb_cnt = 1; 682 else 683 sc->txb_cnt = 2; 684 685 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; 686 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; 687 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 688 ED_3COM_RX_PAGE_OFFSET_16BIT; 689 sc->mem_ring = sc->mem_start; 690 } else { 691 sc->txb_cnt = 1; 692 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; 693 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; 694 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 695 ED_3COM_TX_PAGE_OFFSET_8BIT; 696 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); 697 } 698 699 sc->isa16bit = isa16bit; 700 701 /* 702 * Initialize GA page start/stop registers. Probably only needed 703 * if doing DMA, but what the hell. 704 */ 705 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); 706 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); 707 708 /* 709 * Set IRQ. 3c503 only allows a choice of irq 2-5. 710 */ 711 switch (isa_dev->id_irq) { 712 case IRQ2: 713 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2); 714 break; 715 case IRQ3: 716 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3); 717 break; 718 case IRQ4: 719 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4); 720 break; 721 case IRQ5: 722 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5); 723 break; 724 default: 725 printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n", 726 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); 727 return(0); 728 } 729 730 /* 731 * Initialize GA configuration register. Set bank and enable shared mem. 732 */ 733 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | 734 ED_3COM_GACFR_MBS0); 735 736 /* 737 * Initialize "Vector Pointer" registers. These gawd-awful things 738 * are compared to 20 bits of the address on ISA, and if they 739 * match, the shared memory is disabled. We set them to 740 * 0xffff0...allegedly the reset vector. 741 */ 742 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); 743 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); 744 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00); 745 746 /* 747 * Zero memory and verify that it is clear 748 */ 749 bzero(sc->mem_start, memsize); 750 751 for (i = 0; i < memsize; ++i) 752 if (sc->mem_start[i]) { 753 printf("ed%d: failed to clear shared memory at %x - check configuration\n", 754 isa_dev->id_unit, kvtop(sc->mem_start + i)); 755 return(0); 756 } 757 758 isa_dev->id_msize = memsize; 759 return(ED_3COM_IO_PORTS); 760} 761 762/* 763 * Probe and vendor-specific initialization routine for NE1000/2000 boards 764 */ 765int 766ed_probe_Novell(isa_dev) 767 struct isa_device *isa_dev; 768{ 769 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 770 u_int memsize, n; 771 u_char romdata[16], isa16bit = 0, tmp; 772 static char test_pattern[32] = "THIS is A memory TEST pattern"; 773 char test_buffer[32]; 774 775 sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET; 776 sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET; 777 778 /* XXX - do Novell-specific probe here */ 779 780 /* Reset the board */ 781 tmp = inb(sc->asic_addr + ED_NOVELL_RESET); 782 783 /* 784 * This total and completely screwy thing is to work around braindamage 785 * in some NE compatible boards. Why it works, I have *no* idea. 786 * It appears that the boards watch the ISA bus for an outb, and 787 * will lock up the ISA bus if they see an inb first. Weird. 788 */ 789 outb(0x84, 0); 790 DELAY(5000); 791 792 /* Make sure that we really have an 8390 based board */ 793 if (!ed_probe_generic8390(sc)) 794 return(0); 795 796#if 0 797 /* 798 * I don't know if this is necessary; probably cruft leftover from 799 * Clarkson packet driver code. Doesn't do a thing on the boards 800 * I've tested. -DG 801 */ 802 outb(sc->asic_addr + ED_NOVELL_RESET, tmp); 803 DELAY(5000); 804#endif 805 806 outb(sc->nic_addr + ED_P0_IMR, 0); 807 outb(sc->nic_addr + ED_P0_ISR, 0xff); 808 809 sc->vendor = ED_VENDOR_NOVELL; 810 sc->mem_shared = 0; 811 isa_dev->id_maddr = 0; 812 813 /* 814 * Test the ability to read and write to the NIC memory. This has 815 * the side affect of determining if this is an NE1000 or an NE2000. 816 */ 817 818 /* 819 * This prevents packets from being stored in the NIC memory when 820 * the readmem routine turns on the start bit in the CR. 821 */ 822 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); 823 824 /* Temporarily initialize DCR for byte operations */ 825 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); 826 827 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); 828 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); 829 830 sc->isa16bit = 0; 831 832 /* 833 * Write a test pattern in byte mode. If this fails, then there 834 * probably isn't any memory at 8k - which likely means 835 * that the board is an NE2000. 836 */ 837 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); 838 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); 839 840 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 841 /* not an NE1000 - try NE2000 */ 842 843 outb(sc->nic_addr + ED_P0_DCR, 844 ED_DCR_WTS|ED_DCR_FT1|ED_DCR_LS); 845 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); 846 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); 847 848 sc->isa16bit = 1; 849 /* 850 * Write a test pattern in word mode. If this also fails, then 851 * we don't know what this board is. 852 */ 853 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 854 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 855 856 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) 857 return(0); /* not an NE2000 either */ 858 859 sc->type = ED_TYPE_NE2000; 860 sc->type_str = "NE2000"; 861 } else { 862 sc->type = ED_TYPE_NE1000; 863 sc->type_str = "NE1000"; 864 } 865 866 /* 8k of memory plus an additional 8k if 16bit */ 867 memsize = 8192 + sc->isa16bit * 8192; 868 869#if 0 /* probably not useful - NE boards only come two ways */ 870 /* allow kernel config file overrides */ 871 if (isa_dev->id_msize) 872 memsize = isa_dev->id_msize; 873#endif 874 875 sc->mem_size = memsize; 876 877 /* NIC memory doesn't start at zero on an NE board */ 878 /* The start address is tied to the bus width */ 879 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192; 880 sc->mem_end = sc->mem_start + memsize; 881 sc->tx_page_start = memsize / ED_PAGE_SIZE; 882 883 /* 884 * Use one xmit buffer if < 16k, two buffers otherwise (if not told 885 * otherwise). 886 */ 887 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) 888 sc->txb_cnt = 1; 889 else 890 sc->txb_cnt = 2; 891 892 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 893 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 894 895 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 896 897 ed_pio_readmem(sc, 0, romdata, 16); 898 for (n = 0; n < 6; n++) 899 sc->arpcom.ac_enaddr[n] = romdata[n*(sc->isa16bit+1)]; 900 901 /* clear any pending interrupts that might have occurred above */ 902 outb(sc->nic_addr + ED_P0_ISR, 0xff); 903 904 return(ED_NOVELL_IO_PORTS); 905} 906 907/* 908 * Install interface into kernel networking data structures 909 */ 910int 911ed_attach(isa_dev) 912 struct isa_device *isa_dev; 913{ 914 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 915 struct ifnet *ifp = &sc->arpcom.ac_if; 916 struct ifaddr *ifa; 917 struct sockaddr_dl *sdl; 918 919 /* 920 * Set interface to stopped condition (reset) 921 */ 922 ed_stop(isa_dev->id_unit); 923 924 /* 925 * Initialize ifnet structure 926 */ 927 ifp->if_unit = isa_dev->id_unit; 928 ifp->if_name = "ed" ; 929 ifp->if_mtu = ETHERMTU; 930 ifp->if_init = ed_init; 931 ifp->if_output = ether_output; 932 ifp->if_start = ed_start; 933 ifp->if_ioctl = ed_ioctl; 934 ifp->if_reset = ed_reset; 935 ifp->if_watchdog = ed_watchdog; 936 937 /* 938 * Set default state for ALTPHYS flag (used to disable the tranceiver 939 * for AUI operation), based on compile-time config option. 940 */ 941 if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER) 942 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 943 | IFF_ALTPHYS); 944 else 945 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS); 946 947 /* 948 * Attach the interface 949 */ 950 if_attach(ifp); 951 952 /* 953 * Search down the ifa address list looking for the AF_LINK type entry 954 */ 955 ifa = ifp->if_addrlist; 956 while ((ifa != 0) && (ifa->ifa_addr != 0) && 957 (ifa->ifa_addr->sa_family != AF_LINK)) 958 ifa = ifa->ifa_next; 959 /* 960 * If we find an AF_LINK type entry we fill in the hardware address. 961 * This is useful for netstat(1) to keep track of which interface 962 * is which. 963 */ 964 if ((ifa != 0) && (ifa->ifa_addr != 0)) { 965 /* 966 * Fill in the link-level address for this interface 967 */ 968 sdl = (struct sockaddr_dl *)ifa->ifa_addr; 969 sdl->sdl_type = IFT_ETHER; 970 sdl->sdl_alen = ETHER_ADDR_LEN; 971 sdl->sdl_slen = 0; 972 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); 973 } 974 975 /* 976 * Print additional info when attached 977 */ 978 printf("ed%d: address %s, ", isa_dev->id_unit, 979 ether_sprintf(sc->arpcom.ac_enaddr)); 980 981 if (sc->type_str && (*sc->type_str != 0)) 982 printf("type %s ", sc->type_str); 983 else 984 printf("type unknown (0x%x) ", sc->type); 985 986 printf("%s ",sc->isa16bit ? "(16 bit)" : "(8 bit)"); 987 988 printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && 989 (ifp->if_flags & IFF_ALTPHYS)) ? "tranceiver disabled" : ""); 990 991 /* 992 * If BPF is in the kernel, call the attach for it 993 */ 994#if NBPFILTER > 0 995 bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 996#endif 997 998} 999 1000/* 1001 * Reset interface. 1002 */ 1003int 1004ed_reset(unit) 1005 int unit; 1006{ 1007 int s; 1008 1009 s = splnet(); 1010 1011 /* 1012 * Stop interface and re-initialize. 1013 */ 1014 ed_stop(unit); 1015 ed_init(unit); 1016 1017 (void) splx(s); 1018} 1019 1020/* 1021 * Take interface offline. 1022 */ 1023void 1024ed_stop(unit) 1025 int unit; 1026{ 1027 struct ed_softc *sc = &ed_softc[unit]; 1028 int n = 5000; 1029 1030 /* 1031 * Stop everything on the interface, and select page 0 registers. 1032 */ 1033 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); 1034 1035 /* 1036 * Wait for interface to enter stopped state, but limit # of checks 1037 * to 'n' (about 5ms). It shouldn't even take 5us on modern 1038 * DS8390's, but just in case it's an old one. 1039 */ 1040 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); 1041 1042} 1043 1044/* 1045 * Device timeout/watchdog routine. Entered if the device neglects to 1046 * generate an interrupt after a transmit has been started on it. 1047 */ 1048int 1049ed_watchdog(unit) 1050 int unit; 1051{ 1052 log(LOG_ERR, "ed%d: device timeout\n", unit); 1053 1054 ed_reset(unit); 1055} 1056 1057/* 1058 * Initialize device. 1059 */ 1060ed_init(unit) 1061 int unit; 1062{ 1063 struct ed_softc *sc = &ed_softc[unit]; 1064 struct ifnet *ifp = &sc->arpcom.ac_if; 1065 int i, s; 1066 u_char command; 1067 1068 1069 /* address not known */ 1070 if (ifp->if_addrlist == (struct ifaddr *)0) return; 1071 1072 /* 1073 * Initialize the NIC in the exact order outlined in the NS manual. 1074 * This init procedure is "mandatory"...don't change what or when 1075 * things happen. 1076 */ 1077 s = splnet(); 1078 1079 /* reset transmitter flags */ 1080 sc->xmit_busy = 0; 1081 sc->arpcom.ac_if.if_timer = 0; 1082 1083 sc->txb_inuse = 0; 1084 sc->txb_new = 0; 1085 sc->txb_next_tx = 0; 1086 1087 /* This variable is used below - don't move this assignment */ 1088 sc->next_packet = sc->rec_page_start + 1; 1089 1090 /* 1091 * Set interface for page 0, Remote DMA complete, Stopped 1092 */ 1093 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); 1094 1095 if (sc->isa16bit) { 1096 /* 1097 * Set FIFO threshold to 8, No auto-init Remote DMA, 1098 * byte order=80x86, word-wide DMA xfers, 1099 */ 1100 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS); 1101 } else { 1102 /* 1103 * Same as above, but byte-wide DMA xfers 1104 */ 1105 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); 1106 } 1107 1108 /* 1109 * Clear Remote Byte Count Registers 1110 */ 1111 outb(sc->nic_addr + ED_P0_RBCR0, 0); 1112 outb(sc->nic_addr + ED_P0_RBCR1, 0); 1113 1114 /* 1115 * Enable reception of broadcast packets 1116 */ 1117 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); 1118 1119 /* 1120 * Place NIC in internal loopback mode 1121 */ 1122 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0); 1123 1124 /* 1125 * Initialize transmit/receive (ring-buffer) Page Start 1126 */ 1127 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start); 1128 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start); 1129 1130 /* 1131 * Initialize Receiver (ring-buffer) Page Stop and Boundry 1132 */ 1133 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop); 1134 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start); 1135 1136 /* 1137 * Clear all interrupts. A '1' in each bit position clears the 1138 * corresponding flag. 1139 */ 1140 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1141 1142 /* 1143 * Enable the following interrupts: receive/transmit complete, 1144 * receive/transmit error, and Receiver OverWrite. 1145 * 1146 * Counter overflow and Remote DMA complete are *not* enabled. 1147 */ 1148 outb(sc->nic_addr + ED_P0_IMR, 1149 ED_IMR_PRXE|ED_IMR_PTXE|ED_IMR_RXEE|ED_IMR_TXEE|ED_IMR_OVWE); 1150 1151 /* 1152 * Program Command Register for page 1 1153 */ 1154 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STP); 1155 1156 /* 1157 * Copy out our station address 1158 */ 1159 for (i = 0; i < ETHER_ADDR_LEN; ++i) 1160 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); 1161 1162#if NBPFILTER > 0 1163 /* 1164 * Initialize multicast address hashing registers to accept 1165 * all multicasts (only used when in promiscuous mode) 1166 */ 1167 for (i = 0; i < 8; ++i) 1168 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); 1169#endif 1170 1171 /* 1172 * Set Current Page pointer to next_packet (initialized above) 1173 */ 1174 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); 1175 1176 /* 1177 * Set Command Register for page 0, Remote DMA complete, 1178 * and interface Start. 1179 */ 1180 outb(sc->nic_addr + ED_P1_CR, ED_CR_RD2|ED_CR_STA); 1181 1182 /* 1183 * Take interface out of loopback 1184 */ 1185 outb(sc->nic_addr + ED_P0_TCR, 0); 1186 1187 /* 1188 * If this is a 3Com board, the tranceiver must be software enabled 1189 * (there is no settable hardware default). 1190 */ 1191 if (sc->vendor == ED_VENDOR_3COM) { 1192 if (ifp->if_flags & IFF_ALTPHYS) { 1193 outb(sc->asic_addr + ED_3COM_CR, 0); 1194 } else { 1195 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 1196 } 1197 } 1198 1199 /* 1200 * Set 'running' flag, and clear output active flag. 1201 */ 1202 ifp->if_flags |= IFF_RUNNING; 1203 ifp->if_flags &= ~IFF_OACTIVE; 1204 1205 /* 1206 * ...and attempt to start output 1207 */ 1208 ed_start(ifp); 1209 1210 (void) splx(s); 1211} 1212 1213/* 1214 * This routine actually starts the transmission on the interface 1215 */ 1216static inline void ed_xmit(ifp) 1217 struct ifnet *ifp; 1218{ 1219 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 1220 unsigned short len; 1221 1222 len = sc->txb_len[sc->txb_next_tx]; 1223 1224 /* 1225 * Set NIC for page 0 register access 1226 */ 1227 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 1228 1229 /* 1230 * Set TX buffer start page 1231 */ 1232 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + 1233 sc->txb_next_tx * ED_TXBUF_SIZE); 1234 1235 /* 1236 * Set TX length 1237 */ 1238 outb(sc->nic_addr + ED_P0_TBCR0, len); 1239 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8); 1240 1241 /* 1242 * Set page 0, Remote DMA complete, Transmit Packet, and *Start* 1243 */ 1244 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_TXP|ED_CR_STA); 1245 1246 sc->xmit_busy = 1; 1247 1248 /* 1249 * Point to next transmit buffer slot and wrap if necessary. 1250 */ 1251 sc->txb_next_tx++; 1252 if (sc->txb_next_tx == sc->txb_cnt) 1253 sc->txb_next_tx = 0; 1254 1255 /* 1256 * Set a timer just in case we never hear from the board again 1257 */ 1258 ifp->if_timer = 2; 1259} 1260 1261/* 1262 * Start output on interface. 1263 * We make two assumptions here: 1264 * 1) that the current priority is set to splnet _before_ this code 1265 * is called *and* is returned to the appropriate priority after 1266 * return 1267 * 2) that the IFF_OACTIVE flag is checked before this code is called 1268 * (i.e. that the output part of the interface is idle) 1269 */ 1270int 1271ed_start(ifp) 1272 struct ifnet *ifp; 1273{ 1274 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 1275 struct mbuf *m0, *m; 1276 caddr_t buffer; 1277 int len; 1278 1279outloop: 1280 /* 1281 * First, see if there are buffered packets and an idle 1282 * transmitter - should never happen at this point. 1283 */ 1284 if (sc->txb_inuse && (sc->xmit_busy == 0)) { 1285 printf("ed: packets buffers, but transmitter idle\n"); 1286 ed_xmit(ifp); 1287 } 1288 1289 /* 1290 * See if there is room to put another packet in the buffer. 1291 */ 1292 if (sc->txb_inuse == sc->txb_cnt) { 1293 /* 1294 * No room. Indicate this to the outside world 1295 * and exit. 1296 */ 1297 ifp->if_flags |= IFF_OACTIVE; 1298 return; 1299 } 1300 1301 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 1302 if (m == 0) { 1303 /* 1304 * We are using the !OACTIVE flag to indicate to the outside 1305 * world that we can accept an additional packet rather than 1306 * that the transmitter is _actually_ active. Indeed, the 1307 * transmitter may be active, but if we haven't filled all 1308 * the buffers with data then we still want to accept more. 1309 */ 1310 ifp->if_flags &= ~IFF_OACTIVE; 1311 return; 1312 } 1313 1314 /* 1315 * Copy the mbuf chain into the transmit buffer 1316 */ 1317 1318 /* txb_new points to next open buffer slot */ 1319 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); 1320 1321 if (sc->mem_shared) { 1322 /* 1323 * Special case setup for 16 bit boards... 1324 */ 1325 if (sc->isa16bit) { 1326 switch (sc->vendor) { 1327 /* 1328 * For 16bit 3Com boards (which have 16k of memory), 1329 * we have the xmit buffers in a different page 1330 * of memory ('page 0') - so change pages. 1331 */ 1332 case ED_VENDOR_3COM: 1333 outb(sc->asic_addr + ED_3COM_GACFR, 1334 ED_3COM_GACFR_RSEL); 1335 break; 1336 /* 1337 * Enable 16bit access to shared memory on WD/SMC boards 1338 * Don't update wd_laar_proto because we want to restore the 1339 * previous state (because an arp reply in the input code 1340 * may cause a call-back to ed_start) 1341 * XXX - the call-back to 'start' is a bug, IMHO. 1342 */ 1343 case ED_VENDOR_WD_SMC: 1344 outb(sc->asic_addr + ED_WD_LAAR, 1345 (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); 1346 } 1347 } 1348 1349 for (len = 0, m0 = m; m != 0; m = m->m_next) { 1350 bcopy(mtod(m, caddr_t), buffer, m->m_len); 1351 buffer += m->m_len; 1352 len += m->m_len; 1353 } 1354 1355 /* 1356 * Restore previous shared memory access 1357 */ 1358 if (sc->isa16bit) { 1359 switch (sc->vendor) { 1360 case ED_VENDOR_3COM: 1361 outb(sc->asic_addr + ED_3COM_GACFR, 1362 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); 1363 break; 1364 case ED_VENDOR_WD_SMC: 1365 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); 1366 break; 1367 } 1368 } 1369 } else { 1370 len = ed_pio_write_mbufs(sc, m0 = m, buffer); 1371 } 1372 1373 sc->txb_len[sc->txb_new] = MAX(len, ETHER_MIN_LEN); 1374 1375 sc->txb_inuse++; 1376 1377 /* 1378 * Point to next buffer slot and wrap if necessary. 1379 */ 1380 sc->txb_new++; 1381 if (sc->txb_new == sc->txb_cnt) 1382 sc->txb_new = 0; 1383 1384 if (sc->xmit_busy == 0) 1385 ed_xmit(ifp); 1386 /* 1387 * If there is BPF support in the configuration, tap off here. 1388 * The following has support for converting trailer packets 1389 * back to normal. 1390 * XXX - support for trailer packets in BPF should be moved into 1391 * the bpf code proper to avoid code duplication in all of 1392 * the drivers. 1393 */ 1394#if NBPFILTER > 0 1395 if (sc->bpf) { 1396 u_short etype; 1397 int off, datasize, resid; 1398 struct ether_header *eh; 1399 struct trailer_header trailer_header; 1400 char ether_packet[ETHER_MAX_LEN]; 1401 char *ep; 1402 1403 ep = ether_packet; 1404 1405 /* 1406 * We handle trailers below: 1407 * Copy ether header first, then residual data, 1408 * then data. Put all this in a temporary buffer 1409 * 'ether_packet' and send off to bpf. Since the 1410 * system has generated this packet, we assume 1411 * that all of the offsets in the packet are 1412 * correct; if they're not, the system will almost 1413 * certainly crash in m_copydata. 1414 * We make no assumptions about how the data is 1415 * arranged in the mbuf chain (i.e. how much 1416 * data is in each mbuf, if mbuf clusters are 1417 * used, etc.), which is why we use m_copydata 1418 * to get the ether header rather than assume 1419 * that this is located in the first mbuf. 1420 */ 1421 /* copy ether header */ 1422 m_copydata(m0, 0, sizeof(struct ether_header), ep); 1423 eh = (struct ether_header *) ep; 1424 ep += sizeof(struct ether_header); 1425 etype = ntohs(eh->ether_type); 1426 if (etype >= ETHERTYPE_TRAIL && 1427 etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 1428 datasize = ((etype - ETHERTYPE_TRAIL) << 9); 1429 off = datasize + sizeof(struct ether_header); 1430 1431 /* copy trailer_header into a data structure */ 1432 m_copydata(m0, off, sizeof(struct trailer_header), 1433 &trailer_header.ether_type); 1434 1435 /* copy residual data */ 1436 m_copydata(m0, off+sizeof(struct trailer_header), 1437 resid = ntohs(trailer_header.ether_residual) - 1438 sizeof(struct trailer_header), ep); 1439 ep += resid; 1440 1441 /* copy data */ 1442 m_copydata(m0, sizeof(struct ether_header), 1443 datasize, ep); 1444 ep += datasize; 1445 1446 /* restore original ether packet type */ 1447 eh->ether_type = trailer_header.ether_type; 1448 1449 bpf_tap(sc->bpf, ether_packet, ep - ether_packet); 1450 } else 1451 bpf_mtap(sc->bpf, m0); 1452 } 1453#endif 1454 1455 m_freem(m0); 1456 1457 /* 1458 * Loop back to the top to possibly buffer more packets 1459 */ 1460 goto outloop; 1461} 1462 1463/* 1464 * Ethernet interface receiver interrupt. 1465 */ 1466static inline void 1467ed_rint(unit) 1468 int unit; 1469{ 1470 register struct ed_softc *sc = &ed_softc[unit]; 1471 u_char boundry, current; 1472 u_short len; 1473 struct ed_ring packet_hdr; 1474 char *packet_ptr; 1475 1476 /* 1477 * Set NIC to page 1 registers to get 'current' pointer 1478 */ 1479 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); 1480 1481 /* 1482 * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e. 1483 * it points to where new data has been buffered. The 'CURR' 1484 * (current) register points to the logical end of the ring-buffer 1485 * - i.e. it points to where additional new data will be added. 1486 * We loop here until the logical beginning equals the logical 1487 * end (or in other words, until the ring-buffer is empty). 1488 */ 1489 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { 1490 1491 /* get pointer to this buffer's header structure */ 1492 packet_ptr = sc->mem_ring + 1493 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; 1494 1495 /* 1496 * The byte count includes the FCS - Frame Check Sequence (a 1497 * 32 bit CRC). 1498 */ 1499 if (sc->mem_shared) 1500 packet_hdr = *(struct ed_ring *)packet_ptr; 1501 else 1502 ed_pio_readmem(sc, packet_ptr, (char *) &packet_hdr, 1503 sizeof(packet_hdr)); 1504 len = packet_hdr.count; 1505 if ((len >= ETHER_MIN_LEN) && (len <= ETHER_MAX_LEN)) { 1506 /* 1507 * Go get packet. len - 4 removes CRC from length. 1508 */ 1509 ed_get_packet(sc, packet_ptr + 4, len - 4); 1510 ++sc->arpcom.ac_if.if_ipackets; 1511 } else { 1512 /* 1513 * Really BAD...probably indicates that the ring pointers 1514 * are corrupted. Also seen on early rev chips under 1515 * high load - the byte order of the length gets switched. 1516 */ 1517 log(LOG_ERR, 1518 "ed%d: NIC memory corrupt - invalid packet length %d\n", 1519 unit, len); 1520 ed_reset(unit); 1521 return; 1522 } 1523 1524 /* 1525 * Update next packet pointer 1526 */ 1527 sc->next_packet = packet_hdr.next_packet; 1528 1529 /* 1530 * Update NIC boundry pointer - being careful to keep it 1531 * one buffer behind. (as recommended by NS databook) 1532 */ 1533 boundry = sc->next_packet - 1; 1534 if (boundry < sc->rec_page_start) 1535 boundry = sc->rec_page_stop - 1; 1536 1537 /* 1538 * Set NIC to page 0 registers to update boundry register 1539 */ 1540 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 1541 1542 outb(sc->nic_addr + ED_P0_BNRY, boundry); 1543 1544 /* 1545 * Set NIC to page 1 registers before looping to top (prepare to 1546 * get 'CURR' current pointer) 1547 */ 1548 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); 1549 } 1550} 1551 1552/* 1553 * Ethernet interface interrupt processor 1554 */ 1555int 1556edintr(unit) 1557 int unit; 1558{ 1559 struct ed_softc *sc = &ed_softc[unit]; 1560 u_char isr; 1561 1562 /* 1563 * Set NIC to page 0 registers 1564 */ 1565 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 1566 1567 /* 1568 * loop until there are no more new interrupts 1569 */ 1570 while (isr = inb(sc->nic_addr + ED_P0_ISR)) { 1571 1572 /* 1573 * reset all the bits that we are 'acknowledging' 1574 * by writing a '1' to each bit position that was set 1575 * (writing a '1' *clears* the bit) 1576 */ 1577 outb(sc->nic_addr + ED_P0_ISR, isr); 1578 1579 /* 1580 * Handle transmitter interrupts. Handle these first 1581 * because the receiver will reset the board under 1582 * some conditions. 1583 */ 1584 if (isr & (ED_ISR_PTX|ED_ISR_TXE)) { 1585 u_char collisions = inb(sc->nic_addr + ED_P0_NCR); 1586 1587 /* 1588 * Check for transmit error. If a TX completed with an 1589 * error, we end up throwing the packet away. Really 1590 * the only error that is possible is excessive 1591 * collisions, and in this case it is best to allow the 1592 * automatic mechanisms of TCP to backoff the flow. Of 1593 * course, with UDP we're screwed, but this is expected 1594 * when a network is heavily loaded. 1595 */ 1596 if (isr & ED_ISR_TXE) { 1597 1598 /* 1599 * Excessive collisions (16) 1600 */ 1601 if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) 1602 && (collisions == 0)) { 1603 /* 1604 * When collisions total 16, the 1605 * P0_NCR will indicate 0, and the 1606 * TSR_ABT is set. 1607 */ 1608 collisions = 16; 1609 } 1610 1611 /* 1612 * update output errors counter 1613 */ 1614 ++sc->arpcom.ac_if.if_oerrors; 1615 } else { 1616 /* 1617 * Update total number of successfully 1618 * transmitted packets. 1619 */ 1620 ++sc->arpcom.ac_if.if_opackets; 1621 } 1622 1623 /* 1624 * reset tx busy and output active flags 1625 */ 1626 sc->xmit_busy = 0; 1627 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 1628 1629 /* 1630 * clear watchdog timer 1631 */ 1632 sc->arpcom.ac_if.if_timer = 0; 1633 1634 /* 1635 * Add in total number of collisions on last 1636 * transmission. 1637 */ 1638 sc->arpcom.ac_if.if_collisions += collisions; 1639 1640 /* 1641 * Decrement buffer in-use count if not zero (can only 1642 * be zero if a transmitter interrupt occured while 1643 * not actually transmitting). 1644 * If data is ready to transmit, start it transmitting, 1645 * otherwise defer until after handling receiver 1646 */ 1647 if (sc->txb_inuse && --sc->txb_inuse) 1648 ed_xmit(&sc->arpcom.ac_if); 1649 } 1650 1651 /* 1652 * Handle receiver interrupts 1653 */ 1654 if (isr & (ED_ISR_PRX|ED_ISR_RXE|ED_ISR_OVW)) { 1655 /* 1656 * Overwrite warning. In order to make sure that a lockup 1657 * of the local DMA hasn't occurred, we reset and 1658 * re-init the NIC. The NSC manual suggests only a 1659 * partial reset/re-init is necessary - but some 1660 * chips seem to want more. The DMA lockup has been 1661 * seen only with early rev chips - Methinks this 1662 * bug was fixed in later revs. -DG 1663 */ 1664 if (isr & ED_ISR_OVW) { 1665 ++sc->arpcom.ac_if.if_ierrors; 1666#ifdef DIAGNOSTIC 1667 log(LOG_WARNING, 1668 "ed%d: warning - receiver ring buffer overrun\n", 1669 unit); 1670#endif 1671 /* 1672 * Stop/reset/re-init NIC 1673 */ 1674 ed_reset(unit); 1675 } else { 1676 1677 /* 1678 * Receiver Error. One or more of: CRC error, frame 1679 * alignment error FIFO overrun, or missed packet. 1680 */ 1681 if (isr & ED_ISR_RXE) { 1682 ++sc->arpcom.ac_if.if_ierrors; 1683#ifdef ED_DEBUG 1684 printf("ed%d: receive error %x\n", unit, 1685 inb(sc->nic_addr + ED_P0_RSR)); 1686#endif 1687 } 1688 1689 /* 1690 * Go get the packet(s) 1691 * XXX - Doing this on an error is dubious 1692 * because there shouldn't be any data to 1693 * get (we've configured the interface to 1694 * not accept packets with errors). 1695 */ 1696 1697 /* 1698 * Enable 16bit access to shared memory first 1699 * on WD/SMC boards. 1700 */ 1701 if (sc->isa16bit && 1702 (sc->vendor == ED_VENDOR_WD_SMC)) { 1703 1704 outb(sc->asic_addr + ED_WD_LAAR, 1705 (sc->wd_laar_proto |= 1706 ED_WD_LAAR_M16EN)); 1707 } 1708 1709 ed_rint (unit); 1710 1711 /* disable 16bit access */ 1712 if (sc->isa16bit && 1713 (sc->vendor == ED_VENDOR_WD_SMC)) { 1714 1715 outb(sc->asic_addr + ED_WD_LAAR, 1716 (sc->wd_laar_proto &= 1717 ~ED_WD_LAAR_M16EN)); 1718 } 1719 } 1720 } 1721 1722 /* 1723 * If it looks like the transmitter can take more data, 1724 * attempt to start output on the interface. 1725 * This is done after handling the receiver to 1726 * give the receiver priority. 1727 */ 1728 if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) 1729 ed_start(&sc->arpcom.ac_if); 1730 1731 /* 1732 * return NIC CR to standard state: page 0, remote DMA complete, 1733 * start (toggling the TXP bit off, even if was just set 1734 * in the transmit routine, is *okay* - it is 'edge' 1735 * triggered from low to high) 1736 */ 1737 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 1738 1739 /* 1740 * If the Network Talley Counters overflow, read them to 1741 * reset them. It appears that old 8390's won't 1742 * clear the ISR flag otherwise - resulting in an 1743 * infinite loop. 1744 */ 1745 if (isr & ED_ISR_CNT) { 1746 (void) inb(sc->nic_addr + ED_P0_CNTR0); 1747 (void) inb(sc->nic_addr + ED_P0_CNTR1); 1748 (void) inb(sc->nic_addr + ED_P0_CNTR2); 1749 } 1750 } 1751} 1752 1753/* 1754 * Process an ioctl request. This code needs some work - it looks 1755 * pretty ugly. 1756 */ 1757int 1758ed_ioctl(ifp, command, data) 1759 register struct ifnet *ifp; 1760 int command; 1761 caddr_t data; 1762{ 1763 register struct ifaddr *ifa = (struct ifaddr *)data; 1764 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 1765 struct ifreq *ifr = (struct ifreq *)data; 1766 int s, error = 0; 1767 1768 s = splnet(); 1769 1770 switch (command) { 1771 1772 case SIOCSIFADDR: 1773 ifp->if_flags |= IFF_UP; 1774 1775 switch (ifa->ifa_addr->sa_family) { 1776#ifdef INET 1777 case AF_INET: 1778 ed_init(ifp->if_unit); /* before arpwhohas */ 1779 /* 1780 * See if another station has *our* IP address. 1781 * i.e.: There is an address conflict! If a 1782 * conflict exists, a message is sent to the 1783 * console. 1784 */ 1785 ((struct arpcom *)ifp)->ac_ipaddr = 1786 IA_SIN(ifa)->sin_addr; 1787 arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); 1788 break; 1789#endif 1790#ifdef NS 1791 /* 1792 * XXX - This code is probably wrong 1793 */ 1794 case AF_NS: 1795 { 1796 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 1797 1798 if (ns_nullhost(*ina)) 1799 ina->x_host = 1800 *(union ns_host *)(sc->arpcom.ac_enaddr); 1801 else { 1802 /* 1803 * 1804 */ 1805 bcopy((caddr_t)ina->x_host.c_host, 1806 (caddr_t)sc->arpcom.ac_enaddr, 1807 sizeof(sc->arpcom.ac_enaddr)); 1808 } 1809 /* 1810 * Set new address 1811 */ 1812 ed_init(ifp->if_unit); 1813 break; 1814 } 1815#endif 1816 default: 1817 ed_init(ifp->if_unit); 1818 break; 1819 } 1820 break; 1821 1822 case SIOCSIFFLAGS: 1823 /* 1824 * If interface is marked down and it is running, then stop it 1825 */ 1826 if (((ifp->if_flags & IFF_UP) == 0) && 1827 (ifp->if_flags & IFF_RUNNING)) { 1828 ed_stop(ifp->if_unit); 1829 ifp->if_flags &= ~IFF_RUNNING; 1830 } else { 1831 /* 1832 * If interface is marked up and it is stopped, then start it 1833 */ 1834 if ((ifp->if_flags & IFF_UP) && 1835 ((ifp->if_flags & IFF_RUNNING) == 0)) 1836 ed_init(ifp->if_unit); 1837 } 1838#if NBPFILTER > 0 1839 if (ifp->if_flags & IFF_PROMISC) { 1840 /* 1841 * Set promiscuous mode on interface. 1842 * XXX - for multicasts to work, we would need to 1843 * write 1's in all bits of multicast 1844 * hashing array. For now we assume that 1845 * this was done in ed_init(). 1846 */ 1847 outb(sc->nic_addr + ED_P0_RCR, 1848 ED_RCR_PRO|ED_RCR_AM|ED_RCR_AB); 1849 } else { 1850 /* 1851 * XXX - for multicasts to work, we would need to 1852 * rewrite the multicast hashing array with the 1853 * proper hash (would have been destroyed above). 1854 */ 1855 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); 1856 } 1857#endif 1858 /* 1859 * An unfortunate hack to provide the (required) software control 1860 * of the tranceiver for 3Com boards. The ALTPHYS flag disables 1861 * the tranceiver if set. 1862 */ 1863 if (sc->vendor == ED_VENDOR_3COM) { 1864 if (ifp->if_flags & IFF_ALTPHYS) { 1865 outb(sc->asic_addr + ED_3COM_CR, 0); 1866 } else { 1867 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 1868 } 1869 } 1870 1871 break; 1872 1873 default: 1874 error = EINVAL; 1875 } 1876 (void) splx(s); 1877 return (error); 1878} 1879 1880/* 1881 * Macro to calculate a new address within shared memory when given an offset 1882 * from an address, taking into account ring-wrap. 1883 */ 1884#define ringoffset(sc, start, off, type) \ 1885 ((type)( ((caddr_t)(start)+(off) >= (sc)->mem_end) ? \ 1886 (((caddr_t)(start)+(off))) - (sc)->mem_end \ 1887 + (sc)->mem_ring: \ 1888 ((caddr_t)(start)+(off)) )) 1889 1890/* 1891 * Retreive packet from shared memory and send to the next level up via 1892 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 1893 */ 1894ed_get_packet(sc, buf, len) 1895 struct ed_softc *sc; 1896 char *buf; 1897 u_short len; 1898{ 1899 struct ether_header *eh; 1900 struct mbuf *m, *head, *ed_ring_to_mbuf(); 1901 u_short off; 1902 int resid; 1903 u_short etype; 1904 struct trailer_header trailer_header; 1905 1906 /* Allocate a header mbuf */ 1907 MGETHDR(m, M_DONTWAIT, MT_DATA); 1908 if (m == 0) 1909 goto bad; 1910 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 1911 m->m_pkthdr.len = len; 1912 m->m_len = 0; 1913 head = m; 1914 1915 /* The following sillines is to make NFS happy */ 1916#define EROUND ((sizeof(struct ether_header) + 3) & ~3) 1917#define EOFF (EROUND - sizeof(struct ether_header)) 1918 1919 /* 1920 * The following assumes there is room for 1921 * the ether header in the header mbuf 1922 */ 1923 head->m_data += EOFF; 1924 eh = mtod(head, struct ether_header *); 1925 1926 if (sc->mem_shared) 1927 bcopy(buf, mtod(head, caddr_t), sizeof(struct ether_header)); 1928 else 1929 ed_pio_readmem(sc, buf, mtod(head, caddr_t), 1930 sizeof(struct ether_header)); 1931 buf += sizeof(struct ether_header); 1932 head->m_len += sizeof(struct ether_header); 1933 len -= sizeof(struct ether_header); 1934 1935 etype = ntohs((u_short)eh->ether_type); 1936 1937 /* 1938 * Deal with trailer protocol: 1939 * If trailer protocol, calculate the datasize as 'off', 1940 * which is also the offset to the trailer header. 1941 * Set resid to the amount of packet data following the 1942 * trailer header. 1943 * Finally, copy residual data into mbuf chain. 1944 */ 1945 if (etype >= ETHERTYPE_TRAIL && 1946 etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 1947 1948 off = (etype - ETHERTYPE_TRAIL) << 9; 1949 if ((off + sizeof(struct trailer_header)) > len) 1950 goto bad; /* insanity */ 1951 1952 /* 1953 * If we have shared memory, we can get info directly from the 1954 * stored packet, otherwise we must get a local copy 1955 * of the trailer header using PIO. 1956 */ 1957 if (sc->mem_shared) { 1958 eh->ether_type = *ringoffset(sc, buf, off, u_short *); 1959 resid = ntohs(*ringoffset(sc, buf, off+2, u_short *)); 1960 } else { 1961 struct trailer_header trailer_header; 1962 ed_pio_readmem(sc, 1963 ringoffset(sc, buf, off, caddr_t), 1964 (char *) &trailer_header, 1965 sizeof(trailer_header)); 1966 eh->ether_type = trailer_header.ether_type; 1967 resid = trailer_header.ether_residual; 1968 } 1969 1970 if ((off + resid) > len) goto bad; /* insanity */ 1971 1972 resid -= sizeof(struct trailer_header); 1973 if (resid < 0) goto bad; /* insanity */ 1974 1975 m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, char *), head, resid); 1976 if (m == 0) goto bad; 1977 1978 len = off; 1979 head->m_pkthdr.len -= 4; /* subtract trailer header */ 1980 } 1981 1982 /* 1983 * Pull packet off interface. Or if this was a trailer packet, 1984 * the data portion is appended. 1985 */ 1986 m = ed_ring_to_mbuf(sc, buf, m, len); 1987 if (m == 0) goto bad; 1988 1989#if NBPFILTER > 0 1990 /* 1991 * Check if there's a BPF listener on this interface. 1992 * If so, hand off the raw packet to bpf. 1993 */ 1994 if (sc->bpf) { 1995 bpf_mtap(sc->bpf, head); 1996 1997 /* 1998 * Note that the interface cannot be in promiscuous mode if 1999 * there are no BPF listeners. And if we are in promiscuous 2000 * mode, we have to check if this packet is really ours. 2001 * 2002 * XXX This test does not support multicasts. 2003 */ 2004 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && 2005 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, 2006 sizeof(eh->ether_dhost)) != 0 && 2007 bcmp(eh->ether_dhost, etherbroadcastaddr, 2008 sizeof(eh->ether_dhost)) != 0) { 2009 2010 m_freem(head); 2011 return; 2012 } 2013 } 2014#endif 2015 2016 /* 2017 * Fix up data start offset in mbuf to point past ether header 2018 */ 2019 m_adj(head, sizeof(struct ether_header)); 2020 2021 /* 2022 * silly ether_input routine needs 'type' in host byte order 2023 */ 2024 eh->ether_type = ntohs(eh->ether_type); 2025 2026 ether_input(&sc->arpcom.ac_if, eh, head); 2027 return; 2028 2029bad: if (head) 2030 m_freem(head); 2031 return; 2032} 2033 2034/* 2035 * Supporting routines 2036 */ 2037 2038/* 2039 * Given a NIC memory source address and a host memory destination 2040 * address, copy 'amount' from NIC to host using Programmed I/O. 2041 * The 'amount' is rounded up to a word - okay as long as mbufs 2042 * are word sized. 2043 * This routine is currently Novell-specific. 2044 */ 2045void 2046ed_pio_readmem(sc,src,dst,amount) 2047 struct ed_softc *sc; 2048 unsigned short src; 2049 unsigned char *dst; 2050 unsigned short amount; 2051{ 2052 unsigned short tmp_amount; 2053 2054 /* select page 0 registers */ 2055 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 2056 2057 /* round up to a word */ 2058 tmp_amount = amount; 2059 if (amount & 1) ++amount; 2060 2061 /* set up DMA byte count */ 2062 outb(sc->nic_addr + ED_P0_RBCR0, amount); 2063 outb(sc->nic_addr + ED_P0_RBCR1, amount>>8); 2064 2065 /* set up source address in NIC mem */ 2066 outb(sc->nic_addr + ED_P0_RSAR0, src); 2067 outb(sc->nic_addr + ED_P0_RSAR1, src>>8); 2068 2069 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); 2070 2071 if (sc->isa16bit) { 2072 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount/2); 2073 } else 2074 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); 2075 2076} 2077 2078/* 2079 * Stripped down routine for writing a linear buffer to NIC memory. 2080 * Only used in the probe routine to test the memory. 'len' must 2081 * be even. 2082 */ 2083void 2084ed_pio_writemem(sc,src,dst,len) 2085 struct ed_softc *sc; 2086 char *src; 2087 unsigned short dst; 2088 unsigned short len; 2089{ 2090 int maxwait=20; /* about 25us */ 2091 2092 /* select page 0 registers */ 2093 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 2094 2095 /* reset remote DMA complete flag */ 2096 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2097 2098 /* set up DMA byte count */ 2099 outb(sc->nic_addr + ED_P0_RBCR0, len); 2100 outb(sc->nic_addr + ED_P0_RBCR1, len>>8); 2101 2102 /* set up destination address in NIC mem */ 2103 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2104 outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); 2105 2106 /* set remote DMA write */ 2107 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2108 2109 if (sc->isa16bit) 2110 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len/2); 2111 else 2112 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); 2113 /* 2114 * Wait for remote DMA complete. This is necessary because on the 2115 * transmit side, data is handled internally by the NIC in bursts 2116 * and we can't start another remote DMA until this one completes. 2117 * Not waiting causes really bad things to happen - like the NIC 2118 * irrecoverably jamming the ISA bus. 2119 */ 2120 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2121} 2122 2123/* 2124 * Write an mbuf chain to the destination NIC memory address using 2125 * programmed I/O. 2126 */ 2127u_short 2128ed_pio_write_mbufs(sc,m,dst) 2129 struct ed_softc *sc; 2130 struct mbuf *m; 2131 unsigned short dst; 2132{ 2133 unsigned short len, mb_offset; 2134 struct mbuf *mp; 2135 unsigned char residual[2]; 2136 int maxwait=20; /* about 25us */ 2137 2138 /* First, count up the total number of bytes to copy */ 2139 for (len = 0, mp = m; mp; mp = mp->m_next) 2140 len += mp->m_len; 2141 2142 /* select page 0 registers */ 2143 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 2144 2145 /* reset remote DMA complete flag */ 2146 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2147 2148 /* set up DMA byte count */ 2149 outb(sc->nic_addr + ED_P0_RBCR0, len); 2150 outb(sc->nic_addr + ED_P0_RBCR1, len>>8); 2151 2152 /* set up destination address in NIC mem */ 2153 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2154 outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); 2155 2156 /* set remote DMA write */ 2157 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2158 2159 mb_offset = 0; 2160 /* 2161 * Transfer the mbuf chain to the NIC memory. 2162 * The following code isn't too pretty. The problem is that we can only 2163 * transfer words to the board, and if an mbuf has an odd number 2164 * of bytes in it, this is a problem. It's not a simple matter of 2165 * just removing a byte from the next mbuf (adjusting data++ and 2166 * len--) because this will hose-over the mbuf chain which might 2167 * be needed later for BPF. Instead, we maintain an offset 2168 * (mb_offset) which let's us skip over the first byte in the 2169 * following mbuf. 2170 */ 2171 while (m) { 2172 if (m->m_len - mb_offset) { 2173 if (sc->isa16bit) { 2174 if ((m->m_len - mb_offset) > 1) 2175 outsw(sc->asic_addr + ED_NOVELL_DATA, 2176 mtod(m, caddr_t) + mb_offset, 2177 (m->m_len - mb_offset) / 2); 2178 2179 /* 2180 * if odd number of bytes, get the odd byte from 2181 * the next mbuf with data 2182 */ 2183 if ((m->m_len - mb_offset) & 1) { 2184 /* first the last byte in current mbuf */ 2185 residual[0] = *(mtod(m, caddr_t) 2186 + m->m_len - 1); 2187 2188 /* advance past any empty mbufs */ 2189 while (m->m_next && (m->m_next->m_len == 0)) 2190 m = m->m_next; 2191 2192 if (m->m_next) { 2193 /* remove first byte in next mbuf */ 2194 residual[1] = *(mtod(m->m_next, caddr_t)); 2195 mb_offset = 1; 2196 } 2197 2198 outw(sc->asic_addr + ED_NOVELL_DATA, 2199 *((unsigned short *) residual)); 2200 } else 2201 mb_offset = 0; 2202 } else 2203 outsb(sc->asic_addr + ED_NOVELL_DATA, m->m_data, m->m_len); 2204 2205 } 2206 m = m->m_next; 2207 } 2208 2209 /* 2210 * Wait for remote DMA complete. This is necessary because on the 2211 * transmit side, data is handled internally by the NIC in bursts 2212 * and we can't start another remote DMA until this one completes. 2213 * Not waiting causes really bad things to happen - like the NIC 2214 * irrecoverably jamming the ISA bus. 2215 */ 2216 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2217 2218 if (!maxwait) { 2219 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n", 2220 sc->arpcom.ac_if.if_unit); 2221 /* attempt to abort the remote DMA */ 2222 outb(sc->nic_addr + ED_P0_RBCR0, 0); 2223 outb(sc->nic_addr + ED_P0_RBCR1, 0); 2224 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 2225 } 2226 2227 return(len); 2228} 2229 2230/* 2231 * Given a source and destination address, copy 'amount' of a packet from 2232 * the ring buffer into a linear destination buffer. Takes into account 2233 * ring-wrap. 2234 */ 2235static inline char * 2236ed_ring_copy(sc,src,dst,amount) 2237 struct ed_softc *sc; 2238 char *src; 2239 char *dst; 2240 u_short amount; 2241{ 2242 u_short tmp_amount; 2243 2244 /* does copy wrap to lower addr in ring buffer? */ 2245 if (src + amount > sc->mem_end) { 2246 tmp_amount = sc->mem_end - src; 2247 2248 /* copy amount up to end of NIC memory */ 2249 if (sc->mem_shared) 2250 bcopy(src,dst,tmp_amount); 2251 else 2252 ed_pio_readmem(sc,src,dst,tmp_amount); 2253 2254 amount -= tmp_amount; 2255 src = sc->mem_ring; 2256 dst += tmp_amount; 2257 } 2258 2259 if (sc->mem_shared) 2260 bcopy(src, dst, amount); 2261 else 2262 ed_pio_readmem(sc, src, dst, amount); 2263 2264 return(src + amount); 2265} 2266 2267/* 2268 * Copy data from receive buffer to end of mbuf chain 2269 * allocate additional mbufs as needed. return pointer 2270 * to last mbuf in chain. 2271 * sc = ed info (softc) 2272 * src = pointer in ed ring buffer 2273 * dst = pointer to last mbuf in mbuf chain to copy to 2274 * amount = amount of data to copy 2275 */ 2276struct mbuf * 2277ed_ring_to_mbuf(sc,src,dst,total_len) 2278 struct ed_softc *sc; 2279 char *src; 2280 struct mbuf *dst; 2281 u_short total_len; 2282{ 2283 register struct mbuf *m = dst; 2284 2285 while (total_len) { 2286 register u_short amount = min(total_len, M_TRAILINGSPACE(m)); 2287 2288 if (amount == 0) { /* no more data in this mbuf, alloc another */ 2289 /* 2290 * If there is enough data for an mbuf cluster, attempt 2291 * to allocate one of those, otherwise, a regular 2292 * mbuf will do. 2293 * Note that a regular mbuf is always required, even if 2294 * we get a cluster - getting a cluster does not 2295 * allocate any mbufs, and one is needed to assign 2296 * the cluster to. The mbuf that has a cluster 2297 * extension can not be used to contain data - only 2298 * the cluster can contain data. 2299 */ 2300 dst = m; 2301 MGET(m, M_DONTWAIT, MT_DATA); 2302 if (m == 0) 2303 return (0); 2304 2305 if (total_len >= MINCLSIZE) 2306 MCLGET(m, M_DONTWAIT); 2307 2308 m->m_len = 0; 2309 dst->m_next = m; 2310 amount = min(total_len, M_TRAILINGSPACE(m)); 2311 } 2312 2313 src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, amount); 2314 2315 m->m_len += amount; 2316 total_len -= amount; 2317 2318 } 2319 return (m); 2320} 2321#endif 2322