if_ed.c revision 15943
1/* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $Id: if_ed.c,v 1.98 1996/05/18 17:56:25 se Exp $ 28 */ 29 30/* 31 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 32 * adapters. By David Greenman, 29-April-1993 33 * 34 * Currently supports the Western Digital/SMC 8003 and 8013 series, 35 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, 36 * and a variety of similar clones. 37 * 38 */ 39 40#include "ed.h" 41#include "bpfilter.h" 42 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/conf.h> 46#include <sys/errno.h> 47#include <sys/ioctl.h> 48#include <sys/mbuf.h> 49#include <sys/socket.h> 50#include <sys/syslog.h> 51#include <sys/devconf.h> 52 53#include <net/if.h> 54#include <net/if_dl.h> 55#include <net/if_types.h> 56 57#ifdef INET 58#include <netinet/in.h> 59#include <netinet/in_systm.h> 60#include <netinet/in_var.h> 61#include <netinet/ip.h> 62#include <netinet/if_ether.h> 63#endif 64 65#ifdef IPX 66#include <netipx/ipx.h> 67#include <netipx/ipx_if.h> 68#endif 69 70#ifdef NS 71#include <netns/ns.h> 72#include <netns/ns_if.h> 73#endif 74 75#if NBPFILTER > 0 76#include <net/bpf.h> 77#include <net/bpfdesc.h> 78#endif 79 80#include <machine/clock.h> 81 82#include <i386/isa/isa.h> 83#include <i386/isa/isa_device.h> 84#include <i386/isa/icu.h> 85#include <i386/isa/if_edreg.h> 86 87/* 88 * ed_softc: per line info and status 89 */ 90struct ed_softc { 91 struct arpcom arpcom; /* ethernet common */ 92 93 char *type_str; /* pointer to type string */ 94 u_char vendor; /* interface vendor */ 95 u_char type; /* interface type code */ 96 u_char gone; /* HW missing, presumed having a good time */ 97 98 u_short asic_addr; /* ASIC I/O bus address */ 99 u_short nic_addr; /* NIC (DS8390) I/O bus address */ 100 101/* 102 * The following 'proto' variable is part of a work-around for 8013EBT asics 103 * being write-only. It's sort of a prototype/shadow of the real thing. 104 */ 105 u_char wd_laar_proto; 106 u_char cr_proto; 107 u_char isa16bit; /* width of access to card 0=8 or 1=16 */ 108 int is790; /* set by the probe code if the card is 790 109 * based */ 110 111 caddr_t mem_start; /* NIC memory start address */ 112 caddr_t mem_end; /* NIC memory end address */ 113 u_long mem_size; /* total NIC memory size */ 114 caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ 115 116 u_char mem_shared; /* NIC memory is shared with host */ 117 u_char xmit_busy; /* transmitter is busy */ 118 u_char txb_cnt; /* number of transmit buffers */ 119 u_char txb_inuse; /* number of TX buffers currently in-use */ 120 121 u_char txb_new; /* pointer to where new buffer will be added */ 122 u_char txb_next_tx; /* pointer to next buffer ready to xmit */ 123 u_short txb_len[8]; /* buffered xmit buffer lengths */ 124 u_char tx_page_start; /* first page of TX buffer area */ 125 u_char rec_page_start; /* first page of RX ring-buffer */ 126 u_char rec_page_stop; /* last page of RX ring-buffer */ 127 u_char next_packet; /* pointer to next unread RX packet */ 128 struct kern_devconf kdc; /* kernel configuration database info */ 129}; 130 131static struct ed_softc ed_softc[NED]; 132 133static int ed_attach __P((struct ed_softc *, int, int)); 134static int ed_attach_isa __P((struct isa_device *)); 135 136static void ed_init __P((struct ifnet *)); 137static int ed_ioctl __P((struct ifnet *, int, caddr_t)); 138static int ed_probe __P((struct isa_device *)); 139static void ed_start __P((struct ifnet *)); 140static void ed_reset __P((struct ifnet *)); 141static void ed_watchdog __P((struct ifnet *)); 142 143static void ed_stop __P((struct ed_softc *)); 144static int ed_probe_generic8390 __P((struct ed_softc *)); 145static int ed_probe_WD80x3 __P((struct isa_device *)); 146static int ed_probe_3Com __P((struct isa_device *)); 147static int ed_probe_Novell __P((struct isa_device *)); 148static int ed_probe_Novell_generic __P((struct ed_softc *, int, int, int)); 149 150#include "pci.h" 151#if NPCI > 0 152void *ed_attach_NE2000_pci __P((int, int)); 153#endif 154 155#include "crd.h" 156#if NCRD > 0 157static int ed_probe_pccard __P((struct isa_device *, u_char *)); 158#endif 159 160static void ds_getmcaf __P((struct ed_softc *, u_long *)); 161 162static void ed_get_packet(struct ed_softc *, char *, /* u_short */ int, int); 163 164static void ed_rint __P((struct ed_softc *)); 165static void ed_xmit __P((struct ed_softc *)); 166static char * ed_ring_copy __P((struct ed_softc *, char *, char *, 167 /* u_short */ int)); 168 169static void ed_pio_readmem __P((struct ed_softc *, int, unsigned char *, 170 /* u_short */ int)); 171static void ed_pio_writemem __P((struct ed_softc *, char *, 172 /* u_short */ int, /* u_short */ int)); 173static u_short ed_pio_write_mbufs __P((struct ed_softc *, struct mbuf *, 174 int)); 175 176static void ed_setrcr(struct ed_softc *); 177static u_long ds_crc(u_char *ep); 178 179#if NCRD > 0 180#include <sys/select.h> 181#include <pccard/card.h> 182#include <pccard/driver.h> 183#include <pccard/slot.h> 184 185/* 186 * PC-Card (PCMCIA) specific code. 187 */ 188static int card_intr(struct pccard_dev *); /* Interrupt handler */ 189static void edunload(struct pccard_dev *); /* Disable driver */ 190static void edsuspend(struct pccard_dev *); /* Suspend driver */ 191static int edinit(struct pccard_dev *, int); /* init device */ 192 193void edintr_sc __P((struct ed_softc *)); 194 195static struct pccard_drv ed_info = { 196 "ed", 197 card_intr, 198 edunload, 199 edsuspend, 200 edinit, 201 0, /* Attributes - presently unused */ 202 &net_imask /* Interrupt mask for device */ 203 /* XXX - Should this also include net_imask? */ 204}; 205 206/* 207 * Called when a power down is requested. Shuts down the 208 * device and configures the device as unavailable (but 209 * still loaded...). A resume is done by calling 210 * edinit with first=0. This is called when the user suspends 211 * the system, or the APM code suspends the system. 212 */ 213static void 214edsuspend(struct pccard_dev *dp) 215{ 216 printf("ed%d: suspending\n", dp->isahd.id_unit); 217} 218 219/* 220 * Initialize the device - called from Slot manager. 221 * If first is set, then check for the device's existence 222 * before initializing it. Once initialized, the device table may 223 * be set up. 224 */ 225static int 226edinit(struct pccard_dev *dp, int first) 227{ 228 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit]; 229 230 /* validate unit number. */ 231 if (first) { 232 if (dp->isahd.id_unit >= NED) 233 return(ENODEV); 234 /* 235 * Probe the device. If a value is returned, the 236 * device was found at the location. 237 */ 238 sc->gone = 0; 239 if (ed_probe_pccard(&dp->isahd,dp->misc)==0) 240 return(ENXIO); 241 if (ed_attach_isa(&dp->isahd)==0) 242 return(ENXIO); 243 } 244 /* 245 * XXX TODO: 246 * If it was initialized before, the device structure 247 * should also be initialized. We should 248 * reset (and possibly restart) the hardware, but 249 * I am not sure of the best way to do this... 250 */ 251 return(0); 252} 253 254/* 255 * edunload - unload the driver and clear the table. 256 * XXX TODO: 257 * This is usually called when the card is ejected, but 258 * can be caused by a modunload of a controller driver. 259 * The idea is to reset the driver's view of the device 260 * and ensure that any driver entry points such as 261 * read and write do not hang. 262 */ 263static void 264edunload(struct pccard_dev *dp) 265{ 266 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit]; 267 struct ifnet *ifp = &sc->arpcom.ac_if; 268 269 if (sc->kdc.kdc_state == DC_UNCONFIGURED) { 270 printf("ed%d: already unloaded\n", dp->isahd.id_unit); 271 return; 272 } 273 sc->kdc.kdc_state = DC_UNCONFIGURED; 274 ifp->if_flags &= ~IFF_RUNNING; 275 if_down(ifp); 276 sc->gone = 1; 277 printf("ed%d: unload\n", dp->isahd.id_unit); 278} 279 280/* 281 * card_intr - Shared interrupt called from 282 * front end of PC-Card handler. 283 */ 284static int 285card_intr(struct pccard_dev *dp) 286{ 287 edintr_sc(&ed_softc[dp->isahd.id_unit]); 288 return(1); 289} 290#endif /* NCRD > 0 */ 291 292struct isa_driver eddriver = { 293 ed_probe, 294 ed_attach_isa, 295 "ed", 296 1 /* We are ultra sensitive */ 297}; 298 299/* 300 * Interrupt conversion table for WD/SMC ASIC/83C584 301 * (IRQ* are defined in icu.h) 302 */ 303static unsigned short ed_intr_mask[] = { 304 IRQ9, 305 IRQ3, 306 IRQ5, 307 IRQ7, 308 IRQ10, 309 IRQ11, 310 IRQ15, 311 IRQ4 312}; 313 314/* 315 * Interrupt conversion table for 83C790 316 */ 317static unsigned short ed_790_intr_mask[] = { 318 0, 319 IRQ9, 320 IRQ3, 321 IRQ5, 322 IRQ7, 323 IRQ10, 324 IRQ11, 325 IRQ15 326}; 327 328#define ETHER_MIN_LEN 60 329#define ETHER_MAX_LEN 1514 330#define ETHER_ADDR_LEN 6 331#define ETHER_HDR_SIZE 14 332 333static struct kern_devconf kdc_ed_template = { 334 0, 0, 0, /* filled in by dev_attach */ 335 "ed", 0, { MDDT_ISA, 0, "net" }, 336 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN, 337 &kdc_isa0, /* parent */ 338 0, /* parentdata */ 339 DC_UNCONFIGURED, /* state */ 340 "", /* description */ 341 DC_CLS_NETIF /* class */ 342}; 343 344static inline void 345ed_registerdev(struct isa_device *id, const char *descr) 346{ 347 struct kern_devconf *kdc = &ed_softc[id->id_unit].kdc; 348 *kdc = kdc_ed_template; 349 kdc->kdc_unit = id->id_unit; 350 kdc->kdc_parentdata = id; 351 kdc->kdc_description = descr; 352 dev_attach(kdc); 353} 354 355/* 356 * Determine if the device is present 357 * 358 * on entry: 359 * a pointer to an isa_device struct 360 * on exit: 361 * NULL if device not found 362 * or # of i/o addresses used (if found) 363 */ 364static int 365ed_probe(isa_dev) 366 struct isa_device *isa_dev; 367{ 368 int nports; 369 370#if NCRD > 0 371 /* 372 * If PC-Card probe required, then register driver with 373 * slot manager. 374 */ 375 pccard_add_driver(&ed_info); 376#endif 377 378#ifndef DEV_LKM 379 ed_registerdev(isa_dev, "Ethernet adapter"); 380#endif /* not DEV_LKM */ 381 382 nports = ed_probe_WD80x3(isa_dev); 383 if (nports) 384 return (nports); 385 386 nports = ed_probe_3Com(isa_dev); 387 if (nports) 388 return (nports); 389 390 nports = ed_probe_Novell(isa_dev); 391 if (nports) 392 return (nports); 393 394 return (0); 395} 396 397/* 398 * Generic probe routine for testing for the existance of a DS8390. 399 * Must be called after the NIC has just been reset. This routine 400 * works by looking at certain register values that are guaranteed 401 * to be initialized a certain way after power-up or reset. Seems 402 * not to currently work on the 83C690. 403 * 404 * Specifically: 405 * 406 * Register reset bits set bits 407 * Command Register (CR) TXP, STA RD2, STP 408 * Interrupt Status (ISR) RST 409 * Interrupt Mask (IMR) All bits 410 * Data Control (DCR) LAS 411 * Transmit Config. (TCR) LB1, LB0 412 * 413 * We only look at the CR and ISR registers, however, because looking at 414 * the others would require changing register pages (which would be 415 * intrusive if this isn't an 8390). 416 * 417 * Return 1 if 8390 was found, 0 if not. 418 */ 419 420static int 421ed_probe_generic8390(sc) 422 struct ed_softc *sc; 423{ 424 if ((inb(sc->nic_addr + ED_P0_CR) & 425 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 426 (ED_CR_RD2 | ED_CR_STP)) 427 return (0); 428 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) 429 return (0); 430 431 return (1); 432} 433 434/* 435 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards 436 */ 437static int 438ed_probe_WD80x3(isa_dev) 439 struct isa_device *isa_dev; 440{ 441 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 442 int i; 443 u_int memsize; 444 u_char iptr, isa16bit, sum; 445 446 sc->asic_addr = isa_dev->id_iobase; 447 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; 448 sc->is790 = 0; 449 450#ifdef TOSH_ETHER 451 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW); 452 DELAY(10000); 453#endif 454 455 /* 456 * Attempt to do a checksum over the station address PROM. If it 457 * fails, it's probably not a SMC/WD board. There is a problem with 458 * this, though: some clone WD boards don't pass the checksum test. 459 * Danpex boards for one. 460 */ 461 for (sum = 0, i = 0; i < 8; ++i) 462 sum += inb(sc->asic_addr + ED_WD_PROM + i); 463 464 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) { 465 466 /* 467 * Checksum is invalid. This often happens with cheap WD8003E 468 * clones. In this case, the checksum byte (the eighth byte) 469 * seems to always be zero. 470 */ 471 if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E || 472 inb(sc->asic_addr + ED_WD_PROM + 7) != 0) 473 return (0); 474 } 475 /* reset card to force it into a known state. */ 476#ifdef TOSH_ETHER 477 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW); 478#else 479 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST); 480#endif 481 DELAY(100); 482 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); 483 /* wait in the case this card is reading it's EEROM */ 484 DELAY(5000); 485 486 sc->vendor = ED_VENDOR_WD_SMC; 487 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID); 488 489 /* 490 * Set initial values for width/size. 491 */ 492 memsize = 8192; 493 isa16bit = 0; 494 switch (sc->type) { 495 case ED_TYPE_WD8003S: 496 sc->type_str = "WD8003S"; 497 sc->kdc.kdc_description = "Ethernet adapter: WD 8003S"; 498 break; 499 case ED_TYPE_WD8003E: 500 sc->type_str = "WD8003E"; 501 sc->kdc.kdc_description = "Ethernet adapter: WD 8003E"; 502 break; 503 case ED_TYPE_WD8003EB: 504 sc->type_str = "WD8003EB"; 505 sc->kdc.kdc_description = "Ethernet adapter: WD 8003EB"; 506 break; 507 case ED_TYPE_WD8003W: 508 sc->type_str = "WD8003W"; 509 sc->kdc.kdc_description = "Ethernet adapter: WD 8003W"; 510 break; 511 case ED_TYPE_WD8013EBT: 512 sc->type_str = "WD8013EBT"; 513 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBT"; 514 memsize = 16384; 515 isa16bit = 1; 516 break; 517 case ED_TYPE_WD8013W: 518 sc->type_str = "WD8013W"; 519 sc->kdc.kdc_description = "Ethernet adapter: WD 8013W"; 520 memsize = 16384; 521 isa16bit = 1; 522 break; 523 case ED_TYPE_WD8013EP: /* also WD8003EP */ 524 if (inb(sc->asic_addr + ED_WD_ICR) 525 & ED_WD_ICR_16BIT) { 526 isa16bit = 1; 527 memsize = 16384; 528 sc->type_str = "WD8013EP"; 529 sc->kdc.kdc_description = 530 "Ethernet adapter: WD 8013EP"; 531 } else { 532 sc->type_str = "WD8003EP"; 533 sc->kdc.kdc_description = 534 "Ethernet adapter: WD 8003EP"; 535 } 536 break; 537 case ED_TYPE_WD8013WC: 538 sc->type_str = "WD8013WC"; 539 sc->kdc.kdc_description = "Ethernet adapter: WD 8013WC"; 540 memsize = 16384; 541 isa16bit = 1; 542 break; 543 case ED_TYPE_WD8013EBP: 544 sc->type_str = "WD8013EBP"; 545 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBP"; 546 memsize = 16384; 547 isa16bit = 1; 548 break; 549 case ED_TYPE_WD8013EPC: 550 sc->type_str = "WD8013EPC"; 551 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EPC"; 552 memsize = 16384; 553 isa16bit = 1; 554 break; 555 case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */ 556 case ED_TYPE_SMC8216T: 557 if (sc->type == ED_TYPE_SMC8216C) { 558 sc->type_str = "SMC8216/SMC8216C"; 559 sc->kdc.kdc_description = 560 "Ethernet adapter: SMC 8216 or 8216C"; 561 } else { 562 sc->type_str = "SMC8216T"; 563 sc->kdc.kdc_description = 564 "Ethernet adapter: SMC 8216T"; 565 } 566 567 outb(sc->asic_addr + ED_WD790_HWR, 568 inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH); 569 switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) { 570 case ED_WD790_RAR_SZ64: 571 memsize = 65536; 572 break; 573 case ED_WD790_RAR_SZ32: 574 memsize = 32768; 575 break; 576 case ED_WD790_RAR_SZ16: 577 memsize = 16384; 578 break; 579 case ED_WD790_RAR_SZ8: 580 /* 8216 has 16K shared mem -- 8416 has 8K */ 581 if (sc->type == ED_TYPE_SMC8216C) { 582 sc->type_str = "SMC8416C/SMC8416BT"; 583 sc->kdc.kdc_description = 584 "Ethernet adapter: SMC 8416C or 8416BT"; 585 } else { 586 sc->type_str = "SMC8416T"; 587 sc->kdc.kdc_description = 588 "Ethernet adapter: SMC 8416T"; 589 } 590 memsize = 8192; 591 break; 592 } 593 outb(sc->asic_addr + ED_WD790_HWR, 594 inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); 595 596 isa16bit = 1; 597 sc->is790 = 1; 598 break; 599#ifdef TOSH_ETHER 600 case ED_TYPE_TOSHIBA1: 601 sc->type_str = "Toshiba1"; 602 sc->kdc.kdc_description = "Ethernet adapter: Toshiba1"; 603 memsize = 32768; 604 isa16bit = 1; 605 break; 606 case ED_TYPE_TOSHIBA4: 607 sc->type_str = "Toshiba4"; 608 sc->kdc.kdc_description = "Ethernet adapter: Toshiba4"; 609 memsize = 32768; 610 isa16bit = 1; 611 break; 612#endif 613 default: 614 sc->type_str = ""; 615 break; 616 } 617 618 /* 619 * Make some adjustments to initial values depending on what is found 620 * in the ICR. 621 */ 622 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) 623#ifdef TOSH_ETHER 624 && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) 625#endif 626 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { 627 isa16bit = 0; 628 memsize = 8192; 629 } 630 631#if ED_DEBUG 632 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", 633 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); 634 for (i = 0; i < 8; i++) 635 printf("%x -> %x\n", i, inb(sc->asic_addr + i)); 636#endif 637 638 /* 639 * Allow the user to override the autoconfiguration 640 */ 641 if (isa_dev->id_msize) 642 memsize = isa_dev->id_msize; 643 644 /* 645 * (note that if the user specifies both of the following flags that 646 * '8bit' mode intentionally has precedence) 647 */ 648 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) 649 isa16bit = 1; 650 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE) 651 isa16bit = 0; 652 653 /* 654 * If possible, get the assigned interrupt number from the card and 655 * use it. 656 */ 657 if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) { 658 659 /* 660 * Assemble together the encoded interrupt number. 661 */ 662 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | 663 ((inb(isa_dev->id_iobase + ED_WD_IRR) & 664 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); 665 666 /* 667 * If no interrupt specified (or "?"), use what the board tells us. 668 */ 669 if (isa_dev->id_irq <= 0) 670 isa_dev->id_irq = ed_intr_mask[iptr]; 671 672 /* 673 * Enable the interrupt. 674 */ 675 outb(isa_dev->id_iobase + ED_WD_IRR, 676 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); 677 } 678 if (sc->is790) { 679 outb(isa_dev->id_iobase + ED_WD790_HWR, 680 inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH); 681 iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) | 682 (inb(isa_dev->id_iobase + ED_WD790_GCR) & 683 (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2); 684 outb(isa_dev->id_iobase + ED_WD790_HWR, 685 inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); 686 687 /* 688 * If no interrupt specified (or "?"), use what the board tells us. 689 */ 690 if (isa_dev->id_irq <= 0) 691 isa_dev->id_irq = ed_790_intr_mask[iptr]; 692 693 /* 694 * Enable interrupts. 695 */ 696 outb(isa_dev->id_iobase + ED_WD790_ICR, 697 inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL); 698 } 699 if (isa_dev->id_irq <= 0) { 700 printf("ed%d: %s cards don't support auto-detected/assigned interrupts.\n", 701 isa_dev->id_unit, sc->type_str); 702 return (0); 703 } 704 sc->isa16bit = isa16bit; 705 sc->mem_shared = 1; 706 isa_dev->id_msize = memsize; 707 sc->mem_start = (caddr_t) isa_dev->id_maddr; 708 709 /* 710 * allocate one xmit buffer if < 16k, two buffers otherwise 711 */ 712 if ((memsize < 16384) || 713 (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) { 714 sc->txb_cnt = 1; 715 } else { 716 sc->txb_cnt = 2; 717 } 718 sc->tx_page_start = ED_WD_PAGE_OFFSET; 719 sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt; 720 sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE; 721 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start); 722 sc->mem_size = memsize; 723 sc->mem_end = sc->mem_start + memsize; 724 725 /* 726 * Get station address from on-board ROM 727 */ 728 for (i = 0; i < ETHER_ADDR_LEN; ++i) 729 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); 730 731 /* 732 * Set upper address bits and 8/16 bit access to shared memory 733 */ 734 if (isa16bit) { 735 if (sc->is790) { 736 sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR); 737 outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN); 738 } else { 739 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 740 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | 741 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 742 } 743 } else { 744 if (((sc->type & ED_WD_SOFTCONFIG) || 745#ifdef TOSH_ETHER 746 (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) || 747#endif 748 (sc->type == ED_TYPE_WD8013EBT)) && (!sc->is790)) { 749 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 750 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 751 } 752 } 753 754 /* 755 * Set address and enable interface shared memory. 756 */ 757 if (!sc->is790) { 758#ifdef TOSH_ETHER 759 outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); 760 outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f)); 761 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW); 762 763#else 764 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & 765 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); 766#endif 767 sc->cr_proto = ED_CR_RD2; 768 } else { 769 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); 770 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH)); 771 outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) | 772 ((kvtop(sc->mem_start) >> 11) & 0x40) | 773 (inb(sc->asic_addr + ED_WD790_RAR) & 0xb0)); 774 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH)); 775 sc->cr_proto = 0; 776 } 777 778#if 0 779 printf("starting memory performance test at 0x%x, size %d...\n", 780 sc->mem_start, memsize*16384); 781 for (i = 0; i < 16384; i++) 782 bzero(sc->mem_start, memsize); 783 printf("***DONE***\n"); 784#endif 785 786 /* 787 * Now zero memory and verify that it is clear 788 */ 789 bzero(sc->mem_start, memsize); 790 791 for (i = 0; i < memsize; ++i) { 792 if (sc->mem_start[i]) { 793 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 794 isa_dev->id_unit, kvtop(sc->mem_start + i)); 795 796 /* 797 * Disable 16 bit access to shared memory 798 */ 799 if (isa16bit) { 800 if (sc->is790) { 801 outb(sc->asic_addr + ED_WD_MSR, 0x00); 802 } 803 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 804 ~ED_WD_LAAR_M16EN)); 805 } 806 return (0); 807 } 808 } 809 810 /* 811 * Disable 16bit access to shared memory - we leave it 812 * disabled so that 1) machines reboot properly when the board 813 * is set 16 bit mode and there are conflicting 8bit 814 * devices/ROMS in the same 128k address space as this boards 815 * shared memory. and 2) so that other 8 bit devices with 816 * shared memory can be used in this 128k region, too. 817 */ 818 if (isa16bit) { 819 if (sc->is790) { 820 outb(sc->asic_addr + ED_WD_MSR, 0x00); 821 } 822 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 823 ~ED_WD_LAAR_M16EN)); 824 } 825 return (ED_WD_IO_PORTS); 826} 827 828/* 829 * Probe and vendor-specific initialization routine for 3Com 3c503 boards 830 */ 831static int 832ed_probe_3Com(isa_dev) 833 struct isa_device *isa_dev; 834{ 835 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 836 int i; 837 u_int memsize; 838 u_char isa16bit; 839 840 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; 841 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; 842 843 /* 844 * Verify that the kernel configured I/O address matches the board 845 * configured address 846 */ 847 switch (inb(sc->asic_addr + ED_3COM_BCFR)) { 848 case ED_3COM_BCFR_300: 849 if (isa_dev->id_iobase != 0x300) 850 return (0); 851 break; 852 case ED_3COM_BCFR_310: 853 if (isa_dev->id_iobase != 0x310) 854 return (0); 855 break; 856 case ED_3COM_BCFR_330: 857 if (isa_dev->id_iobase != 0x330) 858 return (0); 859 break; 860 case ED_3COM_BCFR_350: 861 if (isa_dev->id_iobase != 0x350) 862 return (0); 863 break; 864 case ED_3COM_BCFR_250: 865 if (isa_dev->id_iobase != 0x250) 866 return (0); 867 break; 868 case ED_3COM_BCFR_280: 869 if (isa_dev->id_iobase != 0x280) 870 return (0); 871 break; 872 case ED_3COM_BCFR_2A0: 873 if (isa_dev->id_iobase != 0x2a0) 874 return (0); 875 break; 876 case ED_3COM_BCFR_2E0: 877 if (isa_dev->id_iobase != 0x2e0) 878 return (0); 879 break; 880 default: 881 return (0); 882 } 883 884 /* 885 * Verify that the kernel shared memory address matches the board 886 * configured address. 887 */ 888 switch (inb(sc->asic_addr + ED_3COM_PCFR)) { 889 case ED_3COM_PCFR_DC000: 890 if (kvtop(isa_dev->id_maddr) != 0xdc000) 891 return (0); 892 break; 893 case ED_3COM_PCFR_D8000: 894 if (kvtop(isa_dev->id_maddr) != 0xd8000) 895 return (0); 896 break; 897 case ED_3COM_PCFR_CC000: 898 if (kvtop(isa_dev->id_maddr) != 0xcc000) 899 return (0); 900 break; 901 case ED_3COM_PCFR_C8000: 902 if (kvtop(isa_dev->id_maddr) != 0xc8000) 903 return (0); 904 break; 905 default: 906 return (0); 907 } 908 909 910 /* 911 * Reset NIC and ASIC. Enable on-board transceiver throughout reset 912 * sequence because it'll lock up if the cable isn't connected if we 913 * don't. 914 */ 915 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); 916 917 /* 918 * Wait for a while, then un-reset it 919 */ 920 DELAY(50); 921 922 /* 923 * The 3Com ASIC defaults to rather strange settings for the CR after 924 * a reset - it's important to set it again after the following outb 925 * (this is done when we map the PROM below). 926 */ 927 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 928 929 /* 930 * Wait a bit for the NIC to recover from the reset 931 */ 932 DELAY(5000); 933 934 sc->vendor = ED_VENDOR_3COM; 935 sc->type_str = "3c503"; 936 sc->kdc.kdc_description = "Ethernet adapter: 3c503"; 937 sc->mem_shared = 1; 938 sc->cr_proto = ED_CR_RD2; 939 940 /* 941 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window 942 * to it. 943 */ 944 memsize = 8192; 945 946 /* 947 * Get station address from on-board ROM 948 */ 949 950 /* 951 * First, map ethernet address PROM over the top of where the NIC 952 * registers normally appear. 953 */ 954 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); 955 956 for (i = 0; i < ETHER_ADDR_LEN; ++i) 957 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i); 958 959 /* 960 * Unmap PROM - select NIC registers. The proper setting of the 961 * tranceiver is set in ed_init so that the attach code is given a 962 * chance to set the default based on a compile-time config option 963 */ 964 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 965 966 /* 967 * Determine if this is an 8bit or 16bit board 968 */ 969 970 /* 971 * select page 0 registers 972 */ 973 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 974 975 /* 976 * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit 977 * board. 978 */ 979 outb(sc->nic_addr + ED_P0_DCR, 0); 980 981 /* 982 * select page 2 registers 983 */ 984 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP); 985 986 /* 987 * The 3c503 forces the WTS bit to a one if this is a 16bit board 988 */ 989 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS) 990 isa16bit = 1; 991 else 992 isa16bit = 0; 993 994 /* 995 * select page 0 registers 996 */ 997 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP); 998 999 sc->mem_start = (caddr_t) isa_dev->id_maddr; 1000 sc->mem_size = memsize; 1001 sc->mem_end = sc->mem_start + memsize; 1002 1003 /* 1004 * We have an entire 8k window to put the transmit buffers on the 1005 * 16bit boards. But since the 16bit 3c503's shared memory is only 1006 * fast enough to overlap the loading of one full-size packet, trying 1007 * to load more than 2 buffers can actually leave the transmitter idle 1008 * during the load. So 2 seems the best value. (Although a mix of 1009 * variable-sized packets might change this assumption. Nonetheless, 1010 * we optimize for linear transfers of same-size packets.) 1011 */ 1012 if (isa16bit) { 1013 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) 1014 sc->txb_cnt = 1; 1015 else 1016 sc->txb_cnt = 2; 1017 1018 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; 1019 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; 1020 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 1021 ED_3COM_RX_PAGE_OFFSET_16BIT; 1022 sc->mem_ring = sc->mem_start; 1023 } else { 1024 sc->txb_cnt = 1; 1025 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; 1026 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; 1027 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 1028 ED_3COM_TX_PAGE_OFFSET_8BIT; 1029 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); 1030 } 1031 1032 sc->isa16bit = isa16bit; 1033 1034 /* 1035 * Initialize GA page start/stop registers. Probably only needed if 1036 * doing DMA, but what the hell. 1037 */ 1038 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); 1039 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); 1040 1041 /* 1042 * Set IRQ. 3c503 only allows a choice of irq 2-5. 1043 */ 1044 switch (isa_dev->id_irq) { 1045 case IRQ2: 1046 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2); 1047 break; 1048 case IRQ3: 1049 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3); 1050 break; 1051 case IRQ4: 1052 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4); 1053 break; 1054 case IRQ5: 1055 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5); 1056 break; 1057 default: 1058 printf("ed%d: Invalid irq configuration (%d) must be 3-5,9 for 3c503\n", 1059 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); 1060 return (0); 1061 } 1062 1063 /* 1064 * Initialize GA configuration register. Set bank and enable shared 1065 * mem. 1066 */ 1067 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | 1068 ED_3COM_GACFR_MBS0); 1069 1070 /* 1071 * Initialize "Vector Pointer" registers. These gawd-awful things are 1072 * compared to 20 bits of the address on ISA, and if they match, the 1073 * shared memory is disabled. We set them to 0xffff0...allegedly the 1074 * reset vector. 1075 */ 1076 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); 1077 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); 1078 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00); 1079 1080 /* 1081 * Zero memory and verify that it is clear 1082 */ 1083 bzero(sc->mem_start, memsize); 1084 1085 for (i = 0; i < memsize; ++i) 1086 if (sc->mem_start[i]) { 1087 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 1088 isa_dev->id_unit, kvtop(sc->mem_start + i)); 1089 return (0); 1090 } 1091 isa_dev->id_msize = memsize; 1092 return (ED_3COM_IO_PORTS); 1093} 1094 1095/* 1096 * Probe and vendor-specific initialization routine for NE1000/2000 boards 1097 */ 1098static int 1099ed_probe_Novell_generic(sc, port, unit, flags) 1100 struct ed_softc *sc; 1101 int port; 1102 int unit; 1103 int flags; 1104{ 1105 u_int memsize, n; 1106 u_char romdata[16], tmp; 1107 static char test_pattern[32] = "THIS is A memory TEST pattern"; 1108 char test_buffer[32]; 1109 1110 sc->asic_addr = port + ED_NOVELL_ASIC_OFFSET; 1111 sc->nic_addr = port + ED_NOVELL_NIC_OFFSET; 1112 1113 /* XXX - do Novell-specific probe here */ 1114 1115 /* Reset the board */ 1116#ifdef GWETHER 1117 outb(sc->asic_addr + ED_NOVELL_RESET, 0); 1118 DELAY(200); 1119#endif /* GWETHER */ 1120 tmp = inb(sc->asic_addr + ED_NOVELL_RESET); 1121 1122 /* 1123 * I don't know if this is necessary; probably cruft leftover from 1124 * Clarkson packet driver code. Doesn't do a thing on the boards I've 1125 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 1126 * non-invasive...but some boards don't seem to reset and I don't have 1127 * complete documentation on what the 'right' thing to do is...so we 1128 * do the invasive thing for now. Yuck.] 1129 */ 1130 outb(sc->asic_addr + ED_NOVELL_RESET, tmp); 1131 DELAY(5000); 1132 1133 /* 1134 * This is needed because some NE clones apparently don't reset the 1135 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 1136 * - this makes the probe invasive! ...Done against my better 1137 * judgement. -DLG 1138 */ 1139 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 1140 1141 DELAY(5000); 1142 1143 /* Make sure that we really have an 8390 based board */ 1144 if (!ed_probe_generic8390(sc)) 1145 return (0); 1146 1147 sc->vendor = ED_VENDOR_NOVELL; 1148 sc->mem_shared = 0; 1149 sc->cr_proto = ED_CR_RD2; 1150 1151 /* 1152 * Test the ability to read and write to the NIC memory. This has the 1153 * side affect of determining if this is an NE1000 or an NE2000. 1154 */ 1155 1156 /* 1157 * This prevents packets from being stored in the NIC memory when the 1158 * readmem routine turns on the start bit in the CR. 1159 */ 1160 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); 1161 1162 /* Temporarily initialize DCR for byte operations */ 1163 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 1164 1165 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); 1166 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); 1167 1168 sc->isa16bit = 0; 1169 1170 /* 1171 * Write a test pattern in byte mode. If this fails, then there 1172 * probably isn't any memory at 8k - which likely means that the board 1173 * is an NE2000. 1174 */ 1175 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); 1176 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); 1177 1178 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 1179 /* not an NE1000 - try NE2000 */ 1180 1181 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 1182 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); 1183 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); 1184 1185 sc->isa16bit = 1; 1186 1187 /* 1188 * Write a test pattern in word mode. If this also fails, then 1189 * we don't know what this board is. 1190 */ 1191 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 1192 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 1193 1194 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) 1195 return (0); /* not an NE2000 either */ 1196 1197 sc->type = ED_TYPE_NE2000; 1198 sc->type_str = "NE2000"; 1199 sc->kdc.kdc_description = "Ethernet adapter: NE2000"; 1200 } else { 1201 sc->type = ED_TYPE_NE1000; 1202 sc->type_str = "NE1000"; 1203 sc->kdc.kdc_description = "Ethernet adapter: NE1000"; 1204 } 1205 1206 /* 8k of memory plus an additional 8k if 16bit */ 1207 memsize = 8192 + sc->isa16bit * 8192; 1208 1209#if 0 /* probably not useful - NE boards only come two ways */ 1210 /* allow kernel config file overrides */ 1211 if (isa_dev->id_msize) 1212 memsize = isa_dev->id_msize; 1213#endif 1214 1215 sc->mem_size = memsize; 1216 1217 /* NIC memory doesn't start at zero on an NE board */ 1218 /* The start address is tied to the bus width */ 1219 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192; 1220 sc->mem_end = sc->mem_start + memsize; 1221 sc->tx_page_start = memsize / ED_PAGE_SIZE; 1222 1223#ifdef GWETHER 1224 { 1225 int x, i, mstart = 0, msize = 0; 1226 char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE]; 1227 1228 for (i = 0; i < ED_PAGE_SIZE; i++) 1229 pbuf0[i] = 0; 1230 1231 /* Clear all the memory. */ 1232 for (x = 1; x < 256; x++) 1233 ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE); 1234 1235 /* Search for the start of RAM. */ 1236 for (x = 1; x < 256; x++) { 1237 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1238 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 1239 for (i = 0; i < ED_PAGE_SIZE; i++) 1240 pbuf[i] = 255 - x; 1241 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); 1242 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1243 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 1244 mstart = x * ED_PAGE_SIZE; 1245 msize = ED_PAGE_SIZE; 1246 break; 1247 } 1248 } 1249 } 1250 1251 if (mstart == 0) { 1252 printf("ed%d: Cannot find start of RAM.\n", unit); 1253 return 0; 1254 } 1255 /* Search for the start of RAM. */ 1256 for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) { 1257 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1258 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 1259 for (i = 0; i < ED_PAGE_SIZE; i++) 1260 pbuf[i] = 255 - x; 1261 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); 1262 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1263 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 1264 msize += ED_PAGE_SIZE; 1265 else { 1266 break; 1267 } 1268 } else { 1269 break; 1270 } 1271 } 1272 1273 if (msize == 0) { 1274 printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", unit, mstart, x); 1275 return 0; 1276 } 1277 printf("ed%d: RAM start at %d, size : %d.\n", unit, mstart, msize); 1278 1279 sc->mem_size = msize; 1280 sc->mem_start = (char *) mstart; 1281 sc->mem_end = (char *) (msize + mstart); 1282 sc->tx_page_start = mstart / ED_PAGE_SIZE; 1283 } 1284#endif /* GWETHER */ 1285 1286 /* 1287 * Use one xmit buffer if < 16k, two buffers otherwise (if not told 1288 * otherwise). 1289 */ 1290 if ((memsize < 16384) || (flags & ED_FLAGS_NO_MULTI_BUFFERING)) 1291 sc->txb_cnt = 1; 1292 else 1293 sc->txb_cnt = 2; 1294 1295 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 1296 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 1297 1298 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 1299 1300 ed_pio_readmem(sc, 0, romdata, 16); 1301 for (n = 0; n < ETHER_ADDR_LEN; n++) 1302 sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)]; 1303 1304#ifdef GWETHER 1305 if (sc->arpcom.ac_enaddr[2] == 0x86) { 1306 sc->type_str = "Gateway AT"; 1307 sc->kdc.kdc_description = "Ethernet adapter: Gateway AT"; 1308 } 1309#endif /* GWETHER */ 1310 1311 /* clear any pending interrupts that might have occurred above */ 1312 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1313 1314 return (ED_NOVELL_IO_PORTS); 1315} 1316 1317static int 1318ed_probe_Novell(isa_dev) 1319 struct isa_device *isa_dev; 1320{ 1321 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1322 1323 isa_dev->id_maddr = 0; 1324 return ed_probe_Novell_generic(sc, isa_dev->id_iobase, 1325 isa_dev->id_unit, isa_dev->id_flags); 1326} 1327 1328#if NCRD > 0 1329 1330/* 1331 * Probe and vendor-specific initialization routine for PCCARDs 1332 */ 1333static int 1334ed_probe_pccard(isa_dev, ether) 1335 struct isa_device *isa_dev; 1336 u_char *ether; 1337{ 1338 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1339 int i; 1340 u_int memsize; 1341 u_char isa16bit; 1342 1343 sc->nic_addr = isa_dev->id_iobase; 1344 sc->gone = 0; 1345 sc->is790 = 0; 1346 sc->cr_proto = ED_CR_RD2; 1347 sc->vendor = ED_VENDOR_PCCARD; 1348 sc->type = 0; 1349 sc->type_str = "PCCARD"; 1350 sc->kdc.kdc_description = "PCCARD Ethernet"; 1351 sc->mem_size = isa_dev->id_msize = memsize = 16384; 1352 sc->isa16bit = isa16bit = 1; 1353 1354 for (i = 0; i < ETHER_ADDR_LEN; ++i) 1355 sc->arpcom.ac_enaddr[i] = ether[i]; 1356 1357#if ED_DEBUG 1358 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", 1359 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); 1360#endif 1361 1362 i = inb(sc->nic_addr + ED_PC_RESET); 1363 DELAY(100000); 1364 outb(sc->nic_addr + ED_PC_RESET,i); 1365 DELAY(100000); 1366 i = inb(sc->nic_addr + ED_PC_MISC); 1367 if (!i) { 1368 int j; 1369 printf("ed_probe_pccard: possible failure\n"); 1370 for (j=0;j<20 && !i;j++) { 1371 printf("."); 1372 DELAY(100000); 1373 i = inb(sc->nic_addr + ED_PC_MISC); 1374 } 1375 if (!i) { 1376 printf("dead :-(\n"); 1377 return 0; 1378 } 1379 printf("\n"); 1380 } 1381 /* 1382 * Set initial values for width/size. 1383 */ 1384 1385 /* Make sure that we really have an 8390 based board */ 1386 if (!ed_probe_generic8390(sc)) { 1387 printf("ed_probe_generic8390 failed\n"); 1388 return (0); 1389 } 1390 sc->txb_cnt = 2; 1391 sc->tx_page_start = ED_PC_PAGE_OFFSET; 1392 sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt; 1393 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 1394 1395 sc->mem_shared = 1; 1396 sc->mem_start = (caddr_t) isa_dev->id_maddr; 1397 sc->mem_size = memsize; 1398 sc->mem_end = sc->mem_start + memsize; 1399 1400 sc->mem_ring = sc->mem_start + 1401 sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 1402 1403 /* 1404 * Now zero memory and verify that it is clear 1405 */ 1406 bzero(sc->mem_start, memsize); 1407 1408 for (i = 0; i < memsize; ++i) { 1409 if (sc->mem_start[i]) { 1410 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 1411 isa_dev->id_unit, kvtop(sc->mem_start + i)); 1412 1413 return (0); 1414 } 1415 sc->mem_start[i] = (i - 5) & 0xff; 1416 } 1417 for (i = 0; i < memsize; ++i) { 1418 if ((sc->mem_start[i] & 0xff) != ((i - 5) & 0xff)) { 1419 printf("ed%d: shared memory failed at %lx (%x != %x) - check configuration\n", 1420 isa_dev->id_unit, kvtop(sc->mem_start + i), 1421 sc->mem_start[i], (i-5) & 0xff); 1422 return (0); 1423 1424 } 1425 } 1426 1427 i = inb(sc->nic_addr + ED_PC_MISC); 1428 if (!i) { 1429 printf("ed_probe_pccard: possible failure(2)\n"); 1430 } 1431 1432 /* clear any pending interupts that we may have caused */ 1433 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1434 1435 return (ED_PC_IO_PORTS); 1436} 1437 1438#endif /* NCRD > 0 */ 1439 1440/* 1441 * Install interface into kernel networking data structures 1442 */ 1443static int 1444ed_attach(sc, unit, flags) 1445 struct ed_softc *sc; 1446 int unit; 1447 int flags; 1448{ 1449 struct ifnet *ifp = &sc->arpcom.ac_if; 1450 1451 /* 1452 * Set interface to stopped condition (reset) 1453 */ 1454 ed_stop(sc); 1455 1456 if (!ifp->if_name) { 1457 /* 1458 * Initialize ifnet structure 1459 */ 1460 ifp->if_softc = sc; 1461 ifp->if_unit = unit; 1462 ifp->if_name = "ed"; 1463 ifp->if_output = ether_output; 1464 ifp->if_start = ed_start; 1465 ifp->if_ioctl = ed_ioctl; 1466 ifp->if_watchdog = ed_watchdog; 1467 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 1468 1469 /* 1470 * Set default state for ALTPHYS flag (used to disable the 1471 * tranceiver for AUI operation), based on compile-time 1472 * config option. 1473 */ 1474 if (flags & ED_FLAGS_DISABLE_TRANCEIVER) 1475 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | 1476 IFF_MULTICAST | IFF_ALTPHYS); 1477 else 1478 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | 1479 IFF_MULTICAST); 1480 1481 /* 1482 * Attach the interface 1483 */ 1484 if_attach(ifp); 1485 ether_ifattach(ifp); 1486 } 1487 /* device attach does transition from UNCONFIGURED to IDLE state */ 1488 sc->kdc.kdc_state = DC_IDLE; 1489 1490 /* 1491 * Print additional info when attached 1492 */ 1493 printf("%s%d: address %6D, ", ifp->if_name, ifp->if_unit, 1494 sc->arpcom.ac_enaddr, ":"); 1495 1496 if (sc->type_str && (*sc->type_str != 0)) 1497 printf("type %s ", sc->type_str); 1498 else 1499 printf("type unknown (0x%x) ", sc->type); 1500 1501 printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)"); 1502 1503 printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && 1504 (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); 1505 1506 /* 1507 * If BPF is in the kernel, call the attach for it 1508 */ 1509#if NBPFILTER > 0 1510 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 1511#endif 1512 return 1; 1513} 1514 1515static int 1516ed_attach_isa(isa_dev) 1517 struct isa_device *isa_dev; 1518{ 1519 int unit = isa_dev->id_unit; 1520 struct ed_softc *sc = &ed_softc[unit]; 1521 int flags = isa_dev->id_flags; 1522 1523 return ed_attach(sc, unit, flags); 1524} 1525 1526#if NPCI > 0 1527void * 1528ed_attach_NE2000_pci(unit, port) 1529 int unit; 1530 int port; 1531{ 1532 struct ed_softc *sc = malloc(sizeof *sc, M_DEVBUF, M_NOWAIT); 1533 int isa_flags = 0; 1534 1535 if (!sc) 1536 return sc; 1537 1538 if (ed_probe_Novell_generic(sc, port, unit, isa_flags) == 0 1539 || ed_attach(sc, unit, isa_flags) == 0) { 1540 free(sc, M_DEVBUF); 1541 return NULL; 1542 } 1543 return sc; 1544} 1545#endif 1546 1547/* 1548 * Reset interface. 1549 */ 1550static void 1551ed_reset(ifp) 1552 struct ifnet *ifp; 1553{ 1554 struct ed_softc *sc = ifp->if_softc; 1555 int s; 1556 1557 if (sc->gone) 1558 return; 1559 s = splimp(); 1560 1561 /* 1562 * Stop interface and re-initialize. 1563 */ 1564 ed_stop(sc); 1565 ed_init(ifp); 1566 1567 (void) splx(s); 1568} 1569 1570/* 1571 * Take interface offline. 1572 */ 1573static void 1574ed_stop(sc) 1575 struct ed_softc *sc; 1576{ 1577 int n = 5000; 1578 1579 if (sc->gone) 1580 return; 1581 /* 1582 * Stop everything on the interface, and select page 0 registers. 1583 */ 1584 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 1585 1586 /* 1587 * Wait for interface to enter stopped state, but limit # of checks to 1588 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but 1589 * just in case it's an old one. 1590 */ 1591 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); 1592} 1593 1594/* 1595 * Device timeout/watchdog routine. Entered if the device neglects to 1596 * generate an interrupt after a transmit has been started on it. 1597 */ 1598static void 1599ed_watchdog(ifp) 1600 struct ifnet *ifp; 1601{ 1602 struct ed_softc *sc = ifp->if_softc; 1603 1604 if (sc->gone) 1605 return; 1606 log(LOG_ERR, "ed%d: device timeout\n", ifp->if_unit); 1607 ifp->if_oerrors++; 1608 1609 ed_reset(ifp); 1610} 1611 1612/* 1613 * Initialize device. 1614 */ 1615static void 1616ed_init(ifp) 1617 struct ifnet *ifp; 1618{ 1619 struct ed_softc *sc = ifp->if_softc; 1620 int i, s; 1621 1622 if (sc->gone) 1623 return; 1624 1625 /* address not known */ 1626 if (ifp->if_addrlist == (struct ifaddr *) 0) 1627 return; 1628 1629 /* 1630 * Initialize the NIC in the exact order outlined in the NS manual. 1631 * This init procedure is "mandatory"...don't change what or when 1632 * things happen. 1633 */ 1634 s = splimp(); 1635 1636 /* reset transmitter flags */ 1637 sc->xmit_busy = 0; 1638 ifp->if_timer = 0; 1639 1640 sc->txb_inuse = 0; 1641 sc->txb_new = 0; 1642 sc->txb_next_tx = 0; 1643 1644 /* This variable is used below - don't move this assignment */ 1645 sc->next_packet = sc->rec_page_start + 1; 1646 1647 /* 1648 * Set interface for page 0, Remote DMA complete, Stopped 1649 */ 1650 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 1651 1652 if (sc->isa16bit) { 1653 1654 /* 1655 * Set FIFO threshold to 8, No auto-init Remote DMA, byte 1656 * order=80x86, word-wide DMA xfers, 1657 */ 1658 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); 1659 } else { 1660 1661 /* 1662 * Same as above, but byte-wide DMA xfers 1663 */ 1664 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 1665 } 1666 1667 /* 1668 * Clear Remote Byte Count Registers 1669 */ 1670 outb(sc->nic_addr + ED_P0_RBCR0, 0); 1671 outb(sc->nic_addr + ED_P0_RBCR1, 0); 1672 1673 /* 1674 * For the moment, don't store incoming packets in memory. 1675 */ 1676 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); 1677 1678 /* 1679 * Place NIC in internal loopback mode 1680 */ 1681 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0); 1682 1683 /* 1684 * Initialize transmit/receive (ring-buffer) Page Start 1685 */ 1686 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start); 1687 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start); 1688 /* Set lower bits of byte addressable framing to 0 */ 1689 if (sc->is790) 1690 outb(sc->nic_addr + 0x09, 0); 1691 1692 /* 1693 * Initialize Receiver (ring-buffer) Page Stop and Boundry 1694 */ 1695 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop); 1696 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start); 1697 1698 /* 1699 * Clear all interrupts. A '1' in each bit position clears the 1700 * corresponding flag. 1701 */ 1702 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1703 1704 /* 1705 * Enable the following interrupts: receive/transmit complete, 1706 * receive/transmit error, and Receiver OverWrite. 1707 * 1708 * Counter overflow and Remote DMA complete are *not* enabled. 1709 */ 1710 outb(sc->nic_addr + ED_P0_IMR, 1711 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE); 1712 1713 /* 1714 * Program Command Register for page 1 1715 */ 1716 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 1717 1718 /* 1719 * Copy out our station address 1720 */ 1721 for (i = 0; i < ETHER_ADDR_LEN; ++i) 1722 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); 1723 1724 /* 1725 * Set Current Page pointer to next_packet (initialized above) 1726 */ 1727 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); 1728 1729 /* 1730 * Program Receiver Configuration Register and multicast filter. CR is 1731 * set to page 0 on return. 1732 */ 1733 ed_setrcr(sc); 1734 1735 /* 1736 * Take interface out of loopback 1737 */ 1738 outb(sc->nic_addr + ED_P0_TCR, 0); 1739 1740 /* 1741 * If this is a 3Com board, the tranceiver must be software enabled 1742 * (there is no settable hardware default). 1743 */ 1744 if (sc->vendor == ED_VENDOR_3COM) { 1745 if (ifp->if_flags & IFF_ALTPHYS) { 1746 outb(sc->asic_addr + ED_3COM_CR, 0); 1747 } else { 1748 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 1749 } 1750 } 1751 1752 /* 1753 * Set 'running' flag, and clear output active flag. 1754 */ 1755 ifp->if_flags |= IFF_RUNNING; 1756 ifp->if_flags &= ~IFF_OACTIVE; 1757 1758 /* 1759 * ...and attempt to start output 1760 */ 1761 ed_start(ifp); 1762 1763 (void) splx(s); 1764} 1765 1766/* 1767 * This routine actually starts the transmission on the interface 1768 */ 1769static inline void 1770ed_xmit(sc) 1771 struct ed_softc *sc; 1772{ 1773 struct ifnet *ifp = (struct ifnet *)sc; 1774 unsigned short len; 1775 1776 if (sc->gone) 1777 return; 1778 len = sc->txb_len[sc->txb_next_tx]; 1779 1780 /* 1781 * Set NIC for page 0 register access 1782 */ 1783 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 1784 1785 /* 1786 * Set TX buffer start page 1787 */ 1788 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + 1789 sc->txb_next_tx * ED_TXBUF_SIZE); 1790 1791 /* 1792 * Set TX length 1793 */ 1794 outb(sc->nic_addr + ED_P0_TBCR0, len); 1795 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8); 1796 1797 /* 1798 * Set page 0, Remote DMA complete, Transmit Packet, and *Start* 1799 */ 1800 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA); 1801 sc->xmit_busy = 1; 1802 1803 /* 1804 * Point to next transmit buffer slot and wrap if necessary. 1805 */ 1806 sc->txb_next_tx++; 1807 if (sc->txb_next_tx == sc->txb_cnt) 1808 sc->txb_next_tx = 0; 1809 1810 /* 1811 * Set a timer just in case we never hear from the board again 1812 */ 1813 ifp->if_timer = 2; 1814} 1815 1816/* 1817 * Start output on interface. 1818 * We make two assumptions here: 1819 * 1) that the current priority is set to splimp _before_ this code 1820 * is called *and* is returned to the appropriate priority after 1821 * return 1822 * 2) that the IFF_OACTIVE flag is checked before this code is called 1823 * (i.e. that the output part of the interface is idle) 1824 */ 1825static void 1826ed_start(ifp) 1827 struct ifnet *ifp; 1828{ 1829 struct ed_softc *sc = ifp->if_softc; 1830 struct mbuf *m0, *m; 1831 caddr_t buffer; 1832 int len; 1833 1834 if (sc->gone) { 1835 printf("ed_start(%p) GONE\n",ifp); 1836 return; 1837 } 1838outloop: 1839 1840 /* 1841 * First, see if there are buffered packets and an idle transmitter - 1842 * should never happen at this point. 1843 */ 1844 if (sc->txb_inuse && (sc->xmit_busy == 0)) { 1845 printf("ed: packets buffered, but transmitter idle\n"); 1846 ed_xmit(sc); 1847 } 1848 1849 /* 1850 * See if there is room to put another packet in the buffer. 1851 */ 1852 if (sc->txb_inuse == sc->txb_cnt) { 1853 1854 /* 1855 * No room. Indicate this to the outside world and exit. 1856 */ 1857 ifp->if_flags |= IFF_OACTIVE; 1858 return; 1859 } 1860 IF_DEQUEUE(&ifp->if_snd, m); 1861 if (m == 0) { 1862 1863 /* 1864 * We are using the !OACTIVE flag to indicate to the outside 1865 * world that we can accept an additional packet rather than 1866 * that the transmitter is _actually_ active. Indeed, the 1867 * transmitter may be active, but if we haven't filled all the 1868 * buffers with data then we still want to accept more. 1869 */ 1870 ifp->if_flags &= ~IFF_OACTIVE; 1871 return; 1872 } 1873 1874 /* 1875 * Copy the mbuf chain into the transmit buffer 1876 */ 1877 1878 m0 = m; 1879 1880 /* txb_new points to next open buffer slot */ 1881 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); 1882 1883 if (sc->mem_shared) { 1884 1885 /* 1886 * Special case setup for 16 bit boards... 1887 */ 1888 if (sc->isa16bit) { 1889 switch (sc->vendor) { 1890 1891 /* 1892 * For 16bit 3Com boards (which have 16k of 1893 * memory), we have the xmit buffers in a 1894 * different page of memory ('page 0') - so 1895 * change pages. 1896 */ 1897 case ED_VENDOR_3COM: 1898 outb(sc->asic_addr + ED_3COM_GACFR, 1899 ED_3COM_GACFR_RSEL); 1900 break; 1901 1902 /* 1903 * Enable 16bit access to shared memory on 1904 * WD/SMC boards. 1905 */ 1906 case ED_VENDOR_WD_SMC:{ 1907 outb(sc->asic_addr + ED_WD_LAAR, 1908 (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); 1909 if (sc->is790) { 1910 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); 1911 } 1912 break; 1913 } 1914 } 1915 } 1916 for (len = 0; m != 0; m = m->m_next) { 1917 bcopy(mtod(m, caddr_t), buffer, m->m_len); 1918 buffer += m->m_len; 1919 len += m->m_len; 1920 } 1921 1922 /* 1923 * Restore previous shared memory access 1924 */ 1925 if (sc->isa16bit) { 1926 switch (sc->vendor) { 1927 case ED_VENDOR_3COM: 1928 outb(sc->asic_addr + ED_3COM_GACFR, 1929 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); 1930 break; 1931 case ED_VENDOR_WD_SMC:{ 1932 if (sc->is790) { 1933 outb(sc->asic_addr + ED_WD_MSR, 0x00); 1934 } 1935 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); 1936 break; 1937 } 1938 } 1939 } 1940 } else { 1941 len = ed_pio_write_mbufs(sc, m, (int)buffer); 1942 if (len == 0) 1943 goto outloop; 1944 } 1945 1946 sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN); 1947 1948 sc->txb_inuse++; 1949 1950 /* 1951 * Point to next buffer slot and wrap if necessary. 1952 */ 1953 sc->txb_new++; 1954 if (sc->txb_new == sc->txb_cnt) 1955 sc->txb_new = 0; 1956 1957 if (sc->xmit_busy == 0) 1958 ed_xmit(sc); 1959 1960 /* 1961 * Tap off here if there is a bpf listener. 1962 */ 1963#if NBPFILTER > 0 1964 if (ifp->if_bpf) { 1965 bpf_mtap(ifp, m0); 1966 } 1967#endif 1968 1969 m_freem(m0); 1970 1971 /* 1972 * Loop back to the top to possibly buffer more packets 1973 */ 1974 goto outloop; 1975} 1976 1977/* 1978 * Ethernet interface receiver interrupt. 1979 */ 1980static inline void 1981ed_rint(sc) 1982 struct ed_softc *sc; 1983{ 1984 struct ifnet *ifp = &sc->arpcom.ac_if; 1985 u_char boundry; 1986 u_short len; 1987 struct ed_ring packet_hdr; 1988 char *packet_ptr; 1989 1990 if (sc->gone) 1991 return; 1992 1993 /* 1994 * Set NIC to page 1 registers to get 'current' pointer 1995 */ 1996 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 1997 1998 /* 1999 * 'sc->next_packet' is the logical beginning of the ring-buffer - 2000 * i.e. it points to where new data has been buffered. The 'CURR' 2001 * (current) register points to the logical end of the ring-buffer - 2002 * i.e. it points to where additional new data will be added. We loop 2003 * here until the logical beginning equals the logical end (or in 2004 * other words, until the ring-buffer is empty). 2005 */ 2006 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { 2007 2008 /* get pointer to this buffer's header structure */ 2009 packet_ptr = sc->mem_ring + 2010 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; 2011 2012 /* 2013 * The byte count includes a 4 byte header that was added by 2014 * the NIC. 2015 */ 2016 if (sc->mem_shared) 2017 packet_hdr = *(struct ed_ring *) packet_ptr; 2018 else 2019 ed_pio_readmem(sc, (int)packet_ptr, (char *) &packet_hdr, 2020 sizeof(packet_hdr)); 2021 len = packet_hdr.count; 2022 if (len > (ETHER_MAX_LEN + sizeof(struct ed_ring)) || 2023 len < (ETHER_HDR_SIZE + sizeof(struct ed_ring))) { 2024 /* 2025 * Length is a wild value. There's a good chance that 2026 * this was caused by the NIC being old and buggy. 2027 * The bug is that the length low byte is duplicated in 2028 * the high byte. Try to recalculate the length based on 2029 * the pointer to the next packet. 2030 */ 2031 /* 2032 * NOTE: sc->next_packet is pointing at the current packet. 2033 */ 2034 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */ 2035 if (packet_hdr.next_packet >= sc->next_packet) { 2036 len += (packet_hdr.next_packet - sc->next_packet) * ED_PAGE_SIZE; 2037 } else { 2038 len += ((packet_hdr.next_packet - sc->rec_page_start) + 2039 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE; 2040 } 2041 } 2042 /* 2043 * Be fairly liberal about what we allow as a "reasonable" length 2044 * so that a [crufty] packet will make it to BPF (and can thus 2045 * be analyzed). Note that all that is really important is that 2046 * we have a length that will fit into one mbuf cluster or less; 2047 * the upper layer protocols can then figure out the length from 2048 * their own length field(s). 2049 */ 2050 if ((len > sizeof(struct ed_ring)) && 2051 (len <= MCLBYTES) && 2052 (packet_hdr.next_packet >= sc->rec_page_start) && 2053 (packet_hdr.next_packet < sc->rec_page_stop)) { 2054 /* 2055 * Go get packet. 2056 */ 2057 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring), 2058 len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY); 2059 ifp->if_ipackets++; 2060 } else { 2061 /* 2062 * Really BAD. The ring pointers are corrupted. 2063 */ 2064 log(LOG_ERR, 2065 "ed%d: NIC memory corrupt - invalid packet length %d\n", 2066 ifp->if_unit, len); 2067 ifp->if_ierrors++; 2068 ed_reset(ifp); 2069 return; 2070 } 2071 2072 /* 2073 * Update next packet pointer 2074 */ 2075 sc->next_packet = packet_hdr.next_packet; 2076 2077 /* 2078 * Update NIC boundry pointer - being careful to keep it one 2079 * buffer behind. (as recommended by NS databook) 2080 */ 2081 boundry = sc->next_packet - 1; 2082 if (boundry < sc->rec_page_start) 2083 boundry = sc->rec_page_stop - 1; 2084 2085 /* 2086 * Set NIC to page 0 registers to update boundry register 2087 */ 2088 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2089 2090 outb(sc->nic_addr + ED_P0_BNRY, boundry); 2091 2092 /* 2093 * Set NIC to page 1 registers before looping to top (prepare 2094 * to get 'CURR' current pointer) 2095 */ 2096 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 2097 } 2098} 2099 2100/* 2101 * Ethernet interface interrupt processor 2102 */ 2103void 2104edintr_sc(sc) 2105 struct ed_softc *sc; 2106{ 2107 struct ifnet *ifp = (struct ifnet *)sc; 2108 u_char isr; 2109 2110 if (sc->gone) 2111 return; 2112 /* 2113 * Set NIC to page 0 registers 2114 */ 2115 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2116 2117 /* 2118 * loop until there are no more new interrupts 2119 */ 2120 while ((isr = inb(sc->nic_addr + ED_P0_ISR)) != 0) { 2121 2122 /* 2123 * reset all the bits that we are 'acknowledging' by writing a 2124 * '1' to each bit position that was set (writing a '1' 2125 * *clears* the bit) 2126 */ 2127 outb(sc->nic_addr + ED_P0_ISR, isr); 2128 2129 /* 2130 * Handle transmitter interrupts. Handle these first because 2131 * the receiver will reset the board under some conditions. 2132 */ 2133 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { 2134 u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f; 2135 2136 /* 2137 * Check for transmit error. If a TX completed with an 2138 * error, we end up throwing the packet away. Really 2139 * the only error that is possible is excessive 2140 * collisions, and in this case it is best to allow 2141 * the automatic mechanisms of TCP to backoff the 2142 * flow. Of course, with UDP we're screwed, but this 2143 * is expected when a network is heavily loaded. 2144 */ 2145 (void) inb(sc->nic_addr + ED_P0_TSR); 2146 if (isr & ED_ISR_TXE) { 2147 2148 /* 2149 * Excessive collisions (16) 2150 */ 2151 if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) 2152 && (collisions == 0)) { 2153 2154 /* 2155 * When collisions total 16, the 2156 * P0_NCR will indicate 0, and the 2157 * TSR_ABT is set. 2158 */ 2159 collisions = 16; 2160 } 2161 2162 /* 2163 * update output errors counter 2164 */ 2165 ifp->if_oerrors++; 2166 } else { 2167 2168 /* 2169 * Update total number of successfully 2170 * transmitted packets. 2171 */ 2172 ifp->if_opackets++; 2173 } 2174 2175 /* 2176 * reset tx busy and output active flags 2177 */ 2178 sc->xmit_busy = 0; 2179 ifp->if_flags &= ~IFF_OACTIVE; 2180 2181 /* 2182 * clear watchdog timer 2183 */ 2184 ifp->if_timer = 0; 2185 2186 /* 2187 * Add in total number of collisions on last 2188 * transmission. 2189 */ 2190 ifp->if_collisions += collisions; 2191 2192 /* 2193 * Decrement buffer in-use count if not zero (can only 2194 * be zero if a transmitter interrupt occured while 2195 * not actually transmitting). If data is ready to 2196 * transmit, start it transmitting, otherwise defer 2197 * until after handling receiver 2198 */ 2199 if (sc->txb_inuse && --sc->txb_inuse) 2200 ed_xmit(sc); 2201 } 2202 2203 /* 2204 * Handle receiver interrupts 2205 */ 2206 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { 2207 2208 /* 2209 * Overwrite warning. In order to make sure that a 2210 * lockup of the local DMA hasn't occurred, we reset 2211 * and re-init the NIC. The NSC manual suggests only a 2212 * partial reset/re-init is necessary - but some chips 2213 * seem to want more. The DMA lockup has been seen 2214 * only with early rev chips - Methinks this bug was 2215 * fixed in later revs. -DG 2216 */ 2217 if (isr & ED_ISR_OVW) { 2218 ifp->if_ierrors++; 2219#ifdef DIAGNOSTIC 2220 log(LOG_WARNING, 2221 "ed%d: warning - receiver ring buffer overrun\n", 2222 ifp->if_unit); 2223#endif 2224 2225 /* 2226 * Stop/reset/re-init NIC 2227 */ 2228 ed_reset(ifp); 2229 } else { 2230 2231 /* 2232 * Receiver Error. One or more of: CRC error, 2233 * frame alignment error FIFO overrun, or 2234 * missed packet. 2235 */ 2236 if (isr & ED_ISR_RXE) { 2237 ifp->if_ierrors++; 2238#ifdef ED_DEBUG 2239 printf("ed%d: receive error %x\n", ifp->if_unit, 2240 inb(sc->nic_addr + ED_P0_RSR)); 2241#endif 2242 } 2243 2244 /* 2245 * Go get the packet(s) XXX - Doing this on an 2246 * error is dubious because there shouldn't be 2247 * any data to get (we've configured the 2248 * interface to not accept packets with 2249 * errors). 2250 */ 2251 2252 /* 2253 * Enable 16bit access to shared memory first 2254 * on WD/SMC boards. 2255 */ 2256 if (sc->isa16bit && 2257 (sc->vendor == ED_VENDOR_WD_SMC)) { 2258 2259 outb(sc->asic_addr + ED_WD_LAAR, 2260 (sc->wd_laar_proto |= 2261 ED_WD_LAAR_M16EN)); 2262 if (sc->is790) { 2263 outb(sc->asic_addr + ED_WD_MSR, 2264 ED_WD_MSR_MENB); 2265 } 2266 } 2267 ed_rint(sc); 2268 2269 /* disable 16bit access */ 2270 if (sc->isa16bit && 2271 (sc->vendor == ED_VENDOR_WD_SMC)) { 2272 2273 if (sc->is790) { 2274 outb(sc->asic_addr + ED_WD_MSR, 0x00); 2275 } 2276 outb(sc->asic_addr + ED_WD_LAAR, 2277 (sc->wd_laar_proto &= 2278 ~ED_WD_LAAR_M16EN)); 2279 } 2280 } 2281 } 2282 2283 /* 2284 * If it looks like the transmitter can take more data, 2285 * attempt to start output on the interface. This is done 2286 * after handling the receiver to give the receiver priority. 2287 */ 2288 if ((ifp->if_flags & IFF_OACTIVE) == 0) 2289 ed_start(ifp); 2290 2291 /* 2292 * return NIC CR to standard state: page 0, remote DMA 2293 * complete, start (toggling the TXP bit off, even if was just 2294 * set in the transmit routine, is *okay* - it is 'edge' 2295 * triggered from low to high) 2296 */ 2297 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2298 2299 /* 2300 * If the Network Talley Counters overflow, read them to reset 2301 * them. It appears that old 8390's won't clear the ISR flag 2302 * otherwise - resulting in an infinite loop. 2303 */ 2304 if (isr & ED_ISR_CNT) { 2305 (void) inb(sc->nic_addr + ED_P0_CNTR0); 2306 (void) inb(sc->nic_addr + ED_P0_CNTR1); 2307 (void) inb(sc->nic_addr + ED_P0_CNTR2); 2308 } 2309 } 2310} 2311 2312void 2313edintr(unit) 2314 int unit; 2315{ 2316 edintr_sc (&ed_softc[unit]); 2317} 2318 2319/* 2320 * Process an ioctl request. This code needs some work - it looks 2321 * pretty ugly. 2322 */ 2323static int 2324ed_ioctl(ifp, command, data) 2325 register struct ifnet *ifp; 2326 int command; 2327 caddr_t data; 2328{ 2329 register struct ifaddr *ifa = (struct ifaddr *) data; 2330 struct ed_softc *sc = ifp->if_softc; 2331 struct ifreq *ifr = (struct ifreq *) data; 2332 int s, error = 0; 2333 2334 if (sc->gone) { 2335 ifp->if_flags &= ~IFF_RUNNING; 2336 return ENXIO; 2337 } 2338 s = splimp(); 2339 2340 switch (command) { 2341 2342 case SIOCSIFADDR: 2343 ifp->if_flags |= IFF_UP; 2344 /* netifs are BUSY when UP */ 2345 sc->kdc.kdc_state = DC_BUSY; 2346 2347 switch (ifa->ifa_addr->sa_family) { 2348#ifdef INET 2349 case AF_INET: 2350 ed_init(ifp); /* before arpwhohas */ 2351 arp_ifinit((struct arpcom *)ifp, ifa); 2352 break; 2353#endif 2354#ifdef IPX 2355 /* 2356 * XXX - This code is probably wrong 2357 */ 2358 case AF_IPX: 2359 { 2360 register struct ipx_addr *ina = &(IA_SIPX(ifa)->sipx_addr); 2361 2362 if (ipx_nullhost(*ina)) 2363 ina->x_host = 2364 *(union ipx_host *) (sc->arpcom.ac_enaddr); 2365 else { 2366 bcopy((caddr_t) ina->x_host.c_host, 2367 (caddr_t) sc->arpcom.ac_enaddr, 2368 sizeof(sc->arpcom.ac_enaddr)); 2369 } 2370 2371 /* 2372 * Set new address 2373 */ 2374 ed_init(ifp); 2375 break; 2376 } 2377#endif 2378#ifdef NS 2379 /* 2380 * XXX - This code is probably wrong 2381 */ 2382 case AF_NS: 2383 { 2384 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 2385 2386 if (ns_nullhost(*ina)) 2387 ina->x_host = 2388 *(union ns_host *) (sc->arpcom.ac_enaddr); 2389 else { 2390 bcopy((caddr_t) ina->x_host.c_host, 2391 (caddr_t) sc->arpcom.ac_enaddr, 2392 sizeof(sc->arpcom.ac_enaddr)); 2393 } 2394 2395 /* 2396 * Set new address 2397 */ 2398 ed_init(ifp); 2399 break; 2400 } 2401#endif 2402 default: 2403 ed_init(ifp); 2404 break; 2405 } 2406 break; 2407 2408 case SIOCGIFADDR: 2409 { 2410 struct sockaddr *sa; 2411 2412 sa = (struct sockaddr *) & ifr->ifr_data; 2413 bcopy((caddr_t) sc->arpcom.ac_enaddr, 2414 (caddr_t) sa->sa_data, ETHER_ADDR_LEN); 2415 } 2416 break; 2417 2418 case SIOCSIFFLAGS: 2419 2420 /* 2421 * If the interface is marked up and stopped, then start it. 2422 * If it is marked down and running, then stop it. 2423 */ 2424 if (ifp->if_flags & IFF_UP) { 2425 if ((ifp->if_flags & IFF_RUNNING) == 0) 2426 ed_init(ifp); 2427 } else { 2428 if (ifp->if_flags & IFF_RUNNING) { 2429 ed_stop(sc); 2430 ifp->if_flags &= ~IFF_RUNNING; 2431 } 2432 } 2433 /* UP controls BUSY/IDLE */ 2434 sc->kdc.kdc_state = ((ifp->if_flags & IFF_UP) 2435 ? DC_BUSY 2436 : DC_IDLE); 2437 2438#if NBPFILTER > 0 2439 2440 /* 2441 * Promiscuous flag may have changed, so reprogram the RCR. 2442 */ 2443 ed_setrcr(sc); 2444#endif 2445 2446 /* 2447 * An unfortunate hack to provide the (required) software 2448 * control of the tranceiver for 3Com boards. The ALTPHYS flag 2449 * disables the tranceiver if set. 2450 */ 2451 if (sc->vendor == ED_VENDOR_3COM) { 2452 if (ifp->if_flags & IFF_ALTPHYS) { 2453 outb(sc->asic_addr + ED_3COM_CR, 0); 2454 } else { 2455 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 2456 } 2457 } 2458 break; 2459 2460 case SIOCADDMULTI: 2461 case SIOCDELMULTI: 2462 /* 2463 * Update out multicast list. 2464 */ 2465 error = (command == SIOCADDMULTI) ? 2466 ether_addmulti(ifr, &sc->arpcom) : 2467 ether_delmulti(ifr, &sc->arpcom); 2468 2469 if (error == ENETRESET) { 2470 2471 /* 2472 * Multicast list has changed; set the hardware filter 2473 * accordingly. 2474 */ 2475 ed_setrcr(sc); 2476 error = 0; 2477 } 2478 break; 2479 2480 case SIOCSIFMTU: 2481 /* 2482 * Set the interface MTU. 2483 */ 2484 if (ifr->ifr_mtu > ETHERMTU) { 2485 error = EINVAL; 2486 } else { 2487 ifp->if_mtu = ifr->ifr_mtu; 2488 } 2489 break; 2490 2491 default: 2492 error = EINVAL; 2493 } 2494 (void) splx(s); 2495 return (error); 2496} 2497 2498/* 2499 * Given a source and destination address, copy 'amount' of a packet from 2500 * the ring buffer into a linear destination buffer. Takes into account 2501 * ring-wrap. 2502 */ 2503static inline char * 2504ed_ring_copy(sc, src, dst, amount) 2505 struct ed_softc *sc; 2506 char *src; 2507 char *dst; 2508 u_short amount; 2509{ 2510 u_short tmp_amount; 2511 2512 /* does copy wrap to lower addr in ring buffer? */ 2513 if (src + amount > sc->mem_end) { 2514 tmp_amount = sc->mem_end - src; 2515 2516 /* copy amount up to end of NIC memory */ 2517 if (sc->mem_shared) 2518 bcopy(src, dst, tmp_amount); 2519 else 2520 ed_pio_readmem(sc, (int)src, dst, tmp_amount); 2521 2522 amount -= tmp_amount; 2523 src = sc->mem_ring; 2524 dst += tmp_amount; 2525 } 2526 if (sc->mem_shared) 2527 bcopy(src, dst, amount); 2528 else 2529 ed_pio_readmem(sc, (int)src, dst, amount); 2530 2531 return (src + amount); 2532} 2533 2534/* 2535 * Retreive packet from shared memory and send to the next level up via 2536 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 2537 */ 2538static void 2539ed_get_packet(sc, buf, len, multicast) 2540 struct ed_softc *sc; 2541 char *buf; 2542 u_short len; 2543 int multicast; 2544{ 2545 struct ether_header *eh; 2546 struct mbuf *m; 2547 2548 /* Allocate a header mbuf */ 2549 MGETHDR(m, M_DONTWAIT, MT_DATA); 2550 if (m == NULL) 2551 return; 2552 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 2553 m->m_pkthdr.len = m->m_len = len; 2554 2555 /* 2556 * We always put the received packet in a single buffer - 2557 * either with just an mbuf header or in a cluster attached 2558 * to the header. The +2 is to compensate for the alignment 2559 * fixup below. 2560 */ 2561 if ((len + 2) > MHLEN) { 2562 /* Attach an mbuf cluster */ 2563 MCLGET(m, M_DONTWAIT); 2564 2565 /* Insist on getting a cluster */ 2566 if ((m->m_flags & M_EXT) == 0) { 2567 m_freem(m); 2568 return; 2569 } 2570 } 2571 2572 /* 2573 * The +2 is to longword align the start of the real packet. 2574 * This is important for NFS. 2575 */ 2576 m->m_data += 2; 2577 eh = mtod(m, struct ether_header *); 2578 2579 /* 2580 * Get packet, including link layer address, from interface. 2581 */ 2582 ed_ring_copy(sc, buf, (char *)eh, len); 2583 2584#if NBPFILTER > 0 2585 2586 /* 2587 * Check if there's a BPF listener on this interface. If so, hand off 2588 * the raw packet to bpf. 2589 */ 2590 if (sc->arpcom.ac_if.if_bpf) { 2591 bpf_mtap(&sc->arpcom.ac_if, m); 2592 2593 /* 2594 * Note that the interface cannot be in promiscuous mode if 2595 * there are no BPF listeners. And if we are in promiscuous 2596 * mode, we have to check if this packet is really ours. 2597 */ 2598 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && 2599 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, 2600 sizeof(eh->ether_dhost)) != 0 && multicast == 0) { 2601 m_freem(m); 2602 return; 2603 } 2604 } 2605#endif 2606 2607 /* 2608 * Remove link layer address. 2609 */ 2610 m->m_pkthdr.len = m->m_len = len - sizeof(struct ether_header); 2611 m->m_data += sizeof(struct ether_header); 2612 2613 ether_input(&sc->arpcom.ac_if, eh, m); 2614 return; 2615} 2616 2617/* 2618 * Supporting routines 2619 */ 2620 2621/* 2622 * Given a NIC memory source address and a host memory destination 2623 * address, copy 'amount' from NIC to host using Programmed I/O. 2624 * The 'amount' is rounded up to a word - okay as long as mbufs 2625 * are word sized. 2626 * This routine is currently Novell-specific. 2627 */ 2628static void 2629ed_pio_readmem(sc, src, dst, amount) 2630 struct ed_softc *sc; 2631 int src; 2632 unsigned char *dst; 2633 unsigned short amount; 2634{ 2635 /* select page 0 registers */ 2636 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2637 2638 /* round up to a word */ 2639 if (amount & 1) 2640 ++amount; 2641 2642 /* set up DMA byte count */ 2643 outb(sc->nic_addr + ED_P0_RBCR0, amount); 2644 outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8); 2645 2646 /* set up source address in NIC mem */ 2647 outb(sc->nic_addr + ED_P0_RSAR0, src); 2648 outb(sc->nic_addr + ED_P0_RSAR1, src >> 8); 2649 2650 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); 2651 2652 if (sc->isa16bit) { 2653 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2); 2654 } else 2655 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); 2656 2657} 2658 2659/* 2660 * Stripped down routine for writing a linear buffer to NIC memory. 2661 * Only used in the probe routine to test the memory. 'len' must 2662 * be even. 2663 */ 2664static void 2665ed_pio_writemem(sc, src, dst, len) 2666 struct ed_softc *sc; 2667 char *src; 2668 unsigned short dst; 2669 unsigned short len; 2670{ 2671 int maxwait = 200; /* about 240us */ 2672 2673 /* select page 0 registers */ 2674 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2675 2676 /* reset remote DMA complete flag */ 2677 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2678 2679 /* set up DMA byte count */ 2680 outb(sc->nic_addr + ED_P0_RBCR0, len); 2681 outb(sc->nic_addr + ED_P0_RBCR1, len >> 8); 2682 2683 /* set up destination address in NIC mem */ 2684 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2685 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); 2686 2687 /* set remote DMA write */ 2688 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2689 2690 if (sc->isa16bit) 2691 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2); 2692 else 2693 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); 2694 2695 /* 2696 * Wait for remote DMA complete. This is necessary because on the 2697 * transmit side, data is handled internally by the NIC in bursts and 2698 * we can't start another remote DMA until this one completes. Not 2699 * waiting causes really bad things to happen - like the NIC 2700 * irrecoverably jamming the ISA bus. 2701 */ 2702 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2703} 2704 2705/* 2706 * Write an mbuf chain to the destination NIC memory address using 2707 * programmed I/O. 2708 */ 2709static u_short 2710ed_pio_write_mbufs(sc, m, dst) 2711 struct ed_softc *sc; 2712 struct mbuf *m; 2713 int dst; 2714{ 2715 struct ifnet *ifp = (struct ifnet *)sc; 2716 unsigned short total_len, dma_len; 2717 struct mbuf *mp; 2718 int maxwait = 200; /* about 240us */ 2719 2720 /* First, count up the total number of bytes to copy */ 2721 for (total_len = 0, mp = m; mp; mp = mp->m_next) 2722 total_len += mp->m_len; 2723 2724 dma_len = total_len; 2725 if (sc->isa16bit && (dma_len & 1)) 2726 dma_len++; 2727 2728 /* select page 0 registers */ 2729 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2730 2731 /* reset remote DMA complete flag */ 2732 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2733 2734 /* set up DMA byte count */ 2735 outb(sc->nic_addr + ED_P0_RBCR0, dma_len); 2736 outb(sc->nic_addr + ED_P0_RBCR1, dma_len >> 8); 2737 2738 /* set up destination address in NIC mem */ 2739 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2740 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); 2741 2742 /* set remote DMA write */ 2743 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2744 2745 /* 2746 * Transfer the mbuf chain to the NIC memory. 2747 * 16-bit cards require that data be transferred as words, and only words. 2748 * So that case requires some extra code to patch over odd-length mbufs. 2749 */ 2750 2751 if (!sc->isa16bit) { 2752 /* NE1000s are easy */ 2753 while (m) { 2754 if (m->m_len) { 2755 outsb(sc->asic_addr + ED_NOVELL_DATA, 2756 m->m_data, m->m_len); 2757 } 2758 m = m->m_next; 2759 } 2760 } else { 2761 /* NE2000s are a pain */ 2762 unsigned char *data; 2763 int len, wantbyte; 2764 unsigned char savebyte[2]; 2765 2766 wantbyte = 0; 2767 2768 while (m) { 2769 len = m->m_len; 2770 if (len) { 2771 data = mtod(m, caddr_t); 2772 /* finish the last word */ 2773 if (wantbyte) { 2774 savebyte[1] = *data; 2775 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte); 2776 data++; 2777 len--; 2778 wantbyte = 0; 2779 } 2780 /* output contiguous words */ 2781 if (len > 1) { 2782 outsw(sc->asic_addr + ED_NOVELL_DATA, 2783 data, len >> 1); 2784 data += len & ~1; 2785 len &= 1; 2786 } 2787 /* save last byte, if necessary */ 2788 if (len == 1) { 2789 savebyte[0] = *data; 2790 wantbyte = 1; 2791 } 2792 } 2793 m = m->m_next; 2794 } 2795 /* spit last byte */ 2796 if (wantbyte) { 2797 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte); 2798 } 2799 } 2800 2801 /* 2802 * Wait for remote DMA complete. This is necessary because on the 2803 * transmit side, data is handled internally by the NIC in bursts and 2804 * we can't start another remote DMA until this one completes. Not 2805 * waiting causes really bad things to happen - like the NIC 2806 * irrecoverably jamming the ISA bus. 2807 */ 2808 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2809 2810 if (!maxwait) { 2811 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n", 2812 ifp->if_unit); 2813 ed_reset(ifp); 2814 return(0); 2815 } 2816 return (total_len); 2817} 2818 2819static void 2820ed_setrcr(sc) 2821 struct ed_softc *sc; 2822{ 2823 struct ifnet *ifp = (struct ifnet *)sc; 2824 int i; 2825 2826 /* set page 1 registers */ 2827 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 2828 2829 if (ifp->if_flags & IFF_PROMISC) { 2830 2831 /* 2832 * Reconfigure the multicast filter. 2833 */ 2834 for (i = 0; i < 8; i++) 2835 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); 2836 2837 /* 2838 * And turn on promiscuous mode. Also enable reception of 2839 * runts and packets with CRC & alignment errors. 2840 */ 2841 /* Set page 0 registers */ 2842 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2843 2844 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM | 2845 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP); 2846 } else { 2847 /* set up multicast addresses and filter modes */ 2848 if (ifp->if_flags & IFF_MULTICAST) { 2849 u_long mcaf[2]; 2850 2851 if (ifp->if_flags & IFF_ALLMULTI) { 2852 mcaf[0] = 0xffffffff; 2853 mcaf[1] = 0xffffffff; 2854 } else 2855 ds_getmcaf(sc, mcaf); 2856 2857 /* 2858 * Set multicast filter on chip. 2859 */ 2860 for (i = 0; i < 8; i++) 2861 outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]); 2862 2863 /* Set page 0 registers */ 2864 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2865 2866 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB); 2867 } else { 2868 2869 /* 2870 * Initialize multicast address hashing registers to 2871 * not accept multicasts. 2872 */ 2873 for (i = 0; i < 8; ++i) 2874 outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00); 2875 2876 /* Set page 0 registers */ 2877 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2878 2879 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); 2880 } 2881 } 2882 2883 /* 2884 * Start interface. 2885 */ 2886 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2887} 2888 2889/* 2890 * Compute crc for ethernet address 2891 */ 2892static u_long 2893ds_crc(ep) 2894 u_char *ep; 2895{ 2896#define POLYNOMIAL 0x04c11db6 2897 register u_long crc = 0xffffffffL; 2898 register int carry, i, j; 2899 register u_char b; 2900 2901 for (i = 6; --i >= 0;) { 2902 b = *ep++; 2903 for (j = 8; --j >= 0;) { 2904 carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01); 2905 crc <<= 1; 2906 b >>= 1; 2907 if (carry) 2908 crc = ((crc ^ POLYNOMIAL) | carry); 2909 } 2910 } 2911 return crc; 2912#undef POLYNOMIAL 2913} 2914 2915/* 2916 * Compute the multicast address filter from the 2917 * list of multicast addresses we need to listen to. 2918 */ 2919static void 2920ds_getmcaf(sc, mcaf) 2921 struct ed_softc *sc; 2922 u_long *mcaf; 2923{ 2924 register u_int index; 2925 register u_char *af = (u_char *) mcaf; 2926 register struct ether_multi *enm; 2927 register struct ether_multistep step; 2928 2929 mcaf[0] = 0; 2930 mcaf[1] = 0; 2931 2932 ETHER_FIRST_MULTI(step, &sc->arpcom, enm); 2933 while (enm != NULL) { 2934 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 2935 mcaf[0] = 0xffffffff; 2936 mcaf[1] = 0xffffffff; 2937 return; 2938 } 2939 index = ds_crc(enm->enm_addrlo) >> 26; 2940 af[index >> 3] |= 1 << (index & 7); 2941 2942 ETHER_NEXT_MULTI(step, enm); 2943 } 2944} 2945