if_ed.c revision 13937
1353095Skevans/* 2353095Skevans * Copyright (c) 1995, David Greenman 3353095Skevans * All rights reserved. 4353095Skevans * 5353095Skevans * Redistribution and use in source and binary forms, with or without 6353095Skevans * modification, are permitted provided that the following conditions 7353095Skevans * are met: 8370509Sgit2svn * 1. Redistributions of source code must retain the above copyright 9370509Sgit2svn * notice unmodified, this list of conditions, and the following 10353095Skevans * disclaimer. 11353095Skevans * 2. Redistributions in binary form must reproduce the above copyright 12353095Skevans * notice, this list of conditions and the following disclaimer in the 13353095Skevans * documentation and/or other materials provided with the distribution. 14353095Skevans * 3. All advertising materials mentioning features or use of this software 15353095Skevans * must display the following acknowledgement: 16353095Skevans * This product includes software developed by David Greenman. 17353095Skevans * 4. The name of the author may not be used to endorse or promote products 18353095Skevans * derived from this software without specific prior written permission. 19353095Skevans * 20353095Skevans * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21353095Skevans * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22353095Skevans * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23353095Skevans * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24353095Skevans * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25353095Skevans * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26353095Skevans * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27353095Skevans * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28353095Skevans * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29353095Skevans * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30353095Skevans * SUCH DAMAGE. 31353095Skevans * 32353095Skevans * $Id: if_ed.c,v 1.93 1996/01/24 21:06:02 phk Exp $ 33353095Skevans */ 34353095Skevans 35353095Skevans/* 36353095Skevans * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 37353095Skevans * adapters. By David Greenman, 29-April-1993 38353095Skevans * 39353095Skevans * Currently supports the Western Digital/SMC 8003 and 8013 series, 40353095Skevans * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, 41353095Skevans * and a variety of similar clones. 42353095Skevans * 43353095Skevans */ 44353095Skevans 45353095Skevans#include "ed.h" 46353095Skevans#include "bpfilter.h" 47353095Skevans 48353095Skevans#include <sys/param.h> 49353095Skevans#include <sys/systm.h> 50353095Skevans#include <sys/conf.h> 51353095Skevans#include <sys/errno.h> 52353095Skevans#include <sys/ioctl.h> 53353095Skevans#include <sys/mbuf.h> 54353095Skevans#include <sys/socket.h> 55353095Skevans#include <sys/syslog.h> 56353095Skevans#include <sys/devconf.h> 57353095Skevans 58353095Skevans#include <net/if.h> 59353095Skevans#include <net/if_dl.h> 60353095Skevans#include <net/if_types.h> 61353095Skevans 62353095Skevans#ifdef INET 63353095Skevans#include <netinet/in.h> 64353095Skevans#include <netinet/in_systm.h> 65353095Skevans#include <netinet/in_var.h> 66353095Skevans#include <netinet/ip.h> 67353095Skevans#include <netinet/if_ether.h> 68353095Skevans#endif 69353095Skevans 70353095Skevans#ifdef IPX 71353095Skevans#include <netipx/ipx.h> 72353095Skevans#include <netipx/ipx_if.h> 73353095Skevans#endif 74353095Skevans 75353095Skevans#ifdef NS 76353095Skevans#include <netns/ns.h> 77353095Skevans#include <netns/ns_if.h> 78353095Skevans#endif 79353095Skevans 80353095Skevans#if NBPFILTER > 0 81353095Skevans#include <net/bpf.h> 82353095Skevans#include <net/bpfdesc.h> 83353095Skevans#endif 84353095Skevans 85353095Skevans#include <machine/clock.h> 86353095Skevans 87353095Skevans#include <i386/isa/isa.h> 88353095Skevans#include <i386/isa/isa_device.h> 89353095Skevans#include <i386/isa/icu.h> 90353095Skevans#include <i386/isa/if_edreg.h> 91353095Skevans 92353095Skevans/* 93353095Skevans * ed_softc: per line info and status 94353095Skevans */ 95353095Skevansstruct ed_softc { 96353095Skevans struct arpcom arpcom; /* ethernet common */ 97 98 char *type_str; /* pointer to type string */ 99 u_char vendor; /* interface vendor */ 100 u_char type; /* interface type code */ 101 u_char gone; /* HW missing, presumed having a good time */ 102 103 u_short asic_addr; /* ASIC I/O bus address */ 104 u_short nic_addr; /* NIC (DS8390) I/O bus address */ 105 106/* 107 * The following 'proto' variable is part of a work-around for 8013EBT asics 108 * being write-only. It's sort of a prototype/shadow of the real thing. 109 */ 110 u_char wd_laar_proto; 111 u_char cr_proto; 112 u_char isa16bit; /* width of access to card 0=8 or 1=16 */ 113 int is790; /* set by the probe code if the card is 790 114 * based */ 115 116 caddr_t mem_start; /* NIC memory start address */ 117 caddr_t mem_end; /* NIC memory end address */ 118 u_long mem_size; /* total NIC memory size */ 119 caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ 120 121 u_char mem_shared; /* NIC memory is shared with host */ 122 u_char xmit_busy; /* transmitter is busy */ 123 u_char txb_cnt; /* number of transmit buffers */ 124 u_char txb_inuse; /* number of TX buffers currently in-use */ 125 126 u_char txb_new; /* pointer to where new buffer will be added */ 127 u_char txb_next_tx; /* pointer to next buffer ready to xmit */ 128 u_short txb_len[8]; /* buffered xmit buffer lengths */ 129 u_char tx_page_start; /* first page of TX buffer area */ 130 u_char rec_page_start; /* first page of RX ring-buffer */ 131 u_char rec_page_stop; /* last page of RX ring-buffer */ 132 u_char next_packet; /* pointer to next unread RX packet */ 133 struct kern_devconf kdc; /* kernel configuration database info */ 134}; 135 136static struct ed_softc ed_softc[NED]; 137 138static int ed_attach __P((struct isa_device *)); 139static void ed_init __P((struct ifnet *)); 140static int ed_ioctl __P((struct ifnet *, int, caddr_t)); 141static int ed_probe __P((struct isa_device *)); 142static void ed_start __P((struct ifnet *)); 143static void ed_reset __P((struct ifnet *)); 144static void ed_watchdog __P((struct ifnet *)); 145 146static void ed_stop __P((struct ed_softc *)); 147static int ed_probe_generic8390 __P((struct ed_softc *)); 148static int ed_probe_WD80x3 __P((struct isa_device *)); 149static int ed_probe_3Com __P((struct isa_device *)); 150static int ed_probe_Novell __P((struct isa_device *)); 151static int ed_probe_pccard __P((struct isa_device *, u_char *)); 152 153static void ds_getmcaf __P((struct ed_softc *, u_long *)); 154 155static void ed_get_packet(struct ed_softc *, char *, /* u_short */ int, int); 156 157static void ed_rint __P((struct ed_softc *)); 158static void ed_xmit __P((struct ed_softc *)); 159static char * ed_ring_copy __P((struct ed_softc *, char *, char *, 160 /* u_short */ int)); 161 162static void ed_pio_readmem __P((struct ed_softc *, int, unsigned char *, 163 /* u_short */ int)); 164static void ed_pio_writemem __P((struct ed_softc *, char *, 165 /* u_short */ int, /* u_short */ int)); 166static u_short ed_pio_write_mbufs __P((struct ed_softc *, struct mbuf *, 167 int)); 168 169static void ed_setrcr(struct ed_softc *); 170static u_long ds_crc(u_char *ep); 171 172#include "crd.h" 173#if NCRD > 0 174#include <sys/select.h> 175#include <pccard/card.h> 176#include <pccard/driver.h> 177#include <pccard/slot.h> 178/* 179 * PC-Card (PCMCIA) specific code. 180 */ 181static int card_intr(struct pccard_dev *); /* Interrupt handler */ 182static void edunload(struct pccard_dev *); /* Disable driver */ 183static void edsuspend(struct pccard_dev *); /* Suspend driver */ 184static int edinit(struct pccard_dev *, int); /* init device */ 185 186static struct pccard_drv ed_info = 187 { 188 "ed", 189 card_intr, 190 edunload, 191 edsuspend, 192 edinit, 193 0, /* Attributes - presently unused */ 194 &net_imask /* Interrupt mask for device */ 195 /* This should also include net_imask?? */ 196 }; 197/* 198 * Called when a power down is wanted. Shuts down the 199 * device and configures the device as unavailable (but 200 * still loaded...). A resume is done by calling 201 * edinit with first=0. This is called when the user suspends 202 * the system, or the APM code suspends the system. 203 */ 204static void 205edsuspend(struct pccard_dev *dp) 206{ 207 printf("ed%d: suspending\n", dp->isahd.id_unit); 208} 209/* 210 * Initialize the device - called from Slot manager. 211 * if first is set, then initially check for 212 * the device's existence before initialising it. 213 * Once initialised, the device table may be set up. 214 */ 215static int 216edinit(struct pccard_dev *dp, int first) 217{ 218 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit]; 219/* 220 * validate unit number. 221 */ 222 if (first) { 223 if (dp->isahd.id_unit >= NED) 224 return(ENODEV); 225/* 226 * Probe the device. If a value is returned, the 227 * device was found at the location. 228 */ 229 230 sc->gone = 0; 231 if (ed_probe_pccard(&dp->isahd,dp->misc)==0) { 232 return(ENXIO); 233 } 234 if (ed_attach(&dp->isahd)==0) { 235 return(ENXIO); 236 } 237 } 238/* 239 * XXX TODO: 240 * If it was already inited before, the device structure 241 * should be already initialised. Here we should 242 * reset (and possibly restart) the hardware, but 243 * I am not sure of the best way to do this... 244 */ 245 return(0); 246} 247/* 248 * edunload - unload the driver and clear the table. 249 * XXX TODO: 250 * This is called usually when the card is ejected, but 251 * can be caused by the modunload of a controller driver. 252 * The idea is reset the driver's view of the device 253 * and ensure that any driver entry points such as 254 * read and write do not hang. 255 */ 256static void 257edunload(struct pccard_dev *dp) 258{ 259 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit]; 260 struct ifnet *ifp = &sc->arpcom.ac_if; 261 262 if (sc->kdc.kdc_state == DC_UNCONFIGURED) { 263 printf("ed%d: already unloaded\n", dp->isahd.id_unit); 264 return; 265 } 266 sc->kdc.kdc_state = DC_UNCONFIGURED; 267 ifp->if_flags &= ~IFF_RUNNING; 268 if_down(ifp); 269 sc->gone = 1; 270 printf("ed%d: unload\n", dp->isahd.id_unit); 271} 272 273/* 274 * card_intr - Shared interrupt called from 275 * front end of PC-Card handler. 276 */ 277static int 278card_intr(struct pccard_dev *dp) 279{ 280 edintr(dp->isahd.id_unit); 281 return(1); 282} 283#endif /* NCRD > 0 */ 284 285struct isa_driver eddriver = { 286 ed_probe, 287 ed_attach, 288 "ed", 289 1 /* We are ultra sensitive */ 290}; 291 292/* 293 * Interrupt conversion table for WD/SMC ASIC/83C584 294 * (IRQ* are defined in icu.h) 295 */ 296static unsigned short ed_intr_mask[] = { 297 IRQ9, 298 IRQ3, 299 IRQ5, 300 IRQ7, 301 IRQ10, 302 IRQ11, 303 IRQ15, 304 IRQ4 305}; 306 307/* 308 * Interrupt conversion table for 83C790 309 */ 310static unsigned short ed_790_intr_mask[] = { 311 0, 312 IRQ9, 313 IRQ3, 314 IRQ5, 315 IRQ7, 316 IRQ10, 317 IRQ11, 318 IRQ15 319}; 320 321#define ETHER_MIN_LEN 60 322#define ETHER_MAX_LEN 1514 323#define ETHER_ADDR_LEN 6 324#define ETHER_HDR_SIZE 14 325 326static struct kern_devconf kdc_ed_template = { 327 0, 0, 0, /* filled in by dev_attach */ 328 "ed", 0, { MDDT_ISA, 0, "net" }, 329 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN, 330 &kdc_isa0, /* parent */ 331 0, /* parentdata */ 332 DC_UNCONFIGURED, /* state */ 333 "", /* description */ 334 DC_CLS_NETIF /* class */ 335}; 336 337static inline void 338ed_registerdev(struct isa_device *id, const char *descr) 339{ 340 struct kern_devconf *kdc = &ed_softc[id->id_unit].kdc; 341 *kdc = kdc_ed_template; 342 kdc->kdc_unit = id->id_unit; 343 kdc->kdc_parentdata = id; 344 kdc->kdc_description = descr; 345 dev_attach(kdc); 346} 347 348/* 349 * Determine if the device is present 350 * 351 * on entry: 352 * a pointer to an isa_device struct 353 * on exit: 354 * NULL if device not found 355 * or # of i/o addresses used (if found) 356 */ 357static int 358ed_probe(isa_dev) 359 struct isa_device *isa_dev; 360{ 361 int nports; 362#if NCRD > 0 363/* 364 * If PC-Card probe required, then register driver with 365 * slot manager. 366 */ 367 pccard_add_driver(&ed_info); 368#endif /* NCRD > 0 */ 369 370#ifndef DEV_LKM 371 ed_registerdev(isa_dev, "Ethernet adapter"); 372#endif /* not DEV_LKM */ 373 374 nports = ed_probe_WD80x3(isa_dev); 375 if (nports) 376 return (nports); 377 378 nports = ed_probe_3Com(isa_dev); 379 if (nports) 380 return (nports); 381 382 nports = ed_probe_Novell(isa_dev); 383 if (nports) 384 return (nports); 385 386 return (0); 387} 388 389/* 390 * Generic probe routine for testing for the existance of a DS8390. 391 * Must be called after the NIC has just been reset. This routine 392 * works by looking at certain register values that are guaranteed 393 * to be initialized a certain way after power-up or reset. Seems 394 * not to currently work on the 83C690. 395 * 396 * Specifically: 397 * 398 * Register reset bits set bits 399 * Command Register (CR) TXP, STA RD2, STP 400 * Interrupt Status (ISR) RST 401 * Interrupt Mask (IMR) All bits 402 * Data Control (DCR) LAS 403 * Transmit Config. (TCR) LB1, LB0 404 * 405 * We only look at the CR and ISR registers, however, because looking at 406 * the others would require changing register pages (which would be 407 * intrusive if this isn't an 8390). 408 * 409 * Return 1 if 8390 was found, 0 if not. 410 */ 411 412static int 413ed_probe_generic8390(sc) 414 struct ed_softc *sc; 415{ 416 if ((inb(sc->nic_addr + ED_P0_CR) & 417 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 418 (ED_CR_RD2 | ED_CR_STP)) 419 return (0); 420 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) 421 return (0); 422 423 return (1); 424} 425 426/* 427 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards 428 */ 429static int 430ed_probe_WD80x3(isa_dev) 431 struct isa_device *isa_dev; 432{ 433 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 434 int i; 435 u_int memsize; 436 u_char iptr, isa16bit, sum; 437 438 sc->asic_addr = isa_dev->id_iobase; 439 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; 440 sc->is790 = 0; 441 442#ifdef TOSH_ETHER 443 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW); 444 DELAY(10000); 445#endif 446 447 /* 448 * Attempt to do a checksum over the station address PROM. If it 449 * fails, it's probably not a SMC/WD board. There is a problem with 450 * this, though: some clone WD boards don't pass the checksum test. 451 * Danpex boards for one. 452 */ 453 for (sum = 0, i = 0; i < 8; ++i) 454 sum += inb(sc->asic_addr + ED_WD_PROM + i); 455 456 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) { 457 458 /* 459 * Checksum is invalid. This often happens with cheap WD8003E 460 * clones. In this case, the checksum byte (the eighth byte) 461 * seems to always be zero. 462 */ 463 if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E || 464 inb(sc->asic_addr + ED_WD_PROM + 7) != 0) 465 return (0); 466 } 467 /* reset card to force it into a known state. */ 468#ifdef TOSH_ETHER 469 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW); 470#else 471 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST); 472#endif 473 DELAY(100); 474 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); 475 /* wait in the case this card is reading it's EEROM */ 476 DELAY(5000); 477 478 sc->vendor = ED_VENDOR_WD_SMC; 479 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID); 480 481 /* 482 * Set initial values for width/size. 483 */ 484 memsize = 8192; 485 isa16bit = 0; 486 switch (sc->type) { 487 case ED_TYPE_WD8003S: 488 sc->type_str = "WD8003S"; 489 sc->kdc.kdc_description = "Ethernet adapter: WD 8003S"; 490 break; 491 case ED_TYPE_WD8003E: 492 sc->type_str = "WD8003E"; 493 sc->kdc.kdc_description = "Ethernet adapter: WD 8003E"; 494 break; 495 case ED_TYPE_WD8003EB: 496 sc->type_str = "WD8003EB"; 497 sc->kdc.kdc_description = "Ethernet adapter: WD 8003EB"; 498 break; 499 case ED_TYPE_WD8003W: 500 sc->type_str = "WD8003W"; 501 sc->kdc.kdc_description = "Ethernet adapter: WD 8003W"; 502 break; 503 case ED_TYPE_WD8013EBT: 504 sc->type_str = "WD8013EBT"; 505 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBT"; 506 memsize = 16384; 507 isa16bit = 1; 508 break; 509 case ED_TYPE_WD8013W: 510 sc->type_str = "WD8013W"; 511 sc->kdc.kdc_description = "Ethernet adapter: WD 8013W"; 512 memsize = 16384; 513 isa16bit = 1; 514 break; 515 case ED_TYPE_WD8013EP: /* also WD8003EP */ 516 if (inb(sc->asic_addr + ED_WD_ICR) 517 & ED_WD_ICR_16BIT) { 518 isa16bit = 1; 519 memsize = 16384; 520 sc->type_str = "WD8013EP"; 521 sc->kdc.kdc_description = 522 "Ethernet adapter: WD 8013EP"; 523 } else { 524 sc->type_str = "WD8003EP"; 525 sc->kdc.kdc_description = 526 "Ethernet adapter: WD 8003EP"; 527 } 528 break; 529 case ED_TYPE_WD8013WC: 530 sc->type_str = "WD8013WC"; 531 sc->kdc.kdc_description = "Ethernet adapter: WD 8013WC"; 532 memsize = 16384; 533 isa16bit = 1; 534 break; 535 case ED_TYPE_WD8013EBP: 536 sc->type_str = "WD8013EBP"; 537 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBP"; 538 memsize = 16384; 539 isa16bit = 1; 540 break; 541 case ED_TYPE_WD8013EPC: 542 sc->type_str = "WD8013EPC"; 543 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EPC"; 544 memsize = 16384; 545 isa16bit = 1; 546 break; 547 case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */ 548 case ED_TYPE_SMC8216T: 549 if (sc->type == ED_TYPE_SMC8216C) { 550 sc->type_str = "SMC8216/SMC8216C"; 551 sc->kdc.kdc_description = 552 "Ethernet adapter: SMC 8216 or 8216C"; 553 } else { 554 sc->type_str = "SMC8216T"; 555 sc->kdc.kdc_description = 556 "Ethernet adapter: SMC 8216T"; 557 } 558 559 outb(sc->asic_addr + ED_WD790_HWR, 560 inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH); 561 switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) { 562 case ED_WD790_RAR_SZ64: 563 memsize = 65536; 564 break; 565 case ED_WD790_RAR_SZ32: 566 memsize = 32768; 567 break; 568 case ED_WD790_RAR_SZ16: 569 memsize = 16384; 570 break; 571 case ED_WD790_RAR_SZ8: 572 /* 8216 has 16K shared mem -- 8416 has 8K */ 573 if (sc->type == ED_TYPE_SMC8216C) { 574 sc->type_str = "SMC8416C/SMC8416BT"; 575 sc->kdc.kdc_description = 576 "Ethernet adapter: SMC 8416C or 8416BT"; 577 } else { 578 sc->type_str = "SMC8416T"; 579 sc->kdc.kdc_description = 580 "Ethernet adapter: SMC 8416T"; 581 } 582 memsize = 8192; 583 break; 584 } 585 outb(sc->asic_addr + ED_WD790_HWR, 586 inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); 587 588 isa16bit = 1; 589 sc->is790 = 1; 590 break; 591#ifdef TOSH_ETHER 592 case ED_TYPE_TOSHIBA1: 593 sc->type_str = "Toshiba1"; 594 sc->kdc.kdc_description = "Ethernet adapter: Toshiba1"; 595 memsize = 32768; 596 isa16bit = 1; 597 break; 598 case ED_TYPE_TOSHIBA4: 599 sc->type_str = "Toshiba4"; 600 sc->kdc.kdc_description = "Ethernet adapter: Toshiba4"; 601 memsize = 32768; 602 isa16bit = 1; 603 break; 604#endif 605 default: 606 sc->type_str = ""; 607 break; 608 } 609 610 /* 611 * Make some adjustments to initial values depending on what is found 612 * in the ICR. 613 */ 614 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) 615#ifdef TOSH_ETHER 616 && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) 617#endif 618 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { 619 isa16bit = 0; 620 memsize = 8192; 621 } 622 623#if ED_DEBUG 624 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", 625 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); 626 for (i = 0; i < 8; i++) 627 printf("%x -> %x\n", i, inb(sc->asic_addr + i)); 628#endif 629 630 /* 631 * Allow the user to override the autoconfiguration 632 */ 633 if (isa_dev->id_msize) 634 memsize = isa_dev->id_msize; 635 636 /* 637 * (note that if the user specifies both of the following flags that 638 * '8bit' mode intentionally has precedence) 639 */ 640 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) 641 isa16bit = 1; 642 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE) 643 isa16bit = 0; 644 645 /* 646 * If possible, get the assigned interrupt number from the card and 647 * use it. 648 */ 649 if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) { 650 651 /* 652 * Assemble together the encoded interrupt number. 653 */ 654 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | 655 ((inb(isa_dev->id_iobase + ED_WD_IRR) & 656 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); 657 658 /* 659 * If no interrupt specified (or "?"), use what the board tells us. 660 */ 661 if (isa_dev->id_irq <= 0) 662 isa_dev->id_irq = ed_intr_mask[iptr]; 663 664 /* 665 * Enable the interrupt. 666 */ 667 outb(isa_dev->id_iobase + ED_WD_IRR, 668 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); 669 } 670 if (sc->is790) { 671 outb(isa_dev->id_iobase + ED_WD790_HWR, 672 inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH); 673 iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) | 674 (inb(isa_dev->id_iobase + ED_WD790_GCR) & 675 (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2); 676 outb(isa_dev->id_iobase + ED_WD790_HWR, 677 inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); 678 679 /* 680 * If no interrupt specified (or "?"), use what the board tells us. 681 */ 682 if (isa_dev->id_irq <= 0) 683 isa_dev->id_irq = ed_790_intr_mask[iptr]; 684 685 /* 686 * Enable interrupts. 687 */ 688 outb(isa_dev->id_iobase + ED_WD790_ICR, 689 inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL); 690 } 691 if (isa_dev->id_irq <= 0) { 692 printf("ed%d: %s cards don't support auto-detected/assigned interrupts.\n", 693 isa_dev->id_unit, sc->type_str); 694 return (0); 695 } 696 sc->isa16bit = isa16bit; 697 sc->mem_shared = 1; 698 isa_dev->id_msize = memsize; 699 sc->mem_start = (caddr_t) isa_dev->id_maddr; 700 701 /* 702 * allocate one xmit buffer if < 16k, two buffers otherwise 703 */ 704 if ((memsize < 16384) || 705 (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) { 706 sc->txb_cnt = 1; 707 } else { 708 sc->txb_cnt = 2; 709 } 710 sc->tx_page_start = ED_WD_PAGE_OFFSET; 711 sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt; 712 sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE; 713 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start); 714 sc->mem_size = memsize; 715 sc->mem_end = sc->mem_start + memsize; 716 717 /* 718 * Get station address from on-board ROM 719 */ 720 for (i = 0; i < ETHER_ADDR_LEN; ++i) 721 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); 722 723 /* 724 * Set upper address bits and 8/16 bit access to shared memory 725 */ 726 if (isa16bit) { 727 if (sc->is790) { 728 sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR); 729 outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN); 730 } else { 731 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 732 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | 733 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 734 } 735 } else { 736 if (((sc->type & ED_WD_SOFTCONFIG) || 737#ifdef TOSH_ETHER 738 (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) || 739#endif 740 (sc->type == ED_TYPE_WD8013EBT)) && (!sc->is790)) { 741 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 742 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 743 } 744 } 745 746 /* 747 * Set address and enable interface shared memory. 748 */ 749 if (!sc->is790) { 750#ifdef TOSH_ETHER 751 outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); 752 outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f)); 753 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW); 754 755#else 756 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & 757 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); 758#endif 759 sc->cr_proto = ED_CR_RD2; 760 } else { 761 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); 762 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH)); 763 outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) | 764 ((kvtop(sc->mem_start) >> 11) & 0x40) | 765 (inb(sc->asic_addr + ED_WD790_RAR) & 0xb0)); 766 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH)); 767 sc->cr_proto = 0; 768 } 769 770#if 0 771 printf("starting memory performance test at 0x%x, size %d...\n", 772 sc->mem_start, memsize*16384); 773 for (i = 0; i < 16384; i++) 774 bzero(sc->mem_start, memsize); 775 printf("***DONE***\n"); 776#endif 777 778 /* 779 * Now zero memory and verify that it is clear 780 */ 781 bzero(sc->mem_start, memsize); 782 783 for (i = 0; i < memsize; ++i) { 784 if (sc->mem_start[i]) { 785 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 786 isa_dev->id_unit, kvtop(sc->mem_start + i)); 787 788 /* 789 * Disable 16 bit access to shared memory 790 */ 791 if (isa16bit) { 792 if (sc->is790) { 793 outb(sc->asic_addr + ED_WD_MSR, 0x00); 794 } 795 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 796 ~ED_WD_LAAR_M16EN)); 797 } 798 return (0); 799 } 800 } 801 802 /* 803 * Disable 16bit access to shared memory - we leave it 804 * disabled so that 1) machines reboot properly when the board 805 * is set 16 bit mode and there are conflicting 8bit 806 * devices/ROMS in the same 128k address space as this boards 807 * shared memory. and 2) so that other 8 bit devices with 808 * shared memory can be used in this 128k region, too. 809 */ 810 if (isa16bit) { 811 if (sc->is790) { 812 outb(sc->asic_addr + ED_WD_MSR, 0x00); 813 } 814 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 815 ~ED_WD_LAAR_M16EN)); 816 } 817 return (ED_WD_IO_PORTS); 818} 819 820/* 821 * Probe and vendor-specific initialization routine for 3Com 3c503 boards 822 */ 823static int 824ed_probe_3Com(isa_dev) 825 struct isa_device *isa_dev; 826{ 827 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 828 int i; 829 u_int memsize; 830 u_char isa16bit; 831 832 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; 833 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; 834 835 /* 836 * Verify that the kernel configured I/O address matches the board 837 * configured address 838 */ 839 switch (inb(sc->asic_addr + ED_3COM_BCFR)) { 840 case ED_3COM_BCFR_300: 841 if (isa_dev->id_iobase != 0x300) 842 return (0); 843 break; 844 case ED_3COM_BCFR_310: 845 if (isa_dev->id_iobase != 0x310) 846 return (0); 847 break; 848 case ED_3COM_BCFR_330: 849 if (isa_dev->id_iobase != 0x330) 850 return (0); 851 break; 852 case ED_3COM_BCFR_350: 853 if (isa_dev->id_iobase != 0x350) 854 return (0); 855 break; 856 case ED_3COM_BCFR_250: 857 if (isa_dev->id_iobase != 0x250) 858 return (0); 859 break; 860 case ED_3COM_BCFR_280: 861 if (isa_dev->id_iobase != 0x280) 862 return (0); 863 break; 864 case ED_3COM_BCFR_2A0: 865 if (isa_dev->id_iobase != 0x2a0) 866 return (0); 867 break; 868 case ED_3COM_BCFR_2E0: 869 if (isa_dev->id_iobase != 0x2e0) 870 return (0); 871 break; 872 default: 873 return (0); 874 } 875 876 /* 877 * Verify that the kernel shared memory address matches the board 878 * configured address. 879 */ 880 switch (inb(sc->asic_addr + ED_3COM_PCFR)) { 881 case ED_3COM_PCFR_DC000: 882 if (kvtop(isa_dev->id_maddr) != 0xdc000) 883 return (0); 884 break; 885 case ED_3COM_PCFR_D8000: 886 if (kvtop(isa_dev->id_maddr) != 0xd8000) 887 return (0); 888 break; 889 case ED_3COM_PCFR_CC000: 890 if (kvtop(isa_dev->id_maddr) != 0xcc000) 891 return (0); 892 break; 893 case ED_3COM_PCFR_C8000: 894 if (kvtop(isa_dev->id_maddr) != 0xc8000) 895 return (0); 896 break; 897 default: 898 return (0); 899 } 900 901 902 /* 903 * Reset NIC and ASIC. Enable on-board transceiver throughout reset 904 * sequence because it'll lock up if the cable isn't connected if we 905 * don't. 906 */ 907 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); 908 909 /* 910 * Wait for a while, then un-reset it 911 */ 912 DELAY(50); 913 914 /* 915 * The 3Com ASIC defaults to rather strange settings for the CR after 916 * a reset - it's important to set it again after the following outb 917 * (this is done when we map the PROM below). 918 */ 919 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 920 921 /* 922 * Wait a bit for the NIC to recover from the reset 923 */ 924 DELAY(5000); 925 926 sc->vendor = ED_VENDOR_3COM; 927 sc->type_str = "3c503"; 928 sc->kdc.kdc_description = "Ethernet adapter: 3c503"; 929 sc->mem_shared = 1; 930 sc->cr_proto = ED_CR_RD2; 931 932 /* 933 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window 934 * to it. 935 */ 936 memsize = 8192; 937 938 /* 939 * Get station address from on-board ROM 940 */ 941 942 /* 943 * First, map ethernet address PROM over the top of where the NIC 944 * registers normally appear. 945 */ 946 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); 947 948 for (i = 0; i < ETHER_ADDR_LEN; ++i) 949 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i); 950 951 /* 952 * Unmap PROM - select NIC registers. The proper setting of the 953 * tranceiver is set in ed_init so that the attach code is given a 954 * chance to set the default based on a compile-time config option 955 */ 956 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 957 958 /* 959 * Determine if this is an 8bit or 16bit board 960 */ 961 962 /* 963 * select page 0 registers 964 */ 965 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 966 967 /* 968 * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit 969 * board. 970 */ 971 outb(sc->nic_addr + ED_P0_DCR, 0); 972 973 /* 974 * select page 2 registers 975 */ 976 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP); 977 978 /* 979 * The 3c503 forces the WTS bit to a one if this is a 16bit board 980 */ 981 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS) 982 isa16bit = 1; 983 else 984 isa16bit = 0; 985 986 /* 987 * select page 0 registers 988 */ 989 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP); 990 991 sc->mem_start = (caddr_t) isa_dev->id_maddr; 992 sc->mem_size = memsize; 993 sc->mem_end = sc->mem_start + memsize; 994 995 /* 996 * We have an entire 8k window to put the transmit buffers on the 997 * 16bit boards. But since the 16bit 3c503's shared memory is only 998 * fast enough to overlap the loading of one full-size packet, trying 999 * to load more than 2 buffers can actually leave the transmitter idle 1000 * during the load. So 2 seems the best value. (Although a mix of 1001 * variable-sized packets might change this assumption. Nonetheless, 1002 * we optimize for linear transfers of same-size packets.) 1003 */ 1004 if (isa16bit) { 1005 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) 1006 sc->txb_cnt = 1; 1007 else 1008 sc->txb_cnt = 2; 1009 1010 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; 1011 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; 1012 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 1013 ED_3COM_RX_PAGE_OFFSET_16BIT; 1014 sc->mem_ring = sc->mem_start; 1015 } else { 1016 sc->txb_cnt = 1; 1017 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; 1018 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; 1019 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 1020 ED_3COM_TX_PAGE_OFFSET_8BIT; 1021 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); 1022 } 1023 1024 sc->isa16bit = isa16bit; 1025 1026 /* 1027 * Initialize GA page start/stop registers. Probably only needed if 1028 * doing DMA, but what the hell. 1029 */ 1030 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); 1031 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); 1032 1033 /* 1034 * Set IRQ. 3c503 only allows a choice of irq 2-5. 1035 */ 1036 switch (isa_dev->id_irq) { 1037 case IRQ2: 1038 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2); 1039 break; 1040 case IRQ3: 1041 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3); 1042 break; 1043 case IRQ4: 1044 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4); 1045 break; 1046 case IRQ5: 1047 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5); 1048 break; 1049 default: 1050 printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n", 1051 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); 1052 return (0); 1053 } 1054 1055 /* 1056 * Initialize GA configuration register. Set bank and enable shared 1057 * mem. 1058 */ 1059 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | 1060 ED_3COM_GACFR_MBS0); 1061 1062 /* 1063 * Initialize "Vector Pointer" registers. These gawd-awful things are 1064 * compared to 20 bits of the address on ISA, and if they match, the 1065 * shared memory is disabled. We set them to 0xffff0...allegedly the 1066 * reset vector. 1067 */ 1068 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); 1069 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); 1070 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00); 1071 1072 /* 1073 * Zero memory and verify that it is clear 1074 */ 1075 bzero(sc->mem_start, memsize); 1076 1077 for (i = 0; i < memsize; ++i) 1078 if (sc->mem_start[i]) { 1079 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 1080 isa_dev->id_unit, kvtop(sc->mem_start + i)); 1081 return (0); 1082 } 1083 isa_dev->id_msize = memsize; 1084 return (ED_3COM_IO_PORTS); 1085} 1086 1087/* 1088 * Probe and vendor-specific initialization routine for NE1000/2000 boards 1089 */ 1090static int 1091ed_probe_Novell(isa_dev) 1092 struct isa_device *isa_dev; 1093{ 1094 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1095 u_int memsize, n; 1096 u_char romdata[16], tmp; 1097 static char test_pattern[32] = "THIS is A memory TEST pattern"; 1098 char test_buffer[32]; 1099 1100 sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET; 1101 sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET; 1102 1103 /* XXX - do Novell-specific probe here */ 1104 1105 /* Reset the board */ 1106#ifdef GWETHER 1107 outb(sc->asic_addr + ED_NOVELL_RESET, 0); 1108 DELAY(200); 1109#endif /* GWETHER */ 1110 tmp = inb(sc->asic_addr + ED_NOVELL_RESET); 1111 1112 /* 1113 * I don't know if this is necessary; probably cruft leftover from 1114 * Clarkson packet driver code. Doesn't do a thing on the boards I've 1115 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 1116 * non-invasive...but some boards don't seem to reset and I don't have 1117 * complete documentation on what the 'right' thing to do is...so we 1118 * do the invasive thing for now. Yuck.] 1119 */ 1120 outb(sc->asic_addr + ED_NOVELL_RESET, tmp); 1121 DELAY(5000); 1122 1123 /* 1124 * This is needed because some NE clones apparently don't reset the 1125 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 1126 * - this makes the probe invasive! ...Done against my better 1127 * judgement. -DLG 1128 */ 1129 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 1130 1131 DELAY(5000); 1132 1133 /* Make sure that we really have an 8390 based board */ 1134 if (!ed_probe_generic8390(sc)) 1135 return (0); 1136 1137 sc->vendor = ED_VENDOR_NOVELL; 1138 sc->mem_shared = 0; 1139 sc->cr_proto = ED_CR_RD2; 1140 isa_dev->id_maddr = 0; 1141 1142 /* 1143 * Test the ability to read and write to the NIC memory. This has the 1144 * side affect of determining if this is an NE1000 or an NE2000. 1145 */ 1146 1147 /* 1148 * This prevents packets from being stored in the NIC memory when the 1149 * readmem routine turns on the start bit in the CR. 1150 */ 1151 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); 1152 1153 /* Temporarily initialize DCR for byte operations */ 1154 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 1155 1156 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); 1157 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); 1158 1159 sc->isa16bit = 0; 1160 1161 /* 1162 * Write a test pattern in byte mode. If this fails, then there 1163 * probably isn't any memory at 8k - which likely means that the board 1164 * is an NE2000. 1165 */ 1166 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); 1167 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); 1168 1169 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 1170 /* not an NE1000 - try NE2000 */ 1171 1172 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 1173 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); 1174 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); 1175 1176 sc->isa16bit = 1; 1177 1178 /* 1179 * Write a test pattern in word mode. If this also fails, then 1180 * we don't know what this board is. 1181 */ 1182 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 1183 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 1184 1185 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) 1186 return (0); /* not an NE2000 either */ 1187 1188 sc->type = ED_TYPE_NE2000; 1189 sc->type_str = "NE2000"; 1190 sc->kdc.kdc_description = "Ethernet adapter: NE2000"; 1191 } else { 1192 sc->type = ED_TYPE_NE1000; 1193 sc->type_str = "NE1000"; 1194 sc->kdc.kdc_description = "Ethernet adapter: NE1000"; 1195 } 1196 1197 /* 8k of memory plus an additional 8k if 16bit */ 1198 memsize = 8192 + sc->isa16bit * 8192; 1199 1200#if 0 /* probably not useful - NE boards only come two ways */ 1201 /* allow kernel config file overrides */ 1202 if (isa_dev->id_msize) 1203 memsize = isa_dev->id_msize; 1204#endif 1205 1206 sc->mem_size = memsize; 1207 1208 /* NIC memory doesn't start at zero on an NE board */ 1209 /* The start address is tied to the bus width */ 1210 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192; 1211 sc->mem_end = sc->mem_start + memsize; 1212 sc->tx_page_start = memsize / ED_PAGE_SIZE; 1213 1214#ifdef GWETHER 1215 { 1216 int x, i, mstart = 0, msize = 0; 1217 char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE]; 1218 1219 for (i = 0; i < ED_PAGE_SIZE; i++) 1220 pbuf0[i] = 0; 1221 1222 /* Clear all the memory. */ 1223 for (x = 1; x < 256; x++) 1224 ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE); 1225 1226 /* Search for the start of RAM. */ 1227 for (x = 1; x < 256; x++) { 1228 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1229 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 1230 for (i = 0; i < ED_PAGE_SIZE; i++) 1231 pbuf[i] = 255 - x; 1232 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); 1233 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1234 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 1235 mstart = x * ED_PAGE_SIZE; 1236 msize = ED_PAGE_SIZE; 1237 break; 1238 } 1239 } 1240 } 1241 1242 if (mstart == 0) { 1243 printf("ed%d: Cannot find start of RAM.\n", isa_dev->id_unit); 1244 return 0; 1245 } 1246 /* Search for the start of RAM. */ 1247 for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) { 1248 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1249 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 1250 for (i = 0; i < ED_PAGE_SIZE; i++) 1251 pbuf[i] = 255 - x; 1252 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); 1253 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1254 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 1255 msize += ED_PAGE_SIZE; 1256 else { 1257 break; 1258 } 1259 } else { 1260 break; 1261 } 1262 } 1263 1264 if (msize == 0) { 1265 printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", isa_dev->id_unit, mstart, x); 1266 return 0; 1267 } 1268 printf("ed%d: RAM start at %d, size : %d.\n", isa_dev->id_unit, mstart, msize); 1269 1270 sc->mem_size = msize; 1271 sc->mem_start = (char *) mstart; 1272 sc->mem_end = (char *) (msize + mstart); 1273 sc->tx_page_start = mstart / ED_PAGE_SIZE; 1274 } 1275#endif /* GWETHER */ 1276 1277 /* 1278 * Use one xmit buffer if < 16k, two buffers otherwise (if not told 1279 * otherwise). 1280 */ 1281 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) 1282 sc->txb_cnt = 1; 1283 else 1284 sc->txb_cnt = 2; 1285 1286 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 1287 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 1288 1289 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 1290 1291 ed_pio_readmem(sc, 0, romdata, 16); 1292 for (n = 0; n < ETHER_ADDR_LEN; n++) 1293 sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)]; 1294 1295#ifdef GWETHER 1296 if (sc->arpcom.ac_enaddr[2] == 0x86) { 1297 sc->type_str = "Gateway AT"; 1298 sc->kdc.kdc_description = "Ethernet adapter: Gateway AT"; 1299 } 1300#endif /* GWETHER */ 1301 1302 /* clear any pending interrupts that might have occurred above */ 1303 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1304 1305 return (ED_NOVELL_IO_PORTS); 1306} 1307 1308 1309/* 1310 * Probe and vendor-specific initialization routine for PCCARDs 1311 */ 1312static int 1313ed_probe_pccard(isa_dev, ether) 1314 struct isa_device *isa_dev; 1315 u_char *ether; 1316{ 1317 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1318 int i; 1319 u_int memsize; 1320 u_char isa16bit; 1321 1322 sc->nic_addr = isa_dev->id_iobase; 1323 sc->gone = 0; 1324 sc->is790 = 0; 1325 sc->cr_proto = ED_CR_RD2; 1326 sc->vendor = ED_VENDOR_PCCARD; 1327 sc->type = 0; 1328 sc->type_str = "PCCARD"; 1329 sc->kdc.kdc_description = "PCCARD Ethernet"; 1330 sc->mem_size = isa_dev->id_msize = memsize = 16384; 1331 sc->isa16bit = isa16bit = 1; 1332 1333 for (i = 0; i < ETHER_ADDR_LEN; ++i) 1334 sc->arpcom.ac_enaddr[i] = ether[i]; 1335 1336#if ED_DEBUG 1337 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", 1338 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); 1339#endif 1340 1341 i = inb(sc->nic_addr + ED_PC_RESET); 1342 DELAY(100000); 1343 outb(sc->nic_addr + ED_PC_RESET,i); 1344 DELAY(100000); 1345 i = inb(sc->nic_addr + ED_PC_MISC); 1346 if (!i) { 1347 int j; 1348 printf("ed_probe_pccard: possible failure\n"); 1349 for (j=0;j<20 && !i;j++) { 1350 printf("."); 1351 DELAY(100000); 1352 i = inb(sc->nic_addr + ED_PC_MISC); 1353 } 1354 if (!i) { 1355 printf("dead :-(\n"); 1356 return 0; 1357 } 1358 printf("\n"); 1359 } 1360 /* 1361 * Set initial values for width/size. 1362 */ 1363 1364 /* Make sure that we really have an 8390 based board */ 1365 if (!ed_probe_generic8390(sc)) { 1366 printf("ed_probe_generic8390 failed\n"); 1367 return (0); 1368 } 1369 sc->txb_cnt = 2; 1370 sc->tx_page_start = ED_PC_PAGE_OFFSET; 1371 sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt; 1372 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 1373 1374 sc->mem_shared = 1; 1375 sc->mem_start = (caddr_t) isa_dev->id_maddr; 1376 sc->mem_size = memsize; 1377 sc->mem_end = sc->mem_start + memsize; 1378 1379 sc->mem_ring = sc->mem_start + 1380 sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 1381 1382 /* 1383 * Now zero memory and verify that it is clear 1384 */ 1385 bzero(sc->mem_start, memsize); 1386 1387 for (i = 0; i < memsize; ++i) { 1388 if (sc->mem_start[i]) { 1389 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 1390 isa_dev->id_unit, kvtop(sc->mem_start + i)); 1391 1392 return (0); 1393 } 1394 sc->mem_start[i] = (i - 5) & 0xff; 1395 } 1396 for (i = 0; i < memsize; ++i) { 1397 if ((sc->mem_start[i] & 0xff) != ((i - 5) & 0xff)) { 1398 printf("ed%d: shared memory failed at %lx (%x != %x) - check configuration\n", 1399 isa_dev->id_unit, kvtop(sc->mem_start + i), 1400 sc->mem_start[i], (i-5) & 0xff); 1401 return (0); 1402 1403 } 1404 } 1405 1406 i = inb(sc->nic_addr + ED_PC_MISC); 1407 if (!i) { 1408 printf("ed_probe_pccard: possible failure(2)\n"); 1409 } 1410 1411 /* clear any pending interupts that we may have caused */ 1412 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1413 1414 return (ED_PC_IO_PORTS); 1415} 1416 1417/* 1418 * Install interface into kernel networking data structures 1419 */ 1420static int 1421ed_attach(isa_dev) 1422 struct isa_device *isa_dev; 1423{ 1424 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1425 struct ifnet *ifp = &sc->arpcom.ac_if; 1426 1427 /* 1428 * Set interface to stopped condition (reset) 1429 */ 1430 ed_stop(sc); 1431 1432 if (!ifp->if_name) { 1433 /* 1434 * Initialize ifnet structure 1435 */ 1436 ifp->if_softc = sc; 1437 ifp->if_unit = isa_dev->id_unit; 1438 ifp->if_name = "ed"; 1439 ifp->if_output = ether_output; 1440 ifp->if_start = ed_start; 1441 ifp->if_ioctl = ed_ioctl; 1442 ifp->if_watchdog = ed_watchdog; 1443 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 1444 1445 /* 1446 * Set default state for ALTPHYS flag (used to disable the 1447 * tranceiver for AUI operation), based on compile-time 1448 * config option. 1449 */ 1450 if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER) 1451 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | 1452 IFF_MULTICAST | IFF_ALTPHYS); 1453 else 1454 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | 1455 IFF_MULTICAST); 1456 1457 /* 1458 * Attach the interface 1459 */ 1460 if_attach(ifp); 1461 ether_ifattach(ifp); 1462 } 1463 /* device attach does transition from UNCONFIGURED to IDLE state */ 1464 sc->kdc.kdc_state = DC_IDLE; 1465 1466 /* 1467 * Print additional info when attached 1468 */ 1469 printf("ed%d: address %6D, ", isa_dev->id_unit, 1470 sc->arpcom.ac_enaddr, ":"); 1471 1472 if (sc->type_str && (*sc->type_str != 0)) 1473 printf("type %s ", sc->type_str); 1474 else 1475 printf("type unknown (0x%x) ", sc->type); 1476 1477 printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)"); 1478 1479 printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && 1480 (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); 1481 1482 /* 1483 * If BPF is in the kernel, call the attach for it 1484 */ 1485#if NBPFILTER > 0 1486 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 1487#endif 1488 return 1; 1489} 1490 1491/* 1492 * Reset interface. 1493 */ 1494static void 1495ed_reset(ifp) 1496 struct ifnet *ifp; 1497{ 1498 struct ed_softc *sc = ifp->if_softc; 1499 int s; 1500 1501 if (sc->gone) 1502 return; 1503 s = splimp(); 1504 1505 /* 1506 * Stop interface and re-initialize. 1507 */ 1508 ed_stop(sc); 1509 ed_init(ifp); 1510 1511 (void) splx(s); 1512} 1513 1514/* 1515 * Take interface offline. 1516 */ 1517static void 1518ed_stop(sc) 1519 struct ed_softc *sc; 1520{ 1521 int n = 5000; 1522 1523 if (sc->gone) 1524 return; 1525 /* 1526 * Stop everything on the interface, and select page 0 registers. 1527 */ 1528 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 1529 1530 /* 1531 * Wait for interface to enter stopped state, but limit # of checks to 1532 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but 1533 * just in case it's an old one. 1534 */ 1535 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); 1536} 1537 1538/* 1539 * Device timeout/watchdog routine. Entered if the device neglects to 1540 * generate an interrupt after a transmit has been started on it. 1541 */ 1542static void 1543ed_watchdog(ifp) 1544 struct ifnet *ifp; 1545{ 1546 struct ed_softc *sc = ifp->if_softc; 1547 1548 if (sc->gone) 1549 return; 1550 log(LOG_ERR, "ed%d: device timeout\n", ifp->if_unit); 1551 ifp->if_oerrors++; 1552 1553 ed_reset(ifp); 1554} 1555 1556/* 1557 * Initialize device. 1558 */ 1559static void 1560ed_init(ifp) 1561 struct ifnet *ifp; 1562{ 1563 struct ed_softc *sc = ifp->if_softc; 1564 int i, s; 1565 1566 if (sc->gone) 1567 return; 1568 1569 /* address not known */ 1570 if (ifp->if_addrlist == (struct ifaddr *) 0) 1571 return; 1572 1573 /* 1574 * Initialize the NIC in the exact order outlined in the NS manual. 1575 * This init procedure is "mandatory"...don't change what or when 1576 * things happen. 1577 */ 1578 s = splimp(); 1579 1580 /* reset transmitter flags */ 1581 sc->xmit_busy = 0; 1582 ifp->if_timer = 0; 1583 1584 sc->txb_inuse = 0; 1585 sc->txb_new = 0; 1586 sc->txb_next_tx = 0; 1587 1588 /* This variable is used below - don't move this assignment */ 1589 sc->next_packet = sc->rec_page_start + 1; 1590 1591 /* 1592 * Set interface for page 0, Remote DMA complete, Stopped 1593 */ 1594 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 1595 1596 if (sc->isa16bit) { 1597 1598 /* 1599 * Set FIFO threshold to 8, No auto-init Remote DMA, byte 1600 * order=80x86, word-wide DMA xfers, 1601 */ 1602 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); 1603 } else { 1604 1605 /* 1606 * Same as above, but byte-wide DMA xfers 1607 */ 1608 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 1609 } 1610 1611 /* 1612 * Clear Remote Byte Count Registers 1613 */ 1614 outb(sc->nic_addr + ED_P0_RBCR0, 0); 1615 outb(sc->nic_addr + ED_P0_RBCR1, 0); 1616 1617 /* 1618 * For the moment, don't store incoming packets in memory. 1619 */ 1620 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); 1621 1622 /* 1623 * Place NIC in internal loopback mode 1624 */ 1625 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0); 1626 1627 /* 1628 * Initialize transmit/receive (ring-buffer) Page Start 1629 */ 1630 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start); 1631 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start); 1632 /* Set lower bits of byte addressable framing to 0 */ 1633 if (sc->is790) 1634 outb(sc->nic_addr + 0x09, 0); 1635 1636 /* 1637 * Initialize Receiver (ring-buffer) Page Stop and Boundry 1638 */ 1639 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop); 1640 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start); 1641 1642 /* 1643 * Clear all interrupts. A '1' in each bit position clears the 1644 * corresponding flag. 1645 */ 1646 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1647 1648 /* 1649 * Enable the following interrupts: receive/transmit complete, 1650 * receive/transmit error, and Receiver OverWrite. 1651 * 1652 * Counter overflow and Remote DMA complete are *not* enabled. 1653 */ 1654 outb(sc->nic_addr + ED_P0_IMR, 1655 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE); 1656 1657 /* 1658 * Program Command Register for page 1 1659 */ 1660 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 1661 1662 /* 1663 * Copy out our station address 1664 */ 1665 for (i = 0; i < ETHER_ADDR_LEN; ++i) 1666 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); 1667 1668 /* 1669 * Set Current Page pointer to next_packet (initialized above) 1670 */ 1671 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); 1672 1673 /* 1674 * Program Receiver Configuration Register and multicast filter. CR is 1675 * set to page 0 on return. 1676 */ 1677 ed_setrcr(sc); 1678 1679 /* 1680 * Take interface out of loopback 1681 */ 1682 outb(sc->nic_addr + ED_P0_TCR, 0); 1683 1684 /* 1685 * If this is a 3Com board, the tranceiver must be software enabled 1686 * (there is no settable hardware default). 1687 */ 1688 if (sc->vendor == ED_VENDOR_3COM) { 1689 if (ifp->if_flags & IFF_ALTPHYS) { 1690 outb(sc->asic_addr + ED_3COM_CR, 0); 1691 } else { 1692 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 1693 } 1694 } 1695 1696 /* 1697 * Set 'running' flag, and clear output active flag. 1698 */ 1699 ifp->if_flags |= IFF_RUNNING; 1700 ifp->if_flags &= ~IFF_OACTIVE; 1701 1702 /* 1703 * ...and attempt to start output 1704 */ 1705 ed_start(ifp); 1706 1707 (void) splx(s); 1708} 1709 1710/* 1711 * This routine actually starts the transmission on the interface 1712 */ 1713static inline void 1714ed_xmit(sc) 1715 struct ed_softc *sc; 1716{ 1717 struct ifnet *ifp = (struct ifnet *)sc; 1718 unsigned short len; 1719 1720 if (sc->gone) 1721 return; 1722 len = sc->txb_len[sc->txb_next_tx]; 1723 1724 /* 1725 * Set NIC for page 0 register access 1726 */ 1727 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 1728 1729 /* 1730 * Set TX buffer start page 1731 */ 1732 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + 1733 sc->txb_next_tx * ED_TXBUF_SIZE); 1734 1735 /* 1736 * Set TX length 1737 */ 1738 outb(sc->nic_addr + ED_P0_TBCR0, len); 1739 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8); 1740 1741 /* 1742 * Set page 0, Remote DMA complete, Transmit Packet, and *Start* 1743 */ 1744 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA); 1745 sc->xmit_busy = 1; 1746 1747 /* 1748 * Point to next transmit buffer slot and wrap if necessary. 1749 */ 1750 sc->txb_next_tx++; 1751 if (sc->txb_next_tx == sc->txb_cnt) 1752 sc->txb_next_tx = 0; 1753 1754 /* 1755 * Set a timer just in case we never hear from the board again 1756 */ 1757 ifp->if_timer = 2; 1758} 1759 1760/* 1761 * Start output on interface. 1762 * We make two assumptions here: 1763 * 1) that the current priority is set to splimp _before_ this code 1764 * is called *and* is returned to the appropriate priority after 1765 * return 1766 * 2) that the IFF_OACTIVE flag is checked before this code is called 1767 * (i.e. that the output part of the interface is idle) 1768 */ 1769static void 1770ed_start(ifp) 1771 struct ifnet *ifp; 1772{ 1773 struct ed_softc *sc = ifp->if_softc; 1774 struct mbuf *m0, *m; 1775 caddr_t buffer; 1776 int len; 1777 1778 if (sc->gone) { 1779 printf("ed_start(%p) GONE\n",ifp); 1780 return; 1781 } 1782outloop: 1783 1784 /* 1785 * First, see if there are buffered packets and an idle transmitter - 1786 * should never happen at this point. 1787 */ 1788 if (sc->txb_inuse && (sc->xmit_busy == 0)) { 1789 printf("ed: packets buffered, but transmitter idle\n"); 1790 ed_xmit(sc); 1791 } 1792 1793 /* 1794 * See if there is room to put another packet in the buffer. 1795 */ 1796 if (sc->txb_inuse == sc->txb_cnt) { 1797 1798 /* 1799 * No room. Indicate this to the outside world and exit. 1800 */ 1801 ifp->if_flags |= IFF_OACTIVE; 1802 return; 1803 } 1804 IF_DEQUEUE(&ifp->if_snd, m); 1805 if (m == 0) { 1806 1807 /* 1808 * We are using the !OACTIVE flag to indicate to the outside 1809 * world that we can accept an additional packet rather than 1810 * that the transmitter is _actually_ active. Indeed, the 1811 * transmitter may be active, but if we haven't filled all the 1812 * buffers with data then we still want to accept more. 1813 */ 1814 ifp->if_flags &= ~IFF_OACTIVE; 1815 return; 1816 } 1817 1818 /* 1819 * Copy the mbuf chain into the transmit buffer 1820 */ 1821 1822 m0 = m; 1823 1824 /* txb_new points to next open buffer slot */ 1825 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); 1826 1827 if (sc->mem_shared) { 1828 1829 /* 1830 * Special case setup for 16 bit boards... 1831 */ 1832 if (sc->isa16bit) { 1833 switch (sc->vendor) { 1834 1835 /* 1836 * For 16bit 3Com boards (which have 16k of 1837 * memory), we have the xmit buffers in a 1838 * different page of memory ('page 0') - so 1839 * change pages. 1840 */ 1841 case ED_VENDOR_3COM: 1842 outb(sc->asic_addr + ED_3COM_GACFR, 1843 ED_3COM_GACFR_RSEL); 1844 break; 1845 1846 /* 1847 * Enable 16bit access to shared memory on 1848 * WD/SMC boards. 1849 */ 1850 case ED_VENDOR_WD_SMC:{ 1851 outb(sc->asic_addr + ED_WD_LAAR, 1852 (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); 1853 if (sc->is790) { 1854 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); 1855 } 1856 break; 1857 } 1858 } 1859 } 1860 for (len = 0; m != 0; m = m->m_next) { 1861 bcopy(mtod(m, caddr_t), buffer, m->m_len); 1862 buffer += m->m_len; 1863 len += m->m_len; 1864 } 1865 1866 /* 1867 * Restore previous shared memory access 1868 */ 1869 if (sc->isa16bit) { 1870 switch (sc->vendor) { 1871 case ED_VENDOR_3COM: 1872 outb(sc->asic_addr + ED_3COM_GACFR, 1873 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); 1874 break; 1875 case ED_VENDOR_WD_SMC:{ 1876 if (sc->is790) { 1877 outb(sc->asic_addr + ED_WD_MSR, 0x00); 1878 } 1879 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); 1880 break; 1881 } 1882 } 1883 } 1884 } else { 1885 len = ed_pio_write_mbufs(sc, m, (int)buffer); 1886 if (len == 0) 1887 goto outloop; 1888 } 1889 1890 sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN); 1891 1892 sc->txb_inuse++; 1893 1894 /* 1895 * Point to next buffer slot and wrap if necessary. 1896 */ 1897 sc->txb_new++; 1898 if (sc->txb_new == sc->txb_cnt) 1899 sc->txb_new = 0; 1900 1901 if (sc->xmit_busy == 0) 1902 ed_xmit(sc); 1903 1904 /* 1905 * Tap off here if there is a bpf listener. 1906 */ 1907#if NBPFILTER > 0 1908 if (ifp->if_bpf) { 1909 bpf_mtap(ifp, m0); 1910 } 1911#endif 1912 1913 m_freem(m0); 1914 1915 /* 1916 * Loop back to the top to possibly buffer more packets 1917 */ 1918 goto outloop; 1919} 1920 1921/* 1922 * Ethernet interface receiver interrupt. 1923 */ 1924static inline void 1925ed_rint(sc) 1926 struct ed_softc *sc; 1927{ 1928 struct ifnet *ifp = &sc->arpcom.ac_if; 1929 u_char boundry; 1930 u_short len; 1931 struct ed_ring packet_hdr; 1932 char *packet_ptr; 1933 1934 if (sc->gone) 1935 return; 1936 1937 /* 1938 * Set NIC to page 1 registers to get 'current' pointer 1939 */ 1940 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 1941 1942 /* 1943 * 'sc->next_packet' is the logical beginning of the ring-buffer - 1944 * i.e. it points to where new data has been buffered. The 'CURR' 1945 * (current) register points to the logical end of the ring-buffer - 1946 * i.e. it points to where additional new data will be added. We loop 1947 * here until the logical beginning equals the logical end (or in 1948 * other words, until the ring-buffer is empty). 1949 */ 1950 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { 1951 1952 /* get pointer to this buffer's header structure */ 1953 packet_ptr = sc->mem_ring + 1954 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; 1955 1956 /* 1957 * The byte count includes a 4 byte header that was added by 1958 * the NIC. 1959 */ 1960 if (sc->mem_shared) 1961 packet_hdr = *(struct ed_ring *) packet_ptr; 1962 else 1963 ed_pio_readmem(sc, (int)packet_ptr, (char *) &packet_hdr, 1964 sizeof(packet_hdr)); 1965 len = packet_hdr.count; 1966 if (len > (ETHER_MAX_LEN + sizeof(struct ed_ring)) || 1967 len < (ETHER_HDR_SIZE + sizeof(struct ed_ring))) { 1968 /* 1969 * Length is a wild value. There's a good chance that 1970 * this was caused by the NIC being old and buggy. 1971 * The bug is that the length low byte is duplicated in 1972 * the high byte. Try to recalculate the length based on 1973 * the pointer to the next packet. 1974 */ 1975 /* 1976 * NOTE: sc->next_packet is pointing at the current packet. 1977 */ 1978 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */ 1979 if (packet_hdr.next_packet >= sc->next_packet) { 1980 len += (packet_hdr.next_packet - sc->next_packet) * ED_PAGE_SIZE; 1981 } else { 1982 len += ((packet_hdr.next_packet - sc->rec_page_start) + 1983 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE; 1984 } 1985 } 1986 /* 1987 * Be fairly liberal about what we allow as a "reasonable" length 1988 * so that a [crufty] packet will make it to BPF (and can thus 1989 * be analyzed). Note that all that is really important is that 1990 * we have a length that will fit into one mbuf cluster or less; 1991 * the upper layer protocols can then figure out the length from 1992 * their own length field(s). 1993 */ 1994 if ((len > sizeof(struct ed_ring)) && 1995 (len <= MCLBYTES) && 1996 (packet_hdr.next_packet >= sc->rec_page_start) && 1997 (packet_hdr.next_packet < sc->rec_page_stop)) { 1998 /* 1999 * Go get packet. 2000 */ 2001 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring), 2002 len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY); 2003 ifp->if_ipackets++; 2004 } else { 2005 /* 2006 * Really BAD. The ring pointers are corrupted. 2007 */ 2008 log(LOG_ERR, 2009 "ed%d: NIC memory corrupt - invalid packet length %d\n", 2010 ifp->if_unit, len); 2011 ifp->if_ierrors++; 2012 ed_reset(ifp); 2013 return; 2014 } 2015 2016 /* 2017 * Update next packet pointer 2018 */ 2019 sc->next_packet = packet_hdr.next_packet; 2020 2021 /* 2022 * Update NIC boundry pointer - being careful to keep it one 2023 * buffer behind. (as recommended by NS databook) 2024 */ 2025 boundry = sc->next_packet - 1; 2026 if (boundry < sc->rec_page_start) 2027 boundry = sc->rec_page_stop - 1; 2028 2029 /* 2030 * Set NIC to page 0 registers to update boundry register 2031 */ 2032 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2033 2034 outb(sc->nic_addr + ED_P0_BNRY, boundry); 2035 2036 /* 2037 * Set NIC to page 1 registers before looping to top (prepare 2038 * to get 'CURR' current pointer) 2039 */ 2040 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 2041 } 2042} 2043 2044/* 2045 * Ethernet interface interrupt processor 2046 */ 2047void 2048edintr(unit) 2049 int unit; 2050{ 2051 struct ed_softc *sc = &ed_softc[unit]; 2052 struct ifnet *ifp = (struct ifnet *)sc; 2053 u_char isr; 2054 2055 if (sc->gone) 2056 return; 2057 /* 2058 * Set NIC to page 0 registers 2059 */ 2060 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2061 2062 /* 2063 * loop until there are no more new interrupts 2064 */ 2065 while ((isr = inb(sc->nic_addr + ED_P0_ISR)) != 0) { 2066 2067 /* 2068 * reset all the bits that we are 'acknowledging' by writing a 2069 * '1' to each bit position that was set (writing a '1' 2070 * *clears* the bit) 2071 */ 2072 outb(sc->nic_addr + ED_P0_ISR, isr); 2073 2074 /* 2075 * Handle transmitter interrupts. Handle these first because 2076 * the receiver will reset the board under some conditions. 2077 */ 2078 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { 2079 u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f; 2080 2081 /* 2082 * Check for transmit error. If a TX completed with an 2083 * error, we end up throwing the packet away. Really 2084 * the only error that is possible is excessive 2085 * collisions, and in this case it is best to allow 2086 * the automatic mechanisms of TCP to backoff the 2087 * flow. Of course, with UDP we're screwed, but this 2088 * is expected when a network is heavily loaded. 2089 */ 2090 (void) inb(sc->nic_addr + ED_P0_TSR); 2091 if (isr & ED_ISR_TXE) { 2092 2093 /* 2094 * Excessive collisions (16) 2095 */ 2096 if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) 2097 && (collisions == 0)) { 2098 2099 /* 2100 * When collisions total 16, the 2101 * P0_NCR will indicate 0, and the 2102 * TSR_ABT is set. 2103 */ 2104 collisions = 16; 2105 } 2106 2107 /* 2108 * update output errors counter 2109 */ 2110 ifp->if_oerrors++; 2111 } else { 2112 2113 /* 2114 * Update total number of successfully 2115 * transmitted packets. 2116 */ 2117 ifp->if_opackets++; 2118 } 2119 2120 /* 2121 * reset tx busy and output active flags 2122 */ 2123 sc->xmit_busy = 0; 2124 ifp->if_flags &= ~IFF_OACTIVE; 2125 2126 /* 2127 * clear watchdog timer 2128 */ 2129 ifp->if_timer = 0; 2130 2131 /* 2132 * Add in total number of collisions on last 2133 * transmission. 2134 */ 2135 ifp->if_collisions += collisions; 2136 2137 /* 2138 * Decrement buffer in-use count if not zero (can only 2139 * be zero if a transmitter interrupt occured while 2140 * not actually transmitting). If data is ready to 2141 * transmit, start it transmitting, otherwise defer 2142 * until after handling receiver 2143 */ 2144 if (sc->txb_inuse && --sc->txb_inuse) 2145 ed_xmit(sc); 2146 } 2147 2148 /* 2149 * Handle receiver interrupts 2150 */ 2151 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { 2152 2153 /* 2154 * Overwrite warning. In order to make sure that a 2155 * lockup of the local DMA hasn't occurred, we reset 2156 * and re-init the NIC. The NSC manual suggests only a 2157 * partial reset/re-init is necessary - but some chips 2158 * seem to want more. The DMA lockup has been seen 2159 * only with early rev chips - Methinks this bug was 2160 * fixed in later revs. -DG 2161 */ 2162 if (isr & ED_ISR_OVW) { 2163 ifp->if_ierrors++; 2164#ifdef DIAGNOSTIC 2165 log(LOG_WARNING, 2166 "ed%d: warning - receiver ring buffer overrun\n", 2167 ifp->if_unit); 2168#endif 2169 2170 /* 2171 * Stop/reset/re-init NIC 2172 */ 2173 ed_reset(ifp); 2174 } else { 2175 2176 /* 2177 * Receiver Error. One or more of: CRC error, 2178 * frame alignment error FIFO overrun, or 2179 * missed packet. 2180 */ 2181 if (isr & ED_ISR_RXE) { 2182 ifp->if_ierrors++; 2183#ifdef ED_DEBUG 2184 printf("ed%d: receive error %x\n", ifp->if_unit, 2185 inb(sc->nic_addr + ED_P0_RSR)); 2186#endif 2187 } 2188 2189 /* 2190 * Go get the packet(s) XXX - Doing this on an 2191 * error is dubious because there shouldn't be 2192 * any data to get (we've configured the 2193 * interface to not accept packets with 2194 * errors). 2195 */ 2196 2197 /* 2198 * Enable 16bit access to shared memory first 2199 * on WD/SMC boards. 2200 */ 2201 if (sc->isa16bit && 2202 (sc->vendor == ED_VENDOR_WD_SMC)) { 2203 2204 outb(sc->asic_addr + ED_WD_LAAR, 2205 (sc->wd_laar_proto |= 2206 ED_WD_LAAR_M16EN)); 2207 if (sc->is790) { 2208 outb(sc->asic_addr + ED_WD_MSR, 2209 ED_WD_MSR_MENB); 2210 } 2211 } 2212 ed_rint(sc); 2213 2214 /* disable 16bit access */ 2215 if (sc->isa16bit && 2216 (sc->vendor == ED_VENDOR_WD_SMC)) { 2217 2218 if (sc->is790) { 2219 outb(sc->asic_addr + ED_WD_MSR, 0x00); 2220 } 2221 outb(sc->asic_addr + ED_WD_LAAR, 2222 (sc->wd_laar_proto &= 2223 ~ED_WD_LAAR_M16EN)); 2224 } 2225 } 2226 } 2227 2228 /* 2229 * If it looks like the transmitter can take more data, 2230 * attempt to start output on the interface. This is done 2231 * after handling the receiver to give the receiver priority. 2232 */ 2233 if ((ifp->if_flags & IFF_OACTIVE) == 0) 2234 ed_start(ifp); 2235 2236 /* 2237 * return NIC CR to standard state: page 0, remote DMA 2238 * complete, start (toggling the TXP bit off, even if was just 2239 * set in the transmit routine, is *okay* - it is 'edge' 2240 * triggered from low to high) 2241 */ 2242 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2243 2244 /* 2245 * If the Network Talley Counters overflow, read them to reset 2246 * them. It appears that old 8390's won't clear the ISR flag 2247 * otherwise - resulting in an infinite loop. 2248 */ 2249 if (isr & ED_ISR_CNT) { 2250 (void) inb(sc->nic_addr + ED_P0_CNTR0); 2251 (void) inb(sc->nic_addr + ED_P0_CNTR1); 2252 (void) inb(sc->nic_addr + ED_P0_CNTR2); 2253 } 2254 } 2255} 2256 2257/* 2258 * Process an ioctl request. This code needs some work - it looks 2259 * pretty ugly. 2260 */ 2261static int 2262ed_ioctl(ifp, command, data) 2263 register struct ifnet *ifp; 2264 int command; 2265 caddr_t data; 2266{ 2267 register struct ifaddr *ifa = (struct ifaddr *) data; 2268 struct ed_softc *sc = ifp->if_softc; 2269 struct ifreq *ifr = (struct ifreq *) data; 2270 int s, error = 0; 2271 2272 if (sc->gone) { 2273 ifp->if_flags &= ~IFF_RUNNING; 2274 return ENXIO; 2275 } 2276 s = splimp(); 2277 2278 switch (command) { 2279 2280 case SIOCSIFADDR: 2281 ifp->if_flags |= IFF_UP; 2282 /* netifs are BUSY when UP */ 2283 sc->kdc.kdc_state = DC_BUSY; 2284 2285 switch (ifa->ifa_addr->sa_family) { 2286#ifdef INET 2287 case AF_INET: 2288 ed_init(ifp); /* before arpwhohas */ 2289 arp_ifinit((struct arpcom *)ifp, ifa); 2290 break; 2291#endif 2292#ifdef IPX 2293 /* 2294 * XXX - This code is probably wrong 2295 */ 2296 case AF_IPX: 2297 { 2298 register struct ipx_addr *ina = &(IA_SIPX(ifa)->sipx_addr); 2299 2300 if (ipx_nullhost(*ina)) 2301 ina->x_host = 2302 *(union ipx_host *) (sc->arpcom.ac_enaddr); 2303 else { 2304 bcopy((caddr_t) ina->x_host.c_host, 2305 (caddr_t) sc->arpcom.ac_enaddr, 2306 sizeof(sc->arpcom.ac_enaddr)); 2307 } 2308 2309 /* 2310 * Set new address 2311 */ 2312 ed_init(ifp); 2313 break; 2314 } 2315#endif 2316#ifdef NS 2317 /* 2318 * XXX - This code is probably wrong 2319 */ 2320 case AF_NS: 2321 { 2322 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 2323 2324 if (ns_nullhost(*ina)) 2325 ina->x_host = 2326 *(union ns_host *) (sc->arpcom.ac_enaddr); 2327 else { 2328 bcopy((caddr_t) ina->x_host.c_host, 2329 (caddr_t) sc->arpcom.ac_enaddr, 2330 sizeof(sc->arpcom.ac_enaddr)); 2331 } 2332 2333 /* 2334 * Set new address 2335 */ 2336 ed_init(ifp); 2337 break; 2338 } 2339#endif 2340 default: 2341 ed_init(ifp); 2342 break; 2343 } 2344 break; 2345 2346 case SIOCGIFADDR: 2347 { 2348 struct sockaddr *sa; 2349 2350 sa = (struct sockaddr *) & ifr->ifr_data; 2351 bcopy((caddr_t) sc->arpcom.ac_enaddr, 2352 (caddr_t) sa->sa_data, ETHER_ADDR_LEN); 2353 } 2354 break; 2355 2356 case SIOCSIFFLAGS: 2357 2358 /* 2359 * If the interface is marked up and stopped, then start it. 2360 * If it is marked down and running, then stop it. 2361 */ 2362 if (ifp->if_flags & IFF_UP) { 2363 if ((ifp->if_flags & IFF_RUNNING) == 0) 2364 ed_init(ifp); 2365 } else { 2366 if (ifp->if_flags & IFF_RUNNING) { 2367 ed_stop(sc); 2368 ifp->if_flags &= ~IFF_RUNNING; 2369 } 2370 } 2371 /* UP controls BUSY/IDLE */ 2372 sc->kdc.kdc_state = ((ifp->if_flags & IFF_UP) 2373 ? DC_BUSY 2374 : DC_IDLE); 2375 2376#if NBPFILTER > 0 2377 2378 /* 2379 * Promiscuous flag may have changed, so reprogram the RCR. 2380 */ 2381 ed_setrcr(sc); 2382#endif 2383 2384 /* 2385 * An unfortunate hack to provide the (required) software 2386 * control of the tranceiver for 3Com boards. The ALTPHYS flag 2387 * disables the tranceiver if set. 2388 */ 2389 if (sc->vendor == ED_VENDOR_3COM) { 2390 if (ifp->if_flags & IFF_ALTPHYS) { 2391 outb(sc->asic_addr + ED_3COM_CR, 0); 2392 } else { 2393 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 2394 } 2395 } 2396 break; 2397 2398 case SIOCADDMULTI: 2399 case SIOCDELMULTI: 2400 /* 2401 * Update out multicast list. 2402 */ 2403 error = (command == SIOCADDMULTI) ? 2404 ether_addmulti(ifr, &sc->arpcom) : 2405 ether_delmulti(ifr, &sc->arpcom); 2406 2407 if (error == ENETRESET) { 2408 2409 /* 2410 * Multicast list has changed; set the hardware filter 2411 * accordingly. 2412 */ 2413 ed_setrcr(sc); 2414 error = 0; 2415 } 2416 break; 2417 2418 case SIOCSIFMTU: 2419 /* 2420 * Set the interface MTU. 2421 */ 2422 if (ifr->ifr_mtu > ETHERMTU) { 2423 error = EINVAL; 2424 } else { 2425 ifp->if_mtu = ifr->ifr_mtu; 2426 } 2427 break; 2428 2429 default: 2430 error = EINVAL; 2431 } 2432 (void) splx(s); 2433 return (error); 2434} 2435 2436/* 2437 * Given a source and destination address, copy 'amount' of a packet from 2438 * the ring buffer into a linear destination buffer. Takes into account 2439 * ring-wrap. 2440 */ 2441static inline char * 2442ed_ring_copy(sc, src, dst, amount) 2443 struct ed_softc *sc; 2444 char *src; 2445 char *dst; 2446 u_short amount; 2447{ 2448 u_short tmp_amount; 2449 2450 /* does copy wrap to lower addr in ring buffer? */ 2451 if (src + amount > sc->mem_end) { 2452 tmp_amount = sc->mem_end - src; 2453 2454 /* copy amount up to end of NIC memory */ 2455 if (sc->mem_shared) 2456 bcopy(src, dst, tmp_amount); 2457 else 2458 ed_pio_readmem(sc, (int)src, dst, tmp_amount); 2459 2460 amount -= tmp_amount; 2461 src = sc->mem_ring; 2462 dst += tmp_amount; 2463 } 2464 if (sc->mem_shared) 2465 bcopy(src, dst, amount); 2466 else 2467 ed_pio_readmem(sc, (int)src, dst, amount); 2468 2469 return (src + amount); 2470} 2471 2472/* 2473 * Retreive packet from shared memory and send to the next level up via 2474 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 2475 */ 2476static void 2477ed_get_packet(sc, buf, len, multicast) 2478 struct ed_softc *sc; 2479 char *buf; 2480 u_short len; 2481 int multicast; 2482{ 2483 struct ether_header *eh; 2484 struct mbuf *m; 2485 2486 /* Allocate a header mbuf */ 2487 MGETHDR(m, M_DONTWAIT, MT_DATA); 2488 if (m == NULL) 2489 return; 2490 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 2491 m->m_pkthdr.len = m->m_len = len; 2492 2493 /* 2494 * We always put the received packet in a single buffer - 2495 * either with just an mbuf header or in a cluster attached 2496 * to the header. The +2 is to compensate for the alignment 2497 * fixup below. 2498 */ 2499 if ((len + 2) > MHLEN) { 2500 /* Attach an mbuf cluster */ 2501 MCLGET(m, M_DONTWAIT); 2502 2503 /* Insist on getting a cluster */ 2504 if ((m->m_flags & M_EXT) == 0) { 2505 m_freem(m); 2506 return; 2507 } 2508 } 2509 2510 /* 2511 * The +2 is to longword align the start of the real packet. 2512 * This is important for NFS. 2513 */ 2514 m->m_data += 2; 2515 eh = mtod(m, struct ether_header *); 2516 2517 /* 2518 * Get packet, including link layer address, from interface. 2519 */ 2520 ed_ring_copy(sc, buf, (char *)eh, len); 2521 2522#if NBPFILTER > 0 2523 2524 /* 2525 * Check if there's a BPF listener on this interface. If so, hand off 2526 * the raw packet to bpf. 2527 */ 2528 if (sc->arpcom.ac_if.if_bpf) { 2529 bpf_mtap(&sc->arpcom.ac_if, m); 2530 2531 /* 2532 * Note that the interface cannot be in promiscuous mode if 2533 * there are no BPF listeners. And if we are in promiscuous 2534 * mode, we have to check if this packet is really ours. 2535 */ 2536 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && 2537 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, 2538 sizeof(eh->ether_dhost)) != 0 && multicast == 0) { 2539 m_freem(m); 2540 return; 2541 } 2542 } 2543#endif 2544 2545 /* 2546 * Remove link layer address. 2547 */ 2548 m->m_pkthdr.len = m->m_len = len - sizeof(struct ether_header); 2549 m->m_data += sizeof(struct ether_header); 2550 2551 ether_input(&sc->arpcom.ac_if, eh, m); 2552 return; 2553} 2554 2555/* 2556 * Supporting routines 2557 */ 2558 2559/* 2560 * Given a NIC memory source address and a host memory destination 2561 * address, copy 'amount' from NIC to host using Programmed I/O. 2562 * The 'amount' is rounded up to a word - okay as long as mbufs 2563 * are word sized. 2564 * This routine is currently Novell-specific. 2565 */ 2566static void 2567ed_pio_readmem(sc, src, dst, amount) 2568 struct ed_softc *sc; 2569 int src; 2570 unsigned char *dst; 2571 unsigned short amount; 2572{ 2573 /* select page 0 registers */ 2574 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2575 2576 /* round up to a word */ 2577 if (amount & 1) 2578 ++amount; 2579 2580 /* set up DMA byte count */ 2581 outb(sc->nic_addr + ED_P0_RBCR0, amount); 2582 outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8); 2583 2584 /* set up source address in NIC mem */ 2585 outb(sc->nic_addr + ED_P0_RSAR0, src); 2586 outb(sc->nic_addr + ED_P0_RSAR1, src >> 8); 2587 2588 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); 2589 2590 if (sc->isa16bit) { 2591 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2); 2592 } else 2593 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); 2594 2595} 2596 2597/* 2598 * Stripped down routine for writing a linear buffer to NIC memory. 2599 * Only used in the probe routine to test the memory. 'len' must 2600 * be even. 2601 */ 2602static void 2603ed_pio_writemem(sc, src, dst, len) 2604 struct ed_softc *sc; 2605 char *src; 2606 unsigned short dst; 2607 unsigned short len; 2608{ 2609 int maxwait = 200; /* about 240us */ 2610 2611 /* select page 0 registers */ 2612 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2613 2614 /* reset remote DMA complete flag */ 2615 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2616 2617 /* set up DMA byte count */ 2618 outb(sc->nic_addr + ED_P0_RBCR0, len); 2619 outb(sc->nic_addr + ED_P0_RBCR1, len >> 8); 2620 2621 /* set up destination address in NIC mem */ 2622 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2623 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); 2624 2625 /* set remote DMA write */ 2626 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2627 2628 if (sc->isa16bit) 2629 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2); 2630 else 2631 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); 2632 2633 /* 2634 * Wait for remote DMA complete. This is necessary because on the 2635 * transmit side, data is handled internally by the NIC in bursts and 2636 * we can't start another remote DMA until this one completes. Not 2637 * waiting causes really bad things to happen - like the NIC 2638 * irrecoverably jamming the ISA bus. 2639 */ 2640 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2641} 2642 2643/* 2644 * Write an mbuf chain to the destination NIC memory address using 2645 * programmed I/O. 2646 */ 2647static u_short 2648ed_pio_write_mbufs(sc, m, dst) 2649 struct ed_softc *sc; 2650 struct mbuf *m; 2651 int dst; 2652{ 2653 struct ifnet *ifp = (struct ifnet *)sc; 2654 unsigned short total_len, dma_len; 2655 struct mbuf *mp; 2656 int maxwait = 200; /* about 240us */ 2657 2658 /* First, count up the total number of bytes to copy */ 2659 for (total_len = 0, mp = m; mp; mp = mp->m_next) 2660 total_len += mp->m_len; 2661 2662 dma_len = total_len; 2663 if (sc->isa16bit && (dma_len & 1)) 2664 dma_len++; 2665 2666 /* select page 0 registers */ 2667 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2668 2669 /* reset remote DMA complete flag */ 2670 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2671 2672 /* set up DMA byte count */ 2673 outb(sc->nic_addr + ED_P0_RBCR0, dma_len); 2674 outb(sc->nic_addr + ED_P0_RBCR1, dma_len >> 8); 2675 2676 /* set up destination address in NIC mem */ 2677 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2678 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); 2679 2680 /* set remote DMA write */ 2681 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2682 2683 /* 2684 * Transfer the mbuf chain to the NIC memory. 2685 * 16-bit cards require that data be transferred as words, and only words. 2686 * So that case requires some extra code to patch over odd-length mbufs. 2687 */ 2688 2689 if (!sc->isa16bit) { 2690 /* NE1000s are easy */ 2691 while (m) { 2692 if (m->m_len) { 2693 outsb(sc->asic_addr + ED_NOVELL_DATA, 2694 m->m_data, m->m_len); 2695 } 2696 m = m->m_next; 2697 } 2698 } else { 2699 /* NE2000s are a pain */ 2700 unsigned char *data; 2701 int len, wantbyte; 2702 unsigned char savebyte[2]; 2703 2704 wantbyte = 0; 2705 2706 while (m) { 2707 len = m->m_len; 2708 if (len) { 2709 data = mtod(m, caddr_t); 2710 /* finish the last word */ 2711 if (wantbyte) { 2712 savebyte[1] = *data; 2713 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte); 2714 data++; 2715 len--; 2716 wantbyte = 0; 2717 } 2718 /* output contiguous words */ 2719 if (len > 1) { 2720 outsw(sc->asic_addr + ED_NOVELL_DATA, 2721 data, len >> 1); 2722 data += len & ~1; 2723 len &= 1; 2724 } 2725 /* save last byte, if necessary */ 2726 if (len == 1) { 2727 savebyte[0] = *data; 2728 wantbyte = 1; 2729 } 2730 } 2731 m = m->m_next; 2732 } 2733 /* spit last byte */ 2734 if (wantbyte) { 2735 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte); 2736 } 2737 } 2738 2739 /* 2740 * Wait for remote DMA complete. This is necessary because on the 2741 * transmit side, data is handled internally by the NIC in bursts and 2742 * we can't start another remote DMA until this one completes. Not 2743 * waiting causes really bad things to happen - like the NIC 2744 * irrecoverably jamming the ISA bus. 2745 */ 2746 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2747 2748 if (!maxwait) { 2749 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n", 2750 ifp->if_unit); 2751 ed_reset(ifp); 2752 return(0); 2753 } 2754 return (total_len); 2755} 2756 2757static void 2758ed_setrcr(sc) 2759 struct ed_softc *sc; 2760{ 2761 struct ifnet *ifp = (struct ifnet *)sc; 2762 int i; 2763 2764 /* set page 1 registers */ 2765 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 2766 2767 if (ifp->if_flags & IFF_PROMISC) { 2768 2769 /* 2770 * Reconfigure the multicast filter. 2771 */ 2772 for (i = 0; i < 8; i++) 2773 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); 2774 2775 /* 2776 * And turn on promiscuous mode. Also enable reception of 2777 * runts and packets with CRC & alignment errors. 2778 */ 2779 /* Set page 0 registers */ 2780 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2781 2782 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM | 2783 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP); 2784 } else { 2785 /* set up multicast addresses and filter modes */ 2786 if (ifp->if_flags & IFF_MULTICAST) { 2787 u_long mcaf[2]; 2788 2789 if (ifp->if_flags & IFF_ALLMULTI) { 2790 mcaf[0] = 0xffffffff; 2791 mcaf[1] = 0xffffffff; 2792 } else 2793 ds_getmcaf(sc, mcaf); 2794 2795 /* 2796 * Set multicast filter on chip. 2797 */ 2798 for (i = 0; i < 8; i++) 2799 outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]); 2800 2801 /* Set page 0 registers */ 2802 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2803 2804 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB); 2805 } else { 2806 2807 /* 2808 * Initialize multicast address hashing registers to 2809 * not accept multicasts. 2810 */ 2811 for (i = 0; i < 8; ++i) 2812 outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00); 2813 2814 /* Set page 0 registers */ 2815 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2816 2817 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); 2818 } 2819 } 2820 2821 /* 2822 * Start interface. 2823 */ 2824 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2825} 2826 2827/* 2828 * Compute crc for ethernet address 2829 */ 2830static u_long 2831ds_crc(ep) 2832 u_char *ep; 2833{ 2834#define POLYNOMIAL 0x04c11db6 2835 register u_long crc = 0xffffffffL; 2836 register int carry, i, j; 2837 register u_char b; 2838 2839 for (i = 6; --i >= 0;) { 2840 b = *ep++; 2841 for (j = 8; --j >= 0;) { 2842 carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01); 2843 crc <<= 1; 2844 b >>= 1; 2845 if (carry) 2846 crc = ((crc ^ POLYNOMIAL) | carry); 2847 } 2848 } 2849 return crc; 2850#undef POLYNOMIAL 2851} 2852 2853/* 2854 * Compute the multicast address filter from the 2855 * list of multicast addresses we need to listen to. 2856 */ 2857static void 2858ds_getmcaf(sc, mcaf) 2859 struct ed_softc *sc; 2860 u_long *mcaf; 2861{ 2862 register u_int index; 2863 register u_char *af = (u_char *) mcaf; 2864 register struct ether_multi *enm; 2865 register struct ether_multistep step; 2866 2867 mcaf[0] = 0; 2868 mcaf[1] = 0; 2869 2870 ETHER_FIRST_MULTI(step, &sc->arpcom, enm); 2871 while (enm != NULL) { 2872 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 2873 mcaf[0] = 0xffffffff; 2874 mcaf[1] = 0xffffffff; 2875 return; 2876 } 2877 index = ds_crc(enm->enm_addrlo) >> 26; 2878 af[index >> 3] |= 1 << (index & 7); 2879 2880 ETHER_NEXT_MULTI(step, enm); 2881 } 2882} 2883