if_ed.c revision 11409
1166124Srafan/* 2174993Srafan * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 3166124Srafan * adapters. By David Greenman, 29-April-1993 4166124Srafan * 5166124Srafan * Copyright (C) 1993, David Greenman. This software may be used, modified, 6166124Srafan * copied, distributed, and sold, in both source and binary form provided 7166124Srafan * that the above copyright and these terms are retained. Under no 8166124Srafan * circumstances is the author responsible for the proper functioning 9166124Srafan * of this software, nor does the author assume any responsibility 10166124Srafan * for damages incurred with its use. 11166124Srafan * 12166124Srafan * Currently supports the Western Digital/SMC 8003 and 8013 series, 13166124Srafan * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, 14166124Srafan * and a variety of similar clones. 15166124Srafan * 16166124Srafan * $Id: if_ed.c,v 1.76 1995/08/25 19:50:15 bde Exp $ 17166124Srafan */ 18166124Srafan 19166124Srafan#include "ed.h" 20166124Srafan#include "bpfilter.h" 21166124Srafan 22166124Srafan#include <sys/param.h> 23166124Srafan#include <sys/systm.h> 24166124Srafan#include <sys/errno.h> 25166124Srafan#include <sys/ioctl.h> 26166124Srafan#include <sys/mbuf.h> 27166124Srafan#include <sys/socket.h> 2850276Speter#include <sys/syslog.h> 2950276Speter#include <sys/devconf.h> 3050276Speter 31166124Srafan#include <net/if.h> 3250276Speter#include <net/if_dl.h> 3350276Speter#include <net/if_types.h> 3450276Speter 3550276Speter#ifdef INET 3650276Speter#include <netinet/in.h> 37174993Srafan#include <netinet/in_systm.h> 3850276Speter#include <netinet/in_var.h> 39166124Srafan#include <netinet/ip.h> 40166124Srafan#include <netinet/if_ether.h> 41166124Srafan#endif 42166124Srafan 43166124Srafan#ifdef NS 4450276Speter#include <netns/ns.h> 45166124Srafan#include <netns/ns_if.h> 46166124Srafan#endif 47166124Srafan 48166124Srafan#if NBPFILTER > 0 49166124Srafan#include <net/bpf.h> 50166124Srafan#include <net/bpfdesc.h> 51166124Srafan#endif 52166124Srafan 53166124Srafan#include <machine/clock.h> 54166124Srafan 5550276Speter#include <i386/isa/isa.h> 5650276Speter#include <i386/isa/isa_device.h> 57166124Srafan#include <i386/isa/icu.h> 5850276Speter#include <i386/isa/if_edreg.h> 5950276Speter 6050276Speter/* For backwards compatibility */ 6150276Speter#ifndef IFF_ALTPHYS 6250276Speter#define IFF_ALTPHYS IFF_LINK0 63166124Srafan#endif 64166124Srafan 6550276Speter/* 66174993Srafan * ed_softc: per line info and status 6750276Speter */ 6850276Speterstruct ed_softc { 6950276Speter struct arpcom arpcom; /* ethernet common */ 70174993Srafan 71166124Srafan char *type_str; /* pointer to type string */ 72166124Srafan u_char vendor; /* interface vendor */ 73166124Srafan u_char type; /* interface type code */ 7450276Speter u_char gone; /* HW missing, presumed having a good time */ 7550276Speter 7650276Speter u_short asic_addr; /* ASIC I/O bus address */ 7750276Speter u_short nic_addr; /* NIC (DS8390) I/O bus address */ 7850276Speter 7950276Speter/* 80166124Srafan * The following 'proto' variable is part of a work-around for 8013EBT asics 8150276Speter * being write-only. It's sort of a prototype/shadow of the real thing. 8250276Speter */ 8350276Speter u_char wd_laar_proto; 8450276Speter u_char cr_proto; 8550276Speter u_char isa16bit; /* width of access to card 0=8 or 1=16 */ 86166124Srafan int is790; /* set by the probe code if the card is 790 87166124Srafan * based */ 8850276Speter 89166124Srafan caddr_t bpf; /* BPF "magic cookie" */ 90166124Srafan caddr_t mem_start; /* NIC memory start address */ 9150276Speter caddr_t mem_end; /* NIC memory end address */ 9250276Speter u_long mem_size; /* total NIC memory size */ 9350276Speter caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ 94174993Srafan 9550276Speter u_char mem_shared; /* NIC memory is shared with host */ 96174993Srafan u_char xmit_busy; /* transmitter is busy */ 97174993Srafan u_char txb_cnt; /* number of transmit buffers */ 98174993Srafan u_char txb_inuse; /* number of TX buffers currently in-use */ 99174993Srafan 10050276Speter u_char txb_new; /* pointer to where new buffer will be added */ 10150276Speter u_char txb_next_tx; /* pointer to next buffer ready to xmit */ 10250276Speter u_short txb_len[8]; /* buffered xmit buffer lengths */ 10350276Speter u_char tx_page_start; /* first page of TX buffer area */ 10450276Speter u_char rec_page_start; /* first page of RX ring-buffer */ 10550276Speter u_char rec_page_stop; /* last page of RX ring-buffer */ 106166124Srafan u_char next_packet; /* pointer to next unread RX packet */ 10750276Speter struct kern_devconf kdc; /* kernel configuration database info */ 10850276Speter} ed_softc[NED]; 10950276Speter 11050276Speterint ed_attach(struct isa_device *); 11150276Spetervoid ed_init(int); 112166124Srafanvoid edintr(int); 113166124Srafanint ed_ioctl(struct ifnet *, int, caddr_t); 11450276Speterint ed_probe(struct isa_device *); 115166124Srafanvoid ed_start(struct ifnet *); 11650276Spetervoid ed_reset(int); 11750276Spetervoid ed_watchdog(int); 11850276Speterint ed_probe_generic8390(struct ed_softc *); 11950276Speterint ed_probe_WD80x3(struct isa_device *); 12050276Speterint ed_probe_3Com(struct isa_device *); 121166124Srafanint ed_probe_Novell(struct isa_device *); 122166124Srafanint ed_probe_pccard(struct isa_device *, u_char *); 123166124Srafan 12450276Spetervoid ds_getmcaf(); 12550276Speter 12650276Speterstatic void ed_get_packet(struct ed_softc *, char *, int /* u_short */ , int); 12750276Speterstatic void ed_stop(int); 12850276Speter 12950276Speterstatic inline void ed_rint(); 130166124Srafanstatic inline void ed_xmit(); 131166124Srafanstatic inline char *ed_ring_copy(); 13250276Speter 133166124Srafanvoid ed_pio_readmem(), ed_pio_writemem(); 134166124Srafanu_short ed_pio_write_mbufs(); 135166124Srafan 136166124Srafanvoid ed_setrcr(struct ifnet *, struct ed_softc *); 137166124Srafan 138166124Srafan#include "crd.h" 13950276Speter#if NCRD > 0 14050276Speter#include <sys/select.h> 141166124Srafan#include <pccard/card.h> 14250276Speter#include <pccard/slot.h> 143166124Srafan/* 144166124Srafan * PC-Card (PCMCIA) specific code. 14550276Speter */ 14650276Speterstatic int card_intr(struct pccard_dev *); /* Interrupt handler */ 147166124Srafanvoid edunload(struct pccard_dev *); /* Disable driver */ 148166124Srafanvoid edsuspend(struct pccard_dev *); /* Suspend driver */ 149166124Srafanstatic int edinit(struct pccard_dev *, int); /* init device */ 150166124Srafan 151166124Srafanstatic struct pccard_drv ed_info = 152166124Srafan { 153166124Srafan "ed", 154166124Srafan card_intr, 155166124Srafan edunload, 156166124Srafan edsuspend, 157166124Srafan edinit, 158166124Srafan 0, /* Attributes - presently unused */ 159166124Srafan &net_imask /* Interrupt mask for device */ 160166124Srafan /* This should also include net_imask?? */ 161166124Srafan }; 162166124Srafan/* 163166124Srafan * Called when a power down is wanted. Shuts down the 164166124Srafan * device and configures the device as unavailable (but 165166124Srafan * still loaded...). A resume is done by calling 166166124Srafan * edinit with first=0. This is called when the user suspends 167166124Srafan * the system, or the APM code suspends the system. 168166124Srafan */ 169166124Srafanvoid 170166124Srafanedsuspend(struct pccard_dev *dp) 171166124Srafan{ 172166124Srafan printf("ed%d: suspending\n", dp->isahd.id_unit); 173166124Srafan} 174166124Srafan/* 175166124Srafan * Initialize the device - called from Slot manager. 176166124Srafan * if first is set, then initially check for 177166124Srafan * the device's existence before initialising it. 178166124Srafan * Once initialised, the device table may be set up. 179166124Srafan */ 180166124Srafanint 181166124Srafanedinit(struct pccard_dev *dp, int first) 182166124Srafan{ 183166124Srafan int s; 18450276Speter struct ed_softc *sc = &ed_softc[dp->isahd.id_unit]; 18550276Speter/* 186166124Srafan * validate unit number. 187166124Srafan */ 18850276Speter if (first) { 18950276Speter if (dp->isahd.id_unit >= NED) 190166124Srafan return(ENODEV); 191166124Srafan/* 192166124Srafan * Probe the device. If a value is returned, the 193166124Srafan * device was found at the location. 194166124Srafan */ 19550276Speter 19650276Speter sc->gone = 0; 197166124Srafan if (ed_probe_pccard(&dp->isahd,dp->misc)==0) { 19850276Speter return(ENXIO); 199166124Srafan } 200166124Srafan if (ed_attach(&dp->isahd)==0) { 20150276Speter return(ENXIO); 202166124Srafan } 203166124Srafan } 204166124Srafan/* 205166124Srafan * XXX TODO: 206166124Srafan * If it was already inited before, the device structure 20750276Speter * should be already initialised. Here we should 20850276Speter * reset (and possibly restart) the hardware, but 209166124Srafan * I am not sure of the best way to do this... 21050276Speter */ 21150276Speter return(0); 21250276Speter} 21350276Speter/* 214166124Srafan * edunload - unload the driver and clear the table. 21550276Speter * XXX TODO: 21650276Speter * This is called usually when the card is ejected, but 21750276Speter * can be caused by the modunload of a controller driver. 21850276Speter * The idea is reset the driver's view of the device 21950276Speter * and ensure that any driver entry points such as 22050276Speter * read and write do not hang. 22150276Speter */ 22250276Spetervoid 223166124Srafanedunload(struct pccard_dev *dp) 224166124Srafan{ 22550276Speter struct ed_softc *sc = &ed_softc[dp->isahd.id_unit]; 226166124Srafan sc->kdc.kdc_state = DC_UNCONFIGURED; 22750276Speter if_down(&sc->arpcom.ac_if); 22850276Speter sc->gone = 1; 229166124Srafan printf("ed%d: unload\n", dp->isahd.id_unit); 230166124Srafan} 23150276Speter 232166124Srafan/* 23350276Speter * card_intr - Shared interrupt called from 23450276Speter * front end of PC-Card handler. 235166124Srafan */ 236166124Srafanstatic int 237166124Srafancard_intr(struct pccard_dev *dp) 238166124Srafan{ 239166124Srafan edintr(dp->isahd.id_unit); 24050276Speter return(1); 24150276Speter} 24250276Speter#endif /* NCRD > 0 */ 24350276Speter 244166124Srafanstruct isa_driver eddriver = { 24550276Speter ed_probe, 24650276Speter ed_attach, 247 "ed", 248 1 /* We are ultra sensitive */ 249}; 250 251/* 252 * Interrupt conversion table for WD/SMC ASIC/83C584 253 * (IRQ* are defined in icu.h) 254 */ 255static unsigned short ed_intr_mask[] = { 256 IRQ9, 257 IRQ3, 258 IRQ5, 259 IRQ7, 260 IRQ10, 261 IRQ11, 262 IRQ15, 263 IRQ4 264}; 265 266/* 267 * Interrupt conversion table for 83C790 268 */ 269static unsigned short ed_790_intr_mask[] = { 270 0, 271 IRQ9, 272 IRQ3, 273 IRQ5, 274 IRQ7, 275 IRQ10, 276 IRQ11, 277 IRQ15 278}; 279 280#define ETHER_MIN_LEN 60 281#define ETHER_MAX_LEN 1514 282#define ETHER_ADDR_LEN 6 283#define ETHER_HDR_SIZE 14 284 285static struct kern_devconf kdc_ed_template = { 286 0, 0, 0, /* filled in by dev_attach */ 287 "ed", 0, { MDDT_ISA, 0, "net" }, 288 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN, 289 &kdc_isa0, /* parent */ 290 0, /* parentdata */ 291 DC_UNCONFIGURED, /* state */ 292 "", /* description */ 293 DC_CLS_NETIF /* class */ 294}; 295 296static inline void 297ed_registerdev(struct isa_device *id, const char *descr) 298{ 299 struct kern_devconf *kdc = &ed_softc[id->id_unit].kdc; 300 char *longdescr; 301 *kdc = kdc_ed_template; 302 kdc->kdc_unit = id->id_unit; 303 kdc->kdc_parentdata = id; 304 kdc->kdc_description = descr; 305 dev_attach(kdc); 306} 307 308/* 309 * Determine if the device is present 310 * 311 * on entry: 312 * a pointer to an isa_device struct 313 * on exit: 314 * NULL if device not found 315 * or # of i/o addresses used (if found) 316 */ 317int 318ed_probe(isa_dev) 319 struct isa_device *isa_dev; 320{ 321 int nports; 322#if NCRD > 0 323/* 324 * If PC-Card probe required, then register driver with 325 * slot manager. 326 */ 327 pccard_add_driver(&ed_info); 328#endif /* NCRD > 0 */ 329 330#ifndef DEV_LKM 331 ed_registerdev(isa_dev, "Ethernet adapter"); 332#endif /* not DEV_LKM */ 333 334 nports = ed_probe_WD80x3(isa_dev); 335 if (nports) 336 return (nports); 337 338 nports = ed_probe_3Com(isa_dev); 339 if (nports) 340 return (nports); 341 342 nports = ed_probe_Novell(isa_dev); 343 if (nports) 344 return (nports); 345 346 return (0); 347} 348 349/* 350 * Generic probe routine for testing for the existance of a DS8390. 351 * Must be called after the NIC has just been reset. This routine 352 * works by looking at certain register values that are guaranteed 353 * to be initialized a certain way after power-up or reset. Seems 354 * not to currently work on the 83C690. 355 * 356 * Specifically: 357 * 358 * Register reset bits set bits 359 * Command Register (CR) TXP, STA RD2, STP 360 * Interrupt Status (ISR) RST 361 * Interrupt Mask (IMR) All bits 362 * Data Control (DCR) LAS 363 * Transmit Config. (TCR) LB1, LB0 364 * 365 * We only look at the CR and ISR registers, however, because looking at 366 * the others would require changing register pages (which would be 367 * intrusive if this isn't an 8390). 368 * 369 * Return 1 if 8390 was found, 0 if not. 370 */ 371 372int 373ed_probe_generic8390(sc) 374 struct ed_softc *sc; 375{ 376 if ((inb(sc->nic_addr + ED_P0_CR) & 377 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 378 (ED_CR_RD2 | ED_CR_STP)) 379 return (0); 380 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) 381 return (0); 382 383 return (1); 384} 385 386/* 387 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards 388 */ 389int 390ed_probe_WD80x3(isa_dev) 391 struct isa_device *isa_dev; 392{ 393 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 394 int i; 395 u_int memsize; 396 u_char iptr, isa16bit, sum; 397 398 sc->asic_addr = isa_dev->id_iobase; 399 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; 400 sc->is790 = 0; 401 402#ifdef TOSH_ETHER 403 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW); 404 DELAY(10000); 405#endif 406 407 /* 408 * Attempt to do a checksum over the station address PROM. If it 409 * fails, it's probably not a SMC/WD board. There is a problem with 410 * this, though: some clone WD boards don't pass the checksum test. 411 * Danpex boards for one. 412 */ 413 for (sum = 0, i = 0; i < 8; ++i) 414 sum += inb(sc->asic_addr + ED_WD_PROM + i); 415 416 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) { 417 418 /* 419 * Checksum is invalid. This often happens with cheap WD8003E 420 * clones. In this case, the checksum byte (the eighth byte) 421 * seems to always be zero. 422 */ 423 if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E || 424 inb(sc->asic_addr + ED_WD_PROM + 7) != 0) 425 return (0); 426 } 427 /* reset card to force it into a known state. */ 428#ifdef TOSH_ETHER 429 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW); 430#else 431 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST); 432#endif 433 DELAY(100); 434 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); 435 /* wait in the case this card is reading it's EEROM */ 436 DELAY(5000); 437 438 sc->vendor = ED_VENDOR_WD_SMC; 439 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID); 440 441 /* 442 * Set initial values for width/size. 443 */ 444 memsize = 8192; 445 isa16bit = 0; 446 switch (sc->type) { 447 case ED_TYPE_WD8003S: 448 sc->type_str = "WD8003S"; 449 sc->kdc.kdc_description = "Ethernet adapter: WD 8003S"; 450 break; 451 case ED_TYPE_WD8003E: 452 sc->type_str = "WD8003E"; 453 sc->kdc.kdc_description = "Ethernet adapter: WD 8003E"; 454 break; 455 case ED_TYPE_WD8003EB: 456 sc->type_str = "WD8003EB"; 457 sc->kdc.kdc_description = "Ethernet adapter: WD 8003EB"; 458 break; 459 case ED_TYPE_WD8003W: 460 sc->type_str = "WD8003W"; 461 sc->kdc.kdc_description = "Ethernet adapter: WD 8003W"; 462 break; 463 case ED_TYPE_WD8013EBT: 464 sc->type_str = "WD8013EBT"; 465 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBT"; 466 memsize = 16384; 467 isa16bit = 1; 468 break; 469 case ED_TYPE_WD8013W: 470 sc->type_str = "WD8013W"; 471 sc->kdc.kdc_description = "Ethernet adapter: WD 8013W"; 472 memsize = 16384; 473 isa16bit = 1; 474 break; 475 case ED_TYPE_WD8013EP: /* also WD8003EP */ 476 if (inb(sc->asic_addr + ED_WD_ICR) 477 & ED_WD_ICR_16BIT) { 478 isa16bit = 1; 479 memsize = 16384; 480 sc->type_str = "WD8013EP"; 481 sc->kdc.kdc_description = 482 "Ethernet adapter: WD 8013EP"; 483 } else { 484 sc->type_str = "WD8003EP"; 485 sc->kdc.kdc_description = 486 "Ethernet adapter: WD 8003EP"; 487 } 488 break; 489 case ED_TYPE_WD8013WC: 490 sc->type_str = "WD8013WC"; 491 sc->kdc.kdc_description = "Ethernet adapter: WD 8013WC"; 492 memsize = 16384; 493 isa16bit = 1; 494 break; 495 case ED_TYPE_WD8013EBP: 496 sc->type_str = "WD8013EBP"; 497 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBP"; 498 memsize = 16384; 499 isa16bit = 1; 500 break; 501 case ED_TYPE_WD8013EPC: 502 sc->type_str = "WD8013EPC"; 503 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EPC"; 504 memsize = 16384; 505 isa16bit = 1; 506 break; 507 case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */ 508 (unsigned int) *(isa_dev->id_maddr+8192) = (unsigned int)0; 509 if ((unsigned int) *(isa_dev->id_maddr+8192)) { 510 sc->type_str = "SMC8416C/SMC8416BT"; 511 sc->kdc.kdc_description = 512 "Ethernet adapter: SMC 8416C or 8416BT"; 513 memsize = 8192; 514 } else { 515 sc->type_str = "SMC8216/SMC8216C"; 516 sc->kdc.kdc_description = 517 "Ethernet adapter: SMC 8216 or 8216C"; 518 memsize = 16384; 519 } 520 isa16bit = 1; 521 sc->is790 = 1; 522 break; 523 case ED_TYPE_SMC8216T: 524 sc->type_str = "SMC8216T"; 525 sc->kdc.kdc_description = 526 "Ethernet adapter: SMC 8216T"; 527 528 outb(sc->asic_addr + ED_WD790_HWR, 529 inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH); 530 switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) { 531 case ED_WD790_RAR_SZ64: 532 memsize = 65536; 533 break; 534 case ED_WD790_RAR_SZ32: 535 memsize = 32768; 536 break; 537 case ED_WD790_RAR_SZ16: 538 memsize = 16384; 539 break; 540 case ED_WD790_RAR_SZ8: 541 sc->type_str = "SMC8416T"; 542 sc->kdc.kdc_description = 543 "Ethernet adapter: SMC 8416T"; 544 memsize = 8192; 545 break; 546 } 547 outb(sc->asic_addr + ED_WD790_HWR, 548 inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); 549 550 isa16bit = 1; 551 sc->is790 = 1; 552 break; 553#ifdef TOSH_ETHER 554 case ED_TYPE_TOSHIBA1: 555 sc->type_str = "Toshiba1"; 556 sc->kdc.kdc_description = "Ethernet adapter: Toshiba1"; 557 memsize = 32768; 558 isa16bit = 1; 559 break; 560 case ED_TYPE_TOSHIBA4: 561 sc->type_str = "Toshiba4"; 562 sc->kdc.kdc_description = "Ethernet adapter: Toshiba4"; 563 memsize = 32768; 564 isa16bit = 1; 565 break; 566#endif 567 default: 568 sc->type_str = ""; 569 break; 570 } 571 572 /* 573 * Make some adjustments to initial values depending on what is found 574 * in the ICR. 575 */ 576 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) 577#ifdef TOSH_ETHER 578 && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) 579#endif 580 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { 581 isa16bit = 0; 582 memsize = 8192; 583 } 584 585#if ED_DEBUG 586 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", 587 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); 588 for (i = 0; i < 8; i++) 589 printf("%x -> %x\n", i, inb(sc->asic_addr + i)); 590#endif 591 592 /* 593 * Allow the user to override the autoconfiguration 594 */ 595 if (isa_dev->id_msize) 596 memsize = isa_dev->id_msize; 597 598 /* 599 * (note that if the user specifies both of the following flags that 600 * '8bit' mode intentionally has precedence) 601 */ 602 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) 603 isa16bit = 1; 604 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE) 605 isa16bit = 0; 606 607 /* 608 * If possible, get the assigned interrupt number from the card and 609 * use it. 610 */ 611 if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) { 612 613 /* 614 * Assemble together the encoded interrupt number. 615 */ 616 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | 617 ((inb(isa_dev->id_iobase + ED_WD_IRR) & 618 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); 619 620 /* 621 * If no interrupt specified (or "?"), use what the board tells us. 622 */ 623 if (isa_dev->id_irq <= 0) 624 isa_dev->id_irq = ed_intr_mask[iptr]; 625 626 /* 627 * Enable the interrupt. 628 */ 629 outb(isa_dev->id_iobase + ED_WD_IRR, 630 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); 631 } 632 if (sc->is790) { 633 outb(isa_dev->id_iobase + ED_WD790_HWR, 634 inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH); 635 iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) | 636 (inb(isa_dev->id_iobase + ED_WD790_GCR) & 637 (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2); 638 outb(isa_dev->id_iobase + ED_WD790_HWR, 639 inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); 640 641 /* 642 * If no interrupt specified (or "?"), use what the board tells us. 643 */ 644 if (isa_dev->id_irq <= 0) 645 isa_dev->id_irq = ed_790_intr_mask[iptr]; 646 647 /* 648 * Enable interrupts. 649 */ 650 outb(isa_dev->id_iobase + ED_WD790_ICR, 651 inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL); 652 } 653 if (isa_dev->id_irq <= 0) { 654 printf("ed%d: %s cards don't support auto-detected/assigned interrupts.\n", 655 isa_dev->id_unit, sc->type_str); 656 return (0); 657 } 658 sc->isa16bit = isa16bit; 659 sc->mem_shared = 1; 660 isa_dev->id_msize = memsize; 661 sc->mem_start = (caddr_t) isa_dev->id_maddr; 662 663 /* 664 * allocate one xmit buffer if < 16k, two buffers otherwise 665 */ 666 if ((memsize < 16384) || 667 (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) { 668 sc->txb_cnt = 1; 669 } else { 670 sc->txb_cnt = 2; 671 } 672 sc->tx_page_start = ED_WD_PAGE_OFFSET; 673 sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt; 674 sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE; 675 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start); 676 sc->mem_size = memsize; 677 sc->mem_end = sc->mem_start + memsize; 678 679 /* 680 * Get station address from on-board ROM 681 */ 682 for (i = 0; i < ETHER_ADDR_LEN; ++i) 683 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); 684 685 /* 686 * Set upper address bits and 8/16 bit access to shared memory 687 */ 688 if (isa16bit) { 689 if (sc->is790) { 690 sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR); 691 outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN); 692 } else { 693 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 694 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | 695 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 696 } 697 } else { 698 if (((sc->type & ED_WD_SOFTCONFIG) || 699#ifdef TOSH_ETHER 700 (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) || 701#endif 702 (sc->type == ED_TYPE_WD8013EBT)) && (!sc->is790)) { 703 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = 704 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); 705 } 706 } 707 708 /* 709 * Set address and enable interface shared memory. 710 */ 711 if (!sc->is790) { 712#ifdef TOSH_ETHER 713 outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); 714 outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f)); 715 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW); 716 717#else 718 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & 719 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); 720#endif 721 sc->cr_proto = ED_CR_RD2; 722 } else { 723 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); 724 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH)); 725 outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) | 726 ((kvtop(sc->mem_start) >> 11) & 0x40) | 727 (inb(sc->asic_addr + ED_WD790_RAR) & 0xb0)); 728 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH)); 729 sc->cr_proto = 0; 730 } 731 732#if 0 733 printf("starting memory performance test at 0x%x, size %d...\n", 734 sc->mem_start, memsize*16384); 735 for (i = 0; i < 16384; i++) 736 bzero(sc->mem_start, memsize); 737 printf("***DONE***\n"); 738#endif 739 740 /* 741 * Now zero memory and verify that it is clear 742 */ 743 bzero(sc->mem_start, memsize); 744 745 for (i = 0; i < memsize; ++i) { 746 if (sc->mem_start[i]) { 747 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 748 isa_dev->id_unit, kvtop(sc->mem_start + i)); 749 750 /* 751 * Disable 16 bit access to shared memory 752 */ 753 if (isa16bit) { 754 if (sc->is790) { 755 outb(sc->asic_addr + ED_WD_MSR, 0x00); 756 } 757 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 758 ~ED_WD_LAAR_M16EN)); 759 } 760 return (0); 761 } 762 } 763 764 /* 765 * Disable 16bit access to shared memory - we leave it 766 * disabled so that 1) machines reboot properly when the board 767 * is set 16 bit mode and there are conflicting 8bit 768 * devices/ROMS in the same 128k address space as this boards 769 * shared memory. and 2) so that other 8 bit devices with 770 * shared memory can be used in this 128k region, too. 771 */ 772 if (isa16bit) { 773 if (sc->is790) { 774 outb(sc->asic_addr + ED_WD_MSR, 0x00); 775 } 776 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= 777 ~ED_WD_LAAR_M16EN)); 778 } 779 return (ED_WD_IO_PORTS); 780} 781 782/* 783 * Probe and vendor-specific initialization routine for 3Com 3c503 boards 784 */ 785int 786ed_probe_3Com(isa_dev) 787 struct isa_device *isa_dev; 788{ 789 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 790 int i; 791 u_int memsize; 792 u_char isa16bit; 793 794 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; 795 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; 796 797 /* 798 * Verify that the kernel configured I/O address matches the board 799 * configured address 800 */ 801 switch (inb(sc->asic_addr + ED_3COM_BCFR)) { 802 case ED_3COM_BCFR_300: 803 if (isa_dev->id_iobase != 0x300) 804 return (0); 805 break; 806 case ED_3COM_BCFR_310: 807 if (isa_dev->id_iobase != 0x310) 808 return (0); 809 break; 810 case ED_3COM_BCFR_330: 811 if (isa_dev->id_iobase != 0x330) 812 return (0); 813 break; 814 case ED_3COM_BCFR_350: 815 if (isa_dev->id_iobase != 0x350) 816 return (0); 817 break; 818 case ED_3COM_BCFR_250: 819 if (isa_dev->id_iobase != 0x250) 820 return (0); 821 break; 822 case ED_3COM_BCFR_280: 823 if (isa_dev->id_iobase != 0x280) 824 return (0); 825 break; 826 case ED_3COM_BCFR_2A0: 827 if (isa_dev->id_iobase != 0x2a0) 828 return (0); 829 break; 830 case ED_3COM_BCFR_2E0: 831 if (isa_dev->id_iobase != 0x2e0) 832 return (0); 833 break; 834 default: 835 return (0); 836 } 837 838 /* 839 * Verify that the kernel shared memory address matches the board 840 * configured address. 841 */ 842 switch (inb(sc->asic_addr + ED_3COM_PCFR)) { 843 case ED_3COM_PCFR_DC000: 844 if (kvtop(isa_dev->id_maddr) != 0xdc000) 845 return (0); 846 break; 847 case ED_3COM_PCFR_D8000: 848 if (kvtop(isa_dev->id_maddr) != 0xd8000) 849 return (0); 850 break; 851 case ED_3COM_PCFR_CC000: 852 if (kvtop(isa_dev->id_maddr) != 0xcc000) 853 return (0); 854 break; 855 case ED_3COM_PCFR_C8000: 856 if (kvtop(isa_dev->id_maddr) != 0xc8000) 857 return (0); 858 break; 859 default: 860 return (0); 861 } 862 863 864 /* 865 * Reset NIC and ASIC. Enable on-board transceiver throughout reset 866 * sequence because it'll lock up if the cable isn't connected if we 867 * don't. 868 */ 869 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); 870 871 /* 872 * Wait for a while, then un-reset it 873 */ 874 DELAY(50); 875 876 /* 877 * The 3Com ASIC defaults to rather strange settings for the CR after 878 * a reset - it's important to set it again after the following outb 879 * (this is done when we map the PROM below). 880 */ 881 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 882 883 /* 884 * Wait a bit for the NIC to recover from the reset 885 */ 886 DELAY(5000); 887 888 sc->vendor = ED_VENDOR_3COM; 889 sc->type_str = "3c503"; 890 sc->kdc.kdc_description = "Ethernet adapter: 3c503"; 891 sc->mem_shared = 1; 892 sc->cr_proto = ED_CR_RD2; 893 894 /* 895 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window 896 * to it. 897 */ 898 memsize = 8192; 899 900 /* 901 * Get station address from on-board ROM 902 */ 903 904 /* 905 * First, map ethernet address PROM over the top of where the NIC 906 * registers normally appear. 907 */ 908 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); 909 910 for (i = 0; i < ETHER_ADDR_LEN; ++i) 911 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i); 912 913 /* 914 * Unmap PROM - select NIC registers. The proper setting of the 915 * tranceiver is set in ed_init so that the attach code is given a 916 * chance to set the default based on a compile-time config option 917 */ 918 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 919 920 /* 921 * Determine if this is an 8bit or 16bit board 922 */ 923 924 /* 925 * select page 0 registers 926 */ 927 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 928 929 /* 930 * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit 931 * board. 932 */ 933 outb(sc->nic_addr + ED_P0_DCR, 0); 934 935 /* 936 * select page 2 registers 937 */ 938 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP); 939 940 /* 941 * The 3c503 forces the WTS bit to a one if this is a 16bit board 942 */ 943 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS) 944 isa16bit = 1; 945 else 946 isa16bit = 0; 947 948 /* 949 * select page 0 registers 950 */ 951 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP); 952 953 sc->mem_start = (caddr_t) isa_dev->id_maddr; 954 sc->mem_size = memsize; 955 sc->mem_end = sc->mem_start + memsize; 956 957 /* 958 * We have an entire 8k window to put the transmit buffers on the 959 * 16bit boards. But since the 16bit 3c503's shared memory is only 960 * fast enough to overlap the loading of one full-size packet, trying 961 * to load more than 2 buffers can actually leave the transmitter idle 962 * during the load. So 2 seems the best value. (Although a mix of 963 * variable-sized packets might change this assumption. Nonetheless, 964 * we optimize for linear transfers of same-size packets.) 965 */ 966 if (isa16bit) { 967 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) 968 sc->txb_cnt = 1; 969 else 970 sc->txb_cnt = 2; 971 972 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; 973 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; 974 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 975 ED_3COM_RX_PAGE_OFFSET_16BIT; 976 sc->mem_ring = sc->mem_start; 977 } else { 978 sc->txb_cnt = 1; 979 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; 980 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; 981 sc->rec_page_stop = memsize / ED_PAGE_SIZE + 982 ED_3COM_TX_PAGE_OFFSET_8BIT; 983 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); 984 } 985 986 sc->isa16bit = isa16bit; 987 988 /* 989 * Initialize GA page start/stop registers. Probably only needed if 990 * doing DMA, but what the hell. 991 */ 992 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); 993 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); 994 995 /* 996 * Set IRQ. 3c503 only allows a choice of irq 2-5. 997 */ 998 switch (isa_dev->id_irq) { 999 case IRQ2: 1000 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2); 1001 break; 1002 case IRQ3: 1003 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3); 1004 break; 1005 case IRQ4: 1006 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4); 1007 break; 1008 case IRQ5: 1009 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5); 1010 break; 1011 default: 1012 printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n", 1013 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); 1014 return (0); 1015 } 1016 1017 /* 1018 * Initialize GA configuration register. Set bank and enable shared 1019 * mem. 1020 */ 1021 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | 1022 ED_3COM_GACFR_MBS0); 1023 1024 /* 1025 * Initialize "Vector Pointer" registers. These gawd-awful things are 1026 * compared to 20 bits of the address on ISA, and if they match, the 1027 * shared memory is disabled. We set them to 0xffff0...allegedly the 1028 * reset vector. 1029 */ 1030 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); 1031 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); 1032 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00); 1033 1034 /* 1035 * Zero memory and verify that it is clear 1036 */ 1037 bzero(sc->mem_start, memsize); 1038 1039 for (i = 0; i < memsize; ++i) 1040 if (sc->mem_start[i]) { 1041 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 1042 isa_dev->id_unit, kvtop(sc->mem_start + i)); 1043 return (0); 1044 } 1045 isa_dev->id_msize = memsize; 1046 return (ED_3COM_IO_PORTS); 1047} 1048 1049/* 1050 * Probe and vendor-specific initialization routine for NE1000/2000 boards 1051 */ 1052int 1053ed_probe_Novell(isa_dev) 1054 struct isa_device *isa_dev; 1055{ 1056 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1057 u_int memsize, n; 1058 u_char romdata[16], tmp; 1059 static char test_pattern[32] = "THIS is A memory TEST pattern"; 1060 char test_buffer[32]; 1061 1062 sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET; 1063 sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET; 1064 1065 /* XXX - do Novell-specific probe here */ 1066 1067 /* Reset the board */ 1068#ifdef GWETHER 1069 outb(sc->asic_addr + ED_NOVELL_RESET, 0); 1070 DELAY(200); 1071#endif /* GWETHER */ 1072 tmp = inb(sc->asic_addr + ED_NOVELL_RESET); 1073 1074 /* 1075 * I don't know if this is necessary; probably cruft leftover from 1076 * Clarkson packet driver code. Doesn't do a thing on the boards I've 1077 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 1078 * non-invasive...but some boards don't seem to reset and I don't have 1079 * complete documentation on what the 'right' thing to do is...so we 1080 * do the invasive thing for now. Yuck.] 1081 */ 1082 outb(sc->asic_addr + ED_NOVELL_RESET, tmp); 1083 DELAY(5000); 1084 1085 /* 1086 * This is needed because some NE clones apparently don't reset the 1087 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 1088 * - this makes the probe invasive! ...Done against my better 1089 * judgement. -DLG 1090 */ 1091 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 1092 1093 DELAY(5000); 1094 1095 /* Make sure that we really have an 8390 based board */ 1096 if (!ed_probe_generic8390(sc)) 1097 return (0); 1098 1099 sc->vendor = ED_VENDOR_NOVELL; 1100 sc->mem_shared = 0; 1101 sc->cr_proto = ED_CR_RD2; 1102 isa_dev->id_maddr = 0; 1103 1104 /* 1105 * Test the ability to read and write to the NIC memory. This has the 1106 * side affect of determining if this is an NE1000 or an NE2000. 1107 */ 1108 1109 /* 1110 * This prevents packets from being stored in the NIC memory when the 1111 * readmem routine turns on the start bit in the CR. 1112 */ 1113 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); 1114 1115 /* Temporarily initialize DCR for byte operations */ 1116 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 1117 1118 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); 1119 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); 1120 1121 sc->isa16bit = 0; 1122 1123 /* 1124 * Write a test pattern in byte mode. If this fails, then there 1125 * probably isn't any memory at 8k - which likely means that the board 1126 * is an NE2000. 1127 */ 1128 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); 1129 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); 1130 1131 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 1132 /* not an NE1000 - try NE2000 */ 1133 1134 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 1135 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); 1136 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); 1137 1138 sc->isa16bit = 1; 1139 1140 /* 1141 * Write a test pattern in word mode. If this also fails, then 1142 * we don't know what this board is. 1143 */ 1144 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 1145 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 1146 1147 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) 1148 return (0); /* not an NE2000 either */ 1149 1150 sc->type = ED_TYPE_NE2000; 1151 sc->type_str = "NE2000"; 1152 sc->kdc.kdc_description = "Ethernet adapter: NE2000"; 1153 } else { 1154 sc->type = ED_TYPE_NE1000; 1155 sc->type_str = "NE1000"; 1156 sc->kdc.kdc_description = "Ethernet adapter: NE1000"; 1157 } 1158 1159 /* 8k of memory plus an additional 8k if 16bit */ 1160 memsize = 8192 + sc->isa16bit * 8192; 1161 1162#if 0 /* probably not useful - NE boards only come two ways */ 1163 /* allow kernel config file overrides */ 1164 if (isa_dev->id_msize) 1165 memsize = isa_dev->id_msize; 1166#endif 1167 1168 sc->mem_size = memsize; 1169 1170 /* NIC memory doesn't start at zero on an NE board */ 1171 /* The start address is tied to the bus width */ 1172 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192; 1173 sc->mem_end = sc->mem_start + memsize; 1174 sc->tx_page_start = memsize / ED_PAGE_SIZE; 1175 1176#ifdef GWETHER 1177 { 1178 int x, i, mstart = 0, msize = 0; 1179 char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE]; 1180 1181 for (i = 0; i < ED_PAGE_SIZE; i++) 1182 pbuf0[i] = 0; 1183 1184 /* Clear all the memory. */ 1185 for (x = 1; x < 256; x++) 1186 ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE); 1187 1188 /* Search for the start of RAM. */ 1189 for (x = 1; x < 256; x++) { 1190 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1191 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 1192 for (i = 0; i < ED_PAGE_SIZE; i++) 1193 pbuf[i] = 255 - x; 1194 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); 1195 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1196 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 1197 mstart = x * ED_PAGE_SIZE; 1198 msize = ED_PAGE_SIZE; 1199 break; 1200 } 1201 } 1202 } 1203 1204 if (mstart == 0) { 1205 printf("ed%d: Cannot find start of RAM.\n", isa_dev->id_unit); 1206 return 0; 1207 } 1208 /* Search for the start of RAM. */ 1209 for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) { 1210 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1211 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 1212 for (i = 0; i < ED_PAGE_SIZE; i++) 1213 pbuf[i] = 255 - x; 1214 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); 1215 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); 1216 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 1217 msize += ED_PAGE_SIZE; 1218 else { 1219 break; 1220 } 1221 } else { 1222 break; 1223 } 1224 } 1225 1226 if (msize == 0) { 1227 printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", isa_dev->id_unit, mstart, x); 1228 return 0; 1229 } 1230 printf("ed%d: RAM start at %d, size : %d.\n", isa_dev->id_unit, mstart, msize); 1231 1232 sc->mem_size = msize; 1233 sc->mem_start = (char *) mstart; 1234 sc->mem_end = (char *) (msize + mstart); 1235 sc->tx_page_start = mstart / ED_PAGE_SIZE; 1236 } 1237#endif /* GWETHER */ 1238 1239 /* 1240 * Use one xmit buffer if < 16k, two buffers otherwise (if not told 1241 * otherwise). 1242 */ 1243 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) 1244 sc->txb_cnt = 1; 1245 else 1246 sc->txb_cnt = 2; 1247 1248 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 1249 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 1250 1251 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 1252 1253 ed_pio_readmem(sc, 0, romdata, 16); 1254 for (n = 0; n < ETHER_ADDR_LEN; n++) 1255 sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)]; 1256 1257#ifdef GWETHER 1258 if (sc->arpcom.ac_enaddr[2] == 0x86) { 1259 sc->type_str = "Gateway AT"; 1260 sc->kdc.kdc_description = "Ethernet adapter: Gateway AT"; 1261 } 1262#endif /* GWETHER */ 1263 1264 /* clear any pending interrupts that might have occurred above */ 1265 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1266 1267 return (ED_NOVELL_IO_PORTS); 1268} 1269 1270 1271/* 1272 * Probe and vendor-specific initialization routine for PCCARDs 1273 */ 1274int 1275ed_probe_pccard(isa_dev, ether) 1276 struct isa_device *isa_dev; 1277 u_char *ether; 1278{ 1279 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1280 int i; 1281 u_int memsize; 1282 u_char iptr, isa16bit, sum; 1283 1284 sc->nic_addr = isa_dev->id_iobase; 1285 sc->gone = 0; 1286 sc->is790 = 0; 1287 sc->cr_proto = ED_CR_RD2; 1288 sc->vendor = ED_VENDOR_PCCARD; 1289 sc->type = 0; 1290 sc->type_str = "PCCARD"; 1291 sc->kdc.kdc_description = "PCCARD Ethernet"; 1292 sc->mem_size = isa_dev->id_msize = memsize = 16384; 1293 sc->isa16bit = isa16bit = 1; 1294 1295 for (i = 0; i < ETHER_ADDR_LEN; ++i) 1296 sc->arpcom.ac_enaddr[i] = ether[i]; 1297 1298#if ED_DEBUG 1299 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", 1300 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); 1301#endif 1302 1303 i = inb(sc->nic_addr + ED_PC_RESET); 1304 DELAY(100000); 1305 outb(sc->nic_addr + ED_PC_RESET,i); 1306 DELAY(100000); 1307 i = inb(sc->nic_addr + ED_PC_MISC); 1308 if (!i) { 1309 int j; 1310 printf("ed_probe_pccard: possible failure\n"); 1311 for (j=0;j<20 && !i;j++) { 1312 printf("."); 1313 DELAY(100000); 1314 i = inb(sc->nic_addr + ED_PC_MISC); 1315 } 1316 if (!i) { 1317 printf("dead :-(\n"); 1318 return 0; 1319 } 1320 printf("\n"); 1321 } 1322 /* 1323 * Set initial values for width/size. 1324 */ 1325 1326 /* Make sure that we really have an 8390 based board */ 1327 if (!ed_probe_generic8390(sc)) { 1328 printf("ed_probe_generic8390 failed\n"); 1329 return (0); 1330 } 1331 sc->txb_cnt = 2; 1332 sc->tx_page_start = ED_PC_PAGE_OFFSET; 1333 sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt; 1334 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 1335 1336 sc->mem_shared = 1; 1337 sc->mem_start = (caddr_t) isa_dev->id_maddr; 1338 sc->mem_size = memsize; 1339 sc->mem_end = sc->mem_start + memsize; 1340 1341 sc->mem_ring = sc->mem_start + 1342 sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 1343 1344 /* 1345 * Now zero memory and verify that it is clear 1346 */ 1347 bzero(sc->mem_start, memsize); 1348 1349 for (i = 0; i < memsize; ++i) { 1350 if (sc->mem_start[i]) { 1351 printf("ed%d: failed to clear shared memory at %lx - check configuration\n", 1352 isa_dev->id_unit, kvtop(sc->mem_start + i)); 1353 1354 return (0); 1355 } 1356 sc->mem_start[i] = (i - 5) & 0xff; 1357 } 1358 for (i = 0; i < memsize; ++i) { 1359 if ((sc->mem_start[i] & 0xff) != ((i - 5) & 0xff)) { 1360 printf("ed%d: shared memory failed at %lx (%x != %x) - check configuration\n", 1361 isa_dev->id_unit, kvtop(sc->mem_start + i), 1362 sc->mem_start[i], (i-5) & 0xff); 1363 return (0); 1364 1365 } 1366 } 1367 1368 i = inb(sc->nic_addr + ED_PC_MISC); 1369 if (!i) { 1370 printf("ed_probe_pccard: possible failure(2)\n"); 1371 } 1372 1373 /* clear any pending interupts that we may have caused */ 1374 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1375 1376 return (ED_PC_IO_PORTS); 1377} 1378 1379/* 1380 * Install interface into kernel networking data structures 1381 */ 1382int 1383ed_attach(isa_dev) 1384 struct isa_device *isa_dev; 1385{ 1386 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 1387 struct ifnet *ifp = &sc->arpcom.ac_if; 1388 1389 /* 1390 * Set interface to stopped condition (reset) 1391 */ 1392 ed_stop(isa_dev->id_unit); 1393 1394 if (!ifp->if_name) { 1395 /* 1396 * Initialize ifnet structure 1397 */ 1398 ifp->if_unit = isa_dev->id_unit; 1399 ifp->if_name = "ed"; 1400 ifp->if_init = ed_init; 1401 ifp->if_output = ether_output; 1402 ifp->if_start = ed_start; 1403 ifp->if_ioctl = ed_ioctl; 1404 ifp->if_reset = ed_reset; 1405 ifp->if_watchdog = ed_watchdog; 1406 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 1407 1408 /* 1409 * Set default state for ALTPHYS flag (used to disable the 1410 * tranceiver for AUI operation), based on compile-time 1411 * config option. 1412 */ 1413 if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER) 1414 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | 1415 IFF_NOTRAILERS | IFF_MULTICAST | IFF_ALTPHYS); 1416 else 1417 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | 1418 IFF_NOTRAILERS | IFF_MULTICAST); 1419 1420 /* 1421 * Attach the interface 1422 */ 1423 if_attach(ifp); 1424 } 1425 /* device attach does transition from UNCONFIGURED to IDLE state */ 1426 sc->kdc.kdc_state = DC_IDLE; 1427 1428 /* 1429 * Print additional info when attached 1430 */ 1431 printf("ed%d: address %s, ", isa_dev->id_unit, 1432 ether_sprintf(sc->arpcom.ac_enaddr)); 1433 1434 if (sc->type_str && (*sc->type_str != 0)) 1435 printf("type %s ", sc->type_str); 1436 else 1437 printf("type unknown (0x%x) ", sc->type); 1438 1439 printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)"); 1440 1441 printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && 1442 (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); 1443 1444 /* 1445 * If BPF is in the kernel, call the attach for it 1446 */ 1447#if NBPFILTER > 0 1448 bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 1449#endif 1450 return 1; 1451} 1452 1453/* 1454 * Reset interface. 1455 */ 1456void 1457ed_reset(unit) 1458 int unit; 1459{ 1460 int s; 1461 1462 if (ed_softc[unit].gone) 1463 return; 1464 s = splimp(); 1465 1466 /* 1467 * Stop interface and re-initialize. 1468 */ 1469 ed_stop(unit); 1470 ed_init(unit); 1471 1472 (void) splx(s); 1473} 1474 1475/* 1476 * Take interface offline. 1477 */ 1478void 1479ed_stop(unit) 1480 int unit; 1481{ 1482 struct ed_softc *sc = &ed_softc[unit]; 1483 int n = 5000; 1484 1485 if (sc->gone) 1486 return; 1487 /* 1488 * Stop everything on the interface, and select page 0 registers. 1489 */ 1490 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 1491 1492 /* 1493 * Wait for interface to enter stopped state, but limit # of checks to 1494 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but 1495 * just in case it's an old one. 1496 */ 1497 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); 1498} 1499 1500/* 1501 * Device timeout/watchdog routine. Entered if the device neglects to 1502 * generate an interrupt after a transmit has been started on it. 1503 */ 1504void 1505ed_watchdog(unit) 1506 int unit; 1507{ 1508 struct ed_softc *sc = &ed_softc[unit]; 1509 1510 if (sc->gone) 1511 return; 1512 log(LOG_ERR, "ed%d: device timeout\n", unit); 1513 ++sc->arpcom.ac_if.if_oerrors; 1514 1515 ed_reset(unit); 1516} 1517 1518/* 1519 * Initialize device. 1520 */ 1521void 1522ed_init(unit) 1523 int unit; 1524{ 1525 struct ed_softc *sc = &ed_softc[unit]; 1526 struct ifnet *ifp = &sc->arpcom.ac_if; 1527 int i, s; 1528 1529 if (sc->gone) 1530 return; 1531 1532 /* address not known */ 1533 if (ifp->if_addrlist == (struct ifaddr *) 0) 1534 return; 1535 1536 /* 1537 * Initialize the NIC in the exact order outlined in the NS manual. 1538 * This init procedure is "mandatory"...don't change what or when 1539 * things happen. 1540 */ 1541 s = splimp(); 1542 1543 /* reset transmitter flags */ 1544 sc->xmit_busy = 0; 1545 sc->arpcom.ac_if.if_timer = 0; 1546 1547 sc->txb_inuse = 0; 1548 sc->txb_new = 0; 1549 sc->txb_next_tx = 0; 1550 1551 /* This variable is used below - don't move this assignment */ 1552 sc->next_packet = sc->rec_page_start + 1; 1553 1554 /* 1555 * Set interface for page 0, Remote DMA complete, Stopped 1556 */ 1557 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 1558 1559 if (sc->isa16bit) { 1560 1561 /* 1562 * Set FIFO threshold to 8, No auto-init Remote DMA, byte 1563 * order=80x86, word-wide DMA xfers, 1564 */ 1565 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); 1566 } else { 1567 1568 /* 1569 * Same as above, but byte-wide DMA xfers 1570 */ 1571 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 1572 } 1573 1574 /* 1575 * Clear Remote Byte Count Registers 1576 */ 1577 outb(sc->nic_addr + ED_P0_RBCR0, 0); 1578 outb(sc->nic_addr + ED_P0_RBCR1, 0); 1579 1580 /* 1581 * For the moment, don't store incoming packets in memory. 1582 */ 1583 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); 1584 1585 /* 1586 * Place NIC in internal loopback mode 1587 */ 1588 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0); 1589 1590 /* 1591 * Initialize transmit/receive (ring-buffer) Page Start 1592 */ 1593 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start); 1594 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start); 1595 /* Set lower bits of byte addressable framing to 0 */ 1596 if (sc->is790) 1597 outb(sc->nic_addr + 0x09, 0); 1598 1599 /* 1600 * Initialize Receiver (ring-buffer) Page Stop and Boundry 1601 */ 1602 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop); 1603 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start); 1604 1605 /* 1606 * Clear all interrupts. A '1' in each bit position clears the 1607 * corresponding flag. 1608 */ 1609 outb(sc->nic_addr + ED_P0_ISR, 0xff); 1610 1611 /* 1612 * Enable the following interrupts: receive/transmit complete, 1613 * receive/transmit error, and Receiver OverWrite. 1614 * 1615 * Counter overflow and Remote DMA complete are *not* enabled. 1616 */ 1617 outb(sc->nic_addr + ED_P0_IMR, 1618 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE); 1619 1620 /* 1621 * Program Command Register for page 1 1622 */ 1623 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 1624 1625 /* 1626 * Copy out our station address 1627 */ 1628 for (i = 0; i < ETHER_ADDR_LEN; ++i) 1629 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); 1630 1631 /* 1632 * Set Current Page pointer to next_packet (initialized above) 1633 */ 1634 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); 1635 1636 /* 1637 * Program Receiver Configuration Register and multicast filter. CR is 1638 * set to page 0 on return. 1639 */ 1640 ed_setrcr(ifp, sc); 1641 1642 /* 1643 * Take interface out of loopback 1644 */ 1645 outb(sc->nic_addr + ED_P0_TCR, 0); 1646 1647 /* 1648 * If this is a 3Com board, the tranceiver must be software enabled 1649 * (there is no settable hardware default). 1650 */ 1651 if (sc->vendor == ED_VENDOR_3COM) { 1652 if (ifp->if_flags & IFF_ALTPHYS) { 1653 outb(sc->asic_addr + ED_3COM_CR, 0); 1654 } else { 1655 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 1656 } 1657 } 1658 1659 /* 1660 * Set 'running' flag, and clear output active flag. 1661 */ 1662 ifp->if_flags |= IFF_RUNNING; 1663 ifp->if_flags &= ~IFF_OACTIVE; 1664 1665 /* 1666 * ...and attempt to start output 1667 */ 1668 ed_start(ifp); 1669 1670 (void) splx(s); 1671} 1672 1673/* 1674 * This routine actually starts the transmission on the interface 1675 */ 1676static inline void 1677ed_xmit(ifp) 1678 struct ifnet *ifp; 1679{ 1680 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 1681 unsigned short len; 1682 1683 if (sc->gone) 1684 return; 1685 len = sc->txb_len[sc->txb_next_tx]; 1686 1687 /* 1688 * Set NIC for page 0 register access 1689 */ 1690 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 1691 1692 /* 1693 * Set TX buffer start page 1694 */ 1695 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + 1696 sc->txb_next_tx * ED_TXBUF_SIZE); 1697 1698 /* 1699 * Set TX length 1700 */ 1701 outb(sc->nic_addr + ED_P0_TBCR0, len); 1702 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8); 1703 1704 /* 1705 * Set page 0, Remote DMA complete, Transmit Packet, and *Start* 1706 */ 1707 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA); 1708 sc->xmit_busy = 1; 1709 1710 /* 1711 * Point to next transmit buffer slot and wrap if necessary. 1712 */ 1713 sc->txb_next_tx++; 1714 if (sc->txb_next_tx == sc->txb_cnt) 1715 sc->txb_next_tx = 0; 1716 1717 /* 1718 * Set a timer just in case we never hear from the board again 1719 */ 1720 ifp->if_timer = 2; 1721} 1722 1723/* 1724 * Start output on interface. 1725 * We make two assumptions here: 1726 * 1) that the current priority is set to splimp _before_ this code 1727 * is called *and* is returned to the appropriate priority after 1728 * return 1729 * 2) that the IFF_OACTIVE flag is checked before this code is called 1730 * (i.e. that the output part of the interface is idle) 1731 */ 1732void 1733ed_start(ifp) 1734 struct ifnet *ifp; 1735{ 1736 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 1737 struct mbuf *m0, *m; 1738 caddr_t buffer; 1739 int len; 1740 1741 if (sc->gone) { 1742 printf("ed_start(%p) GONE\n",ifp); 1743 return; 1744 } 1745outloop: 1746 1747 /* 1748 * First, see if there are buffered packets and an idle transmitter - 1749 * should never happen at this point. 1750 */ 1751 if (sc->txb_inuse && (sc->xmit_busy == 0)) { 1752 printf("ed: packets buffered, but transmitter idle\n"); 1753 ed_xmit(ifp); 1754 } 1755 1756 /* 1757 * See if there is room to put another packet in the buffer. 1758 */ 1759 if (sc->txb_inuse == sc->txb_cnt) { 1760 1761 /* 1762 * No room. Indicate this to the outside world and exit. 1763 */ 1764 ifp->if_flags |= IFF_OACTIVE; 1765 return; 1766 } 1767 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 1768 if (m == 0) { 1769 1770 /* 1771 * We are using the !OACTIVE flag to indicate to the outside 1772 * world that we can accept an additional packet rather than 1773 * that the transmitter is _actually_ active. Indeed, the 1774 * transmitter may be active, but if we haven't filled all the 1775 * buffers with data then we still want to accept more. 1776 */ 1777 ifp->if_flags &= ~IFF_OACTIVE; 1778 return; 1779 } 1780 1781 /* 1782 * Copy the mbuf chain into the transmit buffer 1783 */ 1784 1785 m0 = m; 1786 1787 /* txb_new points to next open buffer slot */ 1788 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); 1789 1790 if (sc->mem_shared) { 1791 1792 /* 1793 * Special case setup for 16 bit boards... 1794 */ 1795 if (sc->isa16bit) { 1796 switch (sc->vendor) { 1797 1798 /* 1799 * For 16bit 3Com boards (which have 16k of 1800 * memory), we have the xmit buffers in a 1801 * different page of memory ('page 0') - so 1802 * change pages. 1803 */ 1804 case ED_VENDOR_3COM: 1805 outb(sc->asic_addr + ED_3COM_GACFR, 1806 ED_3COM_GACFR_RSEL); 1807 break; 1808 1809 /* 1810 * Enable 16bit access to shared memory on 1811 * WD/SMC boards. 1812 */ 1813 case ED_VENDOR_WD_SMC:{ 1814 outb(sc->asic_addr + ED_WD_LAAR, 1815 (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); 1816 if (sc->is790) { 1817 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); 1818 } 1819 break; 1820 } 1821 } 1822 } 1823 for (len = 0; m != 0; m = m->m_next) { 1824 bcopy(mtod(m, caddr_t), buffer, m->m_len); 1825 buffer += m->m_len; 1826 len += m->m_len; 1827 } 1828 1829 /* 1830 * Restore previous shared memory access 1831 */ 1832 if (sc->isa16bit) { 1833 switch (sc->vendor) { 1834 case ED_VENDOR_3COM: 1835 outb(sc->asic_addr + ED_3COM_GACFR, 1836 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); 1837 break; 1838 case ED_VENDOR_WD_SMC:{ 1839 if (sc->is790) { 1840 outb(sc->asic_addr + ED_WD_MSR, 0x00); 1841 } 1842 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); 1843 break; 1844 } 1845 } 1846 } 1847 } else { 1848 len = ed_pio_write_mbufs(sc, m, buffer); 1849 if (len == 0) 1850 goto outloop; 1851 } 1852 1853 sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN); 1854 1855 sc->txb_inuse++; 1856 1857 /* 1858 * Point to next buffer slot and wrap if necessary. 1859 */ 1860 sc->txb_new++; 1861 if (sc->txb_new == sc->txb_cnt) 1862 sc->txb_new = 0; 1863 1864 if (sc->xmit_busy == 0) 1865 ed_xmit(ifp); 1866 1867 /* 1868 * Tap off here if there is a bpf listener. 1869 */ 1870#if NBPFILTER > 0 1871 if (sc->bpf) { 1872 bpf_mtap(sc->bpf, m0); 1873 } 1874#endif 1875 1876 m_freem(m0); 1877 1878 /* 1879 * Loop back to the top to possibly buffer more packets 1880 */ 1881 goto outloop; 1882} 1883 1884/* 1885 * Ethernet interface receiver interrupt. 1886 */ 1887static inline void 1888ed_rint(unit) 1889 int unit; 1890{ 1891 register struct ed_softc *sc = &ed_softc[unit]; 1892 u_char boundry; 1893 u_short len; 1894 struct ed_ring packet_hdr; 1895 char *packet_ptr; 1896 1897 if (sc->gone) 1898 return; 1899 1900 /* 1901 * Set NIC to page 1 registers to get 'current' pointer 1902 */ 1903 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 1904 1905 /* 1906 * 'sc->next_packet' is the logical beginning of the ring-buffer - 1907 * i.e. it points to where new data has been buffered. The 'CURR' 1908 * (current) register points to the logical end of the ring-buffer - 1909 * i.e. it points to where additional new data will be added. We loop 1910 * here until the logical beginning equals the logical end (or in 1911 * other words, until the ring-buffer is empty). 1912 */ 1913 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { 1914 1915 /* get pointer to this buffer's header structure */ 1916 packet_ptr = sc->mem_ring + 1917 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; 1918 1919 /* 1920 * The byte count includes a 4 byte header that was added by 1921 * the NIC. 1922 */ 1923 if (sc->mem_shared) 1924 packet_hdr = *(struct ed_ring *) packet_ptr; 1925 else 1926 ed_pio_readmem(sc, packet_ptr, (char *) &packet_hdr, 1927 sizeof(packet_hdr)); 1928 len = packet_hdr.count; 1929 if (len > (ETHER_MAX_LEN + sizeof(struct ed_ring)) || 1930 len < (ETHER_HDR_SIZE + sizeof(struct ed_ring))) { 1931 /* 1932 * Length is a wild value. There's a good chance that 1933 * this was caused by the NIC being old and buggy. 1934 * The bug is that the length low byte is duplicated in 1935 * the high byte. Try to recalculate the length based on 1936 * the pointer to the next packet. 1937 */ 1938 /* 1939 * NOTE: sc->next_packet is pointing at the current packet. 1940 */ 1941 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */ 1942 if (packet_hdr.next_packet >= sc->next_packet) { 1943 len += (packet_hdr.next_packet - sc->next_packet) * ED_PAGE_SIZE; 1944 } else { 1945 len += ((packet_hdr.next_packet - sc->rec_page_start) + 1946 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE; 1947 } 1948 } 1949 /* 1950 * Be fairly liberal about what we allow as a "reasonable" length 1951 * so that a [crufty] packet will make it to BPF (and can thus 1952 * be analyzed). Note that all that is really important is that 1953 * we have a length that will fit into one mbuf cluster or less; 1954 * the upper layer protocols can then figure out the length from 1955 * their own length field(s). 1956 */ 1957 if ((len > sizeof(struct ed_ring)) && 1958 (len <= MCLBYTES) && 1959 (packet_hdr.next_packet >= sc->rec_page_start) && 1960 (packet_hdr.next_packet < sc->rec_page_stop)) { 1961 /* 1962 * Go get packet. 1963 */ 1964 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring), 1965 len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY); 1966 ++sc->arpcom.ac_if.if_ipackets; 1967 } else { 1968 /* 1969 * Really BAD. The ring pointers are corrupted. 1970 */ 1971 log(LOG_ERR, 1972 "ed%d: NIC memory corrupt - invalid packet length %d\n", 1973 unit, len); 1974 ++sc->arpcom.ac_if.if_ierrors; 1975 ed_reset(unit); 1976 return; 1977 } 1978 1979 /* 1980 * Update next packet pointer 1981 */ 1982 sc->next_packet = packet_hdr.next_packet; 1983 1984 /* 1985 * Update NIC boundry pointer - being careful to keep it one 1986 * buffer behind. (as recommended by NS databook) 1987 */ 1988 boundry = sc->next_packet - 1; 1989 if (boundry < sc->rec_page_start) 1990 boundry = sc->rec_page_stop - 1; 1991 1992 /* 1993 * Set NIC to page 0 registers to update boundry register 1994 */ 1995 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 1996 1997 outb(sc->nic_addr + ED_P0_BNRY, boundry); 1998 1999 /* 2000 * Set NIC to page 1 registers before looping to top (prepare 2001 * to get 'CURR' current pointer) 2002 */ 2003 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 2004 } 2005} 2006 2007/* 2008 * Ethernet interface interrupt processor 2009 */ 2010void 2011edintr(unit) 2012 int unit; 2013{ 2014 struct ed_softc *sc = &ed_softc[unit]; 2015 u_char isr; 2016 2017 if (sc->gone) 2018 return; 2019 /* 2020 * Set NIC to page 0 registers 2021 */ 2022 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2023 2024 /* 2025 * loop until there are no more new interrupts 2026 */ 2027 while ((isr = inb(sc->nic_addr + ED_P0_ISR)) != 0) { 2028 2029 /* 2030 * reset all the bits that we are 'acknowledging' by writing a 2031 * '1' to each bit position that was set (writing a '1' 2032 * *clears* the bit) 2033 */ 2034 outb(sc->nic_addr + ED_P0_ISR, isr); 2035 2036 /* 2037 * Handle transmitter interrupts. Handle these first because 2038 * the receiver will reset the board under some conditions. 2039 */ 2040 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { 2041 u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f; 2042 2043 /* 2044 * Check for transmit error. If a TX completed with an 2045 * error, we end up throwing the packet away. Really 2046 * the only error that is possible is excessive 2047 * collisions, and in this case it is best to allow 2048 * the automatic mechanisms of TCP to backoff the 2049 * flow. Of course, with UDP we're screwed, but this 2050 * is expected when a network is heavily loaded. 2051 */ 2052 (void) inb(sc->nic_addr + ED_P0_TSR); 2053 if (isr & ED_ISR_TXE) { 2054 2055 /* 2056 * Excessive collisions (16) 2057 */ 2058 if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) 2059 && (collisions == 0)) { 2060 2061 /* 2062 * When collisions total 16, the 2063 * P0_NCR will indicate 0, and the 2064 * TSR_ABT is set. 2065 */ 2066 collisions = 16; 2067 } 2068 2069 /* 2070 * update output errors counter 2071 */ 2072 ++sc->arpcom.ac_if.if_oerrors; 2073 } else { 2074 2075 /* 2076 * Update total number of successfully 2077 * transmitted packets. 2078 */ 2079 ++sc->arpcom.ac_if.if_opackets; 2080 } 2081 2082 /* 2083 * reset tx busy and output active flags 2084 */ 2085 sc->xmit_busy = 0; 2086 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 2087 2088 /* 2089 * clear watchdog timer 2090 */ 2091 sc->arpcom.ac_if.if_timer = 0; 2092 2093 /* 2094 * Add in total number of collisions on last 2095 * transmission. 2096 */ 2097 sc->arpcom.ac_if.if_collisions += collisions; 2098 2099 /* 2100 * Decrement buffer in-use count if not zero (can only 2101 * be zero if a transmitter interrupt occured while 2102 * not actually transmitting). If data is ready to 2103 * transmit, start it transmitting, otherwise defer 2104 * until after handling receiver 2105 */ 2106 if (sc->txb_inuse && --sc->txb_inuse) 2107 ed_xmit(&sc->arpcom.ac_if); 2108 } 2109 2110 /* 2111 * Handle receiver interrupts 2112 */ 2113 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { 2114 2115 /* 2116 * Overwrite warning. In order to make sure that a 2117 * lockup of the local DMA hasn't occurred, we reset 2118 * and re-init the NIC. The NSC manual suggests only a 2119 * partial reset/re-init is necessary - but some chips 2120 * seem to want more. The DMA lockup has been seen 2121 * only with early rev chips - Methinks this bug was 2122 * fixed in later revs. -DG 2123 */ 2124 if (isr & ED_ISR_OVW) { 2125 ++sc->arpcom.ac_if.if_ierrors; 2126#ifdef DIAGNOSTIC 2127 log(LOG_WARNING, 2128 "ed%d: warning - receiver ring buffer overrun\n", 2129 unit); 2130#endif 2131 2132 /* 2133 * Stop/reset/re-init NIC 2134 */ 2135 ed_reset(unit); 2136 } else { 2137 2138 /* 2139 * Receiver Error. One or more of: CRC error, 2140 * frame alignment error FIFO overrun, or 2141 * missed packet. 2142 */ 2143 if (isr & ED_ISR_RXE) { 2144 ++sc->arpcom.ac_if.if_ierrors; 2145#ifdef ED_DEBUG 2146 printf("ed%d: receive error %x\n", unit, 2147 inb(sc->nic_addr + ED_P0_RSR)); 2148#endif 2149 } 2150 2151 /* 2152 * Go get the packet(s) XXX - Doing this on an 2153 * error is dubious because there shouldn't be 2154 * any data to get (we've configured the 2155 * interface to not accept packets with 2156 * errors). 2157 */ 2158 2159 /* 2160 * Enable 16bit access to shared memory first 2161 * on WD/SMC boards. 2162 */ 2163 if (sc->isa16bit && 2164 (sc->vendor == ED_VENDOR_WD_SMC)) { 2165 2166 outb(sc->asic_addr + ED_WD_LAAR, 2167 (sc->wd_laar_proto |= 2168 ED_WD_LAAR_M16EN)); 2169 if (sc->is790) { 2170 outb(sc->asic_addr + ED_WD_MSR, 2171 ED_WD_MSR_MENB); 2172 } 2173 } 2174 ed_rint(unit); 2175 2176 /* disable 16bit access */ 2177 if (sc->isa16bit && 2178 (sc->vendor == ED_VENDOR_WD_SMC)) { 2179 2180 if (sc->is790) { 2181 outb(sc->asic_addr + ED_WD_MSR, 0x00); 2182 } 2183 outb(sc->asic_addr + ED_WD_LAAR, 2184 (sc->wd_laar_proto &= 2185 ~ED_WD_LAAR_M16EN)); 2186 } 2187 } 2188 } 2189 2190 /* 2191 * If it looks like the transmitter can take more data, 2192 * attempt to start output on the interface. This is done 2193 * after handling the receiver to give the receiver priority. 2194 */ 2195 if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) 2196 ed_start(&sc->arpcom.ac_if); 2197 2198 /* 2199 * return NIC CR to standard state: page 0, remote DMA 2200 * complete, start (toggling the TXP bit off, even if was just 2201 * set in the transmit routine, is *okay* - it is 'edge' 2202 * triggered from low to high) 2203 */ 2204 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2205 2206 /* 2207 * If the Network Talley Counters overflow, read them to reset 2208 * them. It appears that old 8390's won't clear the ISR flag 2209 * otherwise - resulting in an infinite loop. 2210 */ 2211 if (isr & ED_ISR_CNT) { 2212 (void) inb(sc->nic_addr + ED_P0_CNTR0); 2213 (void) inb(sc->nic_addr + ED_P0_CNTR1); 2214 (void) inb(sc->nic_addr + ED_P0_CNTR2); 2215 } 2216 } 2217} 2218 2219/* 2220 * Process an ioctl request. This code needs some work - it looks 2221 * pretty ugly. 2222 */ 2223int 2224ed_ioctl(ifp, command, data) 2225 register struct ifnet *ifp; 2226 int command; 2227 caddr_t data; 2228{ 2229 register struct ifaddr *ifa = (struct ifaddr *) data; 2230 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 2231 struct ifreq *ifr = (struct ifreq *) data; 2232 int s, error = 0; 2233 2234 if (sc->gone) 2235 return -1; 2236 s = splimp(); 2237 2238 switch (command) { 2239 2240 case SIOCSIFADDR: 2241 ifp->if_flags |= IFF_UP; 2242 /* netifs are BUSY when UP */ 2243 sc->kdc.kdc_state = DC_BUSY; 2244 2245 switch (ifa->ifa_addr->sa_family) { 2246#ifdef INET 2247 case AF_INET: 2248 ed_init(ifp->if_unit); /* before arpwhohas */ 2249 arp_ifinit((struct arpcom *)ifp, ifa); 2250 break; 2251#endif 2252#ifdef NS 2253 2254 /* 2255 * XXX - This code is probably wrong 2256 */ 2257 case AF_NS: 2258 { 2259 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 2260 2261 if (ns_nullhost(*ina)) 2262 ina->x_host = 2263 *(union ns_host *) (sc->arpcom.ac_enaddr); 2264 else { 2265 bcopy((caddr_t) ina->x_host.c_host, 2266 (caddr_t) sc->arpcom.ac_enaddr, 2267 sizeof(sc->arpcom.ac_enaddr)); 2268 } 2269 2270 /* 2271 * Set new address 2272 */ 2273 ed_init(ifp->if_unit); 2274 break; 2275 } 2276#endif 2277 default: 2278 ed_init(ifp->if_unit); 2279 break; 2280 } 2281 break; 2282 2283 case SIOCGIFADDR: 2284 { 2285 struct sockaddr *sa; 2286 2287 sa = (struct sockaddr *) & ifr->ifr_data; 2288 bcopy((caddr_t) sc->arpcom.ac_enaddr, 2289 (caddr_t) sa->sa_data, ETHER_ADDR_LEN); 2290 } 2291 break; 2292 2293 case SIOCSIFFLAGS: 2294 2295 /* 2296 * If interface is marked down and it is running, then stop it 2297 */ 2298 if (((ifp->if_flags & IFF_UP) == 0) && 2299 (ifp->if_flags & IFF_RUNNING)) { 2300 ed_stop(ifp->if_unit); 2301 ifp->if_flags &= ~IFF_RUNNING; 2302 } else { 2303 2304 /* 2305 * If interface is marked up and it is stopped, then 2306 * start it 2307 */ 2308 if ((ifp->if_flags & IFF_UP) && 2309 ((ifp->if_flags & IFF_RUNNING) == 0)) 2310 ed_init(ifp->if_unit); 2311 } 2312 /* UP controls BUSY/IDLE */ 2313 sc->kdc.kdc_state = ((ifp->if_flags & IFF_UP) 2314 ? DC_BUSY 2315 : DC_IDLE); 2316 2317#if NBPFILTER > 0 2318 2319 /* 2320 * Promiscuous flag may have changed, so reprogram the RCR. 2321 */ 2322 ed_setrcr(ifp, sc); 2323#endif 2324 2325 /* 2326 * An unfortunate hack to provide the (required) software 2327 * control of the tranceiver for 3Com boards. The ALTPHYS flag 2328 * disables the tranceiver if set. 2329 */ 2330 if (sc->vendor == ED_VENDOR_3COM) { 2331 if (ifp->if_flags & IFF_ALTPHYS) { 2332 outb(sc->asic_addr + ED_3COM_CR, 0); 2333 } else { 2334 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); 2335 } 2336 } 2337 break; 2338 2339 case SIOCADDMULTI: 2340 case SIOCDELMULTI: 2341 /* 2342 * Update out multicast list. 2343 */ 2344 error = (command == SIOCADDMULTI) ? 2345 ether_addmulti(ifr, &sc->arpcom) : 2346 ether_delmulti(ifr, &sc->arpcom); 2347 2348 if (error == ENETRESET) { 2349 2350 /* 2351 * Multicast list has changed; set the hardware filter 2352 * accordingly. 2353 */ 2354 ed_setrcr(ifp, sc); 2355 error = 0; 2356 } 2357 break; 2358 2359 case SIOCSIFMTU: 2360 /* 2361 * Set the interface MTU. 2362 */ 2363 if (ifr->ifr_mtu > ETHERMTU) { 2364 error = EINVAL; 2365 } else { 2366 ifp->if_mtu = ifr->ifr_mtu; 2367 } 2368 break; 2369 2370 default: 2371 error = EINVAL; 2372 } 2373 (void) splx(s); 2374 return (error); 2375} 2376 2377/* 2378 * Retreive packet from shared memory and send to the next level up via 2379 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 2380 */ 2381static void 2382ed_get_packet(sc, buf, len, multicast) 2383 struct ed_softc *sc; 2384 char *buf; 2385 u_short len; 2386 int multicast; 2387{ 2388 struct ether_header *eh; 2389 struct mbuf *m; 2390 2391 /* Allocate a header mbuf */ 2392 MGETHDR(m, M_DONTWAIT, MT_DATA); 2393 if (m == NULL) 2394 return; 2395 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 2396 m->m_pkthdr.len = m->m_len = len; 2397 2398 /* Attach an mbuf cluster */ 2399 MCLGET(m, M_DONTWAIT); 2400 2401 /* Insist on getting a cluster */ 2402 if ((m->m_flags & M_EXT) == 0) { 2403 m_freem(m); 2404 return; 2405 } 2406 2407 /* 2408 * The +2 is to longword align the start of the real packet. 2409 * This is important for NFS. 2410 */ 2411 m->m_data += 2; 2412 eh = mtod(m, struct ether_header *); 2413 2414 /* 2415 * Get packet, including link layer address, from interface. 2416 */ 2417 ed_ring_copy(sc, buf, (char *)eh, len); 2418 2419#if NBPFILTER > 0 2420 2421 /* 2422 * Check if there's a BPF listener on this interface. If so, hand off 2423 * the raw packet to bpf. 2424 */ 2425 if (sc->bpf) { 2426 bpf_mtap(sc->bpf, m); 2427 2428 /* 2429 * Note that the interface cannot be in promiscuous mode if 2430 * there are no BPF listeners. And if we are in promiscuous 2431 * mode, we have to check if this packet is really ours. 2432 */ 2433 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && 2434 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, 2435 sizeof(eh->ether_dhost)) != 0 && multicast == 0) { 2436 m_freem(m); 2437 return; 2438 } 2439 } 2440#endif 2441 2442 /* 2443 * Remove link layer address. 2444 */ 2445 m->m_pkthdr.len = m->m_len = len - sizeof(struct ether_header); 2446 m->m_data += sizeof(struct ether_header); 2447 2448 ether_input(&sc->arpcom.ac_if, eh, m); 2449 return; 2450} 2451 2452/* 2453 * Supporting routines 2454 */ 2455 2456/* 2457 * Given a NIC memory source address and a host memory destination 2458 * address, copy 'amount' from NIC to host using Programmed I/O. 2459 * The 'amount' is rounded up to a word - okay as long as mbufs 2460 * are word sized. 2461 * This routine is currently Novell-specific. 2462 */ 2463void 2464ed_pio_readmem(sc, src, dst, amount) 2465 struct ed_softc *sc; 2466 unsigned short src; 2467 unsigned char *dst; 2468 unsigned short amount; 2469{ 2470 /* select page 0 registers */ 2471 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2472 2473 /* round up to a word */ 2474 if (amount & 1) 2475 ++amount; 2476 2477 /* set up DMA byte count */ 2478 outb(sc->nic_addr + ED_P0_RBCR0, amount); 2479 outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8); 2480 2481 /* set up source address in NIC mem */ 2482 outb(sc->nic_addr + ED_P0_RSAR0, src); 2483 outb(sc->nic_addr + ED_P0_RSAR1, src >> 8); 2484 2485 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); 2486 2487 if (sc->isa16bit) { 2488 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2); 2489 } else 2490 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); 2491 2492} 2493 2494/* 2495 * Stripped down routine for writing a linear buffer to NIC memory. 2496 * Only used in the probe routine to test the memory. 'len' must 2497 * be even. 2498 */ 2499void 2500ed_pio_writemem(sc, src, dst, len) 2501 struct ed_softc *sc; 2502 char *src; 2503 unsigned short dst; 2504 unsigned short len; 2505{ 2506 int maxwait = 200; /* about 240us */ 2507 2508 /* select page 0 registers */ 2509 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2510 2511 /* reset remote DMA complete flag */ 2512 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2513 2514 /* set up DMA byte count */ 2515 outb(sc->nic_addr + ED_P0_RBCR0, len); 2516 outb(sc->nic_addr + ED_P0_RBCR1, len >> 8); 2517 2518 /* set up destination address in NIC mem */ 2519 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2520 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); 2521 2522 /* set remote DMA write */ 2523 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2524 2525 if (sc->isa16bit) 2526 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2); 2527 else 2528 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); 2529 2530 /* 2531 * Wait for remote DMA complete. This is necessary because on the 2532 * transmit side, data is handled internally by the NIC in bursts and 2533 * we can't start another remote DMA until this one completes. Not 2534 * waiting causes really bad things to happen - like the NIC 2535 * irrecoverably jamming the ISA bus. 2536 */ 2537 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2538} 2539 2540/* 2541 * Write an mbuf chain to the destination NIC memory address using 2542 * programmed I/O. 2543 */ 2544u_short 2545ed_pio_write_mbufs(sc, m, dst) 2546 struct ed_softc *sc; 2547 struct mbuf *m; 2548 unsigned short dst; 2549{ 2550 unsigned short total_len, dma_len; 2551 struct mbuf *mp; 2552 int maxwait = 200; /* about 240us */ 2553 2554 /* First, count up the total number of bytes to copy */ 2555 for (total_len = 0, mp = m; mp; mp = mp->m_next) 2556 total_len += mp->m_len; 2557 2558 dma_len = total_len; 2559 if (sc->isa16bit && (dma_len & 1)) 2560 dma_len++; 2561 2562 /* select page 0 registers */ 2563 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 2564 2565 /* reset remote DMA complete flag */ 2566 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); 2567 2568 /* set up DMA byte count */ 2569 outb(sc->nic_addr + ED_P0_RBCR0, dma_len); 2570 outb(sc->nic_addr + ED_P0_RBCR1, dma_len >> 8); 2571 2572 /* set up destination address in NIC mem */ 2573 outb(sc->nic_addr + ED_P0_RSAR0, dst); 2574 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); 2575 2576 /* set remote DMA write */ 2577 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 2578 2579 /* 2580 * Transfer the mbuf chain to the NIC memory. 2581 * 16-bit cards require that data be transferred as words, and only words. 2582 * So that case requires some extra code to patch over odd-length mbufs. 2583 */ 2584 2585 if (!sc->isa16bit) { 2586 /* NE1000s are easy */ 2587 while (m) { 2588 if (m->m_len) { 2589 outsb(sc->asic_addr + ED_NOVELL_DATA, 2590 m->m_data, m->m_len); 2591 } 2592 m = m->m_next; 2593 } 2594 } else { 2595 /* NE2000s are a pain */ 2596 unsigned char *data; 2597 int len, wantbyte; 2598 unsigned char savebyte[2]; 2599 2600 wantbyte = 0; 2601 2602 while (m) { 2603 len = m->m_len; 2604 if (len) { 2605 data = mtod(m, caddr_t); 2606 /* finish the last word */ 2607 if (wantbyte) { 2608 savebyte[1] = *data; 2609 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte); 2610 data++; 2611 len--; 2612 wantbyte = 0; 2613 } 2614 /* output contiguous words */ 2615 if (len > 1) { 2616 outsw(sc->asic_addr + ED_NOVELL_DATA, 2617 data, len >> 1); 2618 data += len & ~1; 2619 len &= 1; 2620 } 2621 /* save last byte, if necessary */ 2622 if (len == 1) { 2623 savebyte[0] = *data; 2624 wantbyte = 1; 2625 } 2626 } 2627 m = m->m_next; 2628 } 2629 /* spit last byte */ 2630 if (wantbyte) { 2631 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte); 2632 } 2633 } 2634 2635 /* 2636 * Wait for remote DMA complete. This is necessary because on the 2637 * transmit side, data is handled internally by the NIC in bursts and 2638 * we can't start another remote DMA until this one completes. Not 2639 * waiting causes really bad things to happen - like the NIC 2640 * irrecoverably jamming the ISA bus. 2641 */ 2642 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); 2643 2644 if (!maxwait) { 2645 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n", 2646 sc->arpcom.ac_if.if_unit); 2647 ed_reset(sc->arpcom.ac_if.if_unit); 2648 return(0); 2649 } 2650 return (total_len); 2651} 2652 2653/* 2654 * Given a source and destination address, copy 'amount' of a packet from 2655 * the ring buffer into a linear destination buffer. Takes into account 2656 * ring-wrap. 2657 */ 2658static inline char * 2659ed_ring_copy(sc, src, dst, amount) 2660 struct ed_softc *sc; 2661 char *src; 2662 char *dst; 2663 u_short amount; 2664{ 2665 u_short tmp_amount; 2666 2667 /* does copy wrap to lower addr in ring buffer? */ 2668 if (src + amount > sc->mem_end) { 2669 tmp_amount = sc->mem_end - src; 2670 2671 /* copy amount up to end of NIC memory */ 2672 if (sc->mem_shared) 2673 bcopy(src, dst, tmp_amount); 2674 else 2675 ed_pio_readmem(sc, src, dst, tmp_amount); 2676 2677 amount -= tmp_amount; 2678 src = sc->mem_ring; 2679 dst += tmp_amount; 2680 } 2681 if (sc->mem_shared) 2682 bcopy(src, dst, amount); 2683 else 2684 ed_pio_readmem(sc, src, dst, amount); 2685 2686 return (src + amount); 2687} 2688 2689void 2690ed_setrcr(ifp, sc) 2691 struct ifnet *ifp; 2692 struct ed_softc *sc; 2693{ 2694 int i; 2695 2696 /* set page 1 registers */ 2697 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 2698 2699 if (ifp->if_flags & IFF_PROMISC) { 2700 2701 /* 2702 * Reconfigure the multicast filter. 2703 */ 2704 for (i = 0; i < 8; i++) 2705 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); 2706 2707 /* 2708 * And turn on promiscuous mode. Also enable reception of 2709 * runts and packets with CRC & alignment errors. 2710 */ 2711 /* Set page 0 registers */ 2712 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2713 2714 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM | 2715 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP); 2716 } else { 2717 /* set up multicast addresses and filter modes */ 2718 if (ifp->if_flags & IFF_MULTICAST) { 2719 u_long mcaf[2]; 2720 2721 if (ifp->if_flags & IFF_ALLMULTI) { 2722 mcaf[0] = 0xffffffff; 2723 mcaf[1] = 0xffffffff; 2724 } else 2725 ds_getmcaf(sc, mcaf); 2726 2727 /* 2728 * Set multicast filter on chip. 2729 */ 2730 for (i = 0; i < 8; i++) 2731 outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]); 2732 2733 /* Set page 0 registers */ 2734 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2735 2736 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB); 2737 } else { 2738 2739 /* 2740 * Initialize multicast address hashing registers to 2741 * not accept multicasts. 2742 */ 2743 for (i = 0; i < 8; ++i) 2744 outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00); 2745 2746 /* Set page 0 registers */ 2747 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP); 2748 2749 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); 2750 } 2751 } 2752 2753 /* 2754 * Start interface. 2755 */ 2756 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA); 2757} 2758 2759/* 2760 * Compute crc for ethernet address 2761 */ 2762u_long 2763ds_crc(ep) 2764 u_char *ep; 2765{ 2766#define POLYNOMIAL 0x04c11db6 2767 register u_long crc = 0xffffffffL; 2768 register int carry, i, j; 2769 register u_char b; 2770 2771 for (i = 6; --i >= 0;) { 2772 b = *ep++; 2773 for (j = 8; --j >= 0;) { 2774 carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01); 2775 crc <<= 1; 2776 b >>= 1; 2777 if (carry) 2778 crc = ((crc ^ POLYNOMIAL) | carry); 2779 } 2780 } 2781 return crc; 2782#undef POLYNOMIAL 2783} 2784 2785/* 2786 * Compute the multicast address filter from the 2787 * list of multicast addresses we need to listen to. 2788 */ 2789void 2790ds_getmcaf(sc, mcaf) 2791 struct ed_softc *sc; 2792 u_long *mcaf; 2793{ 2794 register u_int index; 2795 register u_char *af = (u_char *) mcaf; 2796 register struct ether_multi *enm; 2797 register struct ether_multistep step; 2798 2799 mcaf[0] = 0; 2800 mcaf[1] = 0; 2801 2802 ETHER_FIRST_MULTI(step, &sc->arpcom, enm); 2803 while (enm != NULL) { 2804 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 2805 mcaf[0] = 0xffffffff; 2806 mcaf[1] = 0xffffffff; 2807 return; 2808 } 2809 index = ds_crc(enm->enm_addrlo) >> 26; 2810 af[index >> 3] |= 1 << (index & 7); 2811 2812 ETHER_NEXT_MULTI(step, enm); 2813 } 2814} 2815