bktr_reg.h revision 68071
1/*
2 * $FreeBSD: head/sys/dev/bktr/bktr_reg.h 68071 2000-10-31 13:09:56Z roger $
3 *
4 * Copyright (c) 1999 Roger Hardiman
5 * Copyright (c) 1998 Amancio Hasty
6 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by Mark Tinguely and Jim Lowe
20 * 4. The name of the author may not be used to endorse or promote products
21 *    derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
31 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
32 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 *
35 */
36
37#ifdef __FreeBSD__
38#  if (__FreeBSD_version >= 310000)
39#    include "smbus.h"
40#  else
41#    define NSMBUS 0		/* FreeBSD before 3.1 does not have SMBUS */
42#  endif
43#  if (NSMBUS > 0)
44#    define BKTR_USE_FREEBSD_SMBUS
45#  endif
46#endif
47
48#ifdef __NetBSD__
49#include <machine/bus.h>		/* struct device */
50#include <sys/device.h>
51#include <sys/select.h>			/* struct selinfo */
52# ifdef DEBUG
53#  define	bootverbose 1
54# else
55#  define	bootverbose 0
56# endif
57#endif
58
59/*
60 * The kernel options for the driver now all begin with BKTR.
61 * Support the older kernel options on FreeBSD and OpenBSD.
62 *
63 */
64#if defined(__FreeBSD__) || defined(__OpenBSD__)
65#if defined(BROOKTREE_ALLOC_PAGES)
66#define BKTR_ALLOC_PAGES BROOKTREE_ALLOC_PAGES
67#endif
68
69#if defined(BROOKTREE_SYSTEM_DEFAULT)
70#define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT
71#endif
72
73#if defined(OVERRIDE_CARD)
74#define BKTR_OVERRIDE_CARD OVERRIDE_CARD
75#endif
76
77#if defined(OVERRIDE_TUNER)
78#define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER
79#endif
80
81#if defined(OVERRIDE_DBX)
82#define BKTR_OVERRIDE_DBX OVERRIDE_DBX
83#endif
84
85#if defined(OVERRIDE_MSP)
86#define BKTR_OVERRIDE_MSP OVERRIDE_MSP
87#endif
88
89#endif
90
91
92#ifndef PCI_LATENCY_TIMER
93#define	PCI_LATENCY_TIMER		0x0c	/* pci timer register */
94#endif
95
96/*
97 * Definitions for the Brooktree 848/878 video capture to pci interface.
98 */
99#ifndef __NetBSD__
100#define PCI_VENDOR_SHIFT                        0
101#define PCI_VENDOR_MASK                         0xffff
102#define PCI_VENDOR(id) \
103            (((id) >> PCI_VENDOR_SHIFT) & PCI_VENDOR_MASK)
104
105#define PCI_PRODUCT_SHIFT                       16
106#define PCI_PRODUCT_MASK                        0xffff
107#define PCI_PRODUCT(id) \
108            (((id) >> PCI_PRODUCT_SHIFT) & PCI_PRODUCT_MASK)
109
110/* PCI vendor ID */
111#define PCI_VENDOR_BROOKTREE    0x109e                /* Brooktree */
112/* Brooktree products */
113#define PCI_PRODUCT_BROOKTREE_BT848     0x0350        /* Bt848 Video Capture */
114#define PCI_PRODUCT_BROOKTREE_BT849     0x0351        /* Bt849 Video Capture */
115#define PCI_PRODUCT_BROOKTREE_BT878     0x036e        /* Bt878 Video Capture */
116#define PCI_PRODUCT_BROOKTREE_BT879     0x036f        /* Bt879 Video Capture */
117#endif
118
119#define BROOKTREE_848                   1
120#define BROOKTREE_848A                  2
121#define BROOKTREE_849A                  3
122#define BROOKTREE_878                   4
123#define BROOKTREE_879                   5
124
125typedef volatile u_int 	bregister_t;
126/*
127 * if other persuasion endian, then compiler will probably require that
128 * these next
129 * macros be reversed
130 */
131#define	BTBYTE(what)	bregister_t  what:8; int :24
132#define	BTWORD(what)	bregister_t  what:16; int: 16
133#define BTLONG(what)	bregister_t  what:32
134
135struct bt848_registers {
136    BTBYTE (dstatus);		/* 0, 1,2,3 */
137#define BT848_DSTATUS_PRES		(1<<7)
138#define BT848_DSTATUS_HLOC		(1<<6)
139#define BT848_DSTATUS_FIELD		(1<<5)
140#define BT848_DSTATUS_NUML		(1<<4)
141#define BT848_DSTATUS_CSEL		(1<<3)
142#define BT848_DSTATUS_PLOCK		(1<<2)
143#define BT848_DSTATUS_LOF		(1<<1)
144#define BT848_DSTATUS_COF		(1<<0)
145    BTBYTE (iform);		/* 4, 5,6,7 */
146#define BT848_IFORM_MUXSEL		(0x3<<5)
147# define BT848_IFORM_M_MUX1		(0x03<<5)
148# define BT848_IFORM_M_MUX0		(0x02<<5)
149# define BT848_IFORM_M_MUX2		(0x01<<5)
150# define BT848_IFORM_M_MUX3		(0x0)
151# define BT848_IFORM_M_RSVD		(0x00<<5)
152#define BT848_IFORM_XTSEL		(0x3<<3)
153# define BT848_IFORM_X_AUTO		(0x03<<3)
154# define BT848_IFORM_X_XT1		(0x02<<3)
155# define BT848_IFORM_X_XT0		(0x01<<3)
156# define BT848_IFORM_X_RSVD		(0x00<<3)
157    BTBYTE (tdec);		/* 8, 9,a,b */
158    BTBYTE (e_crop);		/* c, d,e,f */
159    BTBYTE (e_vdelay_lo);	/* 10, 11,12,13 */
160    BTBYTE (e_vactive_lo);	/* 14, 15,16,17 */
161    BTBYTE (e_delay_lo);	/* 18, 19,1a,1b */
162    BTBYTE (e_hactive_lo);	/* 1c, 1d,1e,1f */
163    BTBYTE (e_hscale_hi);	/* 20, 21,22,23 */
164    BTBYTE (e_hscale_lo);	/* 24, 25,26,27 */
165    BTBYTE (bright);		/* 28, 29,2a,2b */
166    BTBYTE (e_control);		/* 2c, 2d,2e,2f */
167#define BT848_E_CONTROL_LNOTCH		(1<<7)
168#define BT848_E_CONTROL_COMP		(1<<6)
169#define BT848_E_CONTROL_LDEC		(1<<5)
170#define BT848_E_CONTROL_CBSENSE		(1<<4)
171#define BT848_E_CONTROL_RSVD		(1<<3)
172#define BT848_E_CONTROL_CON_MSB		(1<<2)
173#define BT848_E_CONTROL_SAT_U_MSB	(1<<1)
174#define BT848_E_CONTROL_SAT_V_MSB	(1<<0)
175    BTBYTE (contrast_lo);	/* 30, 31,32,33 */
176    BTBYTE (sat_u_lo);		/* 34, 35,36,37 */
177    BTBYTE (sat_v_lo);		/* 38, 39,3a,3b */
178    BTBYTE (hue);		/* 3c, 3d,3e,3f */
179    BTBYTE (e_scloop);		/* 40, 41,42,43 */
180#define BT848_E_SCLOOP_RSVD1		(1<<7)
181#define BT848_E_SCLOOP_CAGC		(1<<6)
182#define BT848_E_SCLOOP_CKILL		(1<<5)
183#define BT848_E_SCLOOP_HFILT		(0x3<<3)
184# define BT848_E_SCLOOP_HFILT_ICON	(0x3<<3)
185# define BT848_E_SCLOOP_HFILT_QCIF	(0x2<<3)
186# define BT848_E_SCLOOP_HFILT_CIF	(0x1<<3)
187# define BT848_E_SCLOOP_HFILT_AUTO	(0x0<<3)
188#define BT848_E_SCLOOP_RSVD0		(0x7<<0)
189    int		:32;		/* 44, 45,46,47 */
190    BTBYTE (oform);		/* 48, 49,4a,4b */
191    BTBYTE (e_vscale_hi);	/* 4c, 4d,4e,4f */
192    BTBYTE (e_vscale_lo);	/* 50, 51,52,53 */
193    BTBYTE (test);		/* 54, 55,56,57 */
194    int		:32;		/* 58, 59,5a,5b */
195    int		:32;		/* 5c, 5d,5e,5f */
196    BTLONG (adelay);		/* 60, 61,62,63 */
197    BTBYTE (bdelay);		/* 64, 65,66,67 */
198    BTBYTE (adc);		/* 68, 69,6a,6b */
199#define BT848_ADC_RESERVED		(0x80)	/* required pattern */
200#define BT848_ADC_SYNC_T		(1<<5)
201#define BT848_ADC_AGC_EN		(1<<4)
202#define BT848_ADC_CLK_SLEEP		(1<<3)
203#define BT848_ADC_Y_SLEEP		(1<<2)
204#define BT848_ADC_C_SLEEP		(1<<1)
205#define BT848_ADC_CRUSH			(1<<0)
206    BTBYTE (e_vtc);		/* 6c, 6d,6e,6f */
207    int		:32;		/* 70, 71,72,73 */
208    int 	:32;		/* 74, 75,76,77 */
209    int		:32;		/* 78, 79,7a,7b */
210    BTLONG (sreset);		/* 7c, 7d,7e,7f */
211    u_char 	filler1[0x84-0x80];
212    BTBYTE (tgctrl);		/* 84, 85,86,87 */
213#define BT848_TGCTRL_TGCKI		(3<<3)
214#define BT848_TGCTRL_TGCKI_XTAL		(0<<3)
215#define BT848_TGCTRL_TGCKI_PLL		(1<<3)
216#define BT848_TGCTRL_TGCKI_GPCLK	(2<<3)
217#define BT848_TGCTRL_TGCKI_GPCLK_I	(3<<3)
218    u_char 	filler[0x8c-0x88];
219    BTBYTE (o_crop);		/* 8c, 8d,8e,8f */
220    BTBYTE (o_vdelay_lo);	/* 90, 91,92,93 */
221    BTBYTE (o_vactive_lo);	/* 94, 95,96,97 */
222    BTBYTE (o_delay_lo);	/* 98, 99,9a,9b */
223    BTBYTE (o_hactive_lo);	/* 9c, 9d,9e,9f */
224    BTBYTE (o_hscale_hi);	/* a0, a1,a2,a3 */
225    BTBYTE (o_hscale_lo);	/* a4, a5,a6,a7 */
226    int		:32;		/* a8, a9,aa,ab */
227    BTBYTE (o_control);		/* ac, ad,ae,af */
228#define BT848_O_CONTROL_LNOTCH		(1<<7)
229#define BT848_O_CONTROL_COMP		(1<<6)
230#define BT848_O_CONTROL_LDEC		(1<<5)
231#define BT848_O_CONTROL_CBSENSE		(1<<4)
232#define BT848_O_CONTROL_RSVD		(1<<3)
233#define BT848_O_CONTROL_CON_MSB		(1<<2)
234#define BT848_O_CONTROL_SAT_U_MSB	(1<<1)
235#define BT848_O_CONTROL_SAT_V_MSB	(1<<0)
236    u_char	fillter4[16];
237    BTBYTE (o_scloop);		/* c0, c1,c2,c3 */
238#define BT848_O_SCLOOP_RSVD1		(1<<7)
239#define BT848_O_SCLOOP_CAGC		(1<<6)
240#define BT848_O_SCLOOP_CKILL		(1<<5)
241#define BT848_O_SCLOOP_HFILT		(0x3<<3)
242#define BT848_O_SCLOOP_HFILT_ICON	(0x3<<3)
243#define BT848_O_SCLOOP_HFILT_QCIF	(0x2<<3)
244#define BT848_O_SCLOOP_HFILT_CIF	(0x1<<3)
245#define BT848_O_SCLOOP_HFILT_AUTO	(0x0<<3)
246#define BT848_O_SCLOOP_RSVD0		(0x7<<0)
247    int		:32;		/* c4, c5,c6,c7 */
248    int		:32;		/* c8, c9,ca,cb */
249    BTBYTE (o_vscale_hi);	/* cc, cd,ce,cf */
250    BTBYTE (o_vscale_lo);	/* d0, d1,d2,d3 */
251    BTBYTE (color_fmt);		/* d4, d5,d6,d7 */
252    bregister_t color_ctl_swap		:4; /* d8 */
253#define BT848_COLOR_CTL_WSWAP_ODD	(1<<3)
254#define BT848_COLOR_CTL_WSWAP_EVEN	(1<<2)
255#define BT848_COLOR_CTL_BSWAP_ODD	(1<<1)
256#define BT848_COLOR_CTL_BSWAP_EVEN	(1<<0)
257    bregister_t color_ctl_gamma		:1;
258    bregister_t color_ctl_rgb_ded	:1;
259    bregister_t color_ctl_color_bars	:1;
260    bregister_t color_ctl_ext_frmrate	:1;
261#define BT848_COLOR_CTL_GAMMA		(1<<4)
262#define BT848_COLOR_CTL_RGB_DED		(1<<5)
263#define BT848_COLOR_CTL_COLOR_BARS	(1<<6)
264#define BT848_COLOR_CTL_EXT_FRMRATE     (1<<7)
265    int		:24;		/* d9,da,db */
266    BTBYTE (cap_ctl);		/* dc, dd,de,df */
267#define BT848_CAP_CTL_DITH_FRAME	(1<<4)
268#define BT848_CAP_CTL_VBI_ODD		(1<<3)
269#define BT848_CAP_CTL_VBI_EVEN		(1<<2)
270#define BT848_CAP_CTL_ODD		(1<<1)
271#define BT848_CAP_CTL_EVEN		(1<<0)
272    BTBYTE (vbi_pack_size);	/* e0, e1,e2,e3 */
273    BTBYTE (vbi_pack_del);	/* e4, e5,e6,e7 */
274    int		:32;		/* e8, e9,ea,eb */
275    BTBYTE (o_vtc);		/* ec, ed,ee,ef */
276    BTBYTE (pll_f_lo);		/* f0, f1,f2,f3 */
277    BTBYTE (pll_f_hi);		/* f4, f5,f6,f7 */
278    BTBYTE (pll_f_xci);		/* f8, f9,fa,fb */
279#define BT848_PLL_F_C			(1<<6)
280#define BT848_PLL_F_X			(1<<7)
281    u_char	filler2[0x100-0xfc];
282    BTLONG (int_stat);		/* 100, 101,102,103 */
283    BTLONG (int_mask);		/* 104, 105,106,107 */
284#define BT848_INT_RISCS			(0xf<<28)
285#define BT848_INT_RISC_EN		(1<<27)
286#define BT848_INT_RACK			(1<<25)
287#define BT848_INT_FIELD			(1<<24)
288#define BT848_INT_MYSTERYBIT		(1<<23)
289#define BT848_INT_SCERR			(1<<19)
290#define BT848_INT_OCERR			(1<<18)
291#define BT848_INT_PABORT		(1<<17)
292#define BT848_INT_RIPERR		(1<<16)
293#define BT848_INT_PPERR			(1<<15)
294#define BT848_INT_FDSR			(1<<14)
295#define BT848_INT_FTRGT			(1<<13)
296#define BT848_INT_FBUS			(1<<12)
297#define BT848_INT_RISCI			(1<<11)
298#define BT848_INT_GPINT			(1<<9)
299#define BT848_INT_I2CDONE		(1<<8)
300#define BT848_INT_RSV1			(1<<7)
301#define BT848_INT_RSV0			(1<<6)
302#define BT848_INT_VPRES			(1<<5)
303#define BT848_INT_HLOCK			(1<<4)
304#define BT848_INT_OFLOW			(1<<3)
305#define BT848_INT_HSYNC			(1<<2)
306#define BT848_INT_VSYNC			(1<<1)
307#define BT848_INT_FMTCHG		(1<<0)
308    int		:32;		/* 108, 109,10a,10b */
309    BTWORD (gpio_dma_ctl);	/* 10c, 10d,10e,10f */
310#define BT848_DMA_CTL_PL23TP4		(0<<6)	/* planar1 trigger 4 */
311#define BT848_DMA_CTL_PL23TP8		(1<<6)	/* planar1 trigger 8 */
312#define BT848_DMA_CTL_PL23TP16		(2<<6)	/* planar1 trigger 16 */
313#define BT848_DMA_CTL_PL23TP32		(3<<6)	/* planar1 trigger 32 */
314#define BT848_DMA_CTL_PL1TP4		(0<<4)	/* planar1 trigger 4 */
315#define BT848_DMA_CTL_PL1TP8		(1<<4)	/* planar1 trigger 8 */
316#define BT848_DMA_CTL_PL1TP16		(2<<4)	/* planar1 trigger 16 */
317#define BT848_DMA_CTL_PL1TP32		(3<<4)	/* planar1 trigger 32 */
318#define BT848_DMA_CTL_PKTP4		(0<<2)	/* packed trigger 4 */
319#define BT848_DMA_CTL_PKTP8		(1<<2)	/* packed trigger 8 */
320#define BT848_DMA_CTL_PKTP16		(2<<2)	/* packed trigger 16 */
321#define BT848_DMA_CTL_PKTP32		(3<<2)	/* packed trigger 32 */
322#define BT848_DMA_CTL_RISC_EN		(1<<1)
323#define BT848_DMA_CTL_FIFO_EN		(1<<0)
324    BTLONG (i2c_data_ctl);	/* 110, 111,112,113 */
325#define BT848_DATA_CTL_I2CDIV		(0xf<<4)
326#define BT848_DATA_CTL_I2CSYNC		(1<<3)
327#define BT848_DATA_CTL_I2CW3B		(1<<2)
328#define BT848_DATA_CTL_I2CSCL		(1<<1)
329#define BT848_DATA_CTL_I2CSDA		(1<<0)
330    BTLONG (risc_strt_add);	/* 114, 115,116,117 */
331    BTLONG (gpio_out_en);	/* 118, 119,11a,11b */	/* really 24 bits */
332    BTLONG (gpio_reg_inp);	/* 11c, 11d,11e,11f */	/* really 24 bits */
333    BTLONG (risc_count);	/* 120, 121,122,123 */
334    u_char	filler3[0x200-0x124];
335    BTLONG (gpio_data);		/* 200, 201,202,203 */	/* really 24 bits */
336};
337
338
339#define BKTR_DSTATUS			0x000
340#define BKTR_IFORM			0x004
341#define BKTR_TDEC			0x008
342#define BKTR_E_CROP			0x00C
343#define BKTR_O_CROP			0x08C
344#define BKTR_E_VDELAY_LO		0x010
345#define BKTR_O_VDELAY_LO		0x090
346#define BKTR_E_VACTIVE_LO		0x014
347#define BKTR_O_VACTIVE_LO		0x094
348#define BKTR_E_DELAY_LO			0x018
349#define BKTR_O_DELAY_LO			0x098
350#define BKTR_E_HACTIVE_LO		0x01C
351#define BKTR_O_HACTIVE_LO		0x09C
352#define BKTR_E_HSCALE_HI		0x020
353#define BKTR_O_HSCALE_HI		0x0A0
354#define BKTR_E_HSCALE_LO		0x024
355#define BKTR_O_HSCALE_LO		0x0A4
356#define BKTR_BRIGHT			0x028
357#define BKTR_E_CONTROL			0x02C
358#define BKTR_O_CONTROL			0x0AC
359#define BKTR_CONTRAST_LO		0x030
360#define BKTR_SAT_U_LO			0x034
361#define BKTR_SAT_V_LO			0x038
362#define BKTR_HUE			0x03C
363#define BKTR_E_SCLOOP			0x040
364#define BKTR_O_SCLOOP			0x0C0
365#define BKTR_OFORM			0x048
366#define BKTR_E_VSCALE_HI		0x04C
367#define BKTR_O_VSCALE_HI		0x0CC
368#define BKTR_E_VSCALE_LO		0x050
369#define BKTR_O_VSCALE_LO		0x0D0
370#define BKTR_TEST			0x054
371#define BKTR_ADELAY			0x060
372#define BKTR_BDELAY			0x064
373#define BKTR_ADC			0x068
374#define BKTR_E_VTC			0x06C
375#define BKTR_O_VTC			0x0EC
376#define BKTR_SRESET			0x07C
377#define BKTR_COLOR_FMT			0x0D4
378#define BKTR_COLOR_CTL			0x0D8
379#define BKTR_CAP_CTL			0x0DC
380#define BKTR_VBI_PACK_SIZE		0x0E0
381#define BKTR_VBI_PACK_DEL		0x0E4
382#define BKTR_INT_STAT			0x100
383#define BKTR_INT_MASK			0x104
384#define BKTR_RISC_COUNT			0x120
385#define BKTR_RISC_STRT_ADD		0x114
386#define BKTR_GPIO_DMA_CTL		0x10C
387#define BKTR_GPIO_OUT_EN		0x118
388#define BKTR_GPIO_REG_INP		0x11C
389#define BKTR_GPIO_DATA			0x200
390#define BKTR_I2C_DATA_CTL		0x110
391#define BKTR_TGCTRL			0x084
392#define BKTR_PLL_F_LO			0x0F0
393#define BKTR_PLL_F_HI			0x0F4
394#define BKTR_PLL_F_XCI			0x0F8
395
396/*
397 * device support for onboard tv tuners
398 */
399
400/* description of the LOGICAL tuner */
401struct TVTUNER {
402	int		frequency;
403	u_char		chnlset;
404	u_char		channel;
405	u_char		band;
406	u_char		afc;
407 	u_char		radio_mode;	/* current mode of the radio mode */
408};
409
410/* description of the PHYSICAL tuner */
411struct TUNER {
412	char*		name;
413	u_char		type;
414	u_char		pllControl[4];
415	u_char		bandLimits[ 2 ];
416	u_char		bandAddrs[ 4 ];        /* 3 first for the 3 TV
417					       ** bands. Last for radio
418					       ** band (0x00=NoRadio).
419					       */
420
421};
422
423/* description of the card */
424#define EEPROMBLOCKSIZE		32
425struct CARDTYPE {
426	unsigned int		card_id;	/* card id (from #define's) */
427	char*			name;
428	const struct TUNER*	tuner;		/* Tuner details */
429	u_char			tuner_pllAddr;	/* Tuner i2c address */
430	u_char			dbx;		/* Has DBX chip? */
431	u_char			msp3400c;	/* Has msp3400c chip? */
432	u_char			dpl3518a;	/* Has dpl3518a chip? */
433	u_char			eepromAddr;
434	u_char			eepromSize;	/* bytes / EEPROMBLOCKSIZE */
435	u_int			audiomuxs[ 5 ];	/* tuner, ext (line-in) */
436						/* int/unused (radio) */
437						/* mute, present */
438	u_int			gpio_mux_bits;	/* GPIO mask for audio mux */
439};
440
441struct format_params {
442  /* Total lines, lines before image, image lines */
443  int vtotal, vdelay, vactive;
444  /* Total unscaled horizontal pixels, pixels before image, image pixels */
445  int htotal, hdelay, hactive;
446  /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
447  int  scaled_hactive, scaled_htotal;
448  /* frame rate . for ntsc is 30 frames per second */
449  int frame_rate;
450  /* A-delay and B-delay */
451  u_char adelay, bdelay;
452  /* Iform XTSEL value */
453  int iform_xtsel;
454  /* VBI number of lines per field, and number of samples per line */
455  int vbi_num_lines, vbi_num_samples;
456};
457
458#if defined(BKTR_USE_FREEBSD_SMBUS)
459struct bktr_i2c_softc {
460	device_t iicbus;
461	device_t smbus;
462};
463#endif
464
465
466/* Bt848/878 register access
467 * The registers can either be access via a memory mapped structure
468 * or accessed via bus_space.
469 * bus_0pace access allows cross platform support, where as the
470 * memory mapped structure method only works on 32 bit processors
471 * with the right type of endianness.
472 */
473#if defined(__NetBSD__) || ( defined(__FreeBSD__) && (__FreeBSD_version >=300000) )
474#define INB(bktr,offset)	bus_space_read_1((bktr)->memt,(bktr)->memh,(offset))
475#define INW(bktr,offset)	bus_space_read_2((bktr)->memt,(bktr)->memh,(offset))
476#define INL(bktr,offset)	bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
477#define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))
478#define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
479#define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))
480#else
481#define INB(bktr,offset)	*(volatile unsigned char*) ((int)((bktr)->memh)+(offset))
482#define INW(bktr,offset)	*(volatile unsigned short*)((int)((bktr)->memh)+(offset))
483#define INL(bktr,offset)	*(volatile unsigned int*)  ((int)((bktr)->memh)+(offset))
484#define OUTB(bktr,offset,value)	*(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value)
485#define OUTW(bktr,offset,value)	*(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value)
486#define OUTL(bktr,offset,value)	*(volatile unsigned int*)  ((int)((bktr)->memh)+(offset)) = (value)
487#endif
488
489
490typedef struct bktr_clip bktr_clip_t;
491
492/*
493 * BrookTree 848  info structure, one per bt848 card installed.
494 */
495struct bktr_softc {
496
497#if defined (__bsdi__)
498    struct device bktr_dev;	/* base device */
499    struct isadev bktr_id;	/* ISA device */
500    struct intrhand bktr_ih;	/* interrupt vectoring */
501    #define pcici_t pci_devaddr_t
502#endif
503
504#if defined(__NetBSD__)
505    struct device bktr_dev;     /* base device */
506    bus_dma_tag_t	dmat;   /* DMA tag */
507    bus_space_tag_t	memt;
508    bus_space_handle_t	memh;
509    bus_size_t		obmemsz;        /* size of en card (bytes) */
510    void		*ih;
511    bus_dmamap_t	dm_prog;
512    bus_dmamap_t	dm_oprog;
513    bus_dmamap_t	dm_mem;
514    bus_dmamap_t	dm_vbidata;
515    bus_dmamap_t	dm_vbibuffer;
516#endif
517
518#if defined(__OpenBSD__)
519    struct device bktr_dev;     /* base device */
520    bus_dma_tag_t	dmat;   /* DMA tag */
521    bus_space_tag_t	memt;
522    bus_space_handle_t	memh;
523    bus_size_t		obmemsz;        /* size of en card (bytes) */
524    void		*ih;
525    bus_dmamap_t	dm_prog;
526    bus_dmamap_t	dm_oprog;
527    bus_dmamap_t	dm_mem;
528    bus_dmamap_t	dm_vbidata;
529    bus_dmamap_t	dm_vbibuffer;
530    size_t		dm_mapsize;
531    pci_chipset_tag_t	pc;	/* Opaque PCI chipset tag */
532    pcitag_t		tag;	/* PCI tag, for doing PCI commands */
533    vm_offset_t		phys_base;	/* Bt848 register physical address */
534#endif
535
536#if defined (__FreeBSD__)
537    #if (__FreeBSD_version < 400000)
538    vm_offset_t     phys_base;	/* 2.x Bt848 register physical address */
539    pcici_t         tag;	/* 2.x PCI tag, for doing PCI commands */
540    #endif
541    #if (__FreeBSD_version >= 400000)
542    int             mem_rid;	/* 4.x resource id */
543    struct resource *res_mem;	/* 4.x resource descriptor for registers */
544    int             irq_rid;	/* 4.x resource id */
545    struct resource *res_irq;	/* 4.x resource descriptor for interrupt */
546    void            *res_ih;	/* 4.x newbus interrupt handler cookie */
547    dev_t           bktrdev;	/* 4.x device entry for /dev/bktrN */
548    dev_t           tunerdev;	/* 4.x device entry for /dev/tunerN */
549    dev_t           vbidev;	/* 4.x device entry for /dev/vbiN */
550    dev_t           bktrdev_alias;	/* alias /dev/bktr to /dev/bktr0 */
551    dev_t           tunerdev_alias;	/* alias /dev/tuner to /dev/tuner0 */
552    dev_t           vbidev_alias;	/* alias /dev/vbi to /dev/vbi0 */
553    #endif
554    #if (__FreeBSD_version >= 310000)
555    bus_space_tag_t	memt;	/* Bus space register access functions */
556    bus_space_handle_t	memh;	/* Bus space register access functions */
557    bus_size_t		obmemsz;/* Size of card (bytes) */
558    #endif
559    #if (NSMBUS > 0)
560      struct bktr_i2c_softc i2c_sc;	/* bt848_i2c device */
561    #endif
562    char	bktr_xname[7];	/* device name and unit number */
563#endif
564
565
566    /* The following definitions are for the contiguous memory */
567#ifdef __NetBSD__
568    vaddr_t bigbuf;          /* buffer that holds the captured image */
569    vaddr_t vbidata;         /* RISC program puts VBI data from the current frame here */
570    vaddr_t vbibuffer;       /* Circular buffer holding VBI data for the user */
571    vaddr_t dma_prog;        /* RISC prog for single and/or even field capture*/
572    vaddr_t odd_dma_prog;    /* RISC program for Odd field capture */
573#else
574    vm_offset_t bigbuf;	     /* buffer that holds the captured image */
575    vm_offset_t vbidata;     /* RISC program puts VBI data from the current frame here */
576    vm_offset_t vbibuffer;   /* Circular buffer holding VBI data for the user */
577    vm_offset_t dma_prog;    /* RISC prog for single and/or even field capture*/
578    vm_offset_t odd_dma_prog;/* RISC program for Odd field capture */
579#endif
580
581
582    /* the following definitions are common over all platforms */
583    int		alloc_pages;	/* number of pages in bigbuf */
584    int         vbiinsert;      /* Position for next write into circular buffer */
585    int         vbistart;       /* Position of last read from circular buffer */
586    int         vbisize;        /* Number of bytes in the circular buffer */
587    u_long	vbi_sequence_number;	/* sequence number for VBI */
588    int		vbi_read_blocked;	/* user process blocked on read() from /dev/vbi */
589    struct selinfo vbi_select;	/* Data used by select() on /dev/vbi */
590
591
592    struct proc	*proc;		/* process to receive raised signal */
593    int		signal;		/* signal to send to process */
594    int		clr_on_start;	/* clear cap buf on capture start? */
595#define	METEOR_SIG_MODE_MASK	0xffff0000
596#define	METEOR_SIG_FIELD_MODE	0x00010000
597#define	METEOR_SIG_FRAME_MODE	0x00000000
598    char         dma_prog_loaded;
599    struct meteor_mem *mem;	/* used to control sync. multi-frame output */
600    u_long	synch_wait;	/* wait for free buffer before continuing */
601    short	current;	/* frame number in buffer (1-frames) */
602    short	rows;		/* number of rows in a frame */
603    short	cols;		/* number of columns in a frame */
604    int		capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
605    int		capture_area_y_offset; /* captured. The capture area allows for */
606    int		capture_area_x_size;   /* example 320x200 pixels from the centre */
607    int		capture_area_y_size;   /* of the video image to be captured. */
608    char	capture_area_enabled;  /* When TRUE use user's capture area. */
609    int		pixfmt;         /* active pixel format (idx into fmt tbl) */
610    int		pixfmt_compat;  /* Y/N - in meteor pix fmt compat mode */
611    u_long	format;		/* frame format rgb, yuv, etc.. */
612    short	frames;		/* number of frames allocated */
613    int		frame_size;	/* number of bytes in a frame */
614    u_long	fifo_errors;	/* number of fifo capture errors since open */
615    u_long	dma_errors;	/* number of DMA capture errors since open */
616    u_long	frames_captured;/* number of frames captured since open */
617    u_long	even_fields_captured; /* number of even fields captured */
618    u_long	odd_fields_captured; /* number of odd fields captured */
619    u_long	range_enable;	/* enable range checking ?? */
620    u_short     capcontrol;     /* reg 0xdc capture control */
621    u_short     bktr_cap_ctl;
622    volatile u_int	flags;
623#define	METEOR_INITALIZED	0x00000001
624#define	METEOR_OPEN		0x00000002
625#define	METEOR_MMAP		0x00000004
626#define	METEOR_INTR		0x00000008
627#define	METEOR_READ		0x00000010	/* XXX never gets referenced */
628#define	METEOR_SINGLE		0x00000020	/* get single frame */
629#define	METEOR_CONTIN		0x00000040	/* continuously get frames */
630#define	METEOR_SYNCAP		0x00000080	/* synchronously get frames */
631#define	METEOR_CAP_MASK		0x000000f0
632#define	METEOR_NTSC		0x00000100
633#define	METEOR_PAL		0x00000200
634#define	METEOR_SECAM		0x00000400
635#define	BROOKTREE_NTSC		0x00000100	/* used in video open() and */
636#define	BROOKTREE_PAL		0x00000200	/* in the kernel config */
637#define	BROOKTREE_SECAM		0x00000400	/* file */
638#define	METEOR_AUTOMODE		0x00000800
639#define	METEOR_FORM_MASK	0x00000f00
640#define	METEOR_DEV0		0x00001000
641#define	METEOR_DEV1		0x00002000
642#define	METEOR_DEV2		0x00004000
643#define	METEOR_DEV3		0x00008000
644#define METEOR_DEV_SVIDEO	0x00006000
645#define METEOR_DEV_RGB		0x0000a000
646#define	METEOR_DEV_MASK		0x0000f000
647#define	METEOR_RGB16		0x00010000
648#define	METEOR_RGB24		0x00020000
649#define	METEOR_YUV_PACKED	0x00040000
650#define	METEOR_YUV_PLANAR	0x00080000
651#define	METEOR_WANT_EVEN	0x00100000	/* want even frame */
652#define	METEOR_WANT_ODD		0x00200000	/* want odd frame */
653#define	METEOR_WANT_MASK	0x00300000
654#define METEOR_ONLY_EVEN_FIELDS	0x01000000
655#define METEOR_ONLY_ODD_FIELDS	0x02000000
656#define METEOR_ONLY_FIELDS_MASK 0x03000000
657#define METEOR_YUV_422		0x04000000
658#define	METEOR_OUTPUT_FMT_MASK	0x040f0000
659#define	METEOR_WANT_TS		0x08000000	/* time-stamp a frame */
660#define METEOR_RGB		0x20000000	/* meteor rgb unit */
661#define METEOR_FIELD_MODE	0x80000000
662    u_char	tflags;				/* Tuner flags (/dev/tuner) */
663#define	TUNER_INITALIZED	0x00000001
664#define	TUNER_OPEN		0x00000002
665    u_char      vbiflags;			/* VBI flags (/dev/vbi) */
666#define VBI_INITALIZED          0x00000001
667#define VBI_OPEN                0x00000002
668#define VBI_CAPTURE             0x00000004
669    u_short	fps;		/* frames per second */
670    struct meteor_video video;
671    struct TVTUNER	tuner;
672    struct CARDTYPE	card;
673    u_char		audio_mux_select;	/* current mode of the audio */
674    u_char		audio_mute_state;	/* mute state of the audio */
675    u_char		format_params;
676    u_long              current_sol;
677    u_long              current_col;
678    int                 clip_start;
679    int                 line_length;
680    int                 last_y;
681    int                 y;
682    int                 y2;
683    int                 yclip;
684    int                 yclip2;
685    int                 max_clip_node;
686    bktr_clip_t		clip_list[100];
687    int                 reverse_mute;		/* Swap the GPIO values for Mute and TV Audio */
688    int                 bt848_tuner;
689    int                 bt848_card;
690    u_long              id;
691#define BT848_USE_XTALS 0
692#define BT848_USE_PLL   1
693    int			xtal_pll_mode;	/* Use XTAL or PLL mode for PAL/SECAM */
694    int			remote_control;      /* remote control detected */
695    int			remote_control_addr;   /* remote control i2c address */
696    char		msp_version_string[9]; /* MSP version string 34xxx-xx */
697    int			msp_addr;	       /* MSP i2c address */
698    char		dpl_version_string[9]; /* DPL version string 35xxx-xx */
699    int			dpl_addr;	       /* DPL i2c address */
700    int                 slow_msp_audio;	       /* 0 = use fast MSP3410/3415 programming sequence */
701					       /* 1 = use slow MSP3410/3415 programming sequence */
702					       /* 2 = use Tuner's Mono audio output via the MSP chip */
703    int                 msp_use_mono_source;   /* use Tuner's Mono audio output via the MSP chip */
704    int                 audio_mux_present;     /* 1 = has audio mux on GPIO lines, 0 = no audio mux */
705    int                 msp_source_selected;   /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */
706
707};
708
709typedef struct bktr_softc bktr_reg_t;
710typedef struct bktr_softc* bktr_ptr_t;
711
712#define Bt848_MAX_SIGN 16
713
714struct bt848_card_sig {
715  int card;
716  int tuner;
717  u_char signature[Bt848_MAX_SIGN];
718};
719
720
721/***********************************************************/
722/* ioctl_cmd_t int on old versions, u_long on new versions */
723/***********************************************************/
724
725#if (__FreeBSD__ == 2)
726typedef int ioctl_cmd_t;
727#endif
728
729#if defined(__FreeBSD__)
730#if (__FreeBSD_version >= 300000)
731typedef u_long ioctl_cmd_t;
732#endif
733#endif
734
735#if defined(__NetBSD__) || defined(__OpenBSD__)
736typedef u_long ioctl_cmd_t;
737#endif
738
739
740