bktr_reg.h revision 65692
123599Smarkm/*
251694Sroger * $FreeBSD: head/sys/dev/bktr/bktr_reg.h 65692 2000-09-10 14:34:08Z roger $
351694Sroger *
448781Sroger * Copyright (c) 1999 Roger Hardiman
548781Sroger * Copyright (c) 1998 Amancio Hasty
623599Smarkm * Copyright (c) 1995 Mark Tinguely and Jim Lowe
723599Smarkm * All rights reserved.
823599Smarkm *
923599Smarkm * Redistribution and use in source and binary forms, with or without
1023599Smarkm * modification, are permitted provided that the following conditions
1123599Smarkm * are met:
1223599Smarkm * 1. Redistributions of source code must retain the above copyright
1323599Smarkm *    notice, this list of conditions and the following disclaimer.
1423599Smarkm * 2. Redistributions in binary form must reproduce the above copyright
1523599Smarkm *    notice, this list of conditions and the following disclaimer in the
1623599Smarkm *    documentation and/or other materials provided with the distribution.
1723599Smarkm * 3. All advertising materials mentioning features or use of this software
1823599Smarkm *    must display the following acknowledgement:
1923599Smarkm *	This product includes software developed by Mark Tinguely and Jim Lowe
2023599Smarkm * 4. The name of the author may not be used to endorse or promote products
2123599Smarkm *    derived from this software without specific prior written permission.
2223599Smarkm *
2323599Smarkm * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
2423599Smarkm * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
2523599Smarkm * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
2623599Smarkm * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
2723599Smarkm * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2823599Smarkm * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
2923599Smarkm * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
3023599Smarkm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
3123599Smarkm * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
3223599Smarkm * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3323599Smarkm * POSSIBILITY OF SUCH DAMAGE.
3439838Ssos *
3523599Smarkm */
3651694Sroger
3751694Sroger#ifdef __FreeBSD__
3859014Sroger#  if (__FreeBSD_version >= 310000)
3959014Sroger#    include "smbus.h"
4059014Sroger#  else
4159014Sroger#    define NSMBUS 0		/* FreeBSD before 3.1 does not have SMBUS */
4259014Sroger#  endif
4365692Sroger#  if (NSMBUS > 0)
4465692Sroger#    define BKTR_USE_FREEBSD_SMBUS
4565692Sroger#  endif
4651694Sroger#endif
4759014Sroger
4859014Sroger#ifdef __NetBSD__
4959014Sroger#include <machine/bus.h>		/* struct device */
5059014Sroger#include <sys/device.h>
5159014Sroger#include <sys/select.h>			/* struct selinfo */
5262112Sroger# ifdef DEBUG
5362112Sroger#  define	bootverbose 1
5462112Sroger# else
5562112Sroger#  define	bootverbose 0
5662112Sroger# endif
5751694Sroger#endif
5851694Sroger
5962112Sroger/*
6062112Sroger * The kernel options for the driver now all begin with BKTR.
6162112Sroger * Support the older kernel options on FreeBSD and OpenBSD.
6262112Sroger *
6362112Sroger */
6462112Sroger#if defined(__FreeBSD__) || defined(__OpenBSD__)
6562112Sroger#if defined(BROOKTREE_SYSTEM_DEFAULT)
6662112Sroger#define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT
6762112Sroger#endif
6862112Sroger
6962112Sroger#if defined(OVERRIDE_CARD)
7062112Sroger#define BKTR_OVERRIDE_CARD OVERRIDE_CARD
7162112Sroger#endif
7262112Sroger
7362112Sroger#if defined(OVERRIDE_TUNER)
7462112Sroger#define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER
7562112Sroger#endif
7662112Sroger
7762112Sroger#if defined(OVERRIDE_DBX)
7862112Sroger#define BKTR_OVERRIDE_DBX OVERRIDE_DBX
7962112Sroger#endif
8062112Sroger
8162112Sroger#if defined(OVERRIDE_MSP)
8262112Sroger#define BKTR_OVERRIDE_MSP OVERRIDE_MSP
8362112Sroger#endif
8462112Sroger
8562112Sroger#endif
8662112Sroger
8762112Sroger
8823599Smarkm#ifndef PCI_LATENCY_TIMER
8923599Smarkm#define	PCI_LATENCY_TIMER		0x0c	/* pci timer register */
9023599Smarkm#endif
9123599Smarkm
9223599Smarkm/*
9347884Sroger * Definitions for the Brooktree 848/878 video capture to pci interface.
9423599Smarkm */
9543771Sroger#define BROOKTREE_848_PCI_ID            0x0350109E
9643771Sroger#define BROOKTREE_849_PCI_ID            0x0351109E
9743771Sroger#define BROOKTREE_878_PCI_ID            0x036E109E
9843771Sroger#define BROOKTREE_879_PCI_ID            0x036F109E
9923599Smarkm
10043771Sroger#define BROOKTREE_848                   1
10143771Sroger#define BROOKTREE_848A                  2
10247492Sroger#define BROOKTREE_849A                  3
10343771Sroger#define BROOKTREE_878                   4
10443771Sroger#define BROOKTREE_879                   5
10543771Sroger
10624246Sfsmptypedef volatile u_int 	bregister_t;
10724246Sfsmp/*
10824246Sfsmp * if other persuasion endian, then compiler will probably require that
10924246Sfsmp * these next
11024246Sfsmp * macros be reversed
11124246Sfsmp */
11224246Sfsmp#define	BTBYTE(what)	bregister_t  what:8; int :24
11324246Sfsmp#define	BTWORD(what)	bregister_t  what:16; int: 16
11424246Sfsmp#define BTLONG(what)	bregister_t  what:32
11523599Smarkm
11624246Sfsmpstruct bt848_registers {
11724246Sfsmp    BTBYTE (dstatus);		/* 0, 1,2,3 */
11824528Sfsmp#define BT848_DSTATUS_PRES		(1<<7)
11924528Sfsmp#define BT848_DSTATUS_HLOC		(1<<6)
12024528Sfsmp#define BT848_DSTATUS_FIELD		(1<<5)
12124528Sfsmp#define BT848_DSTATUS_NUML		(1<<4)
12224528Sfsmp#define BT848_DSTATUS_CSEL		(1<<3)
12338707Ssos#define BT848_DSTATUS_PLOCK		(1<<2)
12424528Sfsmp#define BT848_DSTATUS_LOF		(1<<1)
12524528Sfsmp#define BT848_DSTATUS_COF		(1<<0)
12624246Sfsmp    BTBYTE (iform);		/* 4, 5,6,7 */
12724528Sfsmp#define BT848_IFORM_MUXSEL		(0x3<<5)
12824528Sfsmp# define BT848_IFORM_M_MUX1		(0x03<<5)
12924528Sfsmp# define BT848_IFORM_M_MUX0		(0x02<<5)
13024528Sfsmp# define BT848_IFORM_M_MUX2		(0x01<<5)
13137611Sahasty# define BT848_IFORM_M_MUX3		(0x0)
13224528Sfsmp# define BT848_IFORM_M_RSVD		(0x00<<5)
13324528Sfsmp#define BT848_IFORM_XTSEL		(0x3<<3)
13424528Sfsmp# define BT848_IFORM_X_AUTO		(0x03<<3)
13524528Sfsmp# define BT848_IFORM_X_XT1		(0x02<<3)
13624528Sfsmp# define BT848_IFORM_X_XT0		(0x01<<3)
13724528Sfsmp# define BT848_IFORM_X_RSVD		(0x00<<3)
13824246Sfsmp    BTBYTE (tdec);		/* 8, 9,a,b */
13924246Sfsmp    BTBYTE (e_crop);		/* c, d,e,f */
14024246Sfsmp    BTBYTE (e_vdelay_lo);	/* 10, 11,12,13 */
14124246Sfsmp    BTBYTE (e_vactive_lo);	/* 14, 15,16,17 */
14224246Sfsmp    BTBYTE (e_delay_lo);	/* 18, 19,1a,1b */
14324246Sfsmp    BTBYTE (e_hactive_lo);	/* 1c, 1d,1e,1f */
14424246Sfsmp    BTBYTE (e_hscale_hi);	/* 20, 21,22,23 */
14524246Sfsmp    BTBYTE (e_hscale_lo);	/* 24, 25,26,27 */
14624246Sfsmp    BTBYTE (bright);		/* 28, 29,2a,2b */
14724246Sfsmp    BTBYTE (e_control);		/* 2c, 2d,2e,2f */
14824528Sfsmp#define BT848_E_CONTROL_LNOTCH		(1<<7)
14924528Sfsmp#define BT848_E_CONTROL_COMP		(1<<6)
15024528Sfsmp#define BT848_E_CONTROL_LDEC		(1<<5)
15124528Sfsmp#define BT848_E_CONTROL_CBSENSE		(1<<4)
15224528Sfsmp#define BT848_E_CONTROL_RSVD		(1<<3)
15324528Sfsmp#define BT848_E_CONTROL_CON_MSB		(1<<2)
15424528Sfsmp#define BT848_E_CONTROL_SAT_U_MSB	(1<<1)
15524528Sfsmp#define BT848_E_CONTROL_SAT_V_MSB	(1<<0)
15624246Sfsmp    BTBYTE (contrast_lo);	/* 30, 31,32,33 */
15724246Sfsmp    BTBYTE (sat_u_lo);		/* 34, 35,36,37 */
15824246Sfsmp    BTBYTE (sat_v_lo);		/* 38, 39,3a,3b */
15924246Sfsmp    BTBYTE (hue);		/* 3c, 3d,3e,3f */
16024246Sfsmp    BTBYTE (e_scloop);		/* 40, 41,42,43 */
16124528Sfsmp#define BT848_E_SCLOOP_RSVD1		(1<<7)
16224528Sfsmp#define BT848_E_SCLOOP_CAGC		(1<<6)
16324528Sfsmp#define BT848_E_SCLOOP_CKILL		(1<<5)
16424528Sfsmp#define BT848_E_SCLOOP_HFILT		(0x3<<3)
16524528Sfsmp# define BT848_E_SCLOOP_HFILT_ICON	(0x3<<3)
16624528Sfsmp# define BT848_E_SCLOOP_HFILT_QCIF	(0x2<<3)
16724528Sfsmp# define BT848_E_SCLOOP_HFILT_CIF	(0x1<<3)
16824528Sfsmp# define BT848_E_SCLOOP_HFILT_AUTO	(0x0<<3)
16924528Sfsmp#define BT848_E_SCLOOP_RSVD0		(0x7<<0)
17024246Sfsmp    int		:32;		/* 44, 45,46,47 */
17124246Sfsmp    BTBYTE (oform);		/* 48, 49,4a,4b */
17224246Sfsmp    BTBYTE (e_vscale_hi);	/* 4c, 4d,4e,4f */
17324246Sfsmp    BTBYTE (e_vscale_lo);	/* 50, 51,52,53 */
17424246Sfsmp    BTBYTE (test);		/* 54, 55,56,57 */
17524246Sfsmp    int		:32;		/* 58, 59,5a,5b */
17624246Sfsmp    int		:32;		/* 5c, 5d,5e,5f */
17724246Sfsmp    BTLONG (adelay);		/* 60, 61,62,63 */
17824246Sfsmp    BTBYTE (bdelay);		/* 64, 65,66,67 */
17924246Sfsmp    BTBYTE (adc);		/* 68, 69,6a,6b */
18024528Sfsmp#define BT848_ADC_RESERVED		(0x80)	/* required pattern */
18124528Sfsmp#define BT848_ADC_SYNC_T		(1<<5)
18224528Sfsmp#define BT848_ADC_AGC_EN		(1<<4)
18324528Sfsmp#define BT848_ADC_CLK_SLEEP		(1<<3)
18424528Sfsmp#define BT848_ADC_Y_SLEEP		(1<<2)
18524528Sfsmp#define BT848_ADC_C_SLEEP		(1<<1)
18624528Sfsmp#define BT848_ADC_CRUSH			(1<<0)
18724246Sfsmp    BTBYTE (e_vtc);		/* 6c, 6d,6e,6f */
18824246Sfsmp    int		:32;		/* 70, 71,72,73 */
18924246Sfsmp    int 	:32;		/* 74, 75,76,77 */
19024246Sfsmp    int		:32;		/* 78, 79,7a,7b */
19124246Sfsmp    BTLONG (sreset);		/* 7c, 7d,7e,7f */
19238707Ssos    u_char 	filler1[0x84-0x80];
19338707Ssos    BTBYTE (tgctrl);		/* 84, 85,86,87 */
19438707Ssos#define BT848_TGCTRL_TGCKI		(3<<3)
19538707Ssos#define BT848_TGCTRL_TGCKI_XTAL		(0<<3)
19638707Ssos#define BT848_TGCTRL_TGCKI_PLL		(1<<3)
19738707Ssos#define BT848_TGCTRL_TGCKI_GPCLK	(2<<3)
19838707Ssos#define BT848_TGCTRL_TGCKI_GPCLK_I	(3<<3)
19938707Ssos    u_char 	filler[0x8c-0x88];
20024246Sfsmp    BTBYTE (o_crop);		/* 8c, 8d,8e,8f */
20124246Sfsmp    BTBYTE (o_vdelay_lo);	/* 90, 91,92,93 */
20224246Sfsmp    BTBYTE (o_vactive_lo);	/* 94, 95,96,97 */
20324246Sfsmp    BTBYTE (o_delay_lo);	/* 98, 99,9a,9b */
20424246Sfsmp    BTBYTE (o_hactive_lo);	/* 9c, 9d,9e,9f */
20524246Sfsmp    BTBYTE (o_hscale_hi);	/* a0, a1,a2,a3 */
20624246Sfsmp    BTBYTE (o_hscale_lo);	/* a4, a5,a6,a7 */
20724246Sfsmp    int		:32;		/* a8, a9,aa,ab */
20824246Sfsmp    BTBYTE (o_control);		/* ac, ad,ae,af */
20924528Sfsmp#define BT848_O_CONTROL_LNOTCH		(1<<7)
21024528Sfsmp#define BT848_O_CONTROL_COMP		(1<<6)
21124528Sfsmp#define BT848_O_CONTROL_LDEC		(1<<5)
21224528Sfsmp#define BT848_O_CONTROL_CBSENSE		(1<<4)
21324528Sfsmp#define BT848_O_CONTROL_RSVD		(1<<3)
21424528Sfsmp#define BT848_O_CONTROL_CON_MSB		(1<<2)
21524528Sfsmp#define BT848_O_CONTROL_SAT_U_MSB	(1<<1)
21624528Sfsmp#define BT848_O_CONTROL_SAT_V_MSB	(1<<0)
21759014Sroger    u_char	fillter4[16];
21824246Sfsmp    BTBYTE (o_scloop);		/* c0, c1,c2,c3 */
21924528Sfsmp#define BT848_O_SCLOOP_RSVD1		(1<<7)
22024528Sfsmp#define BT848_O_SCLOOP_CAGC		(1<<6)
22124528Sfsmp#define BT848_O_SCLOOP_CKILL		(1<<5)
22224528Sfsmp#define BT848_O_SCLOOP_HFILT		(0x3<<3)
22338707Ssos#define BT848_O_SCLOOP_HFILT_ICON	(0x3<<3)
22438707Ssos#define BT848_O_SCLOOP_HFILT_QCIF	(0x2<<3)
22538707Ssos#define BT848_O_SCLOOP_HFILT_CIF	(0x1<<3)
22638707Ssos#define BT848_O_SCLOOP_HFILT_AUTO	(0x0<<3)
22724528Sfsmp#define BT848_O_SCLOOP_RSVD0		(0x7<<0)
22824246Sfsmp    int		:32;		/* c4, c5,c6,c7 */
22924246Sfsmp    int		:32;		/* c8, c9,ca,cb */
23024246Sfsmp    BTBYTE (o_vscale_hi);	/* cc, cd,ce,cf */
23124246Sfsmp    BTBYTE (o_vscale_lo);	/* d0, d1,d2,d3 */
23224246Sfsmp    BTBYTE (color_fmt);		/* d4, d5,d6,d7 */
23325329Sfsmp    bregister_t color_ctl_swap		:4; /* d8 */
23424528Sfsmp#define BT848_COLOR_CTL_WSWAP_ODD	(1<<3)
23524528Sfsmp#define BT848_COLOR_CTL_WSWAP_EVEN	(1<<2)
23624528Sfsmp#define BT848_COLOR_CTL_BSWAP_ODD	(1<<1)
23724528Sfsmp#define BT848_COLOR_CTL_BSWAP_EVEN	(1<<0)
23825329Sfsmp    bregister_t color_ctl_gamma		:1;
23925329Sfsmp    bregister_t color_ctl_rgb_ded	:1;
24025329Sfsmp    bregister_t color_ctl_color_bars	:1;
24125329Sfsmp    bregister_t color_ctl_ext_frmrate	:1;
24259014Sroger#define BT848_COLOR_CTL_GAMMA		(1<<4)
24359014Sroger#define BT848_COLOR_CTL_RGB_DED		(1<<5)
24459014Sroger#define BT848_COLOR_CTL_COLOR_BARS	(1<<6)
24559014Sroger#define BT848_COLOR_CTL_EXT_FRMRATE     (1<<7)
24625329Sfsmp    int		:24;		/* d9,da,db */
24724246Sfsmp    BTBYTE (cap_ctl);		/* dc, dd,de,df */
24824528Sfsmp#define BT848_CAP_CTL_DITH_FRAME	(1<<4)
24924528Sfsmp#define BT848_CAP_CTL_VBI_ODD		(1<<3)
25024528Sfsmp#define BT848_CAP_CTL_VBI_EVEN		(1<<2)
25124528Sfsmp#define BT848_CAP_CTL_ODD		(1<<1)
25224528Sfsmp#define BT848_CAP_CTL_EVEN		(1<<0)
25324246Sfsmp    BTBYTE (vbi_pack_size);	/* e0, e1,e2,e3 */
25424246Sfsmp    BTBYTE (vbi_pack_del);	/* e4, e5,e6,e7 */
25524246Sfsmp    int		:32;		/* e8, e9,ea,eb */
25624246Sfsmp    BTBYTE (o_vtc);		/* ec, ed,ee,ef */
25738707Ssos    BTBYTE (pll_f_lo);		/* f0, f1,f2,f3 */
25838707Ssos    BTBYTE (pll_f_hi);		/* f4, f5,f6,f7 */
25938707Ssos    BTBYTE (pll_f_xci);		/* f8, f9,fa,fb */
26038707Ssos#define BT848_PLL_F_C			(1<<6)
26138707Ssos#define BT848_PLL_F_X			(1<<7)
26238707Ssos    u_char	filler2[0x100-0xfc];
26324246Sfsmp    BTLONG (int_stat);		/* 100, 101,102,103 */
26424246Sfsmp    BTLONG (int_mask);		/* 104, 105,106,107 */
26524528Sfsmp#define BT848_INT_RISCS			(0xf<<28)
26624528Sfsmp#define BT848_INT_RISC_EN		(1<<27)
26724528Sfsmp#define BT848_INT_RACK			(1<<25)
26824528Sfsmp#define BT848_INT_FIELD			(1<<24)
26924528Sfsmp#define BT848_INT_MYSTERYBIT		(1<<23)
27024528Sfsmp#define BT848_INT_SCERR			(1<<19)
27124528Sfsmp#define BT848_INT_OCERR			(1<<18)
27224528Sfsmp#define BT848_INT_PABORT		(1<<17)
27324528Sfsmp#define BT848_INT_RIPERR		(1<<16)
27424528Sfsmp#define BT848_INT_PPERR			(1<<15)
27524528Sfsmp#define BT848_INT_FDSR			(1<<14)
27624528Sfsmp#define BT848_INT_FTRGT			(1<<13)
27724528Sfsmp#define BT848_INT_FBUS			(1<<12)
27824528Sfsmp#define BT848_INT_RISCI			(1<<11)
27924528Sfsmp#define BT848_INT_GPINT			(1<<9)
28024528Sfsmp#define BT848_INT_I2CDONE		(1<<8)
28124528Sfsmp#define BT848_INT_RSV1			(1<<7)
28224528Sfsmp#define BT848_INT_RSV0			(1<<6)
28324528Sfsmp#define BT848_INT_VPRES			(1<<5)
28424528Sfsmp#define BT848_INT_HLOCK			(1<<4)
28524528Sfsmp#define BT848_INT_OFLOW			(1<<3)
28624528Sfsmp#define BT848_INT_HSYNC			(1<<2)
28724528Sfsmp#define BT848_INT_VSYNC			(1<<1)
28824528Sfsmp#define BT848_INT_FMTCHG		(1<<0)
28924246Sfsmp    int		:32;		/* 108, 109,10a,10b */
29024246Sfsmp    BTWORD (gpio_dma_ctl);	/* 10c, 10d,10e,10f */
29129233Smarkm#define BT848_DMA_CTL_PL23TP4		(0<<6)	/* planar1 trigger 4 */
29229233Smarkm#define BT848_DMA_CTL_PL23TP8		(1<<6)	/* planar1 trigger 8 */
29329233Smarkm#define BT848_DMA_CTL_PL23TP16		(2<<6)	/* planar1 trigger 16 */
29429233Smarkm#define BT848_DMA_CTL_PL23TP32		(3<<6)	/* planar1 trigger 32 */
29529233Smarkm#define BT848_DMA_CTL_PL1TP4		(0<<4)	/* planar1 trigger 4 */
29629233Smarkm#define BT848_DMA_CTL_PL1TP8		(1<<4)	/* planar1 trigger 8 */
29729233Smarkm#define BT848_DMA_CTL_PL1TP16		(2<<4)	/* planar1 trigger 16 */
29829233Smarkm#define BT848_DMA_CTL_PL1TP32		(3<<4)	/* planar1 trigger 32 */
29929233Smarkm#define BT848_DMA_CTL_PKTP4		(0<<2)	/* packed trigger 4 */
30029233Smarkm#define BT848_DMA_CTL_PKTP8		(1<<2)	/* packed trigger 8 */
30129233Smarkm#define BT848_DMA_CTL_PKTP16		(2<<2)	/* packed trigger 16 */
30229233Smarkm#define BT848_DMA_CTL_PKTP32		(3<<2)	/* packed trigger 32 */
30324528Sfsmp#define BT848_DMA_CTL_RISC_EN		(1<<1)
30424528Sfsmp#define BT848_DMA_CTL_FIFO_EN		(1<<0)
30524246Sfsmp    BTLONG (i2c_data_ctl);	/* 110, 111,112,113 */
30624528Sfsmp#define BT848_DATA_CTL_I2CDIV		(0xf<<4)
30724528Sfsmp#define BT848_DATA_CTL_I2CSYNC		(1<<3)
30824528Sfsmp#define BT848_DATA_CTL_I2CW3B		(1<<2)
30924528Sfsmp#define BT848_DATA_CTL_I2CSCL		(1<<1)
31024528Sfsmp#define BT848_DATA_CTL_I2CSDA		(1<<0)
31124246Sfsmp    BTLONG (risc_strt_add);	/* 114, 115,116,117 */
31224246Sfsmp    BTLONG (gpio_out_en);	/* 118, 119,11a,11b */	/* really 24 bits */
31324246Sfsmp    BTLONG (gpio_reg_inp);	/* 11c, 11d,11e,11f */	/* really 24 bits */
31424246Sfsmp    BTLONG (risc_count);	/* 120, 121,122,123 */
31524246Sfsmp    u_char	filler3[0x200-0x124];
31624246Sfsmp    BTLONG (gpio_data);		/* 200, 201,202,203 */	/* really 24 bits */
31724246Sfsmp};
31823599Smarkm
31924246Sfsmp
32024087Sfsmp#define BKTR_DSTATUS			0x000
32124087Sfsmp#define BKTR_IFORM			0x004
32224087Sfsmp#define BKTR_TDEC			0x008
32359014Sroger#define BKTR_E_CROP			0x00C
32459014Sroger#define BKTR_O_CROP			0x08C
32524087Sfsmp#define BKTR_E_VDELAY_LO		0x010
32624087Sfsmp#define BKTR_O_VDELAY_LO		0x090
32724087Sfsmp#define BKTR_E_VACTIVE_LO		0x014
32824087Sfsmp#define BKTR_O_VACTIVE_LO		0x094
32924087Sfsmp#define BKTR_E_DELAY_LO			0x018
33024087Sfsmp#define BKTR_O_DELAY_LO			0x098
33124087Sfsmp#define BKTR_E_HACTIVE_LO		0x01C
33224087Sfsmp#define BKTR_O_HACTIVE_LO		0x09C
33324087Sfsmp#define BKTR_E_HSCALE_HI		0x020
33424087Sfsmp#define BKTR_O_HSCALE_HI		0x0A0
33524087Sfsmp#define BKTR_E_HSCALE_LO		0x024
33624087Sfsmp#define BKTR_O_HSCALE_LO		0x0A4
33724087Sfsmp#define BKTR_BRIGHT			0x028
33824087Sfsmp#define BKTR_E_CONTROL			0x02C
33924087Sfsmp#define BKTR_O_CONTROL			0x0AC
34024087Sfsmp#define BKTR_CONTRAST_LO		0x030
34124087Sfsmp#define BKTR_SAT_U_LO			0x034
34224087Sfsmp#define BKTR_SAT_V_LO			0x038
34324087Sfsmp#define BKTR_HUE			0x03C
34424087Sfsmp#define BKTR_E_SCLOOP			0x040
34524087Sfsmp#define BKTR_O_SCLOOP			0x0C0
34624087Sfsmp#define BKTR_OFORM			0x048
34724087Sfsmp#define BKTR_E_VSCALE_HI		0x04C
34824087Sfsmp#define BKTR_O_VSCALE_HI		0x0CC
34924087Sfsmp#define BKTR_E_VSCALE_LO		0x050
35024087Sfsmp#define BKTR_O_VSCALE_LO		0x0D0
35124087Sfsmp#define BKTR_TEST			0x054
35224087Sfsmp#define BKTR_ADELAY			0x060
35324087Sfsmp#define BKTR_BDELAY			0x064
35424087Sfsmp#define BKTR_ADC			0x068
35524087Sfsmp#define BKTR_E_VTC			0x06C
35624087Sfsmp#define BKTR_O_VTC			0x0EC
35724087Sfsmp#define BKTR_SRESET			0x07C
35824087Sfsmp#define BKTR_COLOR_FMT			0x0D4
35924087Sfsmp#define BKTR_COLOR_CTL			0x0D8
36024087Sfsmp#define BKTR_CAP_CTL			0x0DC
36124087Sfsmp#define BKTR_VBI_PACK_SIZE		0x0E0
36224087Sfsmp#define BKTR_VBI_PACK_DEL		0x0E4
36324087Sfsmp#define BKTR_INT_STAT			0x100
36424087Sfsmp#define BKTR_INT_MASK			0x104
36524087Sfsmp#define BKTR_RISC_COUNT			0x120
36624087Sfsmp#define BKTR_RISC_STRT_ADD		0x114
36724087Sfsmp#define BKTR_GPIO_DMA_CTL		0x10C
36824087Sfsmp#define BKTR_GPIO_OUT_EN		0x118
36924087Sfsmp#define BKTR_GPIO_REG_INP		0x11C
37024087Sfsmp#define BKTR_GPIO_DATA			0x200
37159014Sroger#define BKTR_I2C_DATA_CTL		0x110
37259014Sroger#define BKTR_TGCTRL			0x084
37359014Sroger#define BKTR_PLL_F_LO			0x0F0
37459014Sroger#define BKTR_PLL_F_HI			0x0F4
37559014Sroger#define BKTR_PLL_F_XCI			0x0F8
37623599Smarkm
37723599Smarkm/*
37823599Smarkm * device support for onboard tv tuners
37923599Smarkm */
38024528Sfsmp
38124528Sfsmp/* description of the LOGICAL tuner */
38224246Sfsmpstruct TVTUNER {
38324528Sfsmp	int		frequency;
38424528Sfsmp	u_char		chnlset;
38524528Sfsmp	u_char		channel;
38624528Sfsmp	u_char		band;
38724528Sfsmp	u_char		afc;
38833850Sahasty 	u_char		radio_mode;	/* current mode of the radio mode */
38923599Smarkm};
39023599Smarkm
39124528Sfsmp/* description of the PHYSICAL tuner */
39224528Sfsmpstruct TUNER {
39324528Sfsmp	char*		name;
39424528Sfsmp	u_char		type;
39533025Sahasty	u_char		pllControl[4];
39624528Sfsmp	u_char		bandLimits[ 2 ];
39733025Sahasty	u_char		bandAddrs[ 4 ];        /* 3 first for the 3 TV
39833025Sahasty					       ** bands. Last for radio
39933025Sahasty					       ** band (0x00=NoRadio).
40033025Sahasty					       */
40133025Sahasty
40224528Sfsmp};
40324528Sfsmp
40424528Sfsmp/* description of the card */
40524246Sfsmp#define EEPROMBLOCKSIZE		32
40624246Sfsmpstruct CARDTYPE {
40739041Ssos	unsigned int		card_id;	/* card id (from #define's) */
40824528Sfsmp	char*			name;
40939838Ssos	const struct TUNER*	tuner;		/* Tuner details */
41039838Ssos	u_char			tuner_pllAddr;	/* Tuner i2c address */
41130856Seivind	u_char			dbx;		/* Has DBX chip? */
41230856Seivind	u_char			msp3400c;	/* Has msp3400c chip? */
41352593Sroger	u_char			dpl3518a;	/* Has dpl3518a chip? */
41424528Sfsmp	u_char			eepromAddr;
41524528Sfsmp	u_char			eepromSize;	/* bytes / EEPROMBLOCKSIZE */
41646876Sroger	u_int			audiomuxs[ 5 ];	/* tuner, ext (line-in) */
41746876Sroger						/* int/unused (radio) */
41846876Sroger						/* mute, present */
41946876Sroger	u_int			gpio_mux_bits;	/* GPIO mask for audio mux */
42024246Sfsmp};
42123599Smarkm
42224528Sfsmpstruct format_params {
42324528Sfsmp  /* Total lines, lines before image, image lines */
42424528Sfsmp  int vtotal, vdelay, vactive;
42524528Sfsmp  /* Total unscaled horizontal pixels, pixels before image, image pixels */
42624528Sfsmp  int htotal, hdelay, hactive;
42738706Ssos  /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
42838706Ssos  int  scaled_hactive, scaled_htotal;
42938706Ssos  /* frame rate . for ntsc is 30 frames per second */
43029233Smarkm  int frame_rate;
43138706Ssos  /* A-delay and B-delay */
43230856Seivind  u_char adelay, bdelay;
43338706Ssos  /* Iform XTSEL value */
43430856Seivind  int iform_xtsel;
43546175Sroger  /* VBI number of lines per field, and number of samples per line */
43646175Sroger  int vbi_num_lines, vbi_num_samples;
43724528Sfsmp};
43824528Sfsmp
43965692Sroger#if defined(BKTR_USE_FREEBSD_SMBUS)
44040781Snsouchstruct bktr_i2c_softc {
44140781Snsouch	device_t iicbus;
44240781Snsouch	device_t smbus;
44340781Snsouch};
44440781Snsouch#endif
44525329Sfsmp
44659014Sroger
44759014Sroger/* Bt848/878 register access
44859014Sroger * The registers can either be access via a memory mapped structure
44959014Sroger * or accessed via bus_space.
45059014Sroger * bus_0pace access allows cross platform support, where as the
45159014Sroger * memory mapped structure method only works on 32 bit processors
45259014Sroger * with the right type of endianness.
45359014Sroger */
45459014Sroger#if defined(__NetBSD__) || ( defined(__FreeBSD__) && (__FreeBSD_version >=300000) )
45559014Sroger#define INB(bktr,offset)	bus_space_read_1((bktr)->memt,(bktr)->memh,(offset))
45659014Sroger#define INW(bktr,offset)	bus_space_read_2((bktr)->memt,(bktr)->memh,(offset))
45759014Sroger#define INL(bktr,offset)	bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
45859014Sroger#define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))
45959014Sroger#define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
46059014Sroger#define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))
46159014Sroger#else
46259014Sroger#define INB(bktr,offset)	*(volatile unsigned char*) ((int)((bktr)->memh)+(offset))
46359014Sroger#define INW(bktr,offset)	*(volatile unsigned short*)((int)((bktr)->memh)+(offset))
46459014Sroger#define INL(bktr,offset)	*(volatile unsigned int*)  ((int)((bktr)->memh)+(offset))
46559014Sroger#define OUTB(bktr,offset,value)	*(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value)
46659014Sroger#define OUTW(bktr,offset,value)	*(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value)
46759014Sroger#define OUTL(bktr,offset,value)	*(volatile unsigned int*)  ((int)((bktr)->memh)+(offset)) = (value)
46859014Sroger#endif
46959014Sroger
47059014Sroger
47125329Sfsmptypedef struct bktr_clip bktr_clip_t;
47247884Sroger
47351351Sroger/*
47451351Sroger * NetBSD >= 1.3H uses vaddr_t instead of vm_offset_t
47551351Sroger */
47651351Sroger#if defined(__NetBSD__) && __NetBSD_Version__ >= 103080000
47762112Srogertypedef void *	vm_offset_t;
47851351Sroger#endif
47947884Sroger
48023599Smarkm/*
48123599Smarkm * BrookTree 848  info structure, one per bt848 card installed.
48223599Smarkm */
48324528Sfsmpstruct bktr_softc {
48447884Sroger
48547884Sroger#if defined (__bsdi__)
48629233Smarkm    struct device bktr_dev;	/* base device */
48729233Smarkm    struct isadev bktr_id;	/* ISA device */
48829233Smarkm    struct intrhand bktr_ih;	/* interrupt vectoring */
48947884Sroger    #define pcici_t pci_devaddr_t
49029233Smarkm#endif
49147884Sroger
49247884Sroger#if defined(__NetBSD__)
49347884Sroger    struct device bktr_dev;     /* base device */
49451351Sroger    bus_dma_tag_t	dmat;   /* DMA tag */
49547884Sroger    bus_space_tag_t	memt;
49647884Sroger    bus_space_handle_t	memh;
49747884Sroger    bus_size_t		obmemsz;        /* size of en card (bytes) */
49847884Sroger    void		*ih;
49947884Sroger    bus_dmamap_t	dm_prog;
50047884Sroger    bus_dmamap_t	dm_oprog;
50147884Sroger    bus_dmamap_t	dm_mem;
50250693Sroger    bus_dmamap_t	dm_vbidata;
50350693Sroger    bus_dmamap_t	dm_vbibuffer;
50440781Snsouch#endif
50547884Sroger
50647884Sroger#if defined(__OpenBSD__)
50747884Sroger    struct device bktr_dev;     /* base device */
50847884Sroger    bus_dma_tag_t	dmat;   /* DMA tag */
50947884Sroger    bus_space_tag_t	memt;
51047884Sroger    bus_space_handle_t	memh;
51147884Sroger    bus_size_t		obmemsz;        /* size of en card (bytes) */
51247884Sroger    void		*ih;
51347884Sroger    bus_dmamap_t	dm_prog;
51447884Sroger    bus_dmamap_t	dm_oprog;
51547884Sroger    bus_dmamap_t	dm_mem;
51650693Sroger    bus_dmamap_t	dm_vbidata;
51750693Sroger    bus_dmamap_t	dm_vbibuffer;
51847884Sroger    size_t		dm_mapsize;
51947884Sroger    pci_chipset_tag_t	pc;	/* Opaque PCI chipset tag */
52047884Sroger    pcitag_t		tag;	/* PCI tag, for doing PCI commands */
52147884Sroger    vm_offset_t		phys_base;	/* Bt848 register physical address */
52247884Sroger#endif
52347884Sroger
52447884Sroger#if defined (__FreeBSD__)
52548781Sroger    #if (__FreeBSD_version < 400000)
52647884Sroger    vm_offset_t     phys_base;	/* 2.x Bt848 register physical address */
52747884Sroger    pcici_t         tag;	/* 2.x PCI tag, for doing PCI commands */
52847884Sroger    #endif
52948781Sroger    #if (__FreeBSD_version >= 400000)
53065049Sroger    int             mem_rid;	/* 4.x resource id */
53147884Sroger    struct resource *res_mem;	/* 4.x resource descriptor for registers */
53265049Sroger    int             irq_rid;	/* 4.x resource id */
53347884Sroger    struct resource *res_irq;	/* 4.x resource descriptor for interrupt */
53447884Sroger    void            *res_ih;	/* 4.x newbus interrupt handler cookie */
53547884Sroger    #endif
53659014Sroger    #if (__FreeBSD_version >= 310000)
53759014Sroger    bus_space_tag_t	memt;	/* Bus space register access functions */
53859014Sroger    bus_space_handle_t	memh;	/* Bus space register access functions */
53959014Sroger    bus_size_t		obmemsz;/* Size of card (bytes) */
54059014Sroger    #endif
54147884Sroger    #if (NSMBUS > 0)
54247884Sroger      struct bktr_i2c_softc i2c_sc;	/* bt848_i2c device */
54347884Sroger    #endif
54462112Sroger    char	bktr_xname[7];	/* device name and unit number */
54547884Sroger#endif
54647884Sroger
54747884Sroger    /* the following definitions are common over all platforms */
54823599Smarkm    vm_offset_t bigbuf;		/* buffer that holds the captured image */
54923599Smarkm    int		alloc_pages;	/* number of pages in bigbuf */
55050693Sroger
55146175Sroger    vm_offset_t vbidata;	/* RISC program puts VBI data from the current frame here */
55246175Sroger    vm_offset_t vbibuffer;	/* Circular buffer holding VBI data for the user */
55346175Sroger    int         vbiinsert;      /* Position for next write into circular buffer */
55446175Sroger    int         vbistart;       /* Position of last read from circular buffer */
55546175Sroger    int         vbisize;        /* Number of bytes in the circular buffer */
55650693Sroger    u_long	vbi_sequence_number;	/* sequence number for VBI */
55750693Sroger    int		vbi_read_blocked;	/* user process blocked on read() from /dev/vbi */
55850693Sroger    struct selinfo vbi_select;	/* Data used by select() on /dev/vbi */
55950693Sroger
56050693Sroger
56123599Smarkm    struct proc	*proc;		/* process to receive raised signal */
56223599Smarkm    int		signal;		/* signal to send to process */
56336090Sahasty    int		clr_on_start;	/* clear cap buf on capture start? */
56423599Smarkm#define	METEOR_SIG_MODE_MASK	0xffff0000
56523599Smarkm#define	METEOR_SIG_FIELD_MODE	0x00010000
56623599Smarkm#define	METEOR_SIG_FRAME_MODE	0x00000000
56723599Smarkm    vm_offset_t  dma_prog;
56823599Smarkm    vm_offset_t  odd_dma_prog;
56923599Smarkm    char         dma_prog_loaded;
57023599Smarkm    struct meteor_mem *mem;	/* used to control sync. multi-frame output */
57123599Smarkm    u_long	synch_wait;	/* wait for free buffer before continuing */
57223599Smarkm    short	current;	/* frame number in buffer (1-frames) */
57323599Smarkm    short	rows;		/* number of rows in a frame */
57423599Smarkm    short	cols;		/* number of columns in a frame */
57538706Ssos    int		capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
57638706Ssos    int		capture_area_y_offset; /* captured. The capture area allows for */
57738706Ssos    int		capture_area_x_size;   /* example 320x200 pixels from the centre */
57838706Ssos    int		capture_area_y_size;   /* of the video image to be captured. */
57938706Ssos    char	capture_area_enabled;  /* When TRUE use user's capture area. */
58025329Sfsmp    int		pixfmt;         /* active pixel format (idx into fmt tbl) */
58125329Sfsmp    int		pixfmt_compat;  /* Y/N - in meteor pix fmt compat mode */
58223599Smarkm    u_long	format;		/* frame format rgb, yuv, etc.. */
58323599Smarkm    short	frames;		/* number of frames allocated */
58423599Smarkm    int		frame_size;	/* number of bytes in a frame */
58523599Smarkm    u_long	fifo_errors;	/* number of fifo capture errors since open */
58623599Smarkm    u_long	dma_errors;	/* number of DMA capture errors since open */
58723599Smarkm    u_long	frames_captured;/* number of frames captured since open */
58823599Smarkm    u_long	even_fields_captured; /* number of even fields captured */
58923599Smarkm    u_long	odd_fields_captured; /* number of odd fields captured */
59023599Smarkm    u_long	range_enable;	/* enable range checking ?? */
59123599Smarkm    u_short     capcontrol;     /* reg 0xdc capture control */
59223935Sfsmp    u_short     bktr_cap_ctl;
59329233Smarkm    volatile u_int	flags;
59423599Smarkm#define	METEOR_INITALIZED	0x00000001
59523599Smarkm#define	METEOR_OPEN		0x00000002
59623599Smarkm#define	METEOR_MMAP		0x00000004
59723599Smarkm#define	METEOR_INTR		0x00000008
59823599Smarkm#define	METEOR_READ		0x00000010	/* XXX never gets referenced */
59923599Smarkm#define	METEOR_SINGLE		0x00000020	/* get single frame */
60023599Smarkm#define	METEOR_CONTIN		0x00000040	/* continuously get frames */
60123599Smarkm#define	METEOR_SYNCAP		0x00000080	/* synchronously get frames */
60223599Smarkm#define	METEOR_CAP_MASK		0x000000f0
60323599Smarkm#define	METEOR_NTSC		0x00000100
60423599Smarkm#define	METEOR_PAL		0x00000200
60523599Smarkm#define	METEOR_SECAM		0x00000400
60639041Ssos#define	BROOKTREE_NTSC		0x00000100	/* used in video open() and */
60739041Ssos#define	BROOKTREE_PAL		0x00000200	/* in the kernel config */
60839041Ssos#define	BROOKTREE_SECAM		0x00000400	/* file */
60923599Smarkm#define	METEOR_AUTOMODE		0x00000800
61023599Smarkm#define	METEOR_FORM_MASK	0x00000f00
61123599Smarkm#define	METEOR_DEV0		0x00001000
61223599Smarkm#define	METEOR_DEV1		0x00002000
61323599Smarkm#define	METEOR_DEV2		0x00004000
61423599Smarkm#define	METEOR_DEV3		0x00008000
61523599Smarkm#define METEOR_DEV_SVIDEO	0x00006000
61623599Smarkm#define METEOR_DEV_RGB		0x0000a000
61723599Smarkm#define	METEOR_DEV_MASK		0x0000f000
61823599Smarkm#define	METEOR_RGB16		0x00010000
61923599Smarkm#define	METEOR_RGB24		0x00020000
62023599Smarkm#define	METEOR_YUV_PACKED	0x00040000
62123599Smarkm#define	METEOR_YUV_PLANAR	0x00080000
62223599Smarkm#define	METEOR_WANT_EVEN	0x00100000	/* want even frame */
62323599Smarkm#define	METEOR_WANT_ODD		0x00200000	/* want odd frame */
62423599Smarkm#define	METEOR_WANT_MASK	0x00300000
62523599Smarkm#define METEOR_ONLY_EVEN_FIELDS	0x01000000
62623599Smarkm#define METEOR_ONLY_ODD_FIELDS	0x02000000
62723599Smarkm#define METEOR_ONLY_FIELDS_MASK 0x03000000
62823599Smarkm#define METEOR_YUV_422		0x04000000
62923599Smarkm#define	METEOR_OUTPUT_FMT_MASK	0x040f0000
63023599Smarkm#define	METEOR_WANT_TS		0x08000000	/* time-stamp a frame */
63123599Smarkm#define METEOR_RGB		0x20000000	/* meteor rgb unit */
63223599Smarkm#define METEOR_FIELD_MODE	0x80000000
63346175Sroger    u_char	tflags;				/* Tuner flags (/dev/tuner) */
63424528Sfsmp#define	TUNER_INITALIZED	0x00000001
63524528Sfsmp#define	TUNER_OPEN		0x00000002
63646175Sroger    u_char      vbiflags;			/* VBI flags (/dev/vbi) */
63746175Sroger#define VBI_INITALIZED          0x00000001
63846175Sroger#define VBI_OPEN                0x00000002
63946175Sroger#define VBI_CAPTURE             0x00000004
64023599Smarkm    u_short	fps;		/* frames per second */
64123599Smarkm    struct meteor_video video;
64224246Sfsmp    struct TVTUNER	tuner;
64324528Sfsmp    struct CARDTYPE	card;
64424528Sfsmp    u_char		audio_mux_select;	/* current mode of the audio */
64524528Sfsmp    u_char		audio_mute_state;	/* mute state of the audio */
64624528Sfsmp    u_char		format_params;
64725329Sfsmp    u_long              current_sol;
64825329Sfsmp    u_long              current_col;
64925329Sfsmp    int                 clip_start;
65025329Sfsmp    int                 line_length;
65125329Sfsmp    int                 last_y;
65225329Sfsmp    int                 y;
65325329Sfsmp    int                 y2;
65425329Sfsmp    int                 yclip;
65525329Sfsmp    int                 yclip2;
65625329Sfsmp    int                 max_clip_node;
65725329Sfsmp    bktr_clip_t		clip_list[100];
65859014Sroger    int                 reverse_mute;		/* Swap the GPIO values for Mute and TV Audio */
65936090Sahasty    int                 bt848_tuner;
66036090Sahasty    int                 bt848_card;
66137611Sahasty    u_long              id;
66239841Ssos#define BT848_USE_XTALS 0
66339841Ssos#define BT848_USE_PLL   1
66452593Sroger    int			xtal_pll_mode;	/* Use XTAL or PLL mode for PAL/SECAM */
66552593Sroger    int			remote_control;      /* remote control detected */
66652593Sroger    int			remote_control_addr;   /* remote control i2c address */
66748781Sroger    char		msp_version_string[9]; /* MSP version string 34xxx-xx */
66851694Sroger    int			msp_addr;	       /* MSP i2c address */
66952593Sroger    char		dpl_version_string[9]; /* DPL version string 35xxx-xx */
67052593Sroger    int			dpl_addr;	       /* DPL i2c address */
67159014Sroger    int                 slow_msp_audio;	       /* 0 = use fast MSP3410/3415 programming sequence */
67259014Sroger					       /* 1 = use slow MSP3410/3415 programming sequence */
67343098Sroger
67424528Sfsmp};
67523599Smarkm
67624528Sfsmptypedef struct bktr_softc bktr_reg_t;
67724528Sfsmptypedef struct bktr_softc* bktr_ptr_t;
67836090Sahasty
67936090Sahasty#define Bt848_MAX_SIGN 16
68036090Sahasty
68136090Sahastystruct bt848_card_sig {
68236090Sahasty  int card;
68336090Sahasty  int tuner;
68436090Sahasty  u_char signature[Bt848_MAX_SIGN];
68536090Sahasty};
68659014Sroger
68759014Sroger
68859014Sroger/***********************************************************/
68959014Sroger/* ioctl_cmd_t int on old versions, u_long on new versions */
69059014Sroger/***********************************************************/
69159014Sroger
69259014Sroger#if (__FreeBSD__ == 2)
69359014Srogertypedef int ioctl_cmd_t;
69459014Sroger#endif
69559014Sroger
69659014Sroger#if defined(__FreeBSD__)
69759014Sroger#if (__FreeBSD_version >= 300000)
69859014Srogertypedef u_long ioctl_cmd_t;
69959014Sroger#endif
70059014Sroger#endif
70159014Sroger
70259014Sroger#if defined(__NetBSD__) || defined(__OpenBSD__)
70359014Srogertypedef u_long ioctl_cmd_t;
70459014Sroger#endif
70559014Sroger
70659014Sroger
707