bktr_reg.h revision 59014
1/* 2 * $FreeBSD: head/sys/dev/bktr/bktr_reg.h 59014 2000-04-04 16:54:13Z roger $ 3 * 4 * Copyright (c) 1999 Roger Hardiman 5 * Copyright (c) 1998 Amancio Hasty 6 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Mark Tinguely and Jim Lowe 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 31 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 32 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 */ 36 37#ifdef __FreeBSD__ 38# if (__FreeBSD_version >= 310000) 39# include <sys/bus.h> 40# include "smbus.h" 41# else 42# define NSMBUS 0 /* FreeBSD before 3.1 does not have SMBUS */ 43# endif 44#else 45# define NSMBUS 0 /* Non FreeBSD systems do not have SMBUS */ 46#endif 47 48#ifdef __NetBSD__ 49#include <machine/bus.h> /* struct device */ 50#include <sys/device.h> 51#include <sys/select.h> /* struct selinfo */ 52#endif 53 54#ifndef PCI_LATENCY_TIMER 55#define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 56#endif 57 58/* 59 * Definitions for the Brooktree 848/878 video capture to pci interface. 60 */ 61#define BROOKTREE_848_PCI_ID 0x0350109E 62#define BROOKTREE_849_PCI_ID 0x0351109E 63#define BROOKTREE_878_PCI_ID 0x036E109E 64#define BROOKTREE_879_PCI_ID 0x036F109E 65 66#define BROOKTREE_848 1 67#define BROOKTREE_848A 2 68#define BROOKTREE_849A 3 69#define BROOKTREE_878 4 70#define BROOKTREE_879 5 71 72typedef volatile u_int bregister_t; 73/* 74 * if other persuasion endian, then compiler will probably require that 75 * these next 76 * macros be reversed 77 */ 78#define BTBYTE(what) bregister_t what:8; int :24 79#define BTWORD(what) bregister_t what:16; int: 16 80#define BTLONG(what) bregister_t what:32 81 82struct bt848_registers { 83 BTBYTE (dstatus); /* 0, 1,2,3 */ 84#define BT848_DSTATUS_PRES (1<<7) 85#define BT848_DSTATUS_HLOC (1<<6) 86#define BT848_DSTATUS_FIELD (1<<5) 87#define BT848_DSTATUS_NUML (1<<4) 88#define BT848_DSTATUS_CSEL (1<<3) 89#define BT848_DSTATUS_PLOCK (1<<2) 90#define BT848_DSTATUS_LOF (1<<1) 91#define BT848_DSTATUS_COF (1<<0) 92 BTBYTE (iform); /* 4, 5,6,7 */ 93#define BT848_IFORM_MUXSEL (0x3<<5) 94# define BT848_IFORM_M_MUX1 (0x03<<5) 95# define BT848_IFORM_M_MUX0 (0x02<<5) 96# define BT848_IFORM_M_MUX2 (0x01<<5) 97# define BT848_IFORM_M_MUX3 (0x0) 98# define BT848_IFORM_M_RSVD (0x00<<5) 99#define BT848_IFORM_XTSEL (0x3<<3) 100# define BT848_IFORM_X_AUTO (0x03<<3) 101# define BT848_IFORM_X_XT1 (0x02<<3) 102# define BT848_IFORM_X_XT0 (0x01<<3) 103# define BT848_IFORM_X_RSVD (0x00<<3) 104 BTBYTE (tdec); /* 8, 9,a,b */ 105 BTBYTE (e_crop); /* c, d,e,f */ 106 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 107 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 108 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 109 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 110 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 111 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 112 BTBYTE (bright); /* 28, 29,2a,2b */ 113 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 114#define BT848_E_CONTROL_LNOTCH (1<<7) 115#define BT848_E_CONTROL_COMP (1<<6) 116#define BT848_E_CONTROL_LDEC (1<<5) 117#define BT848_E_CONTROL_CBSENSE (1<<4) 118#define BT848_E_CONTROL_RSVD (1<<3) 119#define BT848_E_CONTROL_CON_MSB (1<<2) 120#define BT848_E_CONTROL_SAT_U_MSB (1<<1) 121#define BT848_E_CONTROL_SAT_V_MSB (1<<0) 122 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 123 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 124 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 125 BTBYTE (hue); /* 3c, 3d,3e,3f */ 126 BTBYTE (e_scloop); /* 40, 41,42,43 */ 127#define BT848_E_SCLOOP_RSVD1 (1<<7) 128#define BT848_E_SCLOOP_CAGC (1<<6) 129#define BT848_E_SCLOOP_CKILL (1<<5) 130#define BT848_E_SCLOOP_HFILT (0x3<<3) 131# define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 132# define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 133# define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 134# define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 135#define BT848_E_SCLOOP_RSVD0 (0x7<<0) 136 int :32; /* 44, 45,46,47 */ 137 BTBYTE (oform); /* 48, 49,4a,4b */ 138 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 139 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 140 BTBYTE (test); /* 54, 55,56,57 */ 141 int :32; /* 58, 59,5a,5b */ 142 int :32; /* 5c, 5d,5e,5f */ 143 BTLONG (adelay); /* 60, 61,62,63 */ 144 BTBYTE (bdelay); /* 64, 65,66,67 */ 145 BTBYTE (adc); /* 68, 69,6a,6b */ 146#define BT848_ADC_RESERVED (0x80) /* required pattern */ 147#define BT848_ADC_SYNC_T (1<<5) 148#define BT848_ADC_AGC_EN (1<<4) 149#define BT848_ADC_CLK_SLEEP (1<<3) 150#define BT848_ADC_Y_SLEEP (1<<2) 151#define BT848_ADC_C_SLEEP (1<<1) 152#define BT848_ADC_CRUSH (1<<0) 153 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 154 int :32; /* 70, 71,72,73 */ 155 int :32; /* 74, 75,76,77 */ 156 int :32; /* 78, 79,7a,7b */ 157 BTLONG (sreset); /* 7c, 7d,7e,7f */ 158 u_char filler1[0x84-0x80]; 159 BTBYTE (tgctrl); /* 84, 85,86,87 */ 160#define BT848_TGCTRL_TGCKI (3<<3) 161#define BT848_TGCTRL_TGCKI_XTAL (0<<3) 162#define BT848_TGCTRL_TGCKI_PLL (1<<3) 163#define BT848_TGCTRL_TGCKI_GPCLK (2<<3) 164#define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3) 165 u_char filler[0x8c-0x88]; 166 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 167 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 168 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 169 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 170 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 171 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 172 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 173 int :32; /* a8, a9,aa,ab */ 174 BTBYTE (o_control); /* ac, ad,ae,af */ 175#define BT848_O_CONTROL_LNOTCH (1<<7) 176#define BT848_O_CONTROL_COMP (1<<6) 177#define BT848_O_CONTROL_LDEC (1<<5) 178#define BT848_O_CONTROL_CBSENSE (1<<4) 179#define BT848_O_CONTROL_RSVD (1<<3) 180#define BT848_O_CONTROL_CON_MSB (1<<2) 181#define BT848_O_CONTROL_SAT_U_MSB (1<<1) 182#define BT848_O_CONTROL_SAT_V_MSB (1<<0) 183 u_char fillter4[16]; 184 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 185#define BT848_O_SCLOOP_RSVD1 (1<<7) 186#define BT848_O_SCLOOP_CAGC (1<<6) 187#define BT848_O_SCLOOP_CKILL (1<<5) 188#define BT848_O_SCLOOP_HFILT (0x3<<3) 189#define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 190#define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 191#define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 192#define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 193#define BT848_O_SCLOOP_RSVD0 (0x7<<0) 194 int :32; /* c4, c5,c6,c7 */ 195 int :32; /* c8, c9,ca,cb */ 196 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 197 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 198 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 199 bregister_t color_ctl_swap :4; /* d8 */ 200#define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 201#define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 202#define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 203#define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 204 bregister_t color_ctl_gamma :1; 205 bregister_t color_ctl_rgb_ded :1; 206 bregister_t color_ctl_color_bars :1; 207 bregister_t color_ctl_ext_frmrate :1; 208#define BT848_COLOR_CTL_GAMMA (1<<4) 209#define BT848_COLOR_CTL_RGB_DED (1<<5) 210#define BT848_COLOR_CTL_COLOR_BARS (1<<6) 211#define BT848_COLOR_CTL_EXT_FRMRATE (1<<7) 212 int :24; /* d9,da,db */ 213 BTBYTE (cap_ctl); /* dc, dd,de,df */ 214#define BT848_CAP_CTL_DITH_FRAME (1<<4) 215#define BT848_CAP_CTL_VBI_ODD (1<<3) 216#define BT848_CAP_CTL_VBI_EVEN (1<<2) 217#define BT848_CAP_CTL_ODD (1<<1) 218#define BT848_CAP_CTL_EVEN (1<<0) 219 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 220 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 221 int :32; /* e8, e9,ea,eb */ 222 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 223 BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */ 224 BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */ 225 BTBYTE (pll_f_xci); /* f8, f9,fa,fb */ 226#define BT848_PLL_F_C (1<<6) 227#define BT848_PLL_F_X (1<<7) 228 u_char filler2[0x100-0xfc]; 229 BTLONG (int_stat); /* 100, 101,102,103 */ 230 BTLONG (int_mask); /* 104, 105,106,107 */ 231#define BT848_INT_RISCS (0xf<<28) 232#define BT848_INT_RISC_EN (1<<27) 233#define BT848_INT_RACK (1<<25) 234#define BT848_INT_FIELD (1<<24) 235#define BT848_INT_MYSTERYBIT (1<<23) 236#define BT848_INT_SCERR (1<<19) 237#define BT848_INT_OCERR (1<<18) 238#define BT848_INT_PABORT (1<<17) 239#define BT848_INT_RIPERR (1<<16) 240#define BT848_INT_PPERR (1<<15) 241#define BT848_INT_FDSR (1<<14) 242#define BT848_INT_FTRGT (1<<13) 243#define BT848_INT_FBUS (1<<12) 244#define BT848_INT_RISCI (1<<11) 245#define BT848_INT_GPINT (1<<9) 246#define BT848_INT_I2CDONE (1<<8) 247#define BT848_INT_RSV1 (1<<7) 248#define BT848_INT_RSV0 (1<<6) 249#define BT848_INT_VPRES (1<<5) 250#define BT848_INT_HLOCK (1<<4) 251#define BT848_INT_OFLOW (1<<3) 252#define BT848_INT_HSYNC (1<<2) 253#define BT848_INT_VSYNC (1<<1) 254#define BT848_INT_FMTCHG (1<<0) 255 int :32; /* 108, 109,10a,10b */ 256 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 257#define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 258#define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 259#define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 260#define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 261#define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 262#define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 263#define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 264#define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 265#define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 266#define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 267#define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 268#define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 269#define BT848_DMA_CTL_RISC_EN (1<<1) 270#define BT848_DMA_CTL_FIFO_EN (1<<0) 271 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 272#define BT848_DATA_CTL_I2CDIV (0xf<<4) 273#define BT848_DATA_CTL_I2CSYNC (1<<3) 274#define BT848_DATA_CTL_I2CW3B (1<<2) 275#define BT848_DATA_CTL_I2CSCL (1<<1) 276#define BT848_DATA_CTL_I2CSDA (1<<0) 277 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 278 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 279 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 280 BTLONG (risc_count); /* 120, 121,122,123 */ 281 u_char filler3[0x200-0x124]; 282 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 283}; 284 285 286#define BKTR_DSTATUS 0x000 287#define BKTR_IFORM 0x004 288#define BKTR_TDEC 0x008 289#define BKTR_E_CROP 0x00C 290#define BKTR_O_CROP 0x08C 291#define BKTR_E_VDELAY_LO 0x010 292#define BKTR_O_VDELAY_LO 0x090 293#define BKTR_E_VACTIVE_LO 0x014 294#define BKTR_O_VACTIVE_LO 0x094 295#define BKTR_E_DELAY_LO 0x018 296#define BKTR_O_DELAY_LO 0x098 297#define BKTR_E_HACTIVE_LO 0x01C 298#define BKTR_O_HACTIVE_LO 0x09C 299#define BKTR_E_HSCALE_HI 0x020 300#define BKTR_O_HSCALE_HI 0x0A0 301#define BKTR_E_HSCALE_LO 0x024 302#define BKTR_O_HSCALE_LO 0x0A4 303#define BKTR_BRIGHT 0x028 304#define BKTR_E_CONTROL 0x02C 305#define BKTR_O_CONTROL 0x0AC 306#define BKTR_CONTRAST_LO 0x030 307#define BKTR_SAT_U_LO 0x034 308#define BKTR_SAT_V_LO 0x038 309#define BKTR_HUE 0x03C 310#define BKTR_E_SCLOOP 0x040 311#define BKTR_O_SCLOOP 0x0C0 312#define BKTR_OFORM 0x048 313#define BKTR_E_VSCALE_HI 0x04C 314#define BKTR_O_VSCALE_HI 0x0CC 315#define BKTR_E_VSCALE_LO 0x050 316#define BKTR_O_VSCALE_LO 0x0D0 317#define BKTR_TEST 0x054 318#define BKTR_ADELAY 0x060 319#define BKTR_BDELAY 0x064 320#define BKTR_ADC 0x068 321#define BKTR_E_VTC 0x06C 322#define BKTR_O_VTC 0x0EC 323#define BKTR_SRESET 0x07C 324#define BKTR_COLOR_FMT 0x0D4 325#define BKTR_COLOR_CTL 0x0D8 326#define BKTR_CAP_CTL 0x0DC 327#define BKTR_VBI_PACK_SIZE 0x0E0 328#define BKTR_VBI_PACK_DEL 0x0E4 329#define BKTR_INT_STAT 0x100 330#define BKTR_INT_MASK 0x104 331#define BKTR_RISC_COUNT 0x120 332#define BKTR_RISC_STRT_ADD 0x114 333#define BKTR_GPIO_DMA_CTL 0x10C 334#define BKTR_GPIO_OUT_EN 0x118 335#define BKTR_GPIO_REG_INP 0x11C 336#define BKTR_GPIO_DATA 0x200 337#define BKTR_I2C_DATA_CTL 0x110 338#define BKTR_TGCTRL 0x084 339#define BKTR_PLL_F_LO 0x0F0 340#define BKTR_PLL_F_HI 0x0F4 341#define BKTR_PLL_F_XCI 0x0F8 342 343/* 344 * device support for onboard tv tuners 345 */ 346 347/* description of the LOGICAL tuner */ 348struct TVTUNER { 349 int frequency; 350 u_char chnlset; 351 u_char channel; 352 u_char band; 353 u_char afc; 354 u_char radio_mode; /* current mode of the radio mode */ 355}; 356 357/* description of the PHYSICAL tuner */ 358struct TUNER { 359 char* name; 360 u_char type; 361 u_char pllControl[4]; 362 u_char bandLimits[ 2 ]; 363 u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV 364 ** bands. Last for radio 365 ** band (0x00=NoRadio). 366 */ 367 368}; 369 370/* description of the card */ 371#define EEPROMBLOCKSIZE 32 372struct CARDTYPE { 373 unsigned int card_id; /* card id (from #define's) */ 374 char* name; 375 const struct TUNER* tuner; /* Tuner details */ 376 u_char tuner_pllAddr; /* Tuner i2c address */ 377 u_char dbx; /* Has DBX chip? */ 378 u_char msp3400c; /* Has msp3400c chip? */ 379 u_char dpl3518a; /* Has dpl3518a chip? */ 380 u_char eepromAddr; 381 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */ 382 u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */ 383 /* int/unused (radio) */ 384 /* mute, present */ 385 u_int gpio_mux_bits; /* GPIO mask for audio mux */ 386}; 387 388struct format_params { 389 /* Total lines, lines before image, image lines */ 390 int vtotal, vdelay, vactive; 391 /* Total unscaled horizontal pixels, pixels before image, image pixels */ 392 int htotal, hdelay, hactive; 393 /* Scaled horizontal image pixels, Total Scaled horizontal pixels */ 394 int scaled_hactive, scaled_htotal; 395 /* frame rate . for ntsc is 30 frames per second */ 396 int frame_rate; 397 /* A-delay and B-delay */ 398 u_char adelay, bdelay; 399 /* Iform XTSEL value */ 400 int iform_xtsel; 401 /* VBI number of lines per field, and number of samples per line */ 402 int vbi_num_lines, vbi_num_samples; 403}; 404 405#if ((defined(__FreeBSD__)) && (NSMBUS > 0)) 406struct bktr_i2c_softc { 407 device_t iicbus; 408 device_t smbus; 409}; 410#endif 411 412 413/* Bt848/878 register access 414 * The registers can either be access via a memory mapped structure 415 * or accessed via bus_space. 416 * bus_0pace access allows cross platform support, where as the 417 * memory mapped structure method only works on 32 bit processors 418 * with the right type of endianness. 419 */ 420#if defined(__NetBSD__) || ( defined(__FreeBSD__) && (__FreeBSD_version >=300000) ) 421#define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset)) 422#define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset)) 423#define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset)) 424#define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value)) 425#define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value)) 426#define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value)) 427#else 428#define INB(bktr,offset) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) 429#define INW(bktr,offset) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) 430#define INL(bktr,offset) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) 431#define OUTB(bktr,offset,value) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value) 432#define OUTW(bktr,offset,value) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value) 433#define OUTL(bktr,offset,value) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) = (value) 434#endif 435 436 437typedef struct bktr_clip bktr_clip_t; 438 439/* 440 * NetBSD >= 1.3H uses vaddr_t instead of vm_offset_t 441 */ 442#if defined(__NetBSD__) && __NetBSD_Version__ >= 103080000 443typedef vaddr_t vm_offset_t; 444#endif 445 446/* 447 * BrookTree 848 info structure, one per bt848 card installed. 448 */ 449struct bktr_softc { 450 451#if defined (__bsdi__) 452 struct device bktr_dev; /* base device */ 453 struct isadev bktr_id; /* ISA device */ 454 struct intrhand bktr_ih; /* interrupt vectoring */ 455 #define pcici_t pci_devaddr_t 456#endif 457 458#if defined(__NetBSD__) 459 struct device bktr_dev; /* base device */ 460 bus_dma_tag_t dmat; /* DMA tag */ 461 bus_space_tag_t memt; 462 bus_space_handle_t memh; 463 bus_size_t obmemsz; /* size of en card (bytes) */ 464 void *ih; 465 bus_dmamap_t dm_prog; 466 bus_dmamap_t dm_oprog; 467 bus_dmamap_t dm_mem; 468 bus_dmamap_t dm_vbidata; 469 bus_dmamap_t dm_vbibuffer; 470#if __NetBSD_Version__ >= 103080000 471 paddr_t phys_base; /* Bt848 register physical address */ 472#else 473 vm_offset_t phys_base; /* Bt848 register physical address */ 474#endif 475#endif 476 477#if defined(__OpenBSD__) 478 struct device bktr_dev; /* base device */ 479 bus_dma_tag_t dmat; /* DMA tag */ 480 bus_space_tag_t memt; 481 bus_space_handle_t memh; 482 bus_size_t obmemsz; /* size of en card (bytes) */ 483 void *ih; 484 bus_dmamap_t dm_prog; 485 bus_dmamap_t dm_oprog; 486 bus_dmamap_t dm_mem; 487 bus_dmamap_t dm_vbidata; 488 bus_dmamap_t dm_vbibuffer; 489 size_t dm_mapsize; 490 pci_chipset_tag_t pc; /* Opaque PCI chipset tag */ 491 pcitag_t tag; /* PCI tag, for doing PCI commands */ 492 vm_offset_t phys_base; /* Bt848 register physical address */ 493#endif 494 495#if defined (__FreeBSD__) 496 #if (__FreeBSD_version < 400000) 497 vm_offset_t phys_base; /* 2.x Bt848 register physical address */ 498 pcici_t tag; /* 2.x PCI tag, for doing PCI commands */ 499 #endif 500 #if (__FreeBSD_version >= 400000) 501 struct resource *res_mem; /* 4.x resource descriptor for registers */ 502 struct resource *res_irq; /* 4.x resource descriptor for interrupt */ 503 void *res_ih; /* 4.x newbus interrupt handler cookie */ 504 #endif 505 #if (__FreeBSD_version >= 310000) 506 bus_space_tag_t memt; /* Bus space register access functions */ 507 bus_space_handle_t memh; /* Bus space register access functions */ 508 bus_size_t obmemsz;/* Size of card (bytes) */ 509 #endif 510 #if (NSMBUS > 0) 511 struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */ 512 #endif 513#endif 514 515 /* the following definitions are common over all platforms */ 516 vm_offset_t bigbuf; /* buffer that holds the captured image */ 517 int alloc_pages; /* number of pages in bigbuf */ 518 519 vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */ 520 vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */ 521 int vbiinsert; /* Position for next write into circular buffer */ 522 int vbistart; /* Position of last read from circular buffer */ 523 int vbisize; /* Number of bytes in the circular buffer */ 524 u_long vbi_sequence_number; /* sequence number for VBI */ 525 int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */ 526 struct selinfo vbi_select; /* Data used by select() on /dev/vbi */ 527 528 529 struct proc *proc; /* process to receive raised signal */ 530 int signal; /* signal to send to process */ 531 int clr_on_start; /* clear cap buf on capture start? */ 532#define METEOR_SIG_MODE_MASK 0xffff0000 533#define METEOR_SIG_FIELD_MODE 0x00010000 534#define METEOR_SIG_FRAME_MODE 0x00000000 535 vm_offset_t dma_prog; 536 vm_offset_t odd_dma_prog; 537 char dma_prog_loaded; 538 struct meteor_mem *mem; /* used to control sync. multi-frame output */ 539 u_long synch_wait; /* wait for free buffer before continuing */ 540 short current; /* frame number in buffer (1-frames) */ 541 short rows; /* number of rows in a frame */ 542 short cols; /* number of columns in a frame */ 543 int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */ 544 int capture_area_y_offset; /* captured. The capture area allows for */ 545 int capture_area_x_size; /* example 320x200 pixels from the centre */ 546 int capture_area_y_size; /* of the video image to be captured. */ 547 char capture_area_enabled; /* When TRUE use user's capture area. */ 548 int pixfmt; /* active pixel format (idx into fmt tbl) */ 549 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */ 550 u_long format; /* frame format rgb, yuv, etc.. */ 551 short frames; /* number of frames allocated */ 552 int frame_size; /* number of bytes in a frame */ 553 u_long fifo_errors; /* number of fifo capture errors since open */ 554 u_long dma_errors; /* number of DMA capture errors since open */ 555 u_long frames_captured;/* number of frames captured since open */ 556 u_long even_fields_captured; /* number of even fields captured */ 557 u_long odd_fields_captured; /* number of odd fields captured */ 558 u_long range_enable; /* enable range checking ?? */ 559 u_short capcontrol; /* reg 0xdc capture control */ 560 u_short bktr_cap_ctl; 561 volatile u_int flags; 562#define METEOR_INITALIZED 0x00000001 563#define METEOR_OPEN 0x00000002 564#define METEOR_MMAP 0x00000004 565#define METEOR_INTR 0x00000008 566#define METEOR_READ 0x00000010 /* XXX never gets referenced */ 567#define METEOR_SINGLE 0x00000020 /* get single frame */ 568#define METEOR_CONTIN 0x00000040 /* continuously get frames */ 569#define METEOR_SYNCAP 0x00000080 /* synchronously get frames */ 570#define METEOR_CAP_MASK 0x000000f0 571#define METEOR_NTSC 0x00000100 572#define METEOR_PAL 0x00000200 573#define METEOR_SECAM 0x00000400 574#define BROOKTREE_NTSC 0x00000100 /* used in video open() and */ 575#define BROOKTREE_PAL 0x00000200 /* in the kernel config */ 576#define BROOKTREE_SECAM 0x00000400 /* file */ 577#define METEOR_AUTOMODE 0x00000800 578#define METEOR_FORM_MASK 0x00000f00 579#define METEOR_DEV0 0x00001000 580#define METEOR_DEV1 0x00002000 581#define METEOR_DEV2 0x00004000 582#define METEOR_DEV3 0x00008000 583#define METEOR_DEV_SVIDEO 0x00006000 584#define METEOR_DEV_RGB 0x0000a000 585#define METEOR_DEV_MASK 0x0000f000 586#define METEOR_RGB16 0x00010000 587#define METEOR_RGB24 0x00020000 588#define METEOR_YUV_PACKED 0x00040000 589#define METEOR_YUV_PLANAR 0x00080000 590#define METEOR_WANT_EVEN 0x00100000 /* want even frame */ 591#define METEOR_WANT_ODD 0x00200000 /* want odd frame */ 592#define METEOR_WANT_MASK 0x00300000 593#define METEOR_ONLY_EVEN_FIELDS 0x01000000 594#define METEOR_ONLY_ODD_FIELDS 0x02000000 595#define METEOR_ONLY_FIELDS_MASK 0x03000000 596#define METEOR_YUV_422 0x04000000 597#define METEOR_OUTPUT_FMT_MASK 0x040f0000 598#define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */ 599#define METEOR_RGB 0x20000000 /* meteor rgb unit */ 600#define METEOR_FIELD_MODE 0x80000000 601 u_char tflags; /* Tuner flags (/dev/tuner) */ 602#define TUNER_INITALIZED 0x00000001 603#define TUNER_OPEN 0x00000002 604 u_char vbiflags; /* VBI flags (/dev/vbi) */ 605#define VBI_INITALIZED 0x00000001 606#define VBI_OPEN 0x00000002 607#define VBI_CAPTURE 0x00000004 608 u_short fps; /* frames per second */ 609 struct meteor_video video; 610 struct TVTUNER tuner; 611 struct CARDTYPE card; 612 u_char audio_mux_select; /* current mode of the audio */ 613 u_char audio_mute_state; /* mute state of the audio */ 614 u_char format_params; 615 u_long current_sol; 616 u_long current_col; 617 int clip_start; 618 int line_length; 619 int last_y; 620 int y; 621 int y2; 622 int yclip; 623 int yclip2; 624 int max_clip_node; 625 bktr_clip_t clip_list[100]; 626 int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */ 627 int bt848_tuner; 628 int bt848_card; 629 u_long id; 630#define BT848_USE_XTALS 0 631#define BT848_USE_PLL 1 632 int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */ 633 int remote_control; /* remote control detected */ 634 int remote_control_addr; /* remote control i2c address */ 635 char msp_version_string[9]; /* MSP version string 34xxx-xx */ 636 int msp_addr; /* MSP i2c address */ 637 char dpl_version_string[9]; /* DPL version string 35xxx-xx */ 638 int dpl_addr; /* DPL i2c address */ 639 int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */ 640 /* 1 = use slow MSP3410/3415 programming sequence */ 641 642}; 643 644typedef struct bktr_softc bktr_reg_t; 645typedef struct bktr_softc* bktr_ptr_t; 646 647#define Bt848_MAX_SIGN 16 648 649struct bt848_card_sig { 650 int card; 651 int tuner; 652 u_char signature[Bt848_MAX_SIGN]; 653}; 654 655 656/***********************************************************/ 657/* ioctl_cmd_t int on old versions, u_long on new versions */ 658/***********************************************************/ 659 660#if (__FreeBSD__ == 2) 661typedef int ioctl_cmd_t; 662#endif 663 664#if defined(__FreeBSD__) 665#if (__FreeBSD_version >= 300000) 666typedef u_long ioctl_cmd_t; 667#endif 668#endif 669 670#if defined(__NetBSD__) || defined(__OpenBSD__) 671typedef u_long ioctl_cmd_t; 672#endif 673 674 675