bktr_reg.h revision 47492
1/*
2 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Mark Tinguely and Jim Lowe
16 * 4. The name of the author may not be used to endorse or promote products
17 *    derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
28 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $Id: brktree_reg.h,v 1.27 1999/05/10 10:08:50 roger Exp $
32 */
33#ifndef PCI_LATENCY_TIMER
34#define	PCI_LATENCY_TIMER		0x0c	/* pci timer register */
35#endif
36
37/*
38 * Definitions for the Philips SAA7116 digital video to pci interface.
39 */
40#define BROOKTREE_848_PCI_ID            0x0350109E
41#define BROOKTREE_849_PCI_ID            0x0351109E
42#define BROOKTREE_878_PCI_ID            0x036E109E
43#define BROOKTREE_879_PCI_ID            0x036F109E
44
45#define BROOKTREE_848                   1
46#define BROOKTREE_848A                  2
47#define BROOKTREE_849A                  3
48#define BROOKTREE_878                   4
49#define BROOKTREE_879                   5
50
51typedef volatile u_int 	bregister_t;
52/*
53 * if other persuasion endian, then compiler will probably require that
54 * these next
55 * macros be reversed
56 */
57#define	BTBYTE(what)	bregister_t  what:8; int :24
58#define	BTWORD(what)	bregister_t  what:16; int: 16
59#define BTLONG(what)	bregister_t  what:32
60
61struct bt848_registers {
62    BTBYTE (dstatus);		/* 0, 1,2,3 */
63#define BT848_DSTATUS_PRES		(1<<7)
64#define BT848_DSTATUS_HLOC		(1<<6)
65#define BT848_DSTATUS_FIELD		(1<<5)
66#define BT848_DSTATUS_NUML		(1<<4)
67#define BT848_DSTATUS_CSEL		(1<<3)
68#define BT848_DSTATUS_PLOCK		(1<<2)
69#define BT848_DSTATUS_LOF		(1<<1)
70#define BT848_DSTATUS_COF		(1<<0)
71    BTBYTE (iform);		/* 4, 5,6,7 */
72#define BT848_IFORM_MUXSEL		(0x3<<5)
73# define BT848_IFORM_M_MUX1		(0x03<<5)
74# define BT848_IFORM_M_MUX0		(0x02<<5)
75# define BT848_IFORM_M_MUX2		(0x01<<5)
76# define BT848_IFORM_M_MUX3		(0x0)
77# define BT848_IFORM_M_RSVD		(0x00<<5)
78#define BT848_IFORM_XTSEL		(0x3<<3)
79# define BT848_IFORM_X_AUTO		(0x03<<3)
80# define BT848_IFORM_X_XT1		(0x02<<3)
81# define BT848_IFORM_X_XT0		(0x01<<3)
82# define BT848_IFORM_X_RSVD		(0x00<<3)
83    BTBYTE (tdec);		/* 8, 9,a,b */
84    BTBYTE (e_crop);		/* c, d,e,f */
85    BTBYTE (e_vdelay_lo);	/* 10, 11,12,13 */
86    BTBYTE (e_vactive_lo);	/* 14, 15,16,17 */
87    BTBYTE (e_delay_lo);	/* 18, 19,1a,1b */
88    BTBYTE (e_hactive_lo);	/* 1c, 1d,1e,1f */
89    BTBYTE (e_hscale_hi);	/* 20, 21,22,23 */
90    BTBYTE (e_hscale_lo);	/* 24, 25,26,27 */
91    BTBYTE (bright);		/* 28, 29,2a,2b */
92    BTBYTE (e_control);		/* 2c, 2d,2e,2f */
93#define BT848_E_CONTROL_LNOTCH		(1<<7)
94#define BT848_E_CONTROL_COMP		(1<<6)
95#define BT848_E_CONTROL_LDEC		(1<<5)
96#define BT848_E_CONTROL_CBSENSE		(1<<4)
97#define BT848_E_CONTROL_RSVD		(1<<3)
98#define BT848_E_CONTROL_CON_MSB		(1<<2)
99#define BT848_E_CONTROL_SAT_U_MSB	(1<<1)
100#define BT848_E_CONTROL_SAT_V_MSB	(1<<0)
101    BTBYTE (contrast_lo);	/* 30, 31,32,33 */
102    BTBYTE (sat_u_lo);		/* 34, 35,36,37 */
103    BTBYTE (sat_v_lo);		/* 38, 39,3a,3b */
104    BTBYTE (hue);		/* 3c, 3d,3e,3f */
105    BTBYTE (e_scloop);		/* 40, 41,42,43 */
106#define BT848_E_SCLOOP_RSVD1		(1<<7)
107#define BT848_E_SCLOOP_CAGC		(1<<6)
108#define BT848_E_SCLOOP_CKILL		(1<<5)
109#define BT848_E_SCLOOP_HFILT		(0x3<<3)
110# define BT848_E_SCLOOP_HFILT_ICON	(0x3<<3)
111# define BT848_E_SCLOOP_HFILT_QCIF	(0x2<<3)
112# define BT848_E_SCLOOP_HFILT_CIF	(0x1<<3)
113# define BT848_E_SCLOOP_HFILT_AUTO	(0x0<<3)
114#define BT848_E_SCLOOP_RSVD0		(0x7<<0)
115    int		:32;		/* 44, 45,46,47 */
116    BTBYTE (oform);		/* 48, 49,4a,4b */
117    BTBYTE (e_vscale_hi);	/* 4c, 4d,4e,4f */
118    BTBYTE (e_vscale_lo);	/* 50, 51,52,53 */
119    BTBYTE (test);		/* 54, 55,56,57 */
120    int		:32;		/* 58, 59,5a,5b */
121    int		:32;		/* 5c, 5d,5e,5f */
122    BTLONG (adelay);		/* 60, 61,62,63 */
123    BTBYTE (bdelay);		/* 64, 65,66,67 */
124    BTBYTE (adc);		/* 68, 69,6a,6b */
125#define BT848_ADC_RESERVED		(0x80)	/* required pattern */
126#define BT848_ADC_SYNC_T		(1<<5)
127#define BT848_ADC_AGC_EN		(1<<4)
128#define BT848_ADC_CLK_SLEEP		(1<<3)
129#define BT848_ADC_Y_SLEEP		(1<<2)
130#define BT848_ADC_C_SLEEP		(1<<1)
131#define BT848_ADC_CRUSH			(1<<0)
132    BTBYTE (e_vtc);		/* 6c, 6d,6e,6f */
133    int		:32;		/* 70, 71,72,73 */
134    int 	:32;		/* 74, 75,76,77 */
135    int		:32;		/* 78, 79,7a,7b */
136    BTLONG (sreset);		/* 7c, 7d,7e,7f */
137    u_char 	filler1[0x84-0x80];
138    BTBYTE (tgctrl);		/* 84, 85,86,87 */
139#define BT848_TGCTRL_TGCKI		(3<<3)
140#define BT848_TGCTRL_TGCKI_XTAL		(0<<3)
141#define BT848_TGCTRL_TGCKI_PLL		(1<<3)
142#define BT848_TGCTRL_TGCKI_GPCLK	(2<<3)
143#define BT848_TGCTRL_TGCKI_GPCLK_I	(3<<3)
144    u_char 	filler[0x8c-0x88];
145    BTBYTE (o_crop);		/* 8c, 8d,8e,8f */
146    BTBYTE (o_vdelay_lo);	/* 90, 91,92,93 */
147    BTBYTE (o_vactive_lo);	/* 94, 95,96,97 */
148    BTBYTE (o_delay_lo);	/* 98, 99,9a,9b */
149    BTBYTE (o_hactive_lo);	/* 9c, 9d,9e,9f */
150    BTBYTE (o_hscale_hi);	/* a0, a1,a2,a3 */
151    BTBYTE (o_hscale_lo);	/* a4, a5,a6,a7 */
152    int		:32;		/* a8, a9,aa,ab */
153    BTBYTE (o_control);		/* ac, ad,ae,af */
154#define BT848_O_CONTROL_LNOTCH		(1<<7)
155#define BT848_O_CONTROL_COMP		(1<<6)
156#define BT848_O_CONTROL_LDEC		(1<<5)
157#define BT848_O_CONTROL_CBSENSE		(1<<4)
158#define BT848_O_CONTROL_RSVD		(1<<3)
159#define BT848_O_CONTROL_CON_MSB		(1<<2)
160#define BT848_O_CONTROL_SAT_U_MSB	(1<<1)
161#define BT848_O_CONTROL_SAT_V_MSB	(1<<0)
162    u_char	fillter1[16];
163    BTBYTE (o_scloop);		/* c0, c1,c2,c3 */
164#define BT848_O_SCLOOP_RSVD1		(1<<7)
165#define BT848_O_SCLOOP_CAGC		(1<<6)
166#define BT848_O_SCLOOP_CKILL		(1<<5)
167#define BT848_O_SCLOOP_HFILT		(0x3<<3)
168#define BT848_O_SCLOOP_HFILT_ICON	(0x3<<3)
169#define BT848_O_SCLOOP_HFILT_QCIF	(0x2<<3)
170#define BT848_O_SCLOOP_HFILT_CIF	(0x1<<3)
171#define BT848_O_SCLOOP_HFILT_AUTO	(0x0<<3)
172#define BT848_O_SCLOOP_RSVD0		(0x7<<0)
173    int		:32;		/* c4, c5,c6,c7 */
174    int		:32;		/* c8, c9,ca,cb */
175    BTBYTE (o_vscale_hi);	/* cc, cd,ce,cf */
176    BTBYTE (o_vscale_lo);	/* d0, d1,d2,d3 */
177    BTBYTE (color_fmt);		/* d4, d5,d6,d7 */
178    bregister_t color_ctl_swap		:4; /* d8 */
179#define BT848_COLOR_CTL_WSWAP_ODD	(1<<3)
180#define BT848_COLOR_CTL_WSWAP_EVEN	(1<<2)
181#define BT848_COLOR_CTL_BSWAP_ODD	(1<<1)
182#define BT848_COLOR_CTL_BSWAP_EVEN	(1<<0)
183    bregister_t color_ctl_gamma		:1;
184    bregister_t color_ctl_rgb_ded	:1;
185    bregister_t color_ctl_color_bars	:1;
186    bregister_t color_ctl_ext_frmrate	:1;
187    int		:24;		/* d9,da,db */
188    BTBYTE (cap_ctl);		/* dc, dd,de,df */
189#define BT848_CAP_CTL_DITH_FRAME	(1<<4)
190#define BT848_CAP_CTL_VBI_ODD		(1<<3)
191#define BT848_CAP_CTL_VBI_EVEN		(1<<2)
192#define BT848_CAP_CTL_ODD		(1<<1)
193#define BT848_CAP_CTL_EVEN		(1<<0)
194    BTBYTE (vbi_pack_size);	/* e0, e1,e2,e3 */
195    BTBYTE (vbi_pack_del);	/* e4, e5,e6,e7 */
196    int		:32;		/* e8, e9,ea,eb */
197    BTBYTE (o_vtc);		/* ec, ed,ee,ef */
198    BTBYTE (pll_f_lo);		/* f0, f1,f2,f3 */
199    BTBYTE (pll_f_hi);		/* f4, f5,f6,f7 */
200    BTBYTE (pll_f_xci);		/* f8, f9,fa,fb */
201#define BT848_PLL_F_C			(1<<6)
202#define BT848_PLL_F_X			(1<<7)
203    u_char	filler2[0x100-0xfc];
204    BTLONG (int_stat);		/* 100, 101,102,103 */
205    BTLONG (int_mask);		/* 104, 105,106,107 */
206#define BT848_INT_RISCS			(0xf<<28)
207#define BT848_INT_RISC_EN		(1<<27)
208#define BT848_INT_RACK			(1<<25)
209#define BT848_INT_FIELD			(1<<24)
210#define BT848_INT_MYSTERYBIT		(1<<23)
211#define BT848_INT_SCERR			(1<<19)
212#define BT848_INT_OCERR			(1<<18)
213#define BT848_INT_PABORT		(1<<17)
214#define BT848_INT_RIPERR		(1<<16)
215#define BT848_INT_PPERR			(1<<15)
216#define BT848_INT_FDSR			(1<<14)
217#define BT848_INT_FTRGT			(1<<13)
218#define BT848_INT_FBUS			(1<<12)
219#define BT848_INT_RISCI			(1<<11)
220#define BT848_INT_GPINT			(1<<9)
221#define BT848_INT_I2CDONE		(1<<8)
222#define BT848_INT_RSV1			(1<<7)
223#define BT848_INT_RSV0			(1<<6)
224#define BT848_INT_VPRES			(1<<5)
225#define BT848_INT_HLOCK			(1<<4)
226#define BT848_INT_OFLOW			(1<<3)
227#define BT848_INT_HSYNC			(1<<2)
228#define BT848_INT_VSYNC			(1<<1)
229#define BT848_INT_FMTCHG		(1<<0)
230    int		:32;		/* 108, 109,10a,10b */
231    BTWORD (gpio_dma_ctl);	/* 10c, 10d,10e,10f */
232#define BT848_DMA_CTL_PL23TP4		(0<<6)	/* planar1 trigger 4 */
233#define BT848_DMA_CTL_PL23TP8		(1<<6)	/* planar1 trigger 8 */
234#define BT848_DMA_CTL_PL23TP16		(2<<6)	/* planar1 trigger 16 */
235#define BT848_DMA_CTL_PL23TP32		(3<<6)	/* planar1 trigger 32 */
236#define BT848_DMA_CTL_PL1TP4		(0<<4)	/* planar1 trigger 4 */
237#define BT848_DMA_CTL_PL1TP8		(1<<4)	/* planar1 trigger 8 */
238#define BT848_DMA_CTL_PL1TP16		(2<<4)	/* planar1 trigger 16 */
239#define BT848_DMA_CTL_PL1TP32		(3<<4)	/* planar1 trigger 32 */
240#define BT848_DMA_CTL_PKTP4		(0<<2)	/* packed trigger 4 */
241#define BT848_DMA_CTL_PKTP8		(1<<2)	/* packed trigger 8 */
242#define BT848_DMA_CTL_PKTP16		(2<<2)	/* packed trigger 16 */
243#define BT848_DMA_CTL_PKTP32		(3<<2)	/* packed trigger 32 */
244#define BT848_DMA_CTL_RISC_EN		(1<<1)
245#define BT848_DMA_CTL_FIFO_EN		(1<<0)
246    BTLONG (i2c_data_ctl);	/* 110, 111,112,113 */
247#define BT848_DATA_CTL_I2CDIV		(0xf<<4)
248#define BT848_DATA_CTL_I2CSYNC		(1<<3)
249#define BT848_DATA_CTL_I2CW3B		(1<<2)
250#define BT848_DATA_CTL_I2CSCL		(1<<1)
251#define BT848_DATA_CTL_I2CSDA		(1<<0)
252    BTLONG (risc_strt_add);	/* 114, 115,116,117 */
253    BTLONG (gpio_out_en);	/* 118, 119,11a,11b */	/* really 24 bits */
254    BTLONG (gpio_reg_inp);	/* 11c, 11d,11e,11f */	/* really 24 bits */
255    BTLONG (risc_count);	/* 120, 121,122,123 */
256    u_char	filler3[0x200-0x124];
257    BTLONG (gpio_data);		/* 200, 201,202,203 */	/* really 24 bits */
258};
259
260typedef volatile struct bt848_registers* bt848_ptr_t;
261
262
263#if 0
264/* force people to be aware of the new struct */
265
266#define BKTR_DSTATUS			0x000
267#define BKTR_IFORM			0x004
268#define BKTR_TDEC			0x008
269#define BKTR_EVEN_CROP			0x00C
270#define BKTR_ODD_CROP			0x08C
271#define BKTR_E_VDELAY_LO		0x010
272#define BKTR_O_VDELAY_LO		0x090
273#define BKTR_E_VACTIVE_LO		0x014
274#define BKTR_O_VACTIVE_LO		0x094
275#define BKTR_E_DELAY_LO			0x018
276#define BKTR_O_DELAY_LO			0x098
277#define BKTR_E_HACTIVE_LO		0x01C
278#define BKTR_O_HACTIVE_LO		0x09C
279#define BKTR_E_HSCALE_HI		0x020
280#define BKTR_O_HSCALE_HI		0x0A0
281#define BKTR_E_HSCALE_LO		0x024
282#define BKTR_O_HSCALE_LO		0x0A4
283#define BKTR_BRIGHT			0x028
284#define BKTR_E_CONTROL			0x02C
285#define BKTR_O_CONTROL			0x0AC
286#define BKTR_CONTRAST_LO		0x030
287#define BKTR_SAT_U_LO			0x034
288#define BKTR_SAT_V_LO			0x038
289#define BKTR_HUE			0x03C
290#define BKTR_E_SCLOOP			0x040
291#define BKTR_O_SCLOOP			0x0C0
292#define BKTR_OFORM			0x048
293#define BKTR_E_VSCALE_HI		0x04C
294#define BKTR_O_VSCALE_HI		0x0CC
295#define BKTR_E_VSCALE_LO		0x050
296#define BKTR_O_VSCALE_LO		0x0D0
297#define BKTR_TEST			0x054
298#define BKTR_ADELAY			0x060
299#define BKTR_BDELAY			0x064
300#define BKTR_ADC			0x068
301#define BKTR_E_VTC			0x06C
302#define BKTR_O_VTC			0x0EC
303#define BKTR_SRESET			0x07C
304#define BKTR_COLOR_FMT			0x0D4
305#define BKTR_COLOR_CTL			0x0D8
306#define BKTR_CAP_CTL			0x0DC
307#define BKTR_VBI_PACK_SIZE		0x0E0
308#define BKTR_VBI_PACK_DEL		0x0E4
309#define BKTR_INT_STAT			0x100
310#define BKTR_INT_MASK			0x104
311#define BKTR_RISC_COUNT			0x120
312#define BKTR_RISC_STRT_ADD		0x114
313#define BKTR_GPIO_DMA_CTL		0x10C
314#define BKTR_GPIO_OUT_EN		0x118
315#define BKTR_GPIO_REG_INP		0x11C
316#define BKTR_GPIO_DATA			0x200
317#define BKTR_I2C_CONTROL		0x110
318
319#endif /* 0 */
320
321/*
322 * device support for onboard tv tuners
323 */
324
325/* description of the LOGICAL tuner */
326struct TVTUNER {
327	int		frequency;
328	u_char		chnlset;
329	u_char		channel;
330	u_char		band;
331	u_char		afc;
332 	u_char		radio_mode;	/* current mode of the radio mode */
333};
334
335/* description of the PHYSICAL tuner */
336struct TUNER {
337	char*		name;
338	u_char		type;
339	u_char		pllControl[4];
340	u_char		bandLimits[ 2 ];
341	u_char		bandAddrs[ 4 ];        /* 3 first for the 3 TV
342					       ** bands. Last for radio
343					       ** band (0x00=NoRadio).
344					       */
345
346};
347
348/* description of the card */
349#define EEPROMBLOCKSIZE		32
350struct CARDTYPE {
351	unsigned int		card_id;	/* card id (from #define's) */
352	char*			name;
353	const struct TUNER*	tuner;		/* Tuner details */
354	u_char			tuner_pllAddr;	/* Tuner i2c address */
355	u_char			dbx;		/* Has DBX chip? */
356	u_char			msp3400c;	/* Has msp3400c chip? */
357	u_char			eepromAddr;
358	u_char			eepromSize;	/* bytes / EEPROMBLOCKSIZE */
359	u_int			audiomuxs[ 5 ];	/* tuner, ext (line-in) */
360						/* int/unused (radio) */
361						/* mute, present */
362	u_int			gpio_mux_bits;	/* GPIO mask for audio mux */
363};
364
365struct format_params {
366  /* Total lines, lines before image, image lines */
367  int vtotal, vdelay, vactive;
368  /* Total unscaled horizontal pixels, pixels before image, image pixels */
369  int htotal, hdelay, hactive;
370  /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
371  int  scaled_hactive, scaled_htotal;
372  /* frame rate . for ntsc is 30 frames per second */
373  int frame_rate;
374  /* A-delay and B-delay */
375  u_char adelay, bdelay;
376  /* Iform XTSEL value */
377  int iform_xtsel;
378  /* VBI number of lines per field, and number of samples per line */
379  int vbi_num_lines, vbi_num_samples;
380};
381
382#if ((defined(__FreeBSD__)) && (NSMBUS > 0))
383struct bktr_i2c_softc {
384	device_t iicbus;
385	device_t smbus;
386};
387#endif
388
389typedef struct bktr_clip bktr_clip_t;
390/*
391 * BrookTree 848  info structure, one per bt848 card installed.
392 */
393struct bktr_softc {
394#ifdef __bsdi__
395    struct device bktr_dev;	/* base device */
396    struct isadev bktr_id;	/* ISA device */
397    struct intrhand bktr_ih;	/* interrupt vectoring */
398#define pcici_t pci_devaddr_t
399#endif
400#if ((defined(__FreeBSD__)) && (NSMBUS > 0))
401    struct bktr_i2c_softc i2c_sc;	/* bt848_i2c device */
402#endif
403    bt848_ptr_t base;		/* Bt848 register physical address */
404    vm_offset_t phys_base;	/* Bt848 register physical address */
405    pcici_t	tag;		/* PCI tag, for doing PCI commands */
406    vm_offset_t bigbuf;		/* buffer that holds the captured image */
407    int		alloc_pages;	/* number of pages in bigbuf */
408    vm_offset_t vbidata;	/* RISC program puts VBI data from the current frame here */
409    vm_offset_t vbibuffer;	/* Circular buffer holding VBI data for the user */
410    int         vbiinsert;      /* Position for next write into circular buffer */
411    int         vbistart;       /* Position of last read from circular buffer */
412    int         vbisize;        /* Number of bytes in the circular buffer */
413    struct proc	*proc;		/* process to receive raised signal */
414    int		signal;		/* signal to send to process */
415    int		clr_on_start;	/* clear cap buf on capture start? */
416#define	METEOR_SIG_MODE_MASK	0xffff0000
417#define	METEOR_SIG_FIELD_MODE	0x00010000
418#define	METEOR_SIG_FRAME_MODE	0x00000000
419    vm_offset_t  dma_prog;
420    vm_offset_t  odd_dma_prog;
421    char         dma_prog_loaded;
422    struct meteor_mem *mem;	/* used to control sync. multi-frame output */
423    u_long	synch_wait;	/* wait for free buffer before continuing */
424    short	current;	/* frame number in buffer (1-frames) */
425    short	rows;		/* number of rows in a frame */
426    short	cols;		/* number of columns in a frame */
427    int		capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
428    int		capture_area_y_offset; /* captured. The capture area allows for */
429    int		capture_area_x_size;   /* example 320x200 pixels from the centre */
430    int		capture_area_y_size;   /* of the video image to be captured. */
431    char	capture_area_enabled;  /* When TRUE use user's capture area. */
432    int		pixfmt;         /* active pixel format (idx into fmt tbl) */
433    int		pixfmt_compat;  /* Y/N - in meteor pix fmt compat mode */
434    u_long	format;		/* frame format rgb, yuv, etc.. */
435    short	frames;		/* number of frames allocated */
436    int		frame_size;	/* number of bytes in a frame */
437    u_long	fifo_errors;	/* number of fifo capture errors since open */
438    u_long	dma_errors;	/* number of DMA capture errors since open */
439    u_long	frames_captured;/* number of frames captured since open */
440    u_long	even_fields_captured; /* number of even fields captured */
441    u_long	odd_fields_captured; /* number of odd fields captured */
442    u_long	range_enable;	/* enable range checking ?? */
443    u_short     capcontrol;     /* reg 0xdc capture control */
444    u_short     bktr_cap_ctl;
445    volatile u_int	flags;
446#define	METEOR_INITALIZED	0x00000001
447#define	METEOR_OPEN		0x00000002
448#define	METEOR_MMAP		0x00000004
449#define	METEOR_INTR		0x00000008
450#define	METEOR_READ		0x00000010	/* XXX never gets referenced */
451#define	METEOR_SINGLE		0x00000020	/* get single frame */
452#define	METEOR_CONTIN		0x00000040	/* continuously get frames */
453#define	METEOR_SYNCAP		0x00000080	/* synchronously get frames */
454#define	METEOR_CAP_MASK		0x000000f0
455#define	METEOR_NTSC		0x00000100
456#define	METEOR_PAL		0x00000200
457#define	METEOR_SECAM		0x00000400
458#define	BROOKTREE_NTSC		0x00000100	/* used in video open() and */
459#define	BROOKTREE_PAL		0x00000200	/* in the kernel config */
460#define	BROOKTREE_SECAM		0x00000400	/* file */
461#define	METEOR_AUTOMODE		0x00000800
462#define	METEOR_FORM_MASK	0x00000f00
463#define	METEOR_DEV0		0x00001000
464#define	METEOR_DEV1		0x00002000
465#define	METEOR_DEV2		0x00004000
466#define	METEOR_DEV3		0x00008000
467#define METEOR_DEV_SVIDEO	0x00006000
468#define METEOR_DEV_RGB		0x0000a000
469#define	METEOR_DEV_MASK		0x0000f000
470#define	METEOR_RGB16		0x00010000
471#define	METEOR_RGB24		0x00020000
472#define	METEOR_YUV_PACKED	0x00040000
473#define	METEOR_YUV_PLANAR	0x00080000
474#define	METEOR_WANT_EVEN	0x00100000	/* want even frame */
475#define	METEOR_WANT_ODD		0x00200000	/* want odd frame */
476#define	METEOR_WANT_MASK	0x00300000
477#define METEOR_ONLY_EVEN_FIELDS	0x01000000
478#define METEOR_ONLY_ODD_FIELDS	0x02000000
479#define METEOR_ONLY_FIELDS_MASK 0x03000000
480#define METEOR_YUV_422		0x04000000
481#define	METEOR_OUTPUT_FMT_MASK	0x040f0000
482#define	METEOR_WANT_TS		0x08000000	/* time-stamp a frame */
483#define METEOR_RGB		0x20000000	/* meteor rgb unit */
484#define METEOR_FIELD_MODE	0x80000000
485    u_char	tflags;				/* Tuner flags (/dev/tuner) */
486#define	TUNER_INITALIZED	0x00000001
487#define	TUNER_OPEN		0x00000002
488    u_char      vbiflags;			/* VBI flags (/dev/vbi) */
489#define VBI_INITALIZED          0x00000001
490#define VBI_OPEN                0x00000002
491#define VBI_CAPTURE             0x00000004
492    u_short	fps;		/* frames per second */
493    struct meteor_video video;
494    struct TVTUNER	tuner;
495    struct CARDTYPE	card;
496    u_char		audio_mux_select;	/* current mode of the audio */
497    u_char		audio_mute_state;	/* mute state of the audio */
498    u_char		format_params;
499    u_long              current_sol;
500    u_long              current_col;
501    int                 clip_start;
502    int                 line_length;
503    int                 last_y;
504    int                 y;
505    int                 y2;
506    int                 yclip;
507    int                 yclip2;
508    int                 max_clip_node;
509    bktr_clip_t		clip_list[100];
510    int                 reverse_mute;
511    int                 bt848_tuner;
512    int                 bt848_card;
513    u_long              id;
514#define BT848_USE_XTALS 0
515#define BT848_USE_PLL   1
516    int                 xtal_pll_mode;	/* Use XTAL or PLL mode for PAL/SECAM */    int                 remote_control;      /* remote control detected */
517    int                 remote_control_addr; /* remote control i2c address */
518
519};
520
521typedef struct bktr_softc bktr_reg_t;
522typedef struct bktr_softc* bktr_ptr_t;
523
524#define Bt848_MAX_SIGN 16
525
526struct bt848_card_sig {
527  int card;
528  int tuner;
529  u_char signature[Bt848_MAX_SIGN];
530};
531