bktr_reg.h revision 33850
1/* 2 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Mark Tinguely and Jim Lowe 16 * 4. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 28 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31#ifndef PCI_LATENCY_TIMER 32#define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 33#endif 34 35/* 36 * Definitions for the Philips SAA7116 digital video to pci interface. 37 */ 38#define BROOKTREE_848_ID 0x0350109E 39#define BROOKTREE 849_ID 0x0351109E 40 41typedef volatile u_int bregister_t; 42/* 43 * if other persuasion endian, then compiler will probably require that 44 * these next 45 * macros be reversed 46 */ 47#define BTBYTE(what) bregister_t what:8; int :24 48#define BTWORD(what) bregister_t what:16; int: 16 49#define BTLONG(what) bregister_t what:32 50 51struct bt848_registers { 52 BTBYTE (dstatus); /* 0, 1,2,3 */ 53#define BT848_DSTATUS_PRES (1<<7) 54#define BT848_DSTATUS_HLOC (1<<6) 55#define BT848_DSTATUS_FIELD (1<<5) 56#define BT848_DSTATUS_NUML (1<<4) 57#define BT848_DSTATUS_CSEL (1<<3) 58#define BT848_DSTATUS_LOF (1<<1) 59#define BT848_DSTATUS_COF (1<<0) 60 BTBYTE (iform); /* 4, 5,6,7 */ 61#define BT848_IFORM_MUXSEL (0x3<<5) 62# define BT848_IFORM_M_MUX1 (0x03<<5) 63# define BT848_IFORM_M_MUX0 (0x02<<5) 64# define BT848_IFORM_M_MUX2 (0x01<<5) 65# define BT848_IFORM_M_RSVD (0x00<<5) 66#define BT848_IFORM_XTSEL (0x3<<3) 67# define BT848_IFORM_X_AUTO (0x03<<3) 68# define BT848_IFORM_X_XT1 (0x02<<3) 69# define BT848_IFORM_X_XT0 (0x01<<3) 70# define BT848_IFORM_X_RSVD (0x00<<3) 71 BTBYTE (tdec); /* 8, 9,a,b */ 72 BTBYTE (e_crop); /* c, d,e,f */ 73 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 74 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 75 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 76 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 77 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 78 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 79 BTBYTE (bright); /* 28, 29,2a,2b */ 80 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 81#define BT848_E_CONTROL_LNOTCH (1<<7) 82#define BT848_E_CONTROL_COMP (1<<6) 83#define BT848_E_CONTROL_LDEC (1<<5) 84#define BT848_E_CONTROL_CBSENSE (1<<4) 85#define BT848_E_CONTROL_RSVD (1<<3) 86#define BT848_E_CONTROL_CON_MSB (1<<2) 87#define BT848_E_CONTROL_SAT_U_MSB (1<<1) 88#define BT848_E_CONTROL_SAT_V_MSB (1<<0) 89 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 90 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 91 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 92 BTBYTE (hue); /* 3c, 3d,3e,3f */ 93 BTBYTE (e_scloop); /* 40, 41,42,43 */ 94#define BT848_E_SCLOOP_RSVD1 (1<<7) 95#define BT848_E_SCLOOP_CAGC (1<<6) 96#define BT848_E_SCLOOP_CKILL (1<<5) 97#define BT848_E_SCLOOP_HFILT (0x3<<3) 98# define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 99# define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 100# define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 101# define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 102#define BT848_E_SCLOOP_RSVD0 (0x7<<0) 103 int :32; /* 44, 45,46,47 */ 104 BTBYTE (oform); /* 48, 49,4a,4b */ 105 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 106 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 107 BTBYTE (test); /* 54, 55,56,57 */ 108 int :32; /* 58, 59,5a,5b */ 109 int :32; /* 5c, 5d,5e,5f */ 110 BTLONG (adelay); /* 60, 61,62,63 */ 111 BTBYTE (bdelay); /* 64, 65,66,67 */ 112 BTBYTE (adc); /* 68, 69,6a,6b */ 113#define BT848_ADC_RESERVED (0x80) /* required pattern */ 114#define BT848_ADC_SYNC_T (1<<5) 115#define BT848_ADC_AGC_EN (1<<4) 116#define BT848_ADC_CLK_SLEEP (1<<3) 117#define BT848_ADC_Y_SLEEP (1<<2) 118#define BT848_ADC_C_SLEEP (1<<1) 119#define BT848_ADC_CRUSH (1<<0) 120 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 121 int :32; /* 70, 71,72,73 */ 122 int :32; /* 74, 75,76,77 */ 123 int :32; /* 78, 79,7a,7b */ 124 BTLONG (sreset); /* 7c, 7d,7e,7f */ 125 u_char filler[0x8c-0x80]; 126 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 127 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 128 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 129 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 130 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 131 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 132 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 133 int :32; /* a8, a9,aa,ab */ 134 BTBYTE (o_control); /* ac, ad,ae,af */ 135#define BT848_O_CONTROL_LNOTCH (1<<7) 136#define BT848_O_CONTROL_COMP (1<<6) 137#define BT848_O_CONTROL_LDEC (1<<5) 138#define BT848_O_CONTROL_CBSENSE (1<<4) 139#define BT848_O_CONTROL_RSVD (1<<3) 140#define BT848_O_CONTROL_CON_MSB (1<<2) 141#define BT848_O_CONTROL_SAT_U_MSB (1<<1) 142#define BT848_O_CONTROL_SAT_V_MSB (1<<0) 143 u_char fillter1[16]; 144 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 145#define BT848_O_SCLOOP_RSVD1 (1<<7) 146#define BT848_O_SCLOOP_CAGC (1<<6) 147#define BT848_O_SCLOOP_CKILL (1<<5) 148#define BT848_O_SCLOOP_HFILT (0x3<<3) 149# define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 150# define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 151# define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 152# define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 153#define BT848_O_SCLOOP_RSVD0 (0x7<<0) 154 int :32; /* c4, c5,c6,c7 */ 155 int :32; /* c8, c9,ca,cb */ 156 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 157 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 158 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 159 bregister_t color_ctl_swap :4; /* d8 */ 160#define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 161#define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 162#define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 163#define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 164 bregister_t color_ctl_gamma :1; 165 bregister_t color_ctl_rgb_ded :1; 166 bregister_t color_ctl_color_bars :1; 167 bregister_t color_ctl_ext_frmrate :1; 168 int :24; /* d9,da,db */ 169 BTBYTE (cap_ctl); /* dc, dd,de,df */ 170#define BT848_CAP_CTL_DITH_FRAME (1<<4) 171#define BT848_CAP_CTL_VBI_ODD (1<<3) 172#define BT848_CAP_CTL_VBI_EVEN (1<<2) 173#define BT848_CAP_CTL_ODD (1<<1) 174#define BT848_CAP_CTL_EVEN (1<<0) 175 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 176 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 177 int :32; /* e8, e9,ea,eb */ 178 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 179 u_char filler2[0x100-0xf0]; 180 BTLONG (int_stat); /* 100, 101,102,103 */ 181 BTLONG (int_mask); /* 104, 105,106,107 */ 182#define BT848_INT_RISCS (0xf<<28) 183#define BT848_INT_RISC_EN (1<<27) 184#define BT848_INT_RACK (1<<25) 185#define BT848_INT_FIELD (1<<24) 186#define BT848_INT_MYSTERYBIT (1<<23) 187#define BT848_INT_SCERR (1<<19) 188#define BT848_INT_OCERR (1<<18) 189#define BT848_INT_PABORT (1<<17) 190#define BT848_INT_RIPERR (1<<16) 191#define BT848_INT_PPERR (1<<15) 192#define BT848_INT_FDSR (1<<14) 193#define BT848_INT_FTRGT (1<<13) 194#define BT848_INT_FBUS (1<<12) 195#define BT848_INT_RISCI (1<<11) 196#define BT848_INT_GPINT (1<<9) 197#define BT848_INT_I2CDONE (1<<8) 198#define BT848_INT_RSV1 (1<<7) 199#define BT848_INT_RSV0 (1<<6) 200#define BT848_INT_VPRES (1<<5) 201#define BT848_INT_HLOCK (1<<4) 202#define BT848_INT_OFLOW (1<<3) 203#define BT848_INT_HSYNC (1<<2) 204#define BT848_INT_VSYNC (1<<1) 205#define BT848_INT_FMTCHG (1<<0) 206 int :32; /* 108, 109,10a,10b */ 207 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 208#define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 209#define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 210#define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 211#define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 212#define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 213#define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 214#define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 215#define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 216#define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 217#define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 218#define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 219#define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 220#define BT848_DMA_CTL_RISC_EN (1<<1) 221#define BT848_DMA_CTL_FIFO_EN (1<<0) 222 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 223#define BT848_DATA_CTL_I2CDIV (0xf<<4) 224#define BT848_DATA_CTL_I2CSYNC (1<<3) 225#define BT848_DATA_CTL_I2CW3B (1<<2) 226#define BT848_DATA_CTL_I2CSCL (1<<1) 227#define BT848_DATA_CTL_I2CSDA (1<<0) 228 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 229 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 230 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 231 BTLONG (risc_count); /* 120, 121,122,123 */ 232 u_char filler3[0x200-0x124]; 233 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 234}; 235 236typedef volatile struct bt848_registers* bt848_ptr_t; 237 238 239#if 0 240/* force people to be aware of the new struct */ 241 242#define BKTR_DSTATUS 0x000 243#define BKTR_IFORM 0x004 244#define BKTR_TDEC 0x008 245#define BKTR_EVEN_CROP 0x00C 246#define BKTR_ODD_CROP 0x08C 247#define BKTR_E_VDELAY_LO 0x010 248#define BKTR_O_VDELAY_LO 0x090 249#define BKTR_E_VACTIVE_LO 0x014 250#define BKTR_O_VACTIVE_LO 0x094 251#define BKTR_E_DELAY_LO 0x018 252#define BKTR_O_DELAY_LO 0x098 253#define BKTR_E_HACTIVE_LO 0x01C 254#define BKTR_O_HACTIVE_LO 0x09C 255#define BKTR_E_HSCALE_HI 0x020 256#define BKTR_O_HSCALE_HI 0x0A0 257#define BKTR_E_HSCALE_LO 0x024 258#define BKTR_O_HSCALE_LO 0x0A4 259#define BKTR_BRIGHT 0x028 260#define BKTR_E_CONTROL 0x02C 261#define BKTR_O_CONTROL 0x0AC 262#define BKTR_CONTRAST_LO 0x030 263#define BKTR_SAT_U_LO 0x034 264#define BKTR_SAT_V_LO 0x038 265#define BKTR_HUE 0x03C 266#define BKTR_E_SCLOOP 0x040 267#define BKTR_O_SCLOOP 0x0C0 268#define BKTR_OFORM 0x048 269#define BKTR_E_VSCALE_HI 0x04C 270#define BKTR_O_VSCALE_HI 0x0CC 271#define BKTR_E_VSCALE_LO 0x050 272#define BKTR_O_VSCALE_LO 0x0D0 273#define BKTR_TEST 0x054 274#define BKTR_ADELAY 0x060 275#define BKTR_BDELAY 0x064 276#define BKTR_ADC 0x068 277#define BKTR_E_VTC 0x06C 278#define BKTR_O_VTC 0x0EC 279#define BKTR_SRESET 0x07C 280#define BKTR_COLOR_FMT 0x0D4 281#define BKTR_COLOR_CTL 0x0D8 282#define BKTR_CAP_CTL 0x0DC 283#define BKTR_VBI_PACK_SIZE 0x0E0 284#define BKTR_VBI_PACK_DEL 0x0E4 285#define BKTR_INT_STAT 0x100 286#define BKTR_INT_MASK 0x104 287#define BKTR_RISC_COUNT 0x120 288#define BKTR_RISC_STRT_ADD 0x114 289#define BKTR_GPIO_DMA_CTL 0x10C 290#define BKTR_GPIO_OUT_EN 0x118 291#define BKTR_GPIO_REG_INP 0x11C 292#define BKTR_GPIO_DATA 0x200 293#define BKTR_I2C_CONTROL 0x110 294 295#endif /* 0 */ 296 297/* 298 * device support for onboard tv tuners 299 */ 300 301/* description of the LOGICAL tuner */ 302struct TVTUNER { 303 int frequency; 304 u_char chnlset; 305 u_char channel; 306 u_char band; 307 u_char afc; 308 u_char radio_mode; /* current mode of the radio mode */ 309}; 310 311/* description of the PHYSICAL tuner */ 312struct TUNER { 313 char* name; 314 u_char type; 315 u_char pllAddr; 316 u_char pllControl[4]; 317 u_char bandLimits[ 2 ]; 318 u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV 319 ** bands. Last for radio 320 ** band (0x00=NoRadio). 321 */ 322 323}; 324 325/* description of the card */ 326#define EEPROMBLOCKSIZE 32 327struct CARDTYPE { 328 char* name; 329 const struct TUNER* tuner; 330 u_char dbx; /* Has DBX chip? */ 331 u_char msp3400c; /* Has msp3400c chip? */ 332 u_char eepromAddr; 333 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */ 334 u_char audiomuxs[ 5 ]; /* tuner, ext, int/unused, 335 mute, present */ 336}; 337 338struct format_params { 339 /* Total lines, lines before image, image lines */ 340 int vtotal, vdelay, vactive; 341 /* Total unscaled horizontal pixels, pixels before image, image pixels */ 342 int htotal, hdelay, hactive; 343 /* visible active horizontal and vertical : 480 640 for NTSC */ 344 int horizontal, vertical; 345/* frame rate . for ntsc is 30 frames per second */ 346 int frame_rate; 347/* A-delay and B-delay */ 348 u_char adelay, bdelay; 349/* Iform XTSEL value */ 350 int iform_xtsel; 351}; 352 353 354typedef struct bktr_clip bktr_clip_t; 355/* 356 * BrookTree 848 info structure, one per bt848 card installed. 357 */ 358struct bktr_softc { 359#ifdef __bsdi__ 360 struct device bktr_dev; /* base device */ 361 struct isadev bktr_id; /* ISA device */ 362 struct intrhand bktr_ih; /* interrupt vectoring */ 363#define pcici_t pci_devaddr_t 364#endif 365 bt848_ptr_t base; /* Bt848 register physical address */ 366 vm_offset_t phys_base; /* Bt848 register physical address */ 367 pcici_t tag; /* PCI tag, for doing PCI commands */ 368 vm_offset_t bigbuf; /* buffer that holds the captured image */ 369 int alloc_pages; /* number of pages in bigbuf */ 370 struct proc *proc; /* process to receive raised signal */ 371 int signal; /* signal to send to process */ 372#define METEOR_SIG_MODE_MASK 0xffff0000 373#define METEOR_SIG_FIELD_MODE 0x00010000 374#define METEOR_SIG_FRAME_MODE 0x00000000 375 vm_offset_t dma_prog; 376 vm_offset_t odd_dma_prog; 377 char dma_prog_loaded; 378 struct meteor_mem *mem; /* used to control sync. multi-frame output */ 379 u_long synch_wait; /* wait for free buffer before continuing */ 380 short current; /* frame number in buffer (1-frames) */ 381 short rows; /* number of rows in a frame */ 382 short cols; /* number of columns in a frame */ 383 int pixfmt; /* active pixel format (idx into fmt tbl) */ 384 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */ 385 u_long format; /* frame format rgb, yuv, etc.. */ 386 short frames; /* number of frames allocated */ 387 int frame_size; /* number of bytes in a frame */ 388 u_long fifo_errors; /* number of fifo capture errors since open */ 389 u_long dma_errors; /* number of DMA capture errors since open */ 390 u_long frames_captured;/* number of frames captured since open */ 391 u_long even_fields_captured; /* number of even fields captured */ 392 u_long odd_fields_captured; /* number of odd fields captured */ 393 u_long range_enable; /* enable range checking ?? */ 394 u_short capcontrol; /* reg 0xdc capture control */ 395 u_short bktr_cap_ctl; 396 volatile u_int flags; 397#define METEOR_INITALIZED 0x00000001 398#define METEOR_OPEN 0x00000002 399#define METEOR_MMAP 0x00000004 400#define METEOR_INTR 0x00000008 401#define METEOR_READ 0x00000010 /* XXX never gets referenced */ 402#define METEOR_SINGLE 0x00000020 /* get single frame */ 403#define METEOR_CONTIN 0x00000040 /* continuously get frames */ 404#define METEOR_SYNCAP 0x00000080 /* synchronously get frames */ 405#define METEOR_CAP_MASK 0x000000f0 406#define METEOR_NTSC 0x00000100 407#define METEOR_PAL 0x00000200 408#define METEOR_SECAM 0x00000400 409#define METEOR_AUTOMODE 0x00000800 410#define METEOR_FORM_MASK 0x00000f00 411#define METEOR_DEV0 0x00001000 412#define METEOR_DEV1 0x00002000 413#define METEOR_DEV2 0x00004000 414#define METEOR_DEV3 0x00008000 415#define METEOR_DEV_SVIDEO 0x00006000 416#define METEOR_DEV_RGB 0x0000a000 417#define METEOR_DEV_MASK 0x0000f000 418#define METEOR_RGB16 0x00010000 419#define METEOR_RGB24 0x00020000 420#define METEOR_YUV_PACKED 0x00040000 421#define METEOR_YUV_PLANAR 0x00080000 422#define METEOR_WANT_EVEN 0x00100000 /* want even frame */ 423#define METEOR_WANT_ODD 0x00200000 /* want odd frame */ 424#define METEOR_WANT_MASK 0x00300000 425#define METEOR_ONLY_EVEN_FIELDS 0x01000000 426#define METEOR_ONLY_ODD_FIELDS 0x02000000 427#define METEOR_ONLY_FIELDS_MASK 0x03000000 428#define METEOR_YUV_422 0x04000000 429#define METEOR_OUTPUT_FMT_MASK 0x040f0000 430#define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */ 431#define METEOR_RGB 0x20000000 /* meteor rgb unit */ 432#define METEOR_FIELD_MODE 0x80000000 433 u_char tflags; 434#define TUNER_INITALIZED 0x00000001 435#define TUNER_OPEN 0x00000002 436 u_short fps; /* frames per second */ 437 struct meteor_video video; 438 struct TVTUNER tuner; 439 struct CARDTYPE card; 440 u_char audio_mux_select; /* current mode of the audio */ 441 u_char audio_mute_state; /* mute state of the audio */ 442 u_char format_params; 443 u_long current_sol; 444 u_long current_col; 445 int clip_start; 446 int line_length; 447 int last_y; 448 int y; 449 int y2; 450 int yclip; 451 int yclip2; 452 int max_clip_node; 453 bktr_clip_t clip_list[100]; 454}; 455 456typedef struct bktr_softc bktr_reg_t; 457typedef struct bktr_softc* bktr_ptr_t; 458