ar9280.c revision 240449
1/* 2 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar9002/ar9280.c 240449 2012-09-13 07:25:41Z adrian $ 18 */ 19#include "opt_ah.h" 20 21/* 22 * NB: Merlin and later have a simpler RF backend. 23 */ 24#include "ah.h" 25#include "ah_internal.h" 26 27#include "ah_eeprom_v14.h" 28 29#include "ar9002/ar9280.h" 30#include "ar5416/ar5416reg.h" 31#include "ar5416/ar5416phy.h" 32 33#define N(a) (sizeof(a)/sizeof(a[0])) 34 35struct ar9280State { 36 RF_HAL_FUNCS base; /* public state, must be first */ 37 uint16_t pcdacTable[1]; /* XXX */ 38}; 39#define AR9280(ah) ((struct ar9280State *) AH5212(ah)->ah_rfHal) 40 41static HAL_BOOL ar9280GetChannelMaxMinPower(struct ath_hal *, 42 const struct ieee80211_channel *, int16_t *maxPow,int16_t *minPow); 43int16_t ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c); 44 45static void 46ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 47 int writes) 48{ 49 (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain, 50 freqIndex, writes); 51} 52 53/* 54 * Take the MHz channel value and set the Channel value 55 * 56 * ASSUMES: Writes enabled to analog bus 57 * 58 * Actual Expression, 59 * 60 * For 2GHz channel, 61 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 62 * (freq_ref = 40MHz) 63 * 64 * For 5GHz channel, 65 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10) 66 * (freq_ref = 40MHz/(24>>amodeRefSel)) 67 * 68 * For 5GHz channels which are 5MHz spaced, 69 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 70 * (freq_ref = 40MHz) 71 */ 72static HAL_BOOL 73ar9280SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 74{ 75 uint16_t bMode, fracMode, aModeRefSel = 0; 76 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; 77 CHAN_CENTERS centers; 78 uint32_t refDivA = 24; 79 uint8_t frac_n_5g; 80 81 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq); 82 83 ar5416GetChannelCenters(ah, chan, ¢ers); 84 freq = centers.synth_center; 85 86 reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL); 87 reg32 &= 0xc0000000; 88 89 if (ath_hal_eepromGet(ah, AR_EEP_FRAC_N_5G, &frac_n_5g) != HAL_OK) 90 frac_n_5g = 0; 91 92 if (freq < 4800) { /* 2 GHz, fractional mode */ 93 uint32_t txctl; 94 95 bMode = 1; 96 fracMode = 1; 97 aModeRefSel = 0; 98 channelSel = (freq * 0x10000)/15; 99 100 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 101 if (freq == 2484) { 102 /* Enable channel spreading for channel 14 */ 103 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 104 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 105 } else { 106 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 107 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 108 } 109 } else { 110 bMode = 0; 111 fracMode = 0; 112 113 switch (frac_n_5g) { 114 case 0: 115 /* 116 * Enable fractional mode for half/quarter rate 117 * channels. 118 * 119 * This is from the Linux ath9k code, rather than 120 * the Atheros HAL code. 121 */ 122 if (IEEE80211_IS_CHAN_QUARTER(chan) || 123 IEEE80211_IS_CHAN_HALF(chan)) 124 aModeRefSel = 0; 125 else if ((freq % 20) == 0) { 126 aModeRefSel = 3; 127 } else if ((freq % 10) == 0) { 128 aModeRefSel = 2; 129 } 130 if (aModeRefSel) break; 131 case 1: 132 default: 133 aModeRefSel = 0; 134 /* Enable 2G (fractional) mode for channels which are 5MHz spaced */ 135 fracMode = 1; 136 refDivA = 1; 137 channelSel = (freq * 0x8000)/15; 138 139 /* RefDivA setting */ 140 OS_A_REG_RMW_FIELD(ah, AR_AN_SYNTH9, 141 AR_AN_SYNTH9_REFDIVA, refDivA); 142 } 143 144 if (!fracMode) { 145 ndiv = (freq * (refDivA >> aModeRefSel))/60; 146 channelSel = ndiv & 0x1ff; 147 channelFrac = (ndiv & 0xfffffe00) * 2; 148 channelSel = (channelSel << 17) | channelFrac; 149 } 150 } 151 152 reg32 = reg32 | (bMode << 29) | (fracMode << 28) | 153 (aModeRefSel << 26) | (channelSel); 154 155 OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); 156 157 AH_PRIVATE(ah)->ah_curchan = chan; 158 159 return AH_TRUE; 160} 161 162/* 163 * Return a reference to the requested RF Bank. 164 */ 165static uint32_t * 166ar9280GetRfBank(struct ath_hal *ah, int bank) 167{ 168 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 169 __func__, bank); 170 return AH_NULL; 171} 172 173/* 174 * Reads EEPROM header info from device structure and programs 175 * all rf registers 176 */ 177static HAL_BOOL 178ar9280SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, 179 uint16_t modesIndex, uint16_t *rfXpdGain) 180{ 181 return AH_TRUE; /* nothing to do */ 182} 183 184/* 185 * Read the transmit power levels from the structures taken from EEPROM 186 * Interpolate read transmit power values for this channel 187 * Organize the transmit power values into a table for writing into the hardware 188 */ 189 190static HAL_BOOL 191ar9280SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax, 192 const struct ieee80211_channel *chan, uint16_t *rfXpdGain) 193{ 194 return AH_TRUE; 195} 196 197#if 0 198static int16_t 199ar9280GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data) 200{ 201 int i, minIndex; 202 int16_t minGain,minPwr,minPcdac,retVal; 203 204 /* Assume NUM_POINTS_XPD0 > 0 */ 205 minGain = data->pDataPerXPD[0].xpd_gain; 206 for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) { 207 if (data->pDataPerXPD[i].xpd_gain < minGain) { 208 minIndex = i; 209 minGain = data->pDataPerXPD[i].xpd_gain; 210 } 211 } 212 minPwr = data->pDataPerXPD[minIndex].pwr_t4[0]; 213 minPcdac = data->pDataPerXPD[minIndex].pcdac[0]; 214 for (i=1; i<NUM_POINTS_XPD0; i++) { 215 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) { 216 minPwr = data->pDataPerXPD[minIndex].pwr_t4[i]; 217 minPcdac = data->pDataPerXPD[minIndex].pcdac[i]; 218 } 219 } 220 retVal = minPwr - (minPcdac*2); 221 return(retVal); 222} 223#endif 224 225static HAL_BOOL 226ar9280GetChannelMaxMinPower(struct ath_hal *ah, 227 const struct ieee80211_channel *chan, 228 int16_t *maxPow, int16_t *minPow) 229{ 230#if 0 231 struct ath_hal_5212 *ahp = AH5212(ah); 232 int numChannels=0,i,last; 233 int totalD, totalF,totalMin; 234 EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL; 235 EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL; 236 237 *maxPow = 0; 238 if (IS_CHAN_A(chan)) { 239 powerArray = ahp->ah_modePowerArray5112; 240 data = powerArray[headerInfo11A].pDataPerChannel; 241 numChannels = powerArray[headerInfo11A].numChannels; 242 } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) { 243 /* XXX - is this correct? Should we also use the same power for turbo G? */ 244 powerArray = ahp->ah_modePowerArray5112; 245 data = powerArray[headerInfo11G].pDataPerChannel; 246 numChannels = powerArray[headerInfo11G].numChannels; 247 } else if (IS_CHAN_B(chan)) { 248 powerArray = ahp->ah_modePowerArray5112; 249 data = powerArray[headerInfo11B].pDataPerChannel; 250 numChannels = powerArray[headerInfo11B].numChannels; 251 } else { 252 return (AH_TRUE); 253 } 254 /* Make sure the channel is in the range of the TP values 255 * (freq piers) 256 */ 257 if ((numChannels < 1) || 258 (chan->channel < data[0].channelValue) || 259 (chan->channel > data[numChannels-1].channelValue)) 260 return(AH_FALSE); 261 262 /* Linearly interpolate the power value now */ 263 for (last=0,i=0; 264 (i<numChannels) && (chan->channel > data[i].channelValue); 265 last=i++); 266 totalD = data[i].channelValue - data[last].channelValue; 267 if (totalD > 0) { 268 totalF = data[i].maxPower_t4 - data[last].maxPower_t4; 269 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD); 270 271 totalMin = ar9280GetMinPower(ah,&data[i]) - ar9280GetMinPower(ah, &data[last]); 272 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9280GetMinPower(ah, &data[last])*totalD)/totalD); 273 return (AH_TRUE); 274 } else { 275 if (chan->channel == data[i].channelValue) { 276 *maxPow = data[i].maxPower_t4; 277 *minPow = ar9280GetMinPower(ah, &data[i]); 278 return(AH_TRUE); 279 } else 280 return(AH_FALSE); 281 } 282#else 283 *maxPow = *minPow = 0; 284 return AH_FALSE; 285#endif 286} 287 288/* 289 * The ordering of nfarray is thus: 290 * 291 * nfarray[0]: Chain 0 ctl 292 * nfarray[1]: Chain 1 ctl 293 * nfarray[2]: Chain 2 ctl 294 * nfarray[3]: Chain 0 ext 295 * nfarray[4]: Chain 1 ext 296 * nfarray[5]: Chain 2 ext 297 */ 298static void 299ar9280GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[]) 300{ 301 int16_t nf; 302 303 nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR); 304 if (nf & 0x100) 305 nf = 0 - ((nf ^ 0x1ff) + 1); 306 HALDEBUG(ah, HAL_DEBUG_NFCAL, 307 "NF calibrated [ctl] [chain 0] is %d\n", nf); 308 nfarray[0] = nf; 309 310 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR); 311 if (nf & 0x100) 312 nf = 0 - ((nf ^ 0x1ff) + 1); 313 HALDEBUG(ah, HAL_DEBUG_NFCAL, 314 "NF calibrated [ctl] [chain 1] is %d\n", nf); 315 nfarray[1] = nf; 316 317 nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR); 318 if (nf & 0x100) 319 nf = 0 - ((nf ^ 0x1ff) + 1); 320 HALDEBUG(ah, HAL_DEBUG_NFCAL, 321 "NF calibrated [ext] [chain 0] is %d\n", nf); 322 nfarray[3] = nf; 323 324 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR); 325 if (nf & 0x100) 326 nf = 0 - ((nf ^ 0x1ff) + 1); 327 HALDEBUG(ah, HAL_DEBUG_NFCAL, 328 "NF calibrated [ext] [chain 1] is %d\n", nf); 329 nfarray[4] = nf; 330 331 /* Chain 2 - invalid */ 332 nfarray[2] = 0; 333 nfarray[5] = 0; 334 335} 336 337/* 338 * Adjust NF based on statistical values for 5GHz frequencies. 339 * Stubbed:Not used by Fowl 340 */ 341int16_t 342ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c) 343{ 344 return 0; 345} 346 347/* 348 * Free memory for analog bank scratch buffers 349 */ 350static void 351ar9280RfDetach(struct ath_hal *ah) 352{ 353 struct ath_hal_5212 *ahp = AH5212(ah); 354 355 HALASSERT(ahp->ah_rfHal != AH_NULL); 356 ath_hal_free(ahp->ah_rfHal); 357 ahp->ah_rfHal = AH_NULL; 358} 359 360HAL_BOOL 361ar9280RfAttach(struct ath_hal *ah, HAL_STATUS *status) 362{ 363 struct ath_hal_5212 *ahp = AH5212(ah); 364 struct ar9280State *priv; 365 366 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__); 367 368 HALASSERT(ahp->ah_rfHal == AH_NULL); 369 priv = ath_hal_malloc(sizeof(struct ar9280State)); 370 if (priv == AH_NULL) { 371 HALDEBUG(ah, HAL_DEBUG_ANY, 372 "%s: cannot allocate private state\n", __func__); 373 *status = HAL_ENOMEM; /* XXX */ 374 return AH_FALSE; 375 } 376 priv->base.rfDetach = ar9280RfDetach; 377 priv->base.writeRegs = ar9280WriteRegs; 378 priv->base.getRfBank = ar9280GetRfBank; 379 priv->base.setChannel = ar9280SetChannel; 380 priv->base.setRfRegs = ar9280SetRfRegs; 381 priv->base.setPowerTable = ar9280SetPowerTable; 382 priv->base.getChannelMaxMinPower = ar9280GetChannelMaxMinPower; 383 priv->base.getNfAdjust = ar9280GetNfAdjust; 384 385 ahp->ah_pcdacTable = priv->pcdacTable; 386 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 387 ahp->ah_rfHal = &priv->base; 388 /* 389 * Set noise floor adjust method; we arrange a 390 * direct call instead of thunking. 391 */ 392 AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust; 393 AH_PRIVATE(ah)->ah_getNoiseFloor = ar9280GetNoiseFloor; 394 395 return AH_TRUE; 396} 397 398static HAL_BOOL 399ar9280RfProbe(struct ath_hal *ah) 400{ 401 return (AR_SREV_MERLIN(ah)); 402} 403 404AH_RF(RF9280, ar9280RfProbe, ar9280RfAttach); 405