ar5416_ani.c revision 227376
1185380Ssam/* 2187831Ssam * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3185380Ssam * Copyright (c) 2002-2008 Atheros Communications, Inc. 4185380Ssam * 5185380Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185380Ssam * purpose with or without fee is hereby granted, provided that the above 7185380Ssam * copyright notice and this permission notice appear in all copies. 8185380Ssam * 9185380Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185380Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185380Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185380Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185380Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185380Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185380Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185380Ssam * 17187831Ssam * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c 227376 2011-11-09 05:37:11Z adrian $ 18185380Ssam */ 19185380Ssam#include "opt_ah.h" 20185380Ssam 21185380Ssam/* 22185380Ssam * XXX this is virtually the same code as for 5212; we reuse 23185380Ssam * storage in the 5212 state block; need to refactor. 24185380Ssam */ 25185380Ssam#include "ah.h" 26185380Ssam#include "ah_internal.h" 27185380Ssam#include "ah_desc.h" 28185380Ssam 29185380Ssam#include "ar5416/ar5416.h" 30185380Ssam#include "ar5416/ar5416reg.h" 31185380Ssam#include "ar5416/ar5416phy.h" 32185380Ssam 33185380Ssam/* 34185380Ssam * Anti noise immunity support. We track phy errors and react 35185380Ssam * to excessive errors by adjusting the noise immunity parameters. 36185380Ssam */ 37185380Ssam 38185380Ssam#define HAL_EP_RND(x, mul) \ 39185380Ssam ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) 40185380Ssam#define BEACON_RSSI(ahp) \ 41185380Ssam HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \ 42185380Ssam HAL_RSSI_EP_MULTIPLIER) 43185380Ssam 44185380Ssam/* 45185380Ssam * ANI processing tunes radio parameters according to PHY errors 46185380Ssam * and related information. This is done for for noise and spur 47185380Ssam * immunity in all operating modes if the device indicates it's 48185380Ssam * capable at attach time. In addition, when there is a reference 49185380Ssam * rssi value (e.g. beacon frames from an ap in station mode) 50185380Ssam * further tuning is done. 51185380Ssam * 52185380Ssam * ANI_ENA indicates whether any ANI processing should be done; 53185380Ssam * this is specified at attach time. 54185380Ssam * 55185380Ssam * ANI_ENA_RSSI indicates whether rssi-based processing should 56185380Ssam * done, this is enabled based on operating mode and is meaningful 57185380Ssam * only if ANI_ENA is true. 58185380Ssam * 59185380Ssam * ANI parameters are typically controlled only by the hal. The 60185380Ssam * AniControl interface however permits manual tuning through the 61185380Ssam * diagnostic api. 62185380Ssam */ 63185380Ssam#define ANI_ENA(ah) \ 64185380Ssam (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA) 65185380Ssam#define ANI_ENA_RSSI(ah) \ 66185380Ssam (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA) 67185380Ssam 68185380Ssam#define ah_mibStats ah_stats.ast_mibstats 69185380Ssam 70185380Ssamstatic void 71185380SsamenableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params) 72185380Ssam{ 73185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 74185380Ssam 75185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: " 76185380Ssam "OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n", 77185380Ssam __func__, params->ofdmPhyErrBase, params->cckPhyErrBase); 78185380Ssam 79185380Ssam OS_REG_WRITE(ah, AR_FILTOFDM, 0); 80185380Ssam OS_REG_WRITE(ah, AR_FILTCCK, 0); 81185380Ssam 82185380Ssam OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase); 83185380Ssam OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase); 84185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 85185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); 86185380Ssam 87185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/ 88185380Ssam ar5212EnableMibCounters(ah); /* enable everything */ 89185380Ssam} 90185380Ssam 91185380Ssamstatic void 92185380SsamdisableAniMIBCounters(struct ath_hal *ah) 93185380Ssam{ 94185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 95185380Ssam 96185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n"); 97185380Ssam 98185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */ 99185380Ssam ar5212DisableMibCounters(ah); /* disable everything */ 100185380Ssam 101185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, 0); 102185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, 0); 103185380Ssam} 104185380Ssam 105185380Ssamstatic void 106185380SsamsetPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params) 107185380Ssam{ 108185380Ssam if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) { 109185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 110185380Ssam "OFDM Trigger %d is too high for hw counters, using max\n", 111185380Ssam params->ofdmTrigHigh); 112185380Ssam params->ofdmPhyErrBase = 0; 113185380Ssam } else 114185380Ssam params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh; 115185380Ssam if (params->cckTrigHigh >= AR_PHY_COUNTMAX) { 116185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 117185380Ssam "CCK Trigger %d is too high for hw counters, using max\n", 118185380Ssam params->cckTrigHigh); 119185380Ssam params->cckPhyErrBase = 0; 120185380Ssam } else 121185380Ssam params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh; 122185380Ssam} 123185380Ssam 124185380Ssam/* 125185380Ssam * Setup ANI handling. Sets all thresholds and reset the 126185380Ssam * channel statistics. Note that ar5416AniReset should be 127185380Ssam * called by ar5416Reset before anything else happens and 128185380Ssam * that's where we force initial settings. 129185380Ssam */ 130185380Ssamvoid 131185380Ssamar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24, 132185380Ssam const struct ar5212AniParams *params5, HAL_BOOL enable) 133185380Ssam{ 134185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 135185380Ssam 136185380Ssam if (params24 != AH_NULL) { 137185380Ssam OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24)); 138185380Ssam setPhyErrBase(ah, &ahp->ah_aniParams24); 139185380Ssam } 140185380Ssam if (params5 != AH_NULL) { 141185380Ssam OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5)); 142185380Ssam setPhyErrBase(ah, &ahp->ah_aniParams5); 143185380Ssam } 144185380Ssam 145185380Ssam OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani)); 146185380Ssam /* Enable MIB Counters */ 147185380Ssam enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/); 148185380Ssam 149185380Ssam if (enable) { /* Enable ani now */ 150185380Ssam HALASSERT(params24 != AH_NULL && params5 != AH_NULL); 151185380Ssam ahp->ah_procPhyErr |= HAL_ANI_ENA; 152185380Ssam } else { 153185380Ssam ahp->ah_procPhyErr &= ~HAL_ANI_ENA; 154185380Ssam } 155185380Ssam} 156185380Ssam 157185380Ssam/* 158185380Ssam * Cleanup any ANI state setup. 159224514Sadrian * 160224514Sadrian * This doesn't restore registers to their default settings! 161185380Ssam */ 162185380Ssamvoid 163185380Ssamar5416AniDetach(struct ath_hal *ah) 164185380Ssam{ 165185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n"); 166185380Ssam disableAniMIBCounters(ah); 167185380Ssam} 168185380Ssam 169185380Ssam/* 170185380Ssam * Control Adaptive Noise Immunity Parameters 171185380Ssam */ 172185380SsamHAL_BOOL 173185380Ssamar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) 174185380Ssam{ 175185380Ssam typedef int TABLE[]; 176185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 177185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 178224514Sadrian const struct ar5212AniParams *params = AH_NULL; 179185380Ssam 180224514Sadrian /* 181224514Sadrian * This function may be called before there's a current 182224514Sadrian * channel (eg to disable ANI.) 183224514Sadrian */ 184224514Sadrian if (aniState != AH_NULL) 185224514Sadrian params = aniState->params; 186224514Sadrian 187224514Sadrian OS_MARK(ah, AH_MARK_ANI_CONTROL, cmd); 188224514Sadrian 189224514Sadrian /* These commands can't be disabled */ 190224514Sadrian if (cmd == HAL_ANI_PRESENT) 191224514Sadrian return AH_TRUE; 192224514Sadrian 193224514Sadrian if (cmd == HAL_ANI_MODE) { 194224514Sadrian if (param == 0) { 195224514Sadrian ahp->ah_procPhyErr &= ~HAL_ANI_ENA; 196224514Sadrian /* Turn off HW counters if we have them */ 197224514Sadrian ar5416AniDetach(ah); 198224514Sadrian } else { /* normal/auto mode */ 199224514Sadrian /* don't mess with state if already enabled */ 200224514Sadrian if (! (ahp->ah_procPhyErr & HAL_ANI_ENA)) { 201224514Sadrian /* Enable MIB Counters */ 202224514Sadrian /* 203224514Sadrian * XXX use 2.4ghz params if no channel is 204224514Sadrian * available 205224514Sadrian */ 206224514Sadrian enableAniMIBCounters(ah, 207224514Sadrian ahp->ah_curani != AH_NULL ? 208224514Sadrian ahp->ah_curani->params: 209224514Sadrian &ahp->ah_aniParams24); 210224514Sadrian ahp->ah_procPhyErr |= HAL_ANI_ENA; 211224514Sadrian } 212224514Sadrian } 213224514Sadrian return AH_TRUE; 214224514Sadrian } 215224514Sadrian 216222276Sadrian /* Check whether the particular function is enabled */ 217222276Sadrian if (((1 << cmd) & AH5416(ah)->ah_ani_function) == 0) { 218222276Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: command %d disabled\n", 219222276Sadrian __func__, cmd); 220222276Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: cmd %d; mask %x\n", __func__, cmd, AH5416(ah)->ah_ani_function); 221222276Sadrian return AH_FALSE; 222222276Sadrian } 223222276Sadrian 224185380Ssam 225222276Sadrian switch (cmd) { 226185380Ssam case HAL_ANI_NOISE_IMMUNITY_LEVEL: { 227185380Ssam u_int level = param; 228185380Ssam 229217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_NOISE_IMMUNITY_LEVEL: set level = %d\n", __func__, level); 230227376Sadrian if (level > params->maxNoiseImmunityLevel) { 231217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 232203159Srpaulo "%s: immunity level out of range (%u > %u)\n", 233185380Ssam __func__, level, params->maxNoiseImmunityLevel); 234185380Ssam return AH_FALSE; 235185380Ssam } 236185380Ssam 237185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, 238185380Ssam AR_PHY_DESIRED_SZ_TOT_DES, params->totalSizeDesired[level]); 239185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, 240185380Ssam AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]); 241185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, 242185380Ssam AR_PHY_AGC_CTL1_COARSE_HIGH, params->coarseHigh[level]); 243185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, 244185380Ssam AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]); 245185380Ssam 246185380Ssam if (level > aniState->noiseImmunityLevel) 247185380Ssam ahp->ah_stats.ast_ani_niup++; 248185380Ssam else if (level < aniState->noiseImmunityLevel) 249185380Ssam ahp->ah_stats.ast_ani_nidown++; 250185380Ssam aniState->noiseImmunityLevel = level; 251185380Ssam break; 252185380Ssam } 253185380Ssam case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: { 254185380Ssam static const TABLE m1ThreshLow = { 127, 50 }; 255185380Ssam static const TABLE m2ThreshLow = { 127, 40 }; 256185380Ssam static const TABLE m1Thresh = { 127, 0x4d }; 257185380Ssam static const TABLE m2Thresh = { 127, 0x40 }; 258185380Ssam static const TABLE m2CountThr = { 31, 16 }; 259185380Ssam static const TABLE m2CountThrLow = { 63, 48 }; 260185380Ssam u_int on = param ? 1 : 0; 261185380Ssam 262217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: %s\n", __func__, on ? "enabled" : "disabled"); 263185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 264185380Ssam AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]); 265185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 266185380Ssam AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]); 267185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 268185380Ssam AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]); 269185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 270185380Ssam AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]); 271185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 272185380Ssam AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]); 273185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 274185380Ssam AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]); 275185380Ssam 276185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 277185380Ssam AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]); 278185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 279185380Ssam AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]); 280185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 281185380Ssam AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]); 282185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 283185380Ssam AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]); 284185380Ssam 285185380Ssam if (on) { 286185380Ssam OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW, 287185380Ssam AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); 288185380Ssam } else { 289185380Ssam OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW, 290185380Ssam AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); 291185380Ssam } 292185380Ssam if (on) 293185380Ssam ahp->ah_stats.ast_ani_ofdmon++; 294185380Ssam else 295185380Ssam ahp->ah_stats.ast_ani_ofdmoff++; 296185380Ssam aniState->ofdmWeakSigDetectOff = !on; 297185380Ssam break; 298185380Ssam } 299185380Ssam case HAL_ANI_CCK_WEAK_SIGNAL_THR: { 300185380Ssam static const TABLE weakSigThrCck = { 8, 6 }; 301185380Ssam u_int high = param ? 1 : 0; 302185380Ssam 303217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_CCK_WEAK_SIGNAL_THR: %s\n", __func__, high ? "high" : "low"); 304185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT, 305185380Ssam AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]); 306185380Ssam if (high) 307185380Ssam ahp->ah_stats.ast_ani_cckhigh++; 308185380Ssam else 309185380Ssam ahp->ah_stats.ast_ani_ccklow++; 310185380Ssam aniState->cckWeakSigThreshold = high; 311185380Ssam break; 312185380Ssam } 313185380Ssam case HAL_ANI_FIRSTEP_LEVEL: { 314185380Ssam u_int level = param; 315185380Ssam 316217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_FIRSTEP_LEVEL: level = %d\n", __func__, level); 317227376Sadrian if (level > params->maxFirstepLevel) { 318217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 319203159Srpaulo "%s: firstep level out of range (%u > %u)\n", 320185380Ssam __func__, level, params->maxFirstepLevel); 321185380Ssam return AH_FALSE; 322185380Ssam } 323185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, 324185380Ssam AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]); 325185380Ssam if (level > aniState->firstepLevel) 326185380Ssam ahp->ah_stats.ast_ani_stepup++; 327185380Ssam else if (level < aniState->firstepLevel) 328185380Ssam ahp->ah_stats.ast_ani_stepdown++; 329185380Ssam aniState->firstepLevel = level; 330185380Ssam break; 331185380Ssam } 332185380Ssam case HAL_ANI_SPUR_IMMUNITY_LEVEL: { 333185380Ssam u_int level = param; 334185380Ssam 335217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_SPUR_IMMUNITY_LEVEL: level = %d\n", __func__, level); 336227376Sadrian if (level > params->maxSpurImmunityLevel) { 337217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 338203159Srpaulo "%s: spur immunity level out of range (%u > %u)\n", 339185380Ssam __func__, level, params->maxSpurImmunityLevel); 340185380Ssam return AH_FALSE; 341185380Ssam } 342185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, 343185380Ssam AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]); 344221600Sadrian 345221600Sadrian /* Only set the ext channel cycpwr_thr1 field for ht/40 */ 346221600Sadrian if (IEEE80211_IS_CHAN_HT40(AH_PRIVATE(ah)->ah_curchan)) 347221600Sadrian OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA, 348221600Sadrian AR_PHY_EXT_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]); 349221600Sadrian 350185380Ssam if (level > aniState->spurImmunityLevel) 351185380Ssam ahp->ah_stats.ast_ani_spurup++; 352185380Ssam else if (level < aniState->spurImmunityLevel) 353185380Ssam ahp->ah_stats.ast_ani_spurdown++; 354185380Ssam aniState->spurImmunityLevel = level; 355185380Ssam break; 356185380Ssam } 357185380Ssam#ifdef AH_PRIVATE_DIAG 358185380Ssam case HAL_ANI_PHYERR_RESET: 359185380Ssam ahp->ah_stats.ast_ani_ofdmerrs = 0; 360185380Ssam ahp->ah_stats.ast_ani_cckerrs = 0; 361185380Ssam break; 362185380Ssam#endif /* AH_PRIVATE_DIAG */ 363185380Ssam default: 364217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid cmd %u\n", 365185380Ssam __func__, cmd); 366185380Ssam return AH_FALSE; 367185380Ssam } 368185380Ssam return AH_TRUE; 369185380Ssam} 370185380Ssam 371185380Ssamstatic void 372185380Ssamar5416AniOfdmErrTrigger(struct ath_hal *ah) 373185380Ssam{ 374185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 375187831Ssam const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; 376185380Ssam struct ar5212AniState *aniState; 377185380Ssam const struct ar5212AniParams *params; 378185380Ssam 379185380Ssam HALASSERT(chan != AH_NULL); 380185380Ssam 381185380Ssam if (!ANI_ENA(ah)) 382185380Ssam return; 383185380Ssam 384185380Ssam aniState = ahp->ah_curani; 385185380Ssam params = aniState->params; 386185380Ssam /* First, raise noise immunity level, up to max */ 387222276Sadrian if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_NOISE_IMMUNITY_LEVEL)) && 388218763Sadrian (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) { 389185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 390185380Ssam aniState->noiseImmunityLevel + 1); 391185380Ssam return; 392185380Ssam } 393185380Ssam /* then, raise spur immunity level, up to max */ 394222276Sadrian if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_SPUR_IMMUNITY_LEVEL)) && 395218763Sadrian (aniState->spurImmunityLevel+1 < params->maxSpurImmunityLevel)) { 396185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 397185380Ssam aniState->spurImmunityLevel + 1); 398185380Ssam return; 399185380Ssam } 400185380Ssam 401185380Ssam if (ANI_ENA_RSSI(ah)) { 402185380Ssam int32_t rssi = BEACON_RSSI(ahp); 403185380Ssam if (rssi > params->rssiThrHigh) { 404185380Ssam /* 405185380Ssam * Beacon rssi is high, can turn off ofdm 406185380Ssam * weak sig detect. 407185380Ssam */ 408185380Ssam if (!aniState->ofdmWeakSigDetectOff) { 409185380Ssam ar5416AniControl(ah, 410185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 411185380Ssam AH_FALSE); 412185380Ssam ar5416AniControl(ah, 413185380Ssam HAL_ANI_SPUR_IMMUNITY_LEVEL, 0); 414185380Ssam return; 415185380Ssam } 416185380Ssam /* 417185380Ssam * If weak sig detect is already off, as last resort, 418185380Ssam * raise firstep level 419185380Ssam */ 420185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) { 421227376Sadrian if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 422227376Sadrian aniState->firstepLevel + 1)) 423227376Sadrian return; 424185380Ssam } 425185380Ssam } else if (rssi > params->rssiThrLow) { 426185380Ssam /* 427185380Ssam * Beacon rssi in mid range, need ofdm weak signal 428185380Ssam * detect, but we can raise firststepLevel. 429185380Ssam */ 430185380Ssam if (aniState->ofdmWeakSigDetectOff) 431185380Ssam ar5416AniControl(ah, 432185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 433185380Ssam AH_TRUE); 434185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) 435227376Sadrian if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 436227376Sadrian aniState->firstepLevel + 1)) 437227376Sadrian return; 438185380Ssam } else { 439185380Ssam /* 440185380Ssam * Beacon rssi is low, if in 11b/g mode, turn off ofdm 441185380Ssam * weak signal detection and zero firstepLevel to 442185380Ssam * maximize CCK sensitivity 443185380Ssam */ 444187831Ssam if (IEEE80211_IS_CHAN_CCK(chan)) { 445185380Ssam if (!aniState->ofdmWeakSigDetectOff) 446185380Ssam ar5416AniControl(ah, 447185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 448185380Ssam AH_FALSE); 449185380Ssam if (aniState->firstepLevel > 0) 450227376Sadrian if (ar5416AniControl(ah, 451227376Sadrian HAL_ANI_FIRSTEP_LEVEL, 0)) 452227376Sadrian return; 453185380Ssam } 454185380Ssam } 455185380Ssam } 456185380Ssam} 457185380Ssam 458185380Ssamstatic void 459185380Ssamar5416AniCckErrTrigger(struct ath_hal *ah) 460185380Ssam{ 461185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 462187831Ssam const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; 463185380Ssam struct ar5212AniState *aniState; 464185380Ssam const struct ar5212AniParams *params; 465185380Ssam 466185380Ssam HALASSERT(chan != AH_NULL); 467185380Ssam 468185380Ssam if (!ANI_ENA(ah)) 469185380Ssam return; 470185380Ssam 471185380Ssam /* first, raise noise immunity level, up to max */ 472185380Ssam aniState = ahp->ah_curani; 473185380Ssam params = aniState->params; 474222276Sadrian if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_NOISE_IMMUNITY_LEVEL) && 475222276Sadrian aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) { 476185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 477185380Ssam aniState->noiseImmunityLevel + 1); 478185380Ssam return; 479185380Ssam } 480185380Ssam 481185380Ssam if (ANI_ENA_RSSI(ah)) { 482185380Ssam int32_t rssi = BEACON_RSSI(ahp); 483185380Ssam if (rssi > params->rssiThrLow) { 484185380Ssam /* 485185380Ssam * Beacon signal in mid and high range, 486185380Ssam * raise firstep level. 487185380Ssam */ 488185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) 489185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 490185380Ssam aniState->firstepLevel + 1); 491185380Ssam } else { 492185380Ssam /* 493185380Ssam * Beacon rssi is low, zero firstep level to maximize 494185380Ssam * CCK sensitivity in 11b/g mode. 495185380Ssam */ 496187831Ssam if (IEEE80211_IS_CHAN_CCK(chan)) { 497185380Ssam if (aniState->firstepLevel > 0) 498185380Ssam ar5416AniControl(ah, 499185380Ssam HAL_ANI_FIRSTEP_LEVEL, 0); 500185380Ssam } 501185380Ssam } 502185380Ssam } 503185380Ssam} 504185380Ssam 505185380Ssamstatic void 506185380Ssamar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState) 507185380Ssam{ 508185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 509185380Ssam const struct ar5212AniParams *params = aniState->params; 510185380Ssam 511185380Ssam aniState->listenTime = 0; 512185380Ssam /* 513185380Ssam * NB: these are written on reset based on the 514185380Ssam * ini so we must re-write them! 515185380Ssam */ 516185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, 517185380Ssam "%s: Writing ofdmbase=%u cckbase=%u\n", __func__, 518185380Ssam params->ofdmPhyErrBase, params->cckPhyErrBase); 519185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_1, params->ofdmPhyErrBase); 520185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_2, params->cckPhyErrBase); 521185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 522219862Sadrian OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); 523185380Ssam 524185380Ssam /* Clear the mib counters and save them in the stats */ 525185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 526185380Ssam aniState->ofdmPhyErrCount = 0; 527185380Ssam aniState->cckPhyErrCount = 0; 528185380Ssam} 529185380Ssam 530185380Ssam/* 531185380Ssam * Restore/reset the ANI parameters and reset the statistics. 532185380Ssam * This routine must be called for every channel change. 533185380Ssam * 534185380Ssam * NOTE: This is where ah_curani is set; other ani code assumes 535185380Ssam * it is setup to reflect the current channel. 536185380Ssam */ 537185380Ssamvoid 538187831Ssamar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan, 539185380Ssam HAL_OPMODE opmode, int restore) 540185380Ssam{ 541185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 542187831Ssam HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); 543187831Ssam /* XXX bounds check ic_devdata */ 544187831Ssam struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata]; 545185380Ssam uint32_t rxfilter; 546185380Ssam 547187831Ssam if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) { 548187831Ssam OS_MEMZERO(aniState, sizeof(*aniState)); 549187831Ssam if (IEEE80211_IS_CHAN_2GHZ(chan)) 550187831Ssam aniState->params = &ahp->ah_aniParams24; 551187831Ssam else 552187831Ssam aniState->params = &ahp->ah_aniParams5; 553187831Ssam ichan->privFlags |= CHANNEL_ANI_INIT; 554187831Ssam HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0); 555187831Ssam } 556185380Ssam ahp->ah_curani = aniState; 557185380Ssam#if 0 558187831Ssam ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n", 559187831Ssam __func__, chan->ic_freq, chan->ic_flags, restore, opmode, 560187831Ssam ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); 561185380Ssam#else 562187831Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n", 563187831Ssam __func__, chan->ic_freq, chan->ic_flags, restore, opmode, 564187831Ssam ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); 565185380Ssam#endif 566185380Ssam OS_MARK(ah, AH_MARK_ANI_RESET, opmode); 567185380Ssam 568185380Ssam /* 569185380Ssam * Turn off PHY error frame delivery while we futz with settings. 570185380Ssam */ 571224514Sadrian rxfilter = ah->ah_getRxFilter(ah); 572224514Sadrian ah->ah_setRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR); 573224514Sadrian 574185380Ssam /* 575224514Sadrian * If ANI is disabled at this point, don't set the default 576224514Sadrian * ANI parameter settings - leave the HAL settings there. 577224514Sadrian * This is (currently) needed for reliable radar detection. 578224514Sadrian */ 579224514Sadrian if (! ANI_ENA(ah)) { 580224514Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: ANI disabled\n", 581224514Sadrian __func__); 582224514Sadrian goto finish; 583224514Sadrian } 584224514Sadrian 585224514Sadrian 586224514Sadrian /* 587185380Ssam * Automatic processing is done only in station mode right now. 588185380Ssam */ 589185380Ssam if (opmode == HAL_M_STA) 590185380Ssam ahp->ah_procPhyErr |= HAL_RSSI_ANI_ENA; 591185380Ssam else 592185380Ssam ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA; 593185380Ssam /* 594185380Ssam * Set all ani parameters. We either set them to initial 595185380Ssam * values or restore the previous ones for the channel. 596185380Ssam * XXX if ANI follows hardware, we don't care what mode we're 597185380Ssam * XXX in, we should keep the ani parameters 598185380Ssam */ 599187831Ssam if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) { 600185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 601185380Ssam aniState->noiseImmunityLevel); 602185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 603185380Ssam aniState->spurImmunityLevel); 604185380Ssam ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 605185380Ssam !aniState->ofdmWeakSigDetectOff); 606185380Ssam ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, 607185380Ssam aniState->cckWeakSigThreshold); 608185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 609185380Ssam aniState->firstepLevel); 610185380Ssam } else { 611185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 0); 612185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 0); 613185380Ssam ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 614185380Ssam AH_TRUE); 615185380Ssam ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE); 616185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0); 617187831Ssam ichan->privFlags |= CHANNEL_ANI_SETUP; 618185380Ssam } 619224514Sadrian 620224514Sadrian /* 621224514Sadrian * In case the counters haven't yet been setup; set them up. 622224514Sadrian */ 623224514Sadrian enableAniMIBCounters(ah, aniState->params); 624185380Ssam ar5416AniRestart(ah, aniState); 625185380Ssam 626224514Sadrianfinish: 627185380Ssam /* restore RX filter mask */ 628224514Sadrian ah->ah_setRxFilter(ah, rxfilter); 629185380Ssam} 630185380Ssam 631185380Ssam/* 632185380Ssam * Process a MIB interrupt. We may potentially be invoked because 633185380Ssam * any of the MIB counters overflow/trigger so don't assume we're 634185380Ssam * here because a PHY error counter triggered. 635185380Ssam */ 636185380Ssamvoid 637185380Ssamar5416ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats) 638185380Ssam{ 639185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 640185380Ssam uint32_t phyCnt1, phyCnt2; 641185380Ssam 642185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x " 643185380Ssam "filtofdm 0x%x filtcck 0x%x\n", 644185380Ssam __func__, OS_REG_READ(ah, AR_MIBC), 645185380Ssam OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2), 646185380Ssam OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK)); 647185380Ssam 648185380Ssam /* 649185380Ssam * First order of business is to clear whatever caused 650185380Ssam * the interrupt so we don't keep getting interrupted. 651185380Ssam * We have the usual mib counters that are reset-on-read 652185380Ssam * and the additional counters that appeared starting in 653185380Ssam * Hainan. We collect the mib counters and explicitly 654185380Ssam * zero additional counters we are not using. Anything 655185380Ssam * else is reset only if it caused the interrupt. 656185380Ssam */ 657185380Ssam /* NB: these are not reset-on-read */ 658185380Ssam phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1); 659185380Ssam phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2); 660185380Ssam /* not used, always reset them in case they are the cause */ 661185380Ssam OS_REG_WRITE(ah, AR_FILTOFDM, 0); 662185380Ssam OS_REG_WRITE(ah, AR_FILTCCK, 0); 663185380Ssam if ((OS_REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING) == 0) 664185380Ssam OS_REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR); 665185380Ssam 666185380Ssam /* Clear the mib counters and save them in the stats */ 667185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 668185380Ssam ahp->ah_stats.ast_nodestats = *stats; 669185380Ssam 670185380Ssam /* 671185380Ssam * Check for an ani stat hitting the trigger threshold. 672185380Ssam * When this happens we get a MIB interrupt and the top 673185380Ssam * 2 bits of the counter register will be 0b11, hence 674185380Ssam * the mask check of phyCnt?. 675185380Ssam */ 676185380Ssam if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) || 677185380Ssam ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) { 678185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 679185380Ssam const struct ar5212AniParams *params = aniState->params; 680185380Ssam uint32_t ofdmPhyErrCnt, cckPhyErrCnt; 681185380Ssam 682185380Ssam ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase; 683185380Ssam ahp->ah_stats.ast_ani_ofdmerrs += 684185380Ssam ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 685185380Ssam aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 686185380Ssam 687185380Ssam cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase; 688185380Ssam ahp->ah_stats.ast_ani_cckerrs += 689185380Ssam cckPhyErrCnt - aniState->cckPhyErrCount; 690185380Ssam aniState->cckPhyErrCount = cckPhyErrCnt; 691185380Ssam 692185380Ssam /* 693185380Ssam * NB: figure out which counter triggered. If both 694185380Ssam * trigger we'll only deal with one as the processing 695185380Ssam * clobbers the error counter so the trigger threshold 696185380Ssam * check will never be true. 697185380Ssam */ 698185380Ssam if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh) 699185380Ssam ar5416AniOfdmErrTrigger(ah); 700185380Ssam if (aniState->cckPhyErrCount > params->cckTrigHigh) 701185380Ssam ar5416AniCckErrTrigger(ah); 702185380Ssam /* NB: always restart to insure the h/w counters are reset */ 703185380Ssam ar5416AniRestart(ah, aniState); 704185380Ssam } 705185380Ssam} 706185380Ssam 707185380Ssamstatic void 708185380Ssamar5416AniLowerImmunity(struct ath_hal *ah) 709185380Ssam{ 710185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 711185380Ssam struct ar5212AniState *aniState; 712185380Ssam const struct ar5212AniParams *params; 713185380Ssam 714185380Ssam HALASSERT(ANI_ENA(ah)); 715185380Ssam 716185380Ssam aniState = ahp->ah_curani; 717185380Ssam params = aniState->params; 718185380Ssam if (ANI_ENA_RSSI(ah)) { 719185380Ssam int32_t rssi = BEACON_RSSI(ahp); 720185380Ssam if (rssi > params->rssiThrHigh) { 721185380Ssam /* 722185380Ssam * Beacon signal is high, leave ofdm weak signal 723185380Ssam * detection off or it may oscillate. Let it fall 724185380Ssam * through. 725185380Ssam */ 726185380Ssam } else if (rssi > params->rssiThrLow) { 727185380Ssam /* 728185380Ssam * Beacon rssi in mid range, turn on ofdm weak signal 729185380Ssam * detection or lower firstep level. 730185380Ssam */ 731185380Ssam if (aniState->ofdmWeakSigDetectOff) { 732227376Sadrian if (ar5416AniControl(ah, 733185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 734227376Sadrian AH_TRUE)) 735227376Sadrian return; 736185380Ssam } 737185380Ssam if (aniState->firstepLevel > 0) { 738227376Sadrian if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 739227376Sadrian aniState->firstepLevel - 1)) 740227376Sadrian return; 741185380Ssam } 742185380Ssam } else { 743185380Ssam /* 744185380Ssam * Beacon rssi is low, reduce firstep level. 745185380Ssam */ 746185380Ssam if (aniState->firstepLevel > 0) { 747227376Sadrian if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 748227376Sadrian aniState->firstepLevel - 1)) 749227376Sadrian return; 750185380Ssam } 751185380Ssam } 752185380Ssam } 753185380Ssam /* then lower spur immunity level, down to zero */ 754185380Ssam if (aniState->spurImmunityLevel > 0) { 755227376Sadrian if (ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 756227376Sadrian aniState->spurImmunityLevel - 1)) 757227376Sadrian return; 758185380Ssam } 759185380Ssam /* 760185380Ssam * if all else fails, lower noise immunity level down to a min value 761185380Ssam * zero for now 762185380Ssam */ 763185380Ssam if (aniState->noiseImmunityLevel > 0) { 764227376Sadrian if (ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 765227376Sadrian aniState->noiseImmunityLevel - 1)) 766227376Sadrian return; 767185380Ssam } 768185380Ssam} 769185380Ssam 770185380Ssam#define CLOCK_RATE 44000 /* XXX use mac_usec or similar */ 771185380Ssam/* convert HW counter values to ms using 11g clock rate, goo9d enough 772185380Ssam for 11a and Turbo */ 773185380Ssam 774185380Ssam/* 775185380Ssam * Return an approximation of the time spent ``listening'' by 776185380Ssam * deducting the cycles spent tx'ing and rx'ing from the total 777185380Ssam * cycle count since our last call. A return value <0 indicates 778185380Ssam * an invalid/inconsistent time. 779185380Ssam */ 780185380Ssamstatic int32_t 781185380Ssamar5416AniGetListenTime(struct ath_hal *ah) 782185380Ssam{ 783185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 784185380Ssam struct ar5212AniState *aniState; 785185380Ssam uint32_t txFrameCount, rxFrameCount, cycleCount; 786185380Ssam int32_t listenTime; 787185380Ssam 788185380Ssam txFrameCount = OS_REG_READ(ah, AR_TFCNT); 789185380Ssam rxFrameCount = OS_REG_READ(ah, AR_RFCNT); 790185380Ssam cycleCount = OS_REG_READ(ah, AR_CCCNT); 791185380Ssam 792185380Ssam aniState = ahp->ah_curani; 793185380Ssam if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) { 794185380Ssam /* 795185380Ssam * Cycle counter wrap (or initial call); it's not possible 796185380Ssam * to accurately calculate a value because the registers 797185380Ssam * right shift rather than wrap--so punt and return 0. 798185380Ssam */ 799185380Ssam listenTime = 0; 800185380Ssam ahp->ah_stats.ast_ani_lzero++; 801185380Ssam } else { 802185380Ssam int32_t ccdelta = cycleCount - aniState->cycleCount; 803185380Ssam int32_t rfdelta = rxFrameCount - aniState->rxFrameCount; 804185380Ssam int32_t tfdelta = txFrameCount - aniState->txFrameCount; 805185380Ssam listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE; 806185380Ssam } 807185380Ssam aniState->cycleCount = cycleCount; 808185380Ssam aniState->txFrameCount = txFrameCount; 809185380Ssam aniState->rxFrameCount = rxFrameCount; 810185380Ssam return listenTime; 811185380Ssam} 812185380Ssam 813185380Ssam/* 814185380Ssam * Update ani stats in preparation for listen time processing. 815185380Ssam */ 816185380Ssamstatic void 817185380SsamupdateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState) 818185380Ssam{ 819185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 820185380Ssam const struct ar5212AniParams *params = aniState->params; 821185380Ssam uint32_t phyCnt1, phyCnt2; 822185380Ssam int32_t ofdmPhyErrCnt, cckPhyErrCnt; 823185380Ssam 824185380Ssam /* Clear the mib counters and save them in the stats */ 825185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 826185380Ssam 827185380Ssam /* NB: these are not reset-on-read */ 828185380Ssam phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1); 829185380Ssam phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2); 830185380Ssam 831185380Ssam /* NB: these are spec'd to never roll-over */ 832185380Ssam ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase; 833185380Ssam if (ofdmPhyErrCnt < 0) { 834185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n", 835185380Ssam ofdmPhyErrCnt, phyCnt1); 836185380Ssam ofdmPhyErrCnt = AR_PHY_COUNTMAX; 837185380Ssam } 838185380Ssam ahp->ah_stats.ast_ani_ofdmerrs += 839185380Ssam ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 840185380Ssam aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 841185380Ssam 842185380Ssam cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase; 843185380Ssam if (cckPhyErrCnt < 0) { 844185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n", 845185380Ssam cckPhyErrCnt, phyCnt2); 846185380Ssam cckPhyErrCnt = AR_PHY_COUNTMAX; 847185380Ssam } 848185380Ssam ahp->ah_stats.ast_ani_cckerrs += 849185380Ssam cckPhyErrCnt - aniState->cckPhyErrCount; 850185380Ssam aniState->cckPhyErrCount = cckPhyErrCnt; 851185380Ssam} 852185380Ssam 853217684Sadrianvoid 854217684Sadrianar5416RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats, 855217684Sadrian const struct ieee80211_channel *chan) 856217684Sadrian{ 857217684Sadrian struct ath_hal_5212 *ahp = AH5212(ah); 858217684Sadrian ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi; 859217684Sadrian} 860217684Sadrian 861185380Ssam/* 862185380Ssam * Do periodic processing. This routine is called from the 863185380Ssam * driver's rx interrupt handler after processing frames. 864185380Ssam */ 865185380Ssamvoid 866217684Sadrianar5416AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan) 867185380Ssam{ 868185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 869185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 870185380Ssam const struct ar5212AniParams *params; 871185380Ssam int32_t listenTime; 872185380Ssam 873185380Ssam /* XXX can aniState be null? */ 874185380Ssam if (aniState == AH_NULL) 875185380Ssam return; 876185380Ssam if (!ANI_ENA(ah)) 877185380Ssam return; 878185380Ssam 879185380Ssam listenTime = ar5416AniGetListenTime(ah); 880185380Ssam if (listenTime < 0) { 881185380Ssam ahp->ah_stats.ast_ani_lneg++; 882185380Ssam /* restart ANI period if listenTime is invalid */ 883185380Ssam ar5416AniRestart(ah, aniState); 884185380Ssam } 885185380Ssam /* XXX beware of overflow? */ 886185380Ssam aniState->listenTime += listenTime; 887185380Ssam 888185380Ssam OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime); 889185380Ssam 890185380Ssam params = aniState->params; 891185380Ssam if (aniState->listenTime > 5*params->period) { 892185380Ssam /* 893185380Ssam * Check to see if need to lower immunity if 894185380Ssam * 5 aniPeriods have passed 895185380Ssam */ 896185380Ssam updateMIBStats(ah, aniState); 897185380Ssam if (aniState->ofdmPhyErrCount <= aniState->listenTime * 898185380Ssam params->ofdmTrigLow/1000 && 899185380Ssam aniState->cckPhyErrCount <= aniState->listenTime * 900185380Ssam params->cckTrigLow/1000) 901185380Ssam ar5416AniLowerImmunity(ah); 902185380Ssam ar5416AniRestart(ah, aniState); 903185380Ssam } else if (aniState->listenTime > params->period) { 904185380Ssam updateMIBStats(ah, aniState); 905185380Ssam /* check to see if need to raise immunity */ 906185380Ssam if (aniState->ofdmPhyErrCount > aniState->listenTime * 907185380Ssam params->ofdmTrigHigh / 1000) { 908219767Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 909219767Sadrian "%s: OFDM err %u listenTime %u\n", __func__, 910219767Sadrian aniState->ofdmPhyErrCount, aniState->listenTime); 911185380Ssam ar5416AniOfdmErrTrigger(ah); 912185380Ssam ar5416AniRestart(ah, aniState); 913185380Ssam } else if (aniState->cckPhyErrCount > aniState->listenTime * 914185380Ssam params->cckTrigHigh / 1000) { 915219767Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 916219767Sadrian "%s: CCK err %u listenTime %u\n", __func__, 917219767Sadrian aniState->ofdmPhyErrCount, aniState->listenTime); 918185380Ssam ar5416AniCckErrTrigger(ah); 919185380Ssam ar5416AniRestart(ah, aniState); 920185380Ssam } 921185380Ssam } 922185380Ssam} 923