ata-all.c revision 145250
1/*- 2 * Copyright (c) 1998 - 2005 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: head/sys/dev/ata/ata-all.c 145250 2005-04-18 21:21:26Z phk $"); 31 32#include "opt_ata.h" 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/ata.h> 36#include <sys/kernel.h> 37#include <sys/module.h> 38#include <sys/endian.h> 39#include <sys/ctype.h> 40#include <sys/conf.h> 41#include <sys/bus.h> 42#include <sys/bio.h> 43#include <sys/malloc.h> 44#include <sys/sysctl.h> 45#include <sys/sema.h> 46#include <sys/taskqueue.h> 47#include <vm/uma.h> 48#include <machine/stdarg.h> 49#include <machine/resource.h> 50#include <machine/bus.h> 51#include <sys/rman.h> 52#ifdef __alpha__ 53#include <machine/md_var.h> 54#endif 55#include <dev/ata/ata-all.h> 56#include <dev/ata/ata-commands.h> 57#include <ata_if.h> 58 59/* device structure */ 60static d_ioctl_t ata_ioctl; 61static struct cdevsw ata_cdevsw = { 62 .d_version = D_VERSION, 63 .d_flags = D_NEEDGIANT, /* we need this as newbus isn't safe */ 64 .d_ioctl = ata_ioctl, 65 .d_name = "ata", 66}; 67 68/* prototypes */ 69static void ata_interrupt(void *); 70static void ata_boot_attach(void); 71device_t ata_add_child(device_t parent, struct ata_device *atadev, int unit); 72static int ata_identify(device_t dev); 73 74/* global vars */ 75MALLOC_DEFINE(M_ATA, "ATA generic", "ATA driver generic layer"); 76int (*ata_ioctl_func)(struct ata_cmd *iocmd) = NULL; 77devclass_t ata_devclass; 78uma_zone_t ata_request_zone; 79uma_zone_t ata_composite_zone; 80int ata_wc = 1; 81 82/* local vars */ 83static struct intr_config_hook *ata_delayed_attach = NULL; 84static struct root_hold_token *ata_root_hold_token; 85static int ata_dma = 1; 86static int atapi_dma = 1; 87 88/* sysctl vars */ 89SYSCTL_NODE(_hw, OID_AUTO, ata, CTLFLAG_RD, 0, "ATA driver parameters"); 90TUNABLE_INT("hw.ata.ata_dma", &ata_dma); 91SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma, CTLFLAG_RDTUN, &ata_dma, 0, 92 "ATA disk DMA mode control"); 93TUNABLE_INT("hw.ata.atapi_dma", &atapi_dma); 94SYSCTL_INT(_hw_ata, OID_AUTO, atapi_dma, CTLFLAG_RDTUN, &atapi_dma, 0, 95 "ATAPI device DMA mode control"); 96TUNABLE_INT("hw.ata.wc", &ata_wc); 97SYSCTL_INT(_hw_ata, OID_AUTO, wc, CTLFLAG_RDTUN, &ata_wc, 0, 98 "ATA disk write caching"); 99 100/* 101 * newbus device interface related functions 102 */ 103int 104ata_probe(device_t dev) 105{ 106 return 0; 107} 108 109int 110ata_attach(device_t dev) 111{ 112 struct ata_channel *ch = device_get_softc(dev); 113 int error, rid; 114 115 /* check that we have a virgin channel to attach */ 116 if (ch->r_irq) 117 return EEXIST; 118 119 /* initialize the softc basics */ 120 ch->dev = dev; 121 ch->state = ATA_IDLE; 122 bzero(&ch->state_mtx, sizeof(struct mtx)); 123 mtx_init(&ch->state_mtx, "ATA state lock", NULL, MTX_DEF); 124 bzero(&ch->queue_mtx, sizeof(struct mtx)); 125 mtx_init(&ch->queue_mtx, "ATA queue lock", NULL, MTX_DEF); 126 TAILQ_INIT(&ch->ata_queue); 127 128 /* reset the controller HW, the channel and device(s) */ 129 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 130 tsleep(&error, PRIBIO, "ataatch", 1); 131 ch->hw.reset(ch); 132 ATA_LOCKING(dev, ATA_LF_UNLOCK); 133 134 /* setup interrupt delivery */ 135 rid = ATA_IRQ_RID; 136 ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 137 RF_SHAREABLE | RF_ACTIVE); 138 if (!ch->r_irq) { 139 device_printf(dev, "unable to allocate interrupt\n"); 140 return ENXIO; 141 } 142 if ((error = bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, 143 ata_interrupt, ch, &ch->ih))) { 144 device_printf(dev, "unable to setup interrupt\n"); 145 return error; 146 } 147 148 /* do not attach devices if we are in early boot */ 149 if (ata_delayed_attach) 150 return 0; 151 152 /* probe and attach devices on this channel */ 153 ata_identify(dev); 154 return 0; 155} 156 157int 158ata_detach(device_t dev) 159{ 160 struct ata_channel *ch = device_get_softc(dev); 161 device_t *children; 162 int nchildren, i; 163 164 /* check that we have a vaild channel to detach */ 165 if (!ch->r_irq) 166 return ENXIO; 167 168 /* detach & delete all children */ 169 if (!device_get_children(dev, &children, &nchildren)) { 170 for (i = 0; i < nchildren; i++) 171 if (children[i]) 172 device_delete_child(dev, children[i]); 173 free(children, M_TEMP); 174 } 175 176 /* release resources */ 177 bus_teardown_intr(dev, ch->r_irq, ch->ih); 178 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 179 ch->r_irq = NULL; 180 mtx_destroy(&ch->state_mtx); 181 mtx_destroy(&ch->queue_mtx); 182 return 0; 183} 184 185int 186ata_reinit(device_t dev) 187{ 188 struct ata_channel *ch = device_get_softc(dev); 189 device_t *children; 190 int nchildren, i; 191 192 if (!ch || !ch->r_irq) 193 return ENXIO; 194 195 if (bootverbose) 196 device_printf(dev, "reiniting channel ..\n"); 197 198 /* poll for locking the channel */ 199 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 200 tsleep(&dev, PRIBIO, "atarini", 1); 201 202 /* grap the channel lock */ 203 mtx_lock(&ch->state_mtx); 204 ch->state = ATA_STALL_QUEUE; 205 mtx_unlock(&ch->state_mtx); 206 207 /* reset the controller HW, the channel and device(s) */ 208 ch->hw.reset(ch); 209 210 /* reinit the children and delete any that fails */ 211 if (!device_get_children(dev, &children, &nchildren)) { 212 mtx_lock(&Giant); /* newbus suckage it needs Giant */ 213 for (i = 0; i < nchildren; i++) { 214 if (children[i] && device_is_attached(children[i])) 215 if (ATA_REINIT(children[i])) { 216 if (ch->running->dev == children[i]) { 217 device_printf(ch->running->dev, 218 "FAILURE - device detached\n"); 219 ch->running->dev = NULL; 220 ch->running = NULL; 221 } 222 device_delete_child(dev, children[i]); 223 } 224 } 225 free(children, M_TEMP); 226 mtx_unlock(&Giant); /* newbus suckage dealt with, release Giant */ 227 } 228 229 /* catch running request if any */ 230 ata_catch_inflight(ch); 231 232 /* we're done release the channel for new work */ 233 mtx_lock(&ch->state_mtx); 234 ch->state = ATA_IDLE; 235 mtx_unlock(&ch->state_mtx); 236 ATA_LOCKING(dev, ATA_LF_UNLOCK); 237 238 if (bootverbose) 239 device_printf(dev, "reinit done ..\n"); 240 241 /* kick off requests on the queue */ 242 ata_start(dev); 243 return 0; 244} 245 246int 247ata_suspend(device_t dev) 248{ 249 struct ata_channel *ch; 250 251 if (!dev || !(ch = device_get_softc(dev))) 252 return ENXIO; 253 254 /* wait for the channel to be IDLE before when enter suspend mode */ 255 while (1) { 256 mtx_lock(&ch->state_mtx); 257 if (ch->state == ATA_IDLE) { 258 ch->state = ATA_ACTIVE; 259 mtx_unlock(&ch->state_mtx); 260 break; 261 } 262 mtx_unlock(&ch->state_mtx); 263 tsleep(ch, PRIBIO, "atasusp", hz/10); 264 } 265 ATA_LOCKING(dev, ATA_LF_UNLOCK); 266 return 0; 267} 268 269int 270ata_resume(device_t dev) 271{ 272 struct ata_channel *ch; 273 int error; 274 275 if (!dev || !(ch = device_get_softc(dev))) 276 return ENXIO; 277 278 /* reinit the devices, we dont know what mode/state they have */ 279 error = ata_reinit(dev); 280 281 /* kick off requests on the queue */ 282 ata_start(dev); 283 return error; 284} 285 286static void 287ata_interrupt(void *data) 288{ 289 struct ata_channel *ch = (struct ata_channel *)data; 290 struct ata_request *request; 291 292 mtx_lock(&ch->state_mtx); 293 do { 294 /* do we have a running request */ 295 if (ch->state & ATA_TIMEOUT || !(request = ch->running)) 296 break; 297 298 ATA_DEBUG_RQ(request, "interrupt"); 299 300 /* ignore interrupt if device is busy */ 301 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { 302 DELAY(100); 303 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) 304 break; 305 } 306 307 /* check for the right state */ 308 if (ch->state == ATA_ACTIVE || ch->state == ATA_STALL_QUEUE) { 309 request->flags |= ATA_R_INTR_SEEN; 310 } 311 else { 312 device_printf(request->dev, 313 "interrupt state=%d unexpected\n", ch->state); 314 break; 315 } 316 317 /* 318 * we have the HW locks, so start the tranaction for this request 319 * if it finishes immediately we dont need to wait for interrupt 320 */ 321 if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) { 322 ch->running = NULL; 323 if (ch->state == ATA_ACTIVE) 324 ch->state = ATA_IDLE; 325 mtx_unlock(&ch->state_mtx); 326 ATA_LOCKING(ch->dev, ATA_LF_UNLOCK); 327 ata_finish(request); 328 return; 329 } 330 else { 331 request->flags &= ~ATA_R_INTR_SEEN; 332 } 333 } while (0); 334 mtx_unlock(&ch->state_mtx); 335} 336 337/* 338 * device related interfaces 339 */ 340static int 341ata_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, 342 int32_t flag, struct thread *td) 343{ 344 struct ata_cmd *iocmd = (struct ata_cmd *)addr; 345 device_t *children, device = NULL; 346 struct ata_request *request; 347 caddr_t buf; 348 int nchildren, i; 349 int error = ENOTTY; 350 351 if (cmd != IOCATA) 352 return ENOTSUP; 353 if (iocmd->cmd == ATAGMAXCHANNEL) { 354 iocmd->u.maxchan = devclass_get_maxunit(ata_devclass); 355 return 0; 356 } 357 if (iocmd->channel < 0 || 358 iocmd->channel >= devclass_get_maxunit(ata_devclass)) { 359 return ENXIO; 360 } 361 if (!(device = devclass_get_device(ata_devclass, iocmd->channel))) 362 return ENXIO; 363 364 switch (iocmd->cmd) { 365 case ATAGPARM: 366 if (!device_get_children(device, &children, &nchildren)) { 367 struct ata_channel *ch; 368 369 if (!(ch = device_get_softc(device))) 370 return ENXIO; 371 iocmd->u.param.type[0] = 372 ch->devices & (ATA_ATA_MASTER | ATA_ATAPI_MASTER); 373 iocmd->u.param.type[1] = 374 ch->devices & (ATA_ATA_SLAVE | ATA_ATAPI_SLAVE); 375 for (i = 0; i < nchildren; i++) { 376 if (children[i] && device_is_attached(children[i])) { 377 struct ata_device *atadev = device_get_softc(children[i]); 378 379 if (atadev->unit == ATA_MASTER) { 380 strcpy(iocmd->u.param.name[0], 381 device_get_nameunit(children[i])); 382 bcopy(&atadev->param, &iocmd->u.param.params[0], 383 sizeof(struct ata_params)); 384 } 385 if (atadev->unit == ATA_SLAVE) { 386 strcpy(iocmd->u.param.name[1], 387 device_get_nameunit(children[i])); 388 bcopy(&atadev->param, &iocmd->u.param.params[1], 389 sizeof(struct ata_params)); 390 } 391 } 392 } 393 free(children, M_TEMP); 394 error = 0; 395 } 396 else 397 error = ENXIO; 398 break; 399 400 case ATAGMODE: 401 if (!device_get_children(device, &children, &nchildren)) { 402 for (i = 0; i < nchildren; i++) { 403 if (children[i] && device_is_attached(children[i])) { 404 struct ata_device *atadev = device_get_softc(children[i]); 405 406 atadev = device_get_softc(children[i]); 407 if (atadev->unit == ATA_MASTER) 408 iocmd->u.mode.mode[0] = atadev->mode; 409 if (atadev->unit == ATA_SLAVE) 410 iocmd->u.mode.mode[1] = atadev->mode; 411 } 412 free(children, M_TEMP); 413 } 414 error = 0; 415 } 416 else 417 error = ENXIO; 418 break; 419 420 case ATASMODE: 421 if (!device_get_children(device, &children, &nchildren)) { 422 for (i = 0; i < nchildren; i++) { 423 if (children[i] && device_is_attached(children[i])) { 424 struct ata_device *atadev = device_get_softc(children[i]); 425 426 if (atadev->unit == ATA_MASTER) { 427 atadev->mode = iocmd->u.mode.mode[0]; 428 ATA_SETMODE(device, children[i]); 429 iocmd->u.mode.mode[0] = atadev->mode; 430 } 431 if (atadev->unit == ATA_SLAVE) { 432 atadev->mode = iocmd->u.mode.mode[1]; 433 ATA_SETMODE(device, children[i]); 434 iocmd->u.mode.mode[1] = atadev->mode; 435 } 436 } 437 } 438 free(children, M_TEMP); 439 error = 0; 440 } 441 else 442 error = ENXIO; 443 break; 444 445 case ATAREQUEST: 446 if (!device_get_children(device, &children, &nchildren)) { 447 for (i = 0; i < nchildren; i++) { 448 if (children[i] && device_is_attached(children[i])) { 449 struct ata_device *atadev = device_get_softc(children[i]); 450 451 if (ATA_DEV(atadev->unit) == iocmd->device) { 452 if (!(buf = malloc(iocmd->u.request.count, 453 M_ATA, M_NOWAIT))) { 454 error = ENOMEM; 455 break; 456 } 457 if (!(request = ata_alloc_request())) { 458 error = ENOMEM; 459 free(buf, M_ATA); 460 break; 461 } 462 if (iocmd->u.request.flags & ATA_CMD_WRITE) { 463 error = copyin(iocmd->u.request.data, buf, 464 iocmd->u.request.count); 465 if (error) { 466 free(buf, M_ATA); 467 ata_free_request(request); 468 break; 469 } 470 } 471 request->dev = atadev->dev; 472 if (iocmd->u.request.flags & ATA_CMD_ATAPI) { 473 request->flags = ATA_R_ATAPI; 474 bcopy(iocmd->u.request.u.atapi.ccb, 475 request->u.atapi.ccb, 16); 476 } 477 else { 478 request->u.ata.command = 479 iocmd->u.request.u.ata.command; 480 request->u.ata.feature = 481 iocmd->u.request.u.ata.feature; 482 request->u.ata.lba = iocmd->u.request.u.ata.lba; 483 request->u.ata.count = iocmd->u.request.u.ata.count; 484 } 485 request->timeout = iocmd->u.request.timeout; 486 request->data = buf; 487 request->bytecount = iocmd->u.request.count; 488 request->transfersize = request->bytecount; 489 if (iocmd->u.request.flags & ATA_CMD_CONTROL) 490 request->flags |= ATA_R_CONTROL; 491 if (iocmd->u.request.flags & ATA_CMD_READ) 492 request->flags |= ATA_R_READ; 493 if (iocmd->u.request.flags & ATA_CMD_WRITE) 494 request->flags |= ATA_R_WRITE; 495 ata_queue_request(request); 496 if (!(request->flags & ATA_R_ATAPI)) { 497 iocmd->u.request.u.ata.command = 498 request->u.ata.command; 499 iocmd->u.request.u.ata.feature = 500 request->u.ata.feature; 501 iocmd->u.request.u.ata.lba = request->u.ata.lba; 502 iocmd->u.request.u.ata.count = request->u.ata.count; 503 } 504 iocmd->u.request.error = request->result; 505 if (iocmd->u.request.flags & ATA_CMD_READ) 506 error = copyout(buf, iocmd->u.request.data, 507 iocmd->u.request.count); 508 else 509 error = 0; 510 free(buf, M_ATA); 511 ata_free_request(request); 512 break; 513 } 514 } 515 } 516 free(children, M_TEMP); 517 } 518 else 519 error = ENXIO; 520 break; 521 522 case ATAREINIT: 523 error = ata_reinit(device); 524 ata_start(device); 525 break; 526 527 case ATAATTACH: 528 /* SOS should enable channel HW on controller XXX */ 529 error = ata_attach(device); 530 break; 531 532 case ATADETACH: 533 error = ata_detach(device); 534 /* SOS should disable channel HW on controller XXX */ 535 break; 536 537 default: 538 if (ata_ioctl_func) 539 error = ata_ioctl_func(iocmd); 540 } 541 return error; 542} 543 544static void 545ata_boot_attach(void) 546{ 547 struct ata_channel *ch; 548 int ctlr; 549 550 /* release the hook that got us here, only needed during boot */ 551 if (ata_delayed_attach) { 552 config_intrhook_disestablish(ata_delayed_attach); 553 free(ata_delayed_attach, M_TEMP); 554 ata_delayed_attach = NULL; 555 } 556 557 /* kick of probe and attach on all channels */ 558 for (ctlr = 0; ctlr < devclass_get_maxunit(ata_devclass); ctlr++) { 559 if ((ch = devclass_get_softc(ata_devclass, ctlr))) { 560 ata_identify(ch->dev); 561 } 562 } 563 root_mount_rel(ata_root_hold_token); 564} 565 566/* 567 * misc support functions 568 */ 569device_t 570ata_add_child(device_t parent, struct ata_device *atadev, int unit) 571{ 572 struct ata_channel *ch = device_get_softc(parent); 573 device_t child; 574 575 if ((child = device_add_child(parent, NULL, unit))) { 576 char buffer[64]; 577 578 device_set_softc(child, atadev); 579 sprintf(buffer, "%.40s/%.8s", 580 atadev->param.model, atadev->param.revision); 581 device_set_desc_copy(child, buffer); 582 device_quiet(child); 583 atadev->dev = child; 584 atadev->max_iosize = DEV_BSIZE; 585 atadev->mode = ATA_PIO_MAX; 586 if (atadev->param.config & ATA_PROTO_ATAPI) { 587 if (atapi_dma && ch->dma && 588 (atadev->param.config & ATA_DRQ_MASK) != ATA_DRQ_INTR && 589 ata_umode(&atadev->param) >= ATA_UDMA2) 590 atadev->mode = ATA_DMA_MAX; 591 } 592 else { 593 if (ata_dma && ch->dma) 594 atadev->mode = ATA_DMA_MAX; 595 } 596 } 597 return child; 598} 599 600static int 601ata_identify(device_t dev) 602{ 603 struct ata_channel *ch = device_get_softc(dev); 604 struct ata_device *master, *slave; 605 int master_res = EIO, slave_res = EIO, master_unit = -1, slave_unit = -1; 606 607 if (!(master = malloc(sizeof(struct ata_device), 608 M_ATA, M_NOWAIT | M_ZERO))) { 609 device_printf(dev, "out of memory\n"); 610 return ENOMEM; 611 } 612 master->unit = ATA_MASTER; 613 if (!(slave = malloc(sizeof(struct ata_device), 614 M_ATA, M_NOWAIT | M_ZERO))) { 615 free(master, M_ATA); 616 device_printf(dev, "out of memory\n"); 617 return ENOMEM; 618 } 619 slave->unit = ATA_SLAVE; 620 621 /* wait for the channel to be IDLE then grab it before touching HW */ 622 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 623 tsleep(ch, PRIBIO, "ataidnt1", 1); 624 while (1) { 625 mtx_lock(&ch->state_mtx); 626 if (ch->state == ATA_IDLE) { 627 ch->state = ATA_ACTIVE; 628 mtx_unlock(&ch->state_mtx); 629 break; 630 } 631 mtx_unlock(&ch->state_mtx); 632 tsleep(ch, PRIBIO, "ataidnt2", 1); 633 } 634 635 if (ch->devices & ATA_ATA_SLAVE) { 636 slave_res = ata_getparam(dev, slave, ATA_ATA_IDENTIFY); 637#ifdef ATA_STATIC_ID 638 slave_unit = (device_get_unit(dev) << 1) + 1; 639#endif 640 } 641 else if (ch->devices & ATA_ATAPI_SLAVE) 642 slave_res = ata_getparam(dev, slave, ATA_ATAPI_IDENTIFY); 643 644 if (ch->devices & ATA_ATA_MASTER) { 645 master_res = ata_getparam(dev, master, ATA_ATA_IDENTIFY); 646#ifdef ATA_STATIC_ID 647 master_unit = (device_get_unit(dev) << 1); 648#endif 649 } 650 else if (ch->devices & ATA_ATAPI_MASTER) 651 master_res = ata_getparam(dev, master, ATA_ATAPI_IDENTIFY); 652 653 if (master_res || !ata_add_child(dev, master, master_unit)) 654 free(master, M_ATA); 655 656 if (slave_res || !ata_add_child(dev, slave, slave_unit)) 657 free(slave, M_ATA); 658 659 mtx_lock(&ch->state_mtx); 660 ch->state = ATA_IDLE; 661 mtx_unlock(&ch->state_mtx); 662 ATA_LOCKING(dev, ATA_LF_UNLOCK); 663 664 bus_generic_probe(dev); 665 bus_generic_attach(dev); 666 return 0; 667} 668 669void 670ata_default_registers(struct ata_channel *ch) 671{ 672 /* fill in the defaults from whats setup already */ 673 ch->r_io[ATA_ERROR].res = ch->r_io[ATA_FEATURE].res; 674 ch->r_io[ATA_ERROR].offset = ch->r_io[ATA_FEATURE].offset; 675 ch->r_io[ATA_IREASON].res = ch->r_io[ATA_COUNT].res; 676 ch->r_io[ATA_IREASON].offset = ch->r_io[ATA_COUNT].offset; 677 ch->r_io[ATA_STATUS].res = ch->r_io[ATA_COMMAND].res; 678 ch->r_io[ATA_STATUS].offset = ch->r_io[ATA_COMMAND].offset; 679 ch->r_io[ATA_ALTSTAT].res = ch->r_io[ATA_CONTROL].res; 680 ch->r_io[ATA_ALTSTAT].offset = ch->r_io[ATA_CONTROL].offset; 681} 682 683void 684ata_udelay(int interval) 685{ 686 /* for now just use DELAY, the timer/sleep subsytems are not there yet */ 687 if (1 || interval < (1000000/hz) || ata_delayed_attach) 688 DELAY(interval); 689 else 690 tsleep(&interval, PRIBIO, "ataslp", interval/(1000000/hz)); 691} 692 693char * 694ata_mode2str(int mode) 695{ 696 switch (mode) { 697 case ATA_PIO0: return "PIO0"; 698 case ATA_PIO1: return "PIO1"; 699 case ATA_PIO2: return "PIO2"; 700 case ATA_PIO3: return "PIO3"; 701 case ATA_PIO4: return "PIO4"; 702 case ATA_WDMA0: return "WDMA0"; 703 case ATA_WDMA1: return "WDMA1"; 704 case ATA_WDMA2: return "WDMA2"; 705 case ATA_UDMA0: return "UDMA16"; 706 case ATA_UDMA1: return "UDMA25"; 707 case ATA_UDMA2: return "UDMA33"; 708 case ATA_UDMA3: return "UDMA40"; 709 case ATA_UDMA4: return "UDMA66"; 710 case ATA_UDMA5: return "UDMA100"; 711 case ATA_UDMA6: return "UDMA133"; 712 case ATA_SA150: return "SATA150"; 713 default: 714 if (mode & ATA_DMA_MASK) 715 return "BIOSDMA"; 716 else 717 return "BIOSPIO"; 718 } 719} 720 721int 722ata_pmode(struct ata_params *ap) 723{ 724 if (ap->atavalid & ATA_FLAG_64_70) { 725 if (ap->apiomodes & 0x02) 726 return ATA_PIO4; 727 if (ap->apiomodes & 0x01) 728 return ATA_PIO3; 729 } 730 if (ap->mwdmamodes & 0x04) 731 return ATA_PIO4; 732 if (ap->mwdmamodes & 0x02) 733 return ATA_PIO3; 734 if (ap->mwdmamodes & 0x01) 735 return ATA_PIO2; 736 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x200) 737 return ATA_PIO2; 738 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x100) 739 return ATA_PIO1; 740 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x000) 741 return ATA_PIO0; 742 return ATA_PIO0; 743} 744 745int 746ata_wmode(struct ata_params *ap) 747{ 748 if (ap->mwdmamodes & 0x04) 749 return ATA_WDMA2; 750 if (ap->mwdmamodes & 0x02) 751 return ATA_WDMA1; 752 if (ap->mwdmamodes & 0x01) 753 return ATA_WDMA0; 754 return -1; 755} 756 757int 758ata_umode(struct ata_params *ap) 759{ 760 if (ap->atavalid & ATA_FLAG_88) { 761 if (ap->udmamodes & 0x40) 762 return ATA_UDMA6; 763 if (ap->udmamodes & 0x20) 764 return ATA_UDMA5; 765 if (ap->udmamodes & 0x10) 766 return ATA_UDMA4; 767 if (ap->udmamodes & 0x08) 768 return ATA_UDMA3; 769 if (ap->udmamodes & 0x04) 770 return ATA_UDMA2; 771 if (ap->udmamodes & 0x02) 772 return ATA_UDMA1; 773 if (ap->udmamodes & 0x01) 774 return ATA_UDMA0; 775 } 776 return -1; 777} 778 779int 780ata_limit_mode(struct ata_device *atadev, int mode, int maxmode) 781{ 782 if (maxmode && mode > maxmode) 783 mode = maxmode; 784 785 if (mode >= ATA_UDMA0 && ata_umode(&atadev->param) > 0) 786 return min(mode, ata_umode(&atadev->param)); 787 788 if (mode >= ATA_WDMA0 && ata_wmode(&atadev->param) > 0) 789 return min(mode, ata_wmode(&atadev->param)); 790 791 if (mode > ata_pmode(&atadev->param)) 792 return min(mode, ata_pmode(&atadev->param)); 793 794 return mode; 795} 796 797/* 798 * module handeling 799 */ 800static int 801ata_module_event_handler(module_t mod, int what, void *arg) 802{ 803 static struct cdev *atacdev; 804 805 switch (what) { 806 case MOD_LOAD: 807 /* register controlling device */ 808 atacdev = make_dev(&ata_cdevsw, 0, UID_ROOT, GID_OPERATOR, 0600, "ata"); 809 810 if (cold) { 811 /* register boot attach to be run when interrupts are enabled */ 812 if (!(ata_delayed_attach = (struct intr_config_hook *) 813 malloc(sizeof(struct intr_config_hook), 814 M_TEMP, M_NOWAIT | M_ZERO))) { 815 printf("ata: malloc of delayed attach hook failed\n"); 816 return EIO; 817 } 818 ata_delayed_attach->ich_func = (void*)ata_boot_attach; 819 ata_root_hold_token = root_mount_hold("ATA"); 820 if (config_intrhook_establish(ata_delayed_attach) != 0) { 821 printf("ata: config_intrhook_establish failed\n"); 822 free(ata_delayed_attach, M_TEMP); 823 } 824 } 825 return 0; 826 827 case MOD_UNLOAD: 828 /* deregister controlling device */ 829 destroy_dev(atacdev); 830 return 0; 831 832 default: 833 return EOPNOTSUPP; 834 } 835} 836 837static moduledata_t ata_moduledata = { "ata", ata_module_event_handler, NULL }; 838DECLARE_MODULE(ata, ata_moduledata, SI_SUB_CONFIGURE, SI_ORDER_SECOND); 839MODULE_VERSION(ata, 1); 840 841static void 842ata_init(void) 843{ 844 ata_request_zone = uma_zcreate("ata_request", sizeof(struct ata_request), 845 NULL, NULL, NULL, NULL, 0, 0); 846 ata_composite_zone = uma_zcreate("ata_composite", 847 sizeof(struct ata_composite), 848 NULL, NULL, NULL, NULL, 0, 0); 849} 850SYSINIT(ata_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, ata_init, NULL); 851 852static void 853ata_uninit(void) 854{ 855 uma_zdestroy(ata_composite_zone); 856 uma_zdestroy(ata_request_zone); 857} 858SYSUNINIT(ata_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, ata_uninit, NULL); 859