aha.c revision 163816
1/*
2 * Generic register and struct definitions for the Adaptech 154x/164x
3 * SCSI host adapters. Product specific probe and attach routines can
4 * be found in:
5 *      aha 1542A/1542B/1542C/1542CF/1542CP	aha_isa.c
6 *      aha 1640			aha_mca.c
7 */
8/*-
9 * Copyright (c) 1998 M. Warner Losh.
10 * All Rights Reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * Derived from bt.c written by:
34 *
35 * Copyright (c) 1998 Justin T. Gibbs.
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions, and the following disclaimer,
43 *    without modification, immediately at the beginning of the file.
44 * 2. The name of the author may not be used to endorse or promote products
45 *    derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
51 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60#include <sys/cdefs.h>
61__FBSDID("$FreeBSD: head/sys/dev/aha/aha.c 163816 2006-10-31 05:53:29Z mjacob $");
62
63#include <sys/param.h>
64#include <sys/bus.h>
65#include <sys/systm.h>
66#include <sys/malloc.h>
67#include <sys/kernel.h>
68#include <sys/lock.h>
69#include <sys/mutex.h>
70
71#include <machine/bus.h>
72
73#include <cam/cam.h>
74#include <cam/cam_ccb.h>
75#include <cam/cam_sim.h>
76#include <cam/cam_xpt_sim.h>
77#include <cam/cam_debug.h>
78
79#include <cam/scsi/scsi_message.h>
80
81#include <dev/aha/ahareg.h>
82
83#define	PRVERB(x) do { if (bootverbose) device_printf x; } while (0)
84
85/* Macro to determine that a rev is potentially a new valid one
86 * so that the driver doesn't keep breaking on new revs as it
87 * did for the CF and CP.
88 */
89#define PROBABLY_NEW_BOARD(REV) (REV > 0x43 && REV < 0x56)
90
91/* MailBox Management functions */
92static __inline void	ahanextinbox(struct aha_softc *aha);
93static __inline void	ahanextoutbox(struct aha_softc *aha);
94
95#define aha_name(aha)	device_get_nameunit(aha->dev)
96
97static __inline void
98ahanextinbox(struct aha_softc *aha)
99{
100	if (aha->cur_inbox == aha->last_inbox)
101		aha->cur_inbox = aha->in_boxes;
102	else
103		aha->cur_inbox++;
104}
105
106static __inline void
107ahanextoutbox(struct aha_softc *aha)
108{
109	if (aha->cur_outbox == aha->last_outbox)
110		aha->cur_outbox = aha->out_boxes;
111	else
112		aha->cur_outbox++;
113}
114
115#define ahautoa24(u,s3)			\
116	(s3)[0] = ((u) >> 16) & 0xff;	\
117	(s3)[1] = ((u) >> 8) & 0xff;	\
118	(s3)[2] = (u) & 0xff;
119
120#define aha_a24tou(s3) \
121	(((s3)[0] << 16) | ((s3)[1] << 8) | (s3)[2])
122
123/* CCB Mangement functions */
124static __inline uint32_t		ahaccbvtop(struct aha_softc *aha,
125						  struct aha_ccb *accb);
126static __inline struct aha_ccb*		ahaccbptov(struct aha_softc *aha,
127						  uint32_t ccb_addr);
128
129static __inline uint32_t
130ahaccbvtop(struct aha_softc *aha, struct aha_ccb *accb)
131{
132	return (aha->aha_ccb_physbase
133	      + (uint32_t)((caddr_t)accb - (caddr_t)aha->aha_ccb_array));
134}
135static __inline struct aha_ccb *
136ahaccbptov(struct aha_softc *aha, uint32_t ccb_addr)
137{
138	return (aha->aha_ccb_array +
139	      + ((struct aha_ccb*)(uintptr_t)ccb_addr -
140	         (struct aha_ccb*)(uintptr_t)aha->aha_ccb_physbase));
141}
142
143static struct aha_ccb*	ahagetccb(struct aha_softc *aha);
144static __inline void	ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb);
145static void		ahaallocccbs(struct aha_softc *aha);
146static bus_dmamap_callback_t ahaexecuteccb;
147static void		ahadone(struct aha_softc *aha, struct aha_ccb *accb,
148			       aha_mbi_comp_code_t comp_code);
149
150/* Host adapter command functions */
151static int	ahareset(struct aha_softc* aha, int hard_reset);
152
153/* Initialization functions */
154static int			ahainitmboxes(struct aha_softc *aha);
155static bus_dmamap_callback_t	ahamapmboxes;
156static bus_dmamap_callback_t	ahamapccbs;
157static bus_dmamap_callback_t	ahamapsgs;
158
159/* Transfer Negotiation Functions */
160static void ahafetchtransinfo(struct aha_softc *aha,
161			     struct ccb_trans_settings *cts);
162
163/* CAM SIM entry points */
164#define ccb_accb_ptr spriv_ptr0
165#define ccb_aha_ptr spriv_ptr1
166static void	ahaaction(struct cam_sim *sim, union ccb *ccb);
167static void	ahapoll(struct cam_sim *sim);
168
169/* Our timeout handler */
170static timeout_t ahatimeout;
171
172/* Exported functions */
173void
174aha_alloc(struct aha_softc *aha, int unit, bus_space_tag_t tag,
175  bus_space_handle_t bsh)
176{
177
178	SLIST_INIT(&aha->free_aha_ccbs);
179	LIST_INIT(&aha->pending_ccbs);
180	SLIST_INIT(&aha->sg_maps);
181	aha->unit = unit;
182	aha->tag = tag;
183	aha->bsh = bsh;
184	aha->ccb_sg_opcode = INITIATOR_SG_CCB_WRESID;
185	aha->ccb_ccb_opcode = INITIATOR_CCB_WRESID;
186}
187
188void
189aha_free(struct aha_softc *aha)
190{
191	switch (aha->init_level) {
192	default:
193	case 8:
194	{
195		struct sg_map_node *sg_map;
196
197		while ((sg_map = SLIST_FIRST(&aha->sg_maps))!= NULL) {
198			SLIST_REMOVE_HEAD(&aha->sg_maps, links);
199			bus_dmamap_unload(aha->sg_dmat, sg_map->sg_dmamap);
200			bus_dmamem_free(aha->sg_dmat, sg_map->sg_vaddr,
201			    sg_map->sg_dmamap);
202			free(sg_map, M_DEVBUF);
203		}
204		bus_dma_tag_destroy(aha->sg_dmat);
205	}
206	case 7:
207		bus_dmamap_unload(aha->ccb_dmat, aha->ccb_dmamap);
208	case 6:
209		bus_dmamap_destroy(aha->ccb_dmat, aha->ccb_dmamap);
210		bus_dmamem_free(aha->ccb_dmat, aha->aha_ccb_array,
211		    aha->ccb_dmamap);
212	case 5:
213		bus_dma_tag_destroy(aha->ccb_dmat);
214	case 4:
215		bus_dmamap_unload(aha->mailbox_dmat, aha->mailbox_dmamap);
216	case 3:
217		bus_dmamem_free(aha->mailbox_dmat, aha->in_boxes,
218		    aha->mailbox_dmamap);
219		bus_dmamap_destroy(aha->mailbox_dmat, aha->mailbox_dmamap);
220	case 2:
221		bus_dma_tag_destroy(aha->buffer_dmat);
222	case 1:
223		bus_dma_tag_destroy(aha->mailbox_dmat);
224	case 0:
225		break;
226	}
227}
228
229/*
230 * Probe the adapter and verify that the card is an Adaptec.
231 */
232int
233aha_probe(struct aha_softc* aha)
234{
235	u_int	 status;
236	u_int	 intstat;
237	int	 error;
238	board_id_data_t	board_id;
239
240	/*
241	 * See if the three I/O ports look reasonable.
242	 * Touch the minimal number of registers in the
243	 * failure case.
244	 */
245	status = aha_inb(aha, STATUS_REG);
246	if ((status == 0) ||
247	    (status & (DIAG_ACTIVE|CMD_REG_BUSY | STATUS_REG_RSVD)) != 0) {
248		PRVERB((aha->dev, "status reg test failed %x\n", status));
249		return (ENXIO);
250	}
251
252	intstat = aha_inb(aha, INTSTAT_REG);
253	if ((intstat & INTSTAT_REG_RSVD) != 0) {
254		PRVERB((aha->dev, "Failed Intstat Reg Test\n"));
255		return (ENXIO);
256	}
257
258	/*
259	 * Looking good so far.  Final test is to reset the
260	 * adapter and fetch the board ID and ensure we aren't
261	 * looking at a BusLogic.
262	 */
263	if ((error = ahareset(aha, /*hard_reset*/TRUE)) != 0) {
264		PRVERB((aha->dev, "Failed Reset\n"));
265		return (ENXIO);
266	}
267
268	/*
269	 * Get the board ID.  We use this to see if we're dealing with
270	 * a buslogic card or an aha card (or clone).
271	 */
272	error = aha_cmd(aha, AOP_INQUIRE_BOARD_ID, NULL, /*parmlen*/0,
273	    (uint8_t*)&board_id, sizeof(board_id), DEFAULT_CMD_TIMEOUT);
274	if (error != 0) {
275		PRVERB((aha->dev, "INQUIRE failed %x\n", error));
276		return (ENXIO);
277	}
278	aha->fw_major = board_id.firmware_rev_major;
279	aha->fw_minor = board_id.firmware_rev_minor;
280	aha->boardid = board_id.board_type;
281
282	/*
283	 * The Buslogic cards have an id of either 0x41 or 0x42.  So
284	 * if those come up in the probe, we test the geometry register
285	 * of the board.  Adaptec boards that are this old will not have
286	 * this register, and return 0xff, while buslogic cards will return
287	 * something different.
288	 *
289	 * It appears that for reasons unknow, for the for the
290	 * aha-1542B cards, we need to wait a little bit before trying
291	 * to read the geometry register.  I picked 10ms since we have
292	 * reports that a for loop to 1000 did the trick, and this
293	 * errs on the side of conservatism.  Besides, no one will
294	 * notice a 10mS delay here, even the 1542B card users :-)
295	 *
296	 * Some compatible cards return 0 here.  Some cards also
297	 * seem to return 0x7f.
298	 *
299	 * XXX I'm not sure how this will impact other cloned cards
300	 *
301	 * This really should be replaced with the esetup command, since
302	 * that appears to be more reliable.  This becomes more and more
303	 * true over time as we discover more cards that don't read the
304	 * geometry register consistantly.
305	 */
306	if (aha->boardid <= 0x42) {
307		/* Wait 10ms before reading */
308		DELAY(10000);
309		status = aha_inb(aha, GEOMETRY_REG);
310		if (status != 0xff && status != 0x00 && status != 0x7f) {
311			PRVERB((aha->dev, "Geometry Register test failed %#x\n",
312				status));
313			return (ENXIO);
314		}
315	}
316
317	return (0);
318}
319
320/*
321 * Pull the boards setup information and record it in our softc.
322 */
323int
324aha_fetch_adapter_info(struct aha_softc *aha)
325{
326	setup_data_t	setup_info;
327	config_data_t config_data;
328	uint8_t length_param;
329	int	 error;
330	struct	aha_extbios extbios;
331
332	switch (aha->boardid) {
333	case BOARD_1540_16HEAD_BIOS:
334		snprintf(aha->model, sizeof(aha->model), "1540 16 head BIOS");
335		break;
336	case BOARD_1540_64HEAD_BIOS:
337		snprintf(aha->model, sizeof(aha->model), "1540 64 head BIOS");
338		break;
339	case BOARD_1542:
340		snprintf(aha->model, sizeof(aha->model), "1540/1542 64 head BIOS");
341		break;
342	case BOARD_1640:
343		snprintf(aha->model, sizeof(aha->model), "1640");
344		break;
345	case BOARD_1740:
346		snprintf(aha->model, sizeof(aha->model), "1740A/1742A/1744");
347		break;
348	case BOARD_1542C:
349		snprintf(aha->model, sizeof(aha->model), "1542C");
350		break;
351	case BOARD_1542CF:
352		snprintf(aha->model, sizeof(aha->model), "1542CF");
353		break;
354	case BOARD_1542CP:
355		snprintf(aha->model, sizeof(aha->model), "1542CP");
356		break;
357	default:
358		snprintf(aha->model, sizeof(aha->model), "Unknown");
359		break;
360	}
361	/*
362	 * If we are a new type of 1542 board (anything newer than a 1542C)
363	 * then disable the extended bios so that the
364	 * mailbox interface is unlocked.
365	 * This is also true for the 1542B Version 3.20. First Adaptec
366	 * board that supports >1Gb drives.
367	 * No need to check the extended bios flags as some of the
368	 * extensions that cause us problems are not flagged in that byte.
369	 */
370	if (PROBABLY_NEW_BOARD(aha->boardid) ||
371		(aha->boardid == 0x41
372		&& aha->fw_major == 0x31 &&
373		aha->fw_minor >= 0x34)) {
374		error = aha_cmd(aha, AOP_RETURN_EXT_BIOS_INFO, NULL,
375		    /*paramlen*/0, (u_char *)&extbios, sizeof(extbios),
376		    DEFAULT_CMD_TIMEOUT);
377		if (error != 0) {
378			device_printf(aha->dev,
379			    "AOP_RETURN_EXT_BIOS_INFO - Failed.");
380			return (error);
381		}
382		error = aha_cmd(aha, AOP_MBOX_IF_ENABLE, (uint8_t *)&extbios,
383		    /*paramlen*/2, NULL, 0, DEFAULT_CMD_TIMEOUT);
384		if (error != 0) {
385			device_printf(aha->dev, "AOP_MBOX_IF_ENABLE - Failed.");
386			return (error);
387		}
388	}
389	if (aha->boardid < 0x41)
390		device_printf(aha->dev, "Warning: aha-1542A won't work.\n");
391
392	aha->max_sg = 17;		/* Need >= 17 to do 64k I/O */
393	aha->diff_bus = 0;
394	aha->extended_lun = 0;
395	aha->extended_trans = 0;
396	aha->max_ccbs = 16;
397	/* Determine Sync/Wide/Disc settings */
398	length_param = sizeof(setup_info);
399	error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &length_param,
400	    /*paramlen*/1, (uint8_t*)&setup_info, sizeof(setup_info),
401	    DEFAULT_CMD_TIMEOUT);
402	if (error != 0) {
403		device_printf(aha->dev, "aha_fetch_adapter_info - Failed "
404		    "Get Setup Info\n");
405		return (error);
406	}
407	if (setup_info.initiate_sync != 0) {
408		aha->sync_permitted = ALL_TARGETS;
409	}
410	aha->disc_permitted = ALL_TARGETS;
411
412	/* We need as many mailboxes as we can have ccbs */
413	aha->num_boxes = aha->max_ccbs;
414
415	/* Determine our SCSI ID */
416	error = aha_cmd(aha, AOP_INQUIRE_CONFIG, NULL, /*parmlen*/0,
417	    (uint8_t*)&config_data, sizeof(config_data), DEFAULT_CMD_TIMEOUT);
418	if (error != 0) {
419		device_printf(aha->dev,
420		    "aha_fetch_adapter_info - Failed Get Config\n");
421		return (error);
422	}
423	aha->scsi_id = config_data.scsi_id;
424	return (0);
425}
426
427/*
428 * Start the board, ready for normal operation
429 */
430int
431aha_init(struct aha_softc* aha)
432{
433	/* Announce the Adapter */
434	device_printf(aha->dev, "AHA-%s FW Rev. %c.%c (ID=%x) ",
435	    aha->model, aha->fw_major, aha->fw_minor, aha->boardid);
436
437	if (aha->diff_bus != 0)
438		printf("Diff ");
439
440	printf("SCSI Host Adapter, SCSI ID %d, %d CCBs\n", aha->scsi_id,
441	    aha->max_ccbs);
442
443	/*
444	 * Create our DMA tags.  These tags define the kinds of device
445	 * accessible memory allocations and memory mappings we will
446	 * need to perform during normal operation.
447	 *
448	 * Unless we need to further restrict the allocation, we rely
449	 * on the restrictions of the parent dmat, hence the common
450	 * use of MAXADDR and MAXSIZE.
451	 */
452
453	/* DMA tag for mapping buffers into device visible space. */
454	if (bus_dma_tag_create( /* parent	*/ aha->parent_dmat,
455				/* alignment	*/ 1,
456				/* boundary	*/ 0,
457				/* lowaddr	*/ BUS_SPACE_MAXADDR,
458				/* highaddr	*/ BUS_SPACE_MAXADDR,
459				/* filter	*/ NULL,
460				/* filterarg	*/ NULL,
461				/* maxsize	*/ MAXBSIZE,
462				/* nsegments	*/ AHA_NSEG,
463				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
464				/* flags	*/ BUS_DMA_ALLOCNOW,
465				/* lockfunc	*/ busdma_lock_mutex,
466				/* lockarg	*/ &Giant,
467				&aha->buffer_dmat) != 0) {
468		goto error_exit;
469	}
470
471	aha->init_level++;
472	/* DMA tag for our mailboxes */
473	if (bus_dma_tag_create(	/* parent	*/ aha->parent_dmat,
474				/* alignment	*/ 1,
475				/* boundary	*/ 0,
476				/* lowaddr	*/ BUS_SPACE_MAXADDR,
477				/* highaddr	*/ BUS_SPACE_MAXADDR,
478				/* filter	*/ NULL,
479				/* filterarg	*/ NULL,
480				/* maxsize	*/ aha->num_boxes *
481						   (sizeof(aha_mbox_in_t) +
482						    sizeof(aha_mbox_out_t)),
483				/* nsegments	*/ 1,
484				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
485				/* flags	*/ 0,
486				/* lockfunc	*/ busdma_lock_mutex,
487				/* lockarg	*/ &Giant,
488				&aha->mailbox_dmat) != 0) {
489		goto error_exit;
490        }
491
492	aha->init_level++;
493
494	/* Allocation for our mailboxes */
495	if (bus_dmamem_alloc(aha->mailbox_dmat, (void **)&aha->out_boxes,
496	    BUS_DMA_NOWAIT, &aha->mailbox_dmamap) != 0)
497		goto error_exit;
498
499	aha->init_level++;
500
501	/* And permanently map them */
502	bus_dmamap_load(aha->mailbox_dmat, aha->mailbox_dmamap,
503	    aha->out_boxes, aha->num_boxes * (sizeof(aha_mbox_in_t) +
504	    sizeof(aha_mbox_out_t)), ahamapmboxes, aha, /*flags*/0);
505
506	aha->init_level++;
507
508	aha->in_boxes = (aha_mbox_in_t *)&aha->out_boxes[aha->num_boxes];
509
510	ahainitmboxes(aha);
511
512	/* DMA tag for our ccb structures */
513	if (bus_dma_tag_create(	/* parent	*/ aha->parent_dmat,
514				/* alignment	*/ 1,
515				/* boundary	*/ 0,
516				/* lowaddr	*/ BUS_SPACE_MAXADDR,
517				/* highaddr	*/ BUS_SPACE_MAXADDR,
518				/* filter	*/ NULL,
519				/* filterarg	*/ NULL,
520				/* maxsize	*/ aha->max_ccbs *
521						   sizeof(struct aha_ccb),
522				/* nsegments	*/ 1,
523				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
524				/* flags	*/ 0,
525				/* lockfunc	*/ busdma_lock_mutex,
526				/* lockarg	*/ &Giant,
527				&aha->ccb_dmat) != 0) {
528		goto error_exit;
529        }
530
531	aha->init_level++;
532
533	/* Allocation for our ccbs */
534	if (bus_dmamem_alloc(aha->ccb_dmat, (void **)&aha->aha_ccb_array,
535	    BUS_DMA_NOWAIT, &aha->ccb_dmamap) != 0)
536		goto error_exit;
537
538	aha->init_level++;
539
540	/* And permanently map them */
541	bus_dmamap_load(aha->ccb_dmat, aha->ccb_dmamap, aha->aha_ccb_array,
542	    aha->max_ccbs * sizeof(struct aha_ccb), ahamapccbs, aha, /*flags*/0);
543
544	aha->init_level++;
545
546	/* DMA tag for our S/G structures.  We allocate in page sized chunks */
547	if (bus_dma_tag_create(	/* parent	*/ aha->parent_dmat,
548				/* alignment	*/ 1,
549				/* boundary	*/ 0,
550				/* lowaddr	*/ BUS_SPACE_MAXADDR,
551				/* highaddr	*/ BUS_SPACE_MAXADDR,
552				/* filter	*/ NULL,
553				/* filterarg	*/ NULL,
554				/* maxsize	*/ PAGE_SIZE,
555				/* nsegments	*/ 1,
556				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
557				/* flags	*/ 0,
558				/* lockfunc	*/ busdma_lock_mutex,
559				/* lockarg	*/ &Giant,
560				&aha->sg_dmat) != 0)
561		goto error_exit;
562
563	aha->init_level++;
564
565	/* Perform initial CCB allocation */
566	bzero(aha->aha_ccb_array, aha->max_ccbs * sizeof(struct aha_ccb));
567	ahaallocccbs(aha);
568
569	if (aha->num_ccbs == 0) {
570		device_printf(aha->dev,
571		    "aha_init - Unable to allocate initial ccbs\n");
572		goto error_exit;
573	}
574
575	/*
576	 * Note that we are going and return (to probe)
577	 */
578	return (0);
579
580error_exit:
581
582	return (ENXIO);
583}
584
585int
586aha_attach(struct aha_softc *aha)
587{
588	int tagged_dev_openings;
589	struct cam_devq *devq;
590
591	/*
592	 * We don't do tagged queueing, since the aha cards don't
593	 * support it.
594	 */
595	tagged_dev_openings = 0;
596
597	/*
598	 * Create the device queue for our SIM.
599	 */
600	devq = cam_simq_alloc(aha->max_ccbs - 1);
601	if (devq == NULL)
602		return (ENOMEM);
603
604	/*
605	 * Construct our SIM entry
606	 */
607	aha->sim = cam_sim_alloc(ahaaction, ahapoll, "aha", aha, aha->unit, 2,
608	    tagged_dev_openings, devq);
609	if (aha->sim == NULL) {
610		cam_simq_free(devq);
611		return (ENOMEM);
612	}
613	if (xpt_bus_register(aha->sim, 0) != CAM_SUCCESS) {
614		cam_sim_free(aha->sim, /*free_devq*/TRUE);
615		return (ENXIO);
616	}
617	if (xpt_create_path(&aha->path, /*periph*/NULL, cam_sim_path(aha->sim),
618	    CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
619		xpt_bus_deregister(cam_sim_path(aha->sim));
620		cam_sim_free(aha->sim, /*free_devq*/TRUE);
621		return (ENXIO);
622	}
623
624	return (0);
625}
626
627static void
628ahaallocccbs(struct aha_softc *aha)
629{
630	struct aha_ccb *next_ccb;
631	struct sg_map_node *sg_map;
632	bus_addr_t physaddr;
633	aha_sg_t *segs;
634	int newcount;
635	int i;
636
637	next_ccb = &aha->aha_ccb_array[aha->num_ccbs];
638
639	sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
640
641	if (sg_map == NULL)
642		return;
643
644	/* Allocate S/G space for the next batch of CCBS */
645	if (bus_dmamem_alloc(aha->sg_dmat, (void **)&sg_map->sg_vaddr,
646	    BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
647		free(sg_map, M_DEVBUF);
648		return;
649	}
650
651	SLIST_INSERT_HEAD(&aha->sg_maps, sg_map, links);
652
653	bus_dmamap_load(aha->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
654	    PAGE_SIZE, ahamapsgs, aha, /*flags*/0);
655
656	segs = sg_map->sg_vaddr;
657	physaddr = sg_map->sg_physaddr;
658
659	newcount = (PAGE_SIZE / (AHA_NSEG * sizeof(aha_sg_t)));
660	for (i = 0; aha->num_ccbs < aha->max_ccbs && i < newcount; i++) {
661		int error;
662
663		next_ccb->sg_list = segs;
664		next_ccb->sg_list_phys = physaddr;
665		next_ccb->flags = ACCB_FREE;
666		error = bus_dmamap_create(aha->buffer_dmat, /*flags*/0,
667		    &next_ccb->dmamap);
668		if (error != 0)
669			break;
670		SLIST_INSERT_HEAD(&aha->free_aha_ccbs, next_ccb, links);
671		segs += AHA_NSEG;
672		physaddr += (AHA_NSEG * sizeof(aha_sg_t));
673		next_ccb++;
674		aha->num_ccbs++;
675	}
676
677	/* Reserve a CCB for error recovery */
678	if (aha->recovery_accb == NULL) {
679		aha->recovery_accb = SLIST_FIRST(&aha->free_aha_ccbs);
680		SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
681	}
682}
683
684static __inline void
685ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb)
686{
687	int s;
688
689	s = splcam();
690	if ((accb->flags & ACCB_ACTIVE) != 0)
691		LIST_REMOVE(&accb->ccb->ccb_h, sim_links.le);
692	if (aha->resource_shortage != 0
693	    && (accb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
694		accb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
695		aha->resource_shortage = FALSE;
696	}
697	accb->flags = ACCB_FREE;
698	SLIST_INSERT_HEAD(&aha->free_aha_ccbs, accb, links);
699	aha->active_ccbs--;
700	splx(s);
701}
702
703static struct aha_ccb*
704ahagetccb(struct aha_softc *aha)
705{
706	struct	aha_ccb* accb;
707	int	s;
708
709	s = splcam();
710	if ((accb = SLIST_FIRST(&aha->free_aha_ccbs)) != NULL) {
711		SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
712		aha->active_ccbs++;
713	} else if (aha->num_ccbs < aha->max_ccbs) {
714		ahaallocccbs(aha);
715		accb = SLIST_FIRST(&aha->free_aha_ccbs);
716		if (accb == NULL)
717			device_printf(aha->dev, "Can't malloc ACCB\n");
718		else {
719			SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
720			aha->active_ccbs++;
721		}
722	}
723	splx(s);
724
725	return (accb);
726}
727
728static void
729ahaaction(struct cam_sim *sim, union ccb *ccb)
730{
731	struct	aha_softc *aha;
732	int s;
733
734	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahaaction\n"));
735
736	aha = (struct aha_softc *)cam_sim_softc(sim);
737
738	switch (ccb->ccb_h.func_code) {
739	/* Common cases first */
740	case XPT_SCSI_IO:	/* Execute the requested I/O operation */
741	case XPT_RESET_DEV:	/* Bus Device Reset the specified SCSI device */	{
742		struct	aha_ccb	*accb;
743		struct	aha_hccb *hccb;
744
745		/*
746		 * Get an accb to use.
747		 */
748		if ((accb = ahagetccb(aha)) == NULL) {
749			s = splcam();
750			aha->resource_shortage = TRUE;
751			splx(s);
752			xpt_freeze_simq(aha->sim, /*count*/1);
753			ccb->ccb_h.status = CAM_REQUEUE_REQ;
754			xpt_done(ccb);
755			return;
756		}
757		hccb = &accb->hccb;
758
759		/*
760		 * So we can find the ACCB when an abort is requested
761		 */
762		accb->ccb = ccb;
763		ccb->ccb_h.ccb_accb_ptr = accb;
764		ccb->ccb_h.ccb_aha_ptr = aha;
765
766		/*
767		 * Put all the arguments for the xfer in the accb
768		 */
769		hccb->target = ccb->ccb_h.target_id;
770		hccb->lun = ccb->ccb_h.target_lun;
771		hccb->ahastat = 0;
772		hccb->sdstat = 0;
773
774		if (ccb->ccb_h.func_code == XPT_SCSI_IO) {
775			struct ccb_scsiio *csio;
776			struct ccb_hdr *ccbh;
777
778			csio = &ccb->csio;
779			ccbh = &csio->ccb_h;
780			hccb->opcode = aha->ccb_ccb_opcode;
781			hccb->datain = (ccb->ccb_h.flags & CAM_DIR_IN) != 0;
782			hccb->dataout = (ccb->ccb_h.flags & CAM_DIR_OUT) != 0;
783			hccb->cmd_len = csio->cdb_len;
784			if (hccb->cmd_len > sizeof(hccb->scsi_cdb)) {
785				ccb->ccb_h.status = CAM_REQ_INVALID;
786				ahafreeccb(aha, accb);
787				xpt_done(ccb);
788				return;
789			}
790			hccb->sense_len = csio->sense_len;
791			if ((ccbh->flags & CAM_CDB_POINTER) != 0) {
792				if ((ccbh->flags & CAM_CDB_PHYS) == 0) {
793					bcopy(csio->cdb_io.cdb_ptr,
794					      hccb->scsi_cdb, hccb->cmd_len);
795				} else {
796					/* I guess I could map it in... */
797					ccbh->status = CAM_REQ_INVALID;
798					ahafreeccb(aha, accb);
799					xpt_done(ccb);
800					return;
801				}
802			} else {
803				bcopy(csio->cdb_io.cdb_bytes,
804				      hccb->scsi_cdb, hccb->cmd_len);
805			}
806			/*
807			 * If we have any data to send with this command,
808			 * map it into bus space.
809			 */
810		        /* Only use S/G if there is a transfer */
811			if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
812				if ((ccbh->flags & CAM_SCATTER_VALID) == 0) {
813					/*
814					 * We've been given a pointer
815					 * to a single buffer.
816					 */
817					if ((ccbh->flags & CAM_DATA_PHYS)==0) {
818						int error;
819
820						s = splsoftvm();
821						error = bus_dmamap_load(
822						    aha->buffer_dmat,
823						    accb->dmamap,
824						    csio->data_ptr,
825						    csio->dxfer_len,
826						    ahaexecuteccb,
827						    accb,
828						    /*flags*/0);
829						if (error == EINPROGRESS) {
830							/*
831							 * So as to maintain
832							 * ordering, freeze the
833							 * controller queue
834							 * until our mapping is
835							 * returned.
836							 */
837							xpt_freeze_simq(aha->sim,
838									1);
839							csio->ccb_h.status |=
840							    CAM_RELEASE_SIMQ;
841						}
842						splx(s);
843					} else {
844						struct bus_dma_segment seg;
845
846						/* Pointer to physical buffer */
847						seg.ds_addr =
848						    (bus_addr_t)csio->data_ptr;
849						seg.ds_len = csio->dxfer_len;
850						ahaexecuteccb(accb, &seg, 1, 0);
851					}
852				} else {
853					struct bus_dma_segment *segs;
854
855					if ((ccbh->flags & CAM_DATA_PHYS) != 0)
856						panic("ahaaction - Physical "
857						      "segment pointers "
858						      "unsupported");
859
860					if ((ccbh->flags&CAM_SG_LIST_PHYS)==0)
861						panic("ahaaction - Virtual "
862						      "segment addresses "
863						      "unsupported");
864
865					/* Just use the segments provided */
866					segs = (struct bus_dma_segment *)
867					    csio->data_ptr;
868					ahaexecuteccb(accb, segs,
869						     csio->sglist_cnt, 0);
870				}
871			} else {
872				ahaexecuteccb(accb, NULL, 0, 0);
873			}
874		} else {
875			hccb->opcode = INITIATOR_BUS_DEV_RESET;
876			/* No data transfer */
877			hccb->datain = TRUE;
878			hccb->dataout = TRUE;
879			hccb->cmd_len = 0;
880			hccb->sense_len = 0;
881			ahaexecuteccb(accb, NULL, 0, 0);
882		}
883		break;
884	}
885	case XPT_EN_LUN:		/* Enable LUN as a target */
886	case XPT_TARGET_IO:		/* Execute target I/O request */
887	case XPT_ACCEPT_TARGET_IO:	/* Accept Host Target Mode CDB */
888	case XPT_CONT_TARGET_IO:	/* Continue Host Target I/O Connection*/
889	case XPT_ABORT:			/* Abort the specified CCB */
890		/* XXX Implement */
891		ccb->ccb_h.status = CAM_REQ_INVALID;
892		xpt_done(ccb);
893		break;
894	case XPT_SET_TRAN_SETTINGS:
895		/* XXX Implement */
896		ccb->ccb_h.status = CAM_PROVIDE_FAIL;
897		xpt_done(ccb);
898		break;
899	case XPT_GET_TRAN_SETTINGS:
900	/* Get default/user set transfer settings for the target */
901	{
902		struct	ccb_trans_settings *cts = &ccb->cts;
903		u_int	target_mask = 0x01 << ccb->ccb_h.target_id;
904#ifdef	CAM_NEW_TRAN_CODE
905		struct ccb_trans_settings_scsi *scsi =
906		    &cts->proto_specific.scsi;
907		struct ccb_trans_settings_spi *spi =
908		    &cts->xport_specific.spi;
909
910		cts->protocol = PROTO_SCSI;
911		cts->protocol_version = SCSI_REV_2;
912		cts->transport = XPORT_SPI;
913		cts->transport_version = 2;
914		if (cts->type == CTS_TYPE_USER_SETTINGS) {
915			spi->flags = 0;
916			if ((aha->disc_permitted & target_mask) != 0)
917				spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
918			spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
919			if ((aha->sync_permitted & target_mask) != 0) {
920				if (aha->boardid >= BOARD_1542CF)
921					spi->sync_period = 25;
922				else
923					spi->sync_period = 50;
924			} else {
925				spi->sync_period = 0;
926			}
927
928			if (spi->sync_period != 0)
929				spi->sync_offset = 15;
930
931			spi->valid = CTS_SPI_VALID_SYNC_RATE
932				   | CTS_SPI_VALID_SYNC_OFFSET
933				   | CTS_SPI_VALID_BUS_WIDTH
934				   | CTS_SPI_VALID_DISC;
935			scsi->valid = CTS_SCSI_VALID_TQ;
936		} else {
937			ahafetchtransinfo(aha, cts);
938		}
939#else
940		if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
941			cts->flags = 0;
942			if ((aha->disc_permitted & target_mask) != 0)
943				cts->flags |= CCB_TRANS_DISC_ENB;
944			cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
945			if ((aha->sync_permitted & target_mask) != 0) {
946				if (aha->boardid >= BOARD_1542CF)
947					cts->sync_period = 25;
948				else
949					cts->sync_period = 50;
950			} else
951				cts->sync_period = 0;
952
953			if (cts->sync_period != 0)
954				cts->sync_offset = 15;
955
956			cts->valid = CCB_TRANS_SYNC_RATE_VALID
957				   | CCB_TRANS_SYNC_OFFSET_VALID
958				   | CCB_TRANS_BUS_WIDTH_VALID
959				   | CCB_TRANS_DISC_VALID
960				   | CCB_TRANS_TQ_VALID;
961		} else {
962			ahafetchtransinfo(aha, cts);
963		}
964#endif
965
966		ccb->ccb_h.status = CAM_REQ_CMP;
967		xpt_done(ccb);
968		break;
969	}
970	case XPT_CALC_GEOMETRY:
971	{
972		struct	  ccb_calc_geometry *ccg;
973		uint32_t size_mb;
974		uint32_t secs_per_cylinder;
975
976		ccg = &ccb->ccg;
977		size_mb = ccg->volume_size
978			/ ((1024L * 1024L) / ccg->block_size);
979		if (size_mb >= 1024 && (aha->extended_trans != 0)) {
980			if (size_mb >= 2048) {
981				ccg->heads = 255;
982				ccg->secs_per_track = 63;
983			} else {
984				ccg->heads = 128;
985				ccg->secs_per_track = 32;
986			}
987		} else {
988			ccg->heads = 64;
989			ccg->secs_per_track = 32;
990		}
991		secs_per_cylinder = ccg->heads * ccg->secs_per_track;
992		ccg->cylinders = ccg->volume_size / secs_per_cylinder;
993		ccb->ccb_h.status = CAM_REQ_CMP;
994		xpt_done(ccb);
995		break;
996	}
997	case XPT_RESET_BUS:		/* Reset the specified SCSI bus */
998		ahareset(aha, /*hardreset*/TRUE);
999		ccb->ccb_h.status = CAM_REQ_CMP;
1000		xpt_done(ccb);
1001		break;
1002	case XPT_TERM_IO:		/* Terminate the I/O process */
1003		/* XXX Implement */
1004		ccb->ccb_h.status = CAM_REQ_INVALID;
1005		xpt_done(ccb);
1006		break;
1007	case XPT_PATH_INQ:		/* Path routing inquiry */
1008	{
1009		struct ccb_pathinq *cpi = &ccb->cpi;
1010
1011		cpi->version_num = 1; /* XXX??? */
1012		cpi->hba_inquiry = PI_SDTR_ABLE;
1013		cpi->target_sprt = 0;
1014		cpi->hba_misc = 0;
1015		cpi->hba_eng_cnt = 0;
1016		cpi->max_target = 7;
1017		cpi->max_lun = 7;
1018		cpi->initiator_id = aha->scsi_id;
1019		cpi->bus_id = cam_sim_bus(sim);
1020		cpi->base_transfer_speed = 3300;
1021		strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1022		strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
1023		strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1024		cpi->unit_number = cam_sim_unit(sim);
1025#ifdef	CAM_NEW_TRAN_CODE
1026                cpi->transport = XPORT_SPI;
1027                cpi->transport_version = 2;
1028                cpi->protocol = PROTO_SCSI;
1029                cpi->protocol_version = SCSI_REV_2;
1030#endif
1031		cpi->ccb_h.status = CAM_REQ_CMP;
1032		xpt_done(ccb);
1033		break;
1034	}
1035	default:
1036		ccb->ccb_h.status = CAM_REQ_INVALID;
1037		xpt_done(ccb);
1038		break;
1039	}
1040}
1041
1042static void
1043ahaexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1044{
1045	struct	 aha_ccb *accb;
1046	union	 ccb *ccb;
1047	struct	 aha_softc *aha;
1048	int	 s;
1049	uint32_t paddr;
1050
1051	accb = (struct aha_ccb *)arg;
1052	ccb = accb->ccb;
1053	aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1054
1055	if (error != 0) {
1056		if (error != EFBIG)
1057			device_printf(aha->dev,
1058			    "Unexepected error 0x%x returned from "
1059			    "bus_dmamap_load\n", error);
1060		if (ccb->ccb_h.status == CAM_REQ_INPROG) {
1061			xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1062			ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
1063		}
1064		ahafreeccb(aha, accb);
1065		xpt_done(ccb);
1066		return;
1067	}
1068
1069	if (nseg != 0) {
1070		aha_sg_t *sg;
1071		bus_dma_segment_t *end_seg;
1072		bus_dmasync_op_t op;
1073
1074		end_seg = dm_segs + nseg;
1075
1076		/* Copy the segments into our SG list */
1077		sg = accb->sg_list;
1078		while (dm_segs < end_seg) {
1079			ahautoa24(dm_segs->ds_len, sg->len);
1080			ahautoa24(dm_segs->ds_addr, sg->addr);
1081			sg++;
1082			dm_segs++;
1083		}
1084
1085		if (nseg > 1) {
1086			accb->hccb.opcode = aha->ccb_sg_opcode;
1087			ahautoa24((sizeof(aha_sg_t) * nseg),
1088			    accb->hccb.data_len);
1089			ahautoa24(accb->sg_list_phys, accb->hccb.data_addr);
1090		} else {
1091			bcopy(accb->sg_list->len, accb->hccb.data_len, 3);
1092			bcopy(accb->sg_list->addr, accb->hccb.data_addr, 3);
1093		}
1094
1095		if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1096			op = BUS_DMASYNC_PREREAD;
1097		else
1098			op = BUS_DMASYNC_PREWRITE;
1099
1100		bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1101
1102	} else {
1103		accb->hccb.opcode = INITIATOR_CCB;
1104		ahautoa24(0, accb->hccb.data_len);
1105		ahautoa24(0, accb->hccb.data_addr);
1106	}
1107
1108	s = splcam();
1109
1110	/*
1111	 * Last time we need to check if this CCB needs to
1112	 * be aborted.
1113	 */
1114	if (ccb->ccb_h.status != CAM_REQ_INPROG) {
1115		if (nseg != 0)
1116			bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1117		ahafreeccb(aha, accb);
1118		xpt_done(ccb);
1119		splx(s);
1120		return;
1121	}
1122
1123	accb->flags = ACCB_ACTIVE;
1124	ccb->ccb_h.status |= CAM_SIM_QUEUED;
1125	LIST_INSERT_HEAD(&aha->pending_ccbs, &ccb->ccb_h, sim_links.le);
1126
1127	ccb->ccb_h.timeout_ch = timeout(ahatimeout, (caddr_t)accb,
1128	    (ccb->ccb_h.timeout * hz) / 1000);
1129
1130	/* Tell the adapter about this command */
1131	if (aha->cur_outbox->action_code != AMBO_FREE) {
1132		/*
1133		 * We should never encounter a busy mailbox.
1134		 * If we do, warn the user, and treat it as
1135		 * a resource shortage.  If the controller is
1136		 * hung, one of the pending transactions will
1137		 * timeout causing us to start recovery operations.
1138		 */
1139		device_printf(aha->dev,
1140		    "Encountered busy mailbox with %d out of %d "
1141		    "commands active!!!", aha->active_ccbs, aha->max_ccbs);
1142		untimeout(ahatimeout, accb, ccb->ccb_h.timeout_ch);
1143		if (nseg != 0)
1144			bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1145		ahafreeccb(aha, accb);
1146		aha->resource_shortage = TRUE;
1147		xpt_freeze_simq(aha->sim, /*count*/1);
1148		ccb->ccb_h.status = CAM_REQUEUE_REQ;
1149		xpt_done(ccb);
1150		return;
1151	}
1152	paddr = ahaccbvtop(aha, accb);
1153	ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1154	aha->cur_outbox->action_code = AMBO_START;
1155	aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1156
1157	ahanextoutbox(aha);
1158	splx(s);
1159}
1160
1161void
1162aha_intr(void *arg)
1163{
1164	struct	aha_softc *aha;
1165	u_int	intstat;
1166	uint32_t paddr;
1167
1168	aha = (struct aha_softc *)arg;
1169	while (((intstat = aha_inb(aha, INTSTAT_REG)) & INTR_PENDING) != 0) {
1170		if ((intstat & CMD_COMPLETE) != 0) {
1171			aha->latched_status = aha_inb(aha, STATUS_REG);
1172			aha->command_cmp = TRUE;
1173		}
1174
1175		aha_outb(aha, CONTROL_REG, RESET_INTR);
1176
1177		if ((intstat & IMB_LOADED) != 0) {
1178			while (aha->cur_inbox->comp_code != AMBI_FREE) {
1179				paddr = aha_a24tou(aha->cur_inbox->ccb_addr);
1180				ahadone(aha, ahaccbptov(aha, paddr),
1181				    aha->cur_inbox->comp_code);
1182				aha->cur_inbox->comp_code = AMBI_FREE;
1183				ahanextinbox(aha);
1184			}
1185		}
1186
1187		if ((intstat & SCSI_BUS_RESET) != 0) {
1188			ahareset(aha, /*hardreset*/FALSE);
1189		}
1190	}
1191}
1192
1193static void
1194ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_code)
1195{
1196	union  ccb	  *ccb;
1197	struct ccb_scsiio *csio;
1198
1199	ccb = accb->ccb;
1200	csio = &accb->ccb->csio;
1201
1202	if ((accb->flags & ACCB_ACTIVE) == 0) {
1203		device_printf(aha->dev,
1204		    "ahadone - Attempt to free non-active ACCB %p\n",
1205		    (void *)accb);
1206		return;
1207	}
1208
1209	if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1210		bus_dmasync_op_t op;
1211
1212		if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1213			op = BUS_DMASYNC_POSTREAD;
1214		else
1215			op = BUS_DMASYNC_POSTWRITE;
1216		bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1217		bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1218	}
1219
1220	if (accb == aha->recovery_accb) {
1221		/*
1222		 * The recovery ACCB does not have a CCB associated
1223		 * with it, so short circuit the normal error handling.
1224		 * We now traverse our list of pending CCBs and process
1225		 * any that were terminated by the recovery CCBs action.
1226		 * We also reinstate timeouts for all remaining, pending,
1227		 * CCBs.
1228		 */
1229		struct cam_path *path;
1230		struct ccb_hdr *ccb_h;
1231		cam_status error;
1232
1233		/* Notify all clients that a BDR occured */
1234		error = xpt_create_path(&path, /*periph*/NULL,
1235		    cam_sim_path(aha->sim), accb->hccb.target,
1236		    CAM_LUN_WILDCARD);
1237
1238		if (error == CAM_REQ_CMP)
1239			xpt_async(AC_SENT_BDR, path, NULL);
1240
1241		ccb_h = LIST_FIRST(&aha->pending_ccbs);
1242		while (ccb_h != NULL) {
1243			struct aha_ccb *pending_accb;
1244
1245			pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1246			if (pending_accb->hccb.target == accb->hccb.target) {
1247				pending_accb->hccb.ahastat = AHASTAT_HA_BDR;
1248				ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1249				ahadone(aha, pending_accb, AMBI_ERROR);
1250			} else {
1251				ccb_h->timeout_ch = timeout(ahatimeout,
1252				    (caddr_t)pending_accb,
1253				    (ccb_h->timeout * hz) / 1000);
1254				ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1255			}
1256		}
1257		device_printf(aha->dev, "No longer in timeout\n");
1258		return;
1259	}
1260
1261	untimeout(ahatimeout, accb, ccb->ccb_h.timeout_ch);
1262
1263	switch (comp_code) {
1264	case AMBI_FREE:
1265		device_printf(aha->dev,
1266		    "ahadone - CCB completed with free status!\n");
1267		break;
1268	case AMBI_NOT_FOUND:
1269		device_printf(aha->dev,
1270		    "ahadone - CCB Abort failed to find CCB\n");
1271		break;
1272	case AMBI_ABORT:
1273	case AMBI_ERROR:
1274		/* An error occured */
1275		if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1276			csio->resid = 0;
1277		else
1278			csio->resid = aha_a24tou(accb->hccb.data_len);
1279		switch(accb->hccb.ahastat) {
1280		case AHASTAT_DATARUN_ERROR:
1281		{
1282			if (csio->resid <= 0) {
1283				csio->ccb_h.status = CAM_DATA_RUN_ERR;
1284				break;
1285			}
1286			/* FALLTHROUGH */
1287		}
1288		case AHASTAT_NOERROR:
1289			csio->scsi_status = accb->hccb.sdstat;
1290			csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1291			switch(csio->scsi_status) {
1292			case SCSI_STATUS_CHECK_COND:
1293			case SCSI_STATUS_CMD_TERMINATED:
1294				csio->ccb_h.status |= CAM_AUTOSNS_VALID;
1295				/*
1296				 * The aha writes the sense data at different
1297				 * offsets based on the scsi cmd len
1298				 */
1299				bcopy((caddr_t) &accb->hccb.scsi_cdb +
1300				    accb->hccb.cmd_len,
1301				    (caddr_t) &csio->sense_data,
1302				    accb->hccb.sense_len);
1303				break;
1304			default:
1305				break;
1306			case SCSI_STATUS_OK:
1307				csio->ccb_h.status = CAM_REQ_CMP;
1308				break;
1309			}
1310			break;
1311		case AHASTAT_SELTIMEOUT:
1312			csio->ccb_h.status = CAM_SEL_TIMEOUT;
1313			break;
1314		case AHASTAT_UNEXPECTED_BUSFREE:
1315			csio->ccb_h.status = CAM_UNEXP_BUSFREE;
1316			break;
1317		case AHASTAT_INVALID_PHASE:
1318			csio->ccb_h.status = CAM_SEQUENCE_FAIL;
1319			break;
1320		case AHASTAT_INVALID_ACTION_CODE:
1321			panic("%s: Inavlid Action code", aha_name(aha));
1322			break;
1323		case AHASTAT_INVALID_OPCODE:
1324			if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1325				panic("%s: Invalid CCB Opcode %x hccb = %p",
1326				    aha_name(aha), accb->hccb.opcode,
1327				    &accb->hccb);
1328			device_printf(aha->dev,
1329			    "AHA-1540A compensation failed\n");
1330			xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1331			csio->ccb_h.status = CAM_REQUEUE_REQ;
1332			break;
1333		case AHASTAT_LINKED_CCB_LUN_MISMATCH:
1334			/* We don't even support linked commands... */
1335			panic("%s: Linked CCB Lun Mismatch", aha_name(aha));
1336			break;
1337		case AHASTAT_INVALID_CCB_OR_SG_PARAM:
1338			panic("%s: Invalid CCB or SG list", aha_name(aha));
1339			break;
1340		case AHASTAT_HA_SCSI_BUS_RESET:
1341			if ((csio->ccb_h.status & CAM_STATUS_MASK)
1342			    != CAM_CMD_TIMEOUT)
1343				csio->ccb_h.status = CAM_SCSI_BUS_RESET;
1344			break;
1345		case AHASTAT_HA_BDR:
1346			if ((accb->flags & ACCB_DEVICE_RESET) == 0)
1347				csio->ccb_h.status = CAM_BDR_SENT;
1348			else
1349				csio->ccb_h.status = CAM_CMD_TIMEOUT;
1350			break;
1351		}
1352		if (csio->ccb_h.status != CAM_REQ_CMP) {
1353			xpt_freeze_devq(csio->ccb_h.path, /*count*/1);
1354			csio->ccb_h.status |= CAM_DEV_QFRZN;
1355		}
1356		if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1357			ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1358		ahafreeccb(aha, accb);
1359		xpt_done(ccb);
1360		break;
1361	case AMBI_OK:
1362		/* All completed without incident */
1363		/* XXX DO WE NEED TO COPY SENSE BYTES HERE???? XXX */
1364		/* I don't think so since it works???? */
1365		ccb->ccb_h.status |= CAM_REQ_CMP;
1366		if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1367			ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1368		ahafreeccb(aha, accb);
1369		xpt_done(ccb);
1370		break;
1371	}
1372}
1373
1374static int
1375ahareset(struct aha_softc* aha, int hard_reset)
1376{
1377	struct	 ccb_hdr *ccb_h;
1378	u_int	 status;
1379	u_int	 timeout;
1380	uint8_t reset_type;
1381
1382	if (hard_reset != 0)
1383		reset_type = HARD_RESET;
1384	else
1385		reset_type = SOFT_RESET;
1386	aha_outb(aha, CONTROL_REG, reset_type);
1387
1388	/* Wait 5sec. for Diagnostic start */
1389	timeout = 5 * 10000;
1390	while (--timeout) {
1391		status = aha_inb(aha, STATUS_REG);
1392		if ((status & DIAG_ACTIVE) != 0)
1393			break;
1394		DELAY(100);
1395	}
1396	if (timeout == 0) {
1397		PRVERB((aha->dev, "ahareset - Diagnostic Active failed to "
1398		    "assert. status = %#x\n", status));
1399		return (ETIMEDOUT);
1400	}
1401
1402	/* Wait 10sec. for Diagnostic end */
1403	timeout = 10 * 10000;
1404	while (--timeout) {
1405		status = aha_inb(aha, STATUS_REG);
1406		if ((status & DIAG_ACTIVE) == 0)
1407			break;
1408		DELAY(100);
1409	}
1410	if (timeout == 0) {
1411		panic("%s: ahareset - Diagnostic Active failed to drop. "
1412		    "status = 0x%x\n", aha_name(aha), status);
1413		return (ETIMEDOUT);
1414	}
1415
1416	/* Wait for the host adapter to become ready or report a failure */
1417	timeout = 10000;
1418	while (--timeout) {
1419		status = aha_inb(aha, STATUS_REG);
1420		if ((status & (DIAG_FAIL|HA_READY|DATAIN_REG_READY)) != 0)
1421			break;
1422		DELAY(100);
1423	}
1424	if (timeout == 0) {
1425		device_printf(aha->dev, "ahareset - Host adapter failed to "
1426		    "come ready. status = 0x%x\n", status);
1427		return (ETIMEDOUT);
1428	}
1429
1430	/* If the diagnostics failed, tell the user */
1431	if ((status & DIAG_FAIL) != 0
1432	 || (status & HA_READY) == 0) {
1433		device_printf(aha->dev, "ahareset - Adapter failed diag\n");
1434
1435		if ((status & DATAIN_REG_READY) != 0)
1436			device_printf(aha->dev, "ahareset - Host Adapter "
1437			    "Error code = 0x%x\n", aha_inb(aha, DATAIN_REG));
1438		return (ENXIO);
1439	}
1440
1441	/* If we've attached to the XPT, tell it about the event */
1442	if (aha->path != NULL)
1443		xpt_async(AC_BUS_RESET, aha->path, NULL);
1444
1445	/*
1446	 * Perform completion processing for all outstanding CCBs.
1447	 */
1448	while ((ccb_h = LIST_FIRST(&aha->pending_ccbs)) != NULL) {
1449		struct aha_ccb *pending_accb;
1450
1451		pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1452		pending_accb->hccb.ahastat = AHASTAT_HA_SCSI_BUS_RESET;
1453		ahadone(aha, pending_accb, AMBI_ERROR);
1454	}
1455
1456	/* If we've allocated mailboxes, initialize them */
1457	/* Must be done after we've aborted our queue, or aha_cmd fails */
1458	if (aha->init_level > 4)
1459		ahainitmboxes(aha);
1460
1461	return (0);
1462}
1463
1464/*
1465 * Send a command to the adapter.
1466 */
1467int
1468aha_cmd(struct aha_softc *aha, aha_op_t opcode, uint8_t *params,
1469	u_int param_len, uint8_t *reply_data, u_int reply_len,
1470	u_int cmd_timeout)
1471{
1472	u_int	timeout;
1473	u_int	status;
1474	u_int	saved_status;
1475	u_int	intstat;
1476	u_int	reply_buf_size;
1477	int	s;
1478	int	cmd_complete;
1479	int	error;
1480
1481	/* No data returned to start */
1482	reply_buf_size = reply_len;
1483	reply_len = 0;
1484	intstat = 0;
1485	cmd_complete = 0;
1486	saved_status = 0;
1487	error = 0;
1488
1489	/*
1490	 * All commands except for the "start mailbox" and the "enable
1491	 * outgoing mailbox read interrupt" commands cannot be issued
1492	 * while there are pending transactions.  Freeze our SIMQ
1493	 * and wait for all completions to occur if necessary.
1494	 */
1495	timeout = 10000;
1496	s = splcam();
1497	while (LIST_FIRST(&aha->pending_ccbs) != NULL && --timeout) {
1498		/* Fire the interrupt handler in case interrupts are blocked */
1499		aha_intr(aha);
1500		splx(s);
1501		DELAY(10);
1502		s = splcam();
1503	}
1504	splx(s);
1505
1506	if (timeout == 0) {
1507		device_printf(aha->dev,
1508		    "aha_cmd: Timeout waiting for adapter idle\n");
1509		return (ETIMEDOUT);
1510	}
1511	aha->command_cmp = 0;
1512	/*
1513	 * Wait up to 10 sec. for the adapter to become
1514	 * ready to accept commands.
1515	 */
1516	timeout = 100000;
1517	while (--timeout) {
1518		status = aha_inb(aha, STATUS_REG);
1519		if ((status & HA_READY) != 0 && (status & CMD_REG_BUSY) == 0)
1520			break;
1521		/*
1522		 * Throw away any pending data which may be
1523		 * left over from earlier commands that we
1524		 * timedout on.
1525		 */
1526		if ((status & DATAIN_REG_READY) != 0)
1527			(void)aha_inb(aha, DATAIN_REG);
1528		DELAY(100);
1529	}
1530	if (timeout == 0) {
1531		device_printf(aha->dev, "aha_cmd: Timeout waiting for adapter"
1532		    " ready, status = 0x%x\n", status);
1533		return (ETIMEDOUT);
1534	}
1535
1536	/*
1537	 * Send the opcode followed by any necessary parameter bytes.
1538	 */
1539	aha_outb(aha, COMMAND_REG, opcode);
1540
1541	/*
1542	 * Wait for up to 1sec to get the parameter list sent
1543	 */
1544	timeout = 10000;
1545	while (param_len && --timeout) {
1546		DELAY(100);
1547		s = splcam();
1548		status = aha_inb(aha, STATUS_REG);
1549		intstat = aha_inb(aha, INTSTAT_REG);
1550		splx(s);
1551
1552		if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1553		 == (INTR_PENDING|CMD_COMPLETE)) {
1554			saved_status = status;
1555			cmd_complete = 1;
1556			break;
1557		}
1558
1559		if (aha->command_cmp != 0) {
1560			saved_status = aha->latched_status;
1561			cmd_complete = 1;
1562			break;
1563		}
1564		if ((status & DATAIN_REG_READY) != 0)
1565			break;
1566		if ((status & CMD_REG_BUSY) == 0) {
1567			aha_outb(aha, COMMAND_REG, *params++);
1568			param_len--;
1569			timeout = 10000;
1570		}
1571	}
1572	if (timeout == 0) {
1573		device_printf(aha->dev, "aha_cmd: Timeout sending parameters, "
1574		    "status = 0x%x\n", status);
1575		error = ETIMEDOUT;
1576	}
1577
1578	/*
1579	 * For all other commands, we wait for any output data
1580	 * and the final comand completion interrupt.
1581	 */
1582	while (cmd_complete == 0 && --cmd_timeout) {
1583
1584		s = splcam();
1585		status = aha_inb(aha, STATUS_REG);
1586		intstat = aha_inb(aha, INTSTAT_REG);
1587		splx(s);
1588
1589		if (aha->command_cmp != 0) {
1590			cmd_complete = 1;
1591			saved_status = aha->latched_status;
1592		} else if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1593			== (INTR_PENDING|CMD_COMPLETE)) {
1594			/*
1595			 * Our poll (in case interrupts are blocked)
1596			 * saw the CMD_COMPLETE interrupt.
1597			 */
1598			cmd_complete = 1;
1599			saved_status = status;
1600		}
1601		if ((status & DATAIN_REG_READY) != 0) {
1602			uint8_t data;
1603
1604			data = aha_inb(aha, DATAIN_REG);
1605			if (reply_len < reply_buf_size) {
1606				*reply_data++ = data;
1607			} else {
1608				device_printf(aha->dev,
1609				    "aha_cmd - Discarded reply data "
1610				    "byte for opcode 0x%x\n", opcode);
1611			}
1612			/*
1613			 * Reset timeout to ensure at least a second
1614			 * between response bytes.
1615			 */
1616			cmd_timeout = MAX(cmd_timeout, 10000);
1617			reply_len++;
1618		}
1619		DELAY(100);
1620	}
1621	if (cmd_timeout == 0) {
1622		device_printf(aha->dev, "aha_cmd: Timeout: status = 0x%x, "
1623		    "intstat = 0x%x, reply_len = %d\n", status, intstat,
1624		    reply_len);
1625		return (ETIMEDOUT);
1626	}
1627
1628	/*
1629	 * Clear any pending interrupts.  Block interrupts so our
1630	 * interrupt handler is not re-entered.
1631	 */
1632	s = splcam();
1633	aha_intr(aha);
1634	splx(s);
1635
1636	if (error != 0)
1637		return (error);
1638
1639	/*
1640	 * If the command was rejected by the controller, tell the caller.
1641	 */
1642	if ((saved_status & CMD_INVALID) != 0) {
1643		PRVERB((aha->dev, "Invalid Command 0x%x\n", opcode));
1644		/*
1645		 * Some early adapters may not recover properly from
1646		 * an invalid command.  If it appears that the controller
1647		 * has wedged (i.e. status was not cleared by our interrupt
1648		 * reset above), perform a soft reset.
1649      		 */
1650		DELAY(1000);
1651		status = aha_inb(aha, STATUS_REG);
1652		if ((status & (CMD_INVALID|STATUS_REG_RSVD|DATAIN_REG_READY|
1653			      CMD_REG_BUSY|DIAG_FAIL|DIAG_ACTIVE)) != 0
1654		 || (status & (HA_READY|INIT_REQUIRED))
1655		  != (HA_READY|INIT_REQUIRED))
1656			ahareset(aha, /*hard_reset*/FALSE);
1657		return (EINVAL);
1658	}
1659
1660	if (param_len > 0) {
1661		/* The controller did not accept the full argument list */
1662		PRVERB((aha->dev, "Controller did not accept full argument "
1663		    "list (%d > 0)\n", param_len));
1664	 	return (E2BIG);
1665	}
1666
1667	if (reply_len != reply_buf_size) {
1668		/* Too much or too little data received */
1669		PRVERB((aha->dev, "data received mismatch (%d != %d)\n",
1670		    reply_len, reply_buf_size));
1671		return (EMSGSIZE);
1672	}
1673
1674	/* We were successful */
1675	return (0);
1676}
1677
1678static int
1679ahainitmboxes(struct aha_softc *aha)
1680{
1681	int error;
1682	init_24b_mbox_params_t init_mbox;
1683
1684	bzero(aha->in_boxes, sizeof(aha_mbox_in_t) * aha->num_boxes);
1685	bzero(aha->out_boxes, sizeof(aha_mbox_out_t) * aha->num_boxes);
1686	aha->cur_inbox = aha->in_boxes;
1687	aha->last_inbox = aha->in_boxes + aha->num_boxes - 1;
1688	aha->cur_outbox = aha->out_boxes;
1689	aha->last_outbox = aha->out_boxes + aha->num_boxes - 1;
1690
1691	/* Tell the adapter about them */
1692	init_mbox.num_mboxes = aha->num_boxes;
1693	ahautoa24(aha->mailbox_physbase, init_mbox.base_addr);
1694	error = aha_cmd(aha, AOP_INITIALIZE_MBOX, (uint8_t *)&init_mbox,
1695	    /*parmlen*/sizeof(init_mbox), /*reply_buf*/NULL,
1696	    /*reply_len*/0, DEFAULT_CMD_TIMEOUT);
1697
1698	if (error != 0)
1699		printf("ahainitmboxes: Initialization command failed\n");
1700	return (error);
1701}
1702
1703/*
1704 * Update the XPT's idea of the negotiated transfer
1705 * parameters for a particular target.
1706 */
1707static void
1708ahafetchtransinfo(struct aha_softc *aha, struct ccb_trans_settings* cts)
1709{
1710	setup_data_t	setup_info;
1711	u_int		target;
1712	u_int		targ_offset;
1713	u_int		sync_period;
1714	int		error;
1715	uint8_t	param;
1716	targ_syncinfo_t	sync_info;
1717#ifdef	CAM_NEW_TRAN_CODE
1718	struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
1719#endif
1720
1721	target = cts->ccb_h.target_id;
1722	targ_offset = (target & 0x7);
1723
1724	/*
1725	 * Inquire Setup Information.  This command retreives
1726	 * the sync info for older models.
1727	 */
1728	param = sizeof(setup_info);
1729	error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &param, /*paramlen*/1,
1730	    (uint8_t*)&setup_info, sizeof(setup_info), DEFAULT_CMD_TIMEOUT);
1731
1732	if (error != 0) {
1733		device_printf(aha->dev,
1734		    "ahafetchtransinfo - Inquire Setup Info Failed %d\n",
1735		    error);
1736		return;
1737	}
1738
1739	sync_info = setup_info.syncinfo[targ_offset];
1740
1741#ifdef	CAM_NEW_TRAN_CODE
1742	if (sync_info.sync == 0)
1743		spi->sync_offset = 0;
1744	else
1745		spi->sync_offset = sync_info.offset;
1746
1747	spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1748
1749	if (aha->boardid >= BOARD_1542CF)
1750		sync_period = 1000;
1751	else
1752		sync_period = 2000;
1753	sync_period += 500 * sync_info.period;
1754
1755	/* Convert ns value to standard SCSI sync rate */
1756	if (spi->sync_offset != 0)
1757		spi->sync_period = scsi_calc_syncparam(sync_period);
1758	else
1759		spi->sync_period = 0;
1760
1761	spi->valid = CTS_SPI_VALID_SYNC_RATE
1762		   | CTS_SPI_VALID_SYNC_OFFSET
1763		   | CTS_SPI_VALID_BUS_WIDTH;
1764#else
1765	if (sync_info.sync == 0)
1766		cts->sync_offset = 0;
1767	else
1768		cts->sync_offset = sync_info.offset;
1769
1770	cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1771
1772	if (aha->boardid >= BOARD_1542CF)
1773		sync_period = 1000;
1774	else
1775		sync_period = 2000;
1776	sync_period += 500 * sync_info.period;
1777
1778	/* Convert ns value to standard SCSI sync rate */
1779	if (cts->sync_offset != 0)
1780		cts->sync_period = scsi_calc_syncparam(sync_period);
1781	else
1782		cts->sync_period = 0;
1783
1784	cts->valid = CCB_TRANS_SYNC_RATE_VALID
1785		   | CCB_TRANS_SYNC_OFFSET_VALID
1786		   | CCB_TRANS_BUS_WIDTH_VALID;
1787#endif
1788        xpt_async(AC_TRANSFER_NEG, cts->ccb_h.path, cts);
1789}
1790
1791static void
1792ahamapmboxes(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1793{
1794	struct aha_softc* aha;
1795
1796	aha = (struct aha_softc*)arg;
1797	aha->mailbox_physbase = segs->ds_addr;
1798}
1799
1800static void
1801ahamapccbs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1802{
1803	struct aha_softc* aha;
1804
1805	aha = (struct aha_softc*)arg;
1806	aha->aha_ccb_physbase = segs->ds_addr;
1807}
1808
1809static void
1810ahamapsgs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1811{
1812
1813	struct aha_softc* aha;
1814
1815	aha = (struct aha_softc*)arg;
1816	SLIST_FIRST(&aha->sg_maps)->sg_physaddr = segs->ds_addr;
1817}
1818
1819static void
1820ahapoll(struct cam_sim *sim)
1821{
1822	aha_intr(cam_sim_softc(sim));
1823}
1824
1825static void
1826ahatimeout(void *arg)
1827{
1828	struct aha_ccb	*accb;
1829	union  ccb	*ccb;
1830	struct aha_softc *aha;
1831	int		 s;
1832	uint32_t	paddr;
1833	struct ccb_hdr *ccb_h;
1834
1835	accb = (struct aha_ccb *)arg;
1836	ccb = accb->ccb;
1837	aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1838	xpt_print_path(ccb->ccb_h.path);
1839	printf("CCB %p - timed out\n", (void *)accb);
1840
1841	s = splcam();
1842
1843	if ((accb->flags & ACCB_ACTIVE) == 0) {
1844		xpt_print_path(ccb->ccb_h.path);
1845		printf("CCB %p - timed out CCB already completed\n",
1846		    (void *)accb);
1847		splx(s);
1848		return;
1849	}
1850
1851	/*
1852	 * In order to simplify the recovery process, we ask the XPT
1853	 * layer to halt the queue of new transactions and we traverse
1854	 * the list of pending CCBs and remove their timeouts. This
1855	 * means that the driver attempts to clear only one error
1856	 * condition at a time.  In general, timeouts that occur
1857	 * close together are related anyway, so there is no benefit
1858	 * in attempting to handle errors in parrallel.  Timeouts will
1859	 * be reinstated when the recovery process ends.
1860	 */
1861	if ((accb->flags & ACCB_DEVICE_RESET) == 0) {
1862		if ((accb->flags & ACCB_RELEASE_SIMQ) == 0) {
1863			xpt_freeze_simq(aha->sim, /*count*/1);
1864			accb->flags |= ACCB_RELEASE_SIMQ;
1865		}
1866
1867		ccb_h = LIST_FIRST(&aha->pending_ccbs);
1868		while (ccb_h != NULL) {
1869			struct aha_ccb *pending_accb;
1870
1871			pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1872			untimeout(ahatimeout, pending_accb, ccb_h->timeout_ch);
1873			ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1874		}
1875	}
1876
1877	if ((accb->flags & ACCB_DEVICE_RESET) != 0
1878	 || aha->cur_outbox->action_code != AMBO_FREE) {
1879		/*
1880		 * Try a full host adapter/SCSI bus reset.
1881		 * We do this only if we have already attempted
1882		 * to clear the condition with a BDR, or we cannot
1883		 * attempt a BDR for lack of mailbox resources.
1884		 */
1885		ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1886		ahareset(aha, /*hardreset*/TRUE);
1887		device_printf(aha->dev, "No longer in timeout\n");
1888	} else {
1889		/*
1890		 * Send a Bus Device Reset message:
1891		 * The target that is holding up the bus may not
1892		 * be the same as the one that triggered this timeout
1893		 * (different commands have different timeout lengths),
1894		 * but we have no way of determining this from our
1895		 * timeout handler.  Our strategy here is to queue a
1896		 * BDR message to the target of the timed out command.
1897		 * If this fails, we'll get another timeout 2 seconds
1898		 * later which will attempt a bus reset.
1899		 */
1900		accb->flags |= ACCB_DEVICE_RESET;
1901		ccb->ccb_h.timeout_ch = timeout(ahatimeout, (caddr_t)accb, 2 * hz);
1902		aha->recovery_accb->hccb.opcode = INITIATOR_BUS_DEV_RESET;
1903
1904		/* No Data Transfer */
1905		aha->recovery_accb->hccb.datain = TRUE;
1906		aha->recovery_accb->hccb.dataout = TRUE;
1907		aha->recovery_accb->hccb.ahastat = 0;
1908		aha->recovery_accb->hccb.sdstat = 0;
1909		aha->recovery_accb->hccb.target = ccb->ccb_h.target_id;
1910
1911		/* Tell the adapter about this command */
1912		paddr = ahaccbvtop(aha, aha->recovery_accb);
1913		ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1914		aha->cur_outbox->action_code = AMBO_START;
1915		aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1916		ahanextoutbox(aha);
1917	}
1918
1919	splx(s);
1920}
1921
1922int
1923aha_detach(struct aha_softc *aha)
1924{
1925	xpt_async(AC_LOST_DEVICE, aha->path, NULL);
1926	xpt_free_path(aha->path);
1927	xpt_bus_deregister(cam_sim_path(aha->sim));
1928	cam_sim_free(aha->sim, /*free_devq*/TRUE);
1929	return (0);
1930}
1931