uwx_self_context.s revision 129059 
177943Sdfr// Copyright (c) 2003 Hewlett-Packard Development Company, L.P.
277943Sdfr// Permission is hereby granted, free of charge, to any person
377943Sdfr// obtaining a copy of this software and associated documentation
4163898Smarcel// files (the "Software"), to deal in the Software without
5163898Smarcel// restriction, including without limitation the rights to use,
6163898Smarcel// copy, modify, merge, publish, distribute, sublicense, and/or sell
7163898Smarcel// copies of the Software, and to permit persons to whom the
8163898Smarcel// Software is furnished to do so, subject to the following
9163898Smarcel// conditions:
10163898Smarcel//
11163898Smarcel// The above copyright notice and this permission notice shall be
1277943Sdfr// included in all copies or substantial portions of the Software.
1377943Sdfr//
1477943Sdfr// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1577943Sdfr// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1677943Sdfr// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1777943Sdfr// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1877943Sdfr// HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1977943Sdfr// WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2077943Sdfr// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2177943Sdfr// OTHER DEALINGS IN THE SOFTWARE.
2277943Sdfr
2377943Sdfr#ifdef _LP64
2477943Sdfr#define SWIZZLE add
2577943Sdfr#define STPTR st8
2677943Sdfr#else
27163898Smarcel#define SWIZZLE addp4
28163898Smarcel#define STPTR st4
29163898Smarcel#endif
30163898Smarcel
31163898SmarcelrRP	= r14
32163898SmarcelrPFS	= r15
3377943SdfrrUNAT	= r16
34163898SmarcelrRNAT	= r17
3577943SdfrrENV0	= r18
3677943SdfrrENV1	= r19
3777943SdfrrENV2	= r20
3877943SdfrrNSLOT	= r21
39163898SmarcelrBSP	= r22
40163898SmarcelrPBSP	= r23
4177943SdfrrRSC	= r24
4277943SdfrrNATP	= r25
4377943SdfrrBIAS	= r26
4477943SdfrrRSC0	= r27
4577943SdfrrTMP1	= r28
46346482SkevansrTMP2	= r29
4777943SdfrrTMP3	= r30
4877943SdfrrTMP4	= r31
49346482SkevansrTMP5	= r8
5077943Sdfr
5177943SdfrVALID_IP     = 1
5277943SdfrVALID_SP     = 1 << 1
5377943SdfrVALID_BSP    = 1 << 2
5477943SdfrVALID_CFM    = 1 << 3
5577943SdfrVALID_PREDS  = 1 << 7
5677943SdfrVALID_RNAT   = 1 << 10
57264095SemasteVALID_UNAT   = 1 << 11
58346482SkevansVALID_FPSR   = 1 << 12
59346482SkevansVALID_LC     = 1 << 13
60346482SkevansVALID_GRS    = 0xf << 16
61346482SkevansVALID_BRS    = 0x1f << 20
62346482SkevansVALID_BASIC4 = VALID_IP | VALID_SP | VALID_BSP | VALID_CFM
6377943SdfrVALID_SPEC   = VALID_PREDS | VALID_RNAT | VALID_UNAT | VALID_FPSR | VALID_LC
64329114SkevansVALID_BITS   = (VALID_BASIC4 | VALID_SPEC | VALID_GRS | VALID_BRS) << 32
65329114Skevans
66329114Skevans	.text
67329114Skevans	.proc	uwx_self_init_context
68329114Skevans	.global uwx_self_init_context
69163898Smarceluwx_self_init_context:
7077943Sdfr	.prologue
71	alloc	rPFS = ar.pfs, 1, 0, 0, 0
72	mov	rUNAT = ar.unat
73	.body
74	SWIZZLE	rENV0 = r0, r32		// rENV0 = &env
75	;;
76	flushrs
77	extr.u	rNSLOT = rPFS, 7, 7 	// nslots = pfs.sol
78	mov	rRP = b0
79	;;
80	mov	rRSC = ar.rsc
81	add	rENV1 = 136, rENV0	// rENV1 = &env->context.gr[0]
82	add	rENV2 = 144, rENV0	// rENV2 = &env->context.gr[1]
83	;;
84	and	rRSC0 = -4, rRSC	// clear ar.rsc.mode
85	adds	rNATP = 0x1f8, r0
86	mov	rTMP1 = b1
87	;;
88	st8.spill [rENV1] = r4, 16	// env+136: r4
89	st8.spill [rENV2] = r5, 16	// env+144: r5
90	mov	rTMP2 = b2
91	;;
92	st8.spill [rENV1] = r6, 16	// env+152: r6
93	st8.spill [rENV2] = r7, 16	// env+160: r7
94	mov	rTMP3 = b3
95	;;
96	st8	[rENV1] = rTMP1, 16	// env+168: b1
97	st8	[rENV2] = rTMP2, 16	// env+176: b2
98	mov	rTMP1 = b4
99	;;
100	st8	[rENV1] = rTMP3, 16	// env+184: b3
101	st8	[rENV2] = rTMP1, 16	// env+192: b4
102	mov	rTMP2 = b5
103	;;
104	st8	[rENV1] = rTMP2		// env+200: b5
105	mov	ar.rsc = rRSC0		// enforced lazy mode
106	add	rENV1 = 8, rENV0
107	;;
108	mov	rRNAT = ar.rnat		// get copy of ar.rnat
109	movl	rTMP1 = VALID_BITS	// valid_regs: ip, sp, bsp, cfm,
110					// preds, rnat, unat, fpsr,
111					// lc, grs, brs
112					// = 0x1ff3c8f00000000
113	;;
114	mov	ar.rsc = rRSC		// restore ar.rsc
115	mov	rBSP = ar.bsp
116	add	rTMP3 = 136, rENV0	// spill_loc = &env->context.gr[0]
117	;;
118	mov	rTMP2 = ar.unat
119	nop
120	extr.u	rTMP3 = rTMP3, 3, 6	// bitpos = spill_loc{8:3}
121	;;
122	or	rNATP = rBSP, rNATP	// natp = bsp | 0x1f8
123	sub	rTMP4 = 64, rTMP3	// (64 - bitpos)
124	shr	rTMP5 = rTMP2, rTMP3	// (unat >> bitpos)
125	;;
126	sub	rBIAS = rNATP, rBSP	// bias = (natp - bsp) ...
127	nop
128	shl	rTMP2 = rTMP2, rTMP4	// (unat << (64 - bitpos))
129	;;
130	or	rTMP2 = rTMP2, rTMP5	// rotate_right(unat, bitpos)
131	extr.u	rBIAS = rBIAS, 3, 6	// ... div 8
132	mov	rTMP4 = pr
133	;;
134	st8	[rENV0] = rTMP1, 16	// env+0: valid_regs mask
135	st8	[rENV1] = rRP, 24	// env+8: ip (my rp)
136	add	rBIAS = rNSLOT, rBIAS	// bias += nslots
137	;;
138	cmp.lt	p6, p0 = 63, rBIAS	// if (63 < bias) ...
139	cmp.lt	p7, p0 = 126, rBIAS	// if (126 < bias) ...
140	nop
141	;;
142	st8	[rENV0] = r12, 48	// env+16: sp
143	st8	[rENV1] = rPFS, 40	// env+32: cfm (my pfs)
144(p6)	add	rNSLOT = 1, rNSLOT	//   ... nslots++
145	;;
146	st8	[rENV0] = rTMP4, 24	// env+64: preds
147	st8	[rENV1] = rTMP2, 24	// env+72: priunat
148(p7)	add	rNSLOT = 1, rNSLOT	//   ... nslots++
149	;;
150	st8	[rENV0] = rRNAT, -64	// env+88: rnat
151	st8	[rENV1] = rUNAT, 8	// env+96: unat
152	dep.z	rTMP3 = rNSLOT, 3, 7 	// (nslots << 3)
153	;;
154	sub	rPBSP = rBSP, rTMP3	// prev_bsp = bsp - (nslots << 3)
155	mov	rTMP3 = ar.fpsr
156	mov	rTMP1 = ar.lc
157	;;
158	st8	[rENV0] = rPBSP		// env+24: bsp (my prev bsp)
159	st8	[rENV1] = rTMP3, 8	// env+104: fpsr
160	add	rENV2 = 320, rENV2	// rENV2 = &env->context.rstate
161	;;
162	st8	[rENV1] = rTMP1		// env+112: lc
163	STPTR	[rENV2] = r0		// env+528: env->rstate = 0
164	nop
165	;;
166	mov	ar.unat = rUNAT
167	mov	ret0 = r0		// return UWX_OK
168	br.ret.sptk	b0
169	.endp
170
171