1170101Ssimokawa/* 2170101Ssimokawa * Copyright (c) 2007 Hidetoshi Shimokawa 3170101Ssimokawa * All rights reserved. 4170101Ssimokawa * 5170101Ssimokawa * Redistribution and use in source and binary forms, with or without 6170101Ssimokawa * modification, are permitted provided that the following conditions 7170101Ssimokawa * are met: 8170101Ssimokawa * 1. Redistributions of source code must retain the above copyright 9170101Ssimokawa * notice, this list of conditions and the following disclaimer. 10170101Ssimokawa * 2. Redistributions in binary form must reproduce the above copyright 11170101Ssimokawa * notice, this list of conditions and the following disclaimer in the 12170101Ssimokawa * documentation and/or other materials provided with the distribution. 13170101Ssimokawa * 3. All advertising materials mentioning features or use of this software 14170101Ssimokawa * must display the acknowledgement as bellow: 15170101Ssimokawa * 16170101Ssimokawa * This product includes software developed by K. Kobayashi and H. Shimokawa 17170101Ssimokawa * 18170101Ssimokawa * 4. The name of the author may not be used to endorse or promote products 19170101Ssimokawa * derived from this software without specific prior written permission. 20170101Ssimokawa * 21170101Ssimokawa * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22170101Ssimokawa * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23170101Ssimokawa * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24170101Ssimokawa * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 25170101Ssimokawa * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26170101Ssimokawa * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27170101Ssimokawa * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28170101Ssimokawa * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29170101Ssimokawa * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30170101Ssimokawa * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31170101Ssimokawa * POSSIBILITY OF SUCH DAMAGE. 32170101Ssimokawa * 33170101Ssimokawa * $FreeBSD$ 34170101Ssimokawa * 35170101Ssimokawa */ 36170101Ssimokawa 37170101Ssimokawa#define MAX_OHCI 5 38170101Ssimokawa#define CROMSIZE 0x400 39170101Ssimokawa 40170101Ssimokawastruct fw_eui64 { 41170101Ssimokawa uint32_t hi, lo; 42170101Ssimokawa}; 43170101Ssimokawa 44170101Ssimokawastruct fwohci_softc { 45170101Ssimokawa uint32_t locator; 46170101Ssimokawa uint32_t devid; 47170101Ssimokawa uint32_t base_addr; 48170101Ssimokawa uint32_t bus_id; 49170101Ssimokawa uint32_t handle; 50170101Ssimokawa int32_t state; 51170101Ssimokawa struct crom_src_buf *crom_src_buf; 52170101Ssimokawa struct crom_src *crom_src; 53170101Ssimokawa struct crom_chunk *crom_root; 54170101Ssimokawa struct fw_eui64 eui; 55170101Ssimokawa int speed; 56170101Ssimokawa int maxrec; 57170101Ssimokawa uint32_t *config_rom; 58170101Ssimokawa char config_rom_buf[CROMSIZE*2]; /* double size for alignment */ 59170101Ssimokawa}; 60170101Ssimokawa 61170101Ssimokawaint fwohci_init(struct fwohci_softc *, int); 62170101Ssimokawavoid fwohci_ibr(struct fwohci_softc *); 63170101Ssimokawavoid fwohci_poll(struct fwohci_softc *); 64170101Ssimokawa 65170101Ssimokawa#define FWOHCI_STATE_DEAD (-1) 66170101Ssimokawa#define FWOHCI_STATE_INIT 0 67170101Ssimokawa#define FWOHCI_STATE_ENABLED 1 68170101Ssimokawa#define FWOHCI_STATE_BUSRESET 2 69170101Ssimokawa#define FWOHCI_STATE_NORMAL 3 70170101Ssimokawa 71170101Ssimokawa#define OREAD(f, o) (*(volatile uint32_t *)((f)->handle + (o))) 72170101Ssimokawa#define OWRITE(f, o, v) (*(volatile uint32_t *)((f)->handle + (o)) = (v)) 73170101Ssimokawa 74170101Ssimokawa#define OHCI_VERSION 0x00 75170101Ssimokawa#define OHCI_ATRETRY 0x08 76170101Ssimokawa#define OHCI_CROMHDR 0x18 77170101Ssimokawa#define OHCI_BUS_ID 0x1c 78170101Ssimokawa#define OHCI_BUS_OPT 0x20 79261455Seadler#define OHCI_BUSIRMC (1U << 31) 80170101Ssimokawa#define OHCI_BUSCMC (1 << 30) 81170101Ssimokawa#define OHCI_BUSISC (1 << 29) 82170101Ssimokawa#define OHCI_BUSBMC (1 << 28) 83170101Ssimokawa#define OHCI_BUSPMC (1 << 27) 84170101Ssimokawa#define OHCI_BUSFNC OHCI_BUSIRMC | OHCI_BUSCMC | OHCI_BUSISC |\ 85170101Ssimokawa OHCI_BUSBMC | OHCI_BUSPMC 86170101Ssimokawa 87170101Ssimokawa#define OHCI_EUID_HI 0x24 88170101Ssimokawa#define OHCI_EUID_LO 0x28 89170101Ssimokawa 90170101Ssimokawa#define OHCI_CROMPTR 0x34 91170101Ssimokawa#define OHCI_HCCCTL 0x50 92170101Ssimokawa#define OHCI_HCCCTLCLR 0x54 93170101Ssimokawa#define OHCI_AREQHI 0x100 94170101Ssimokawa#define OHCI_AREQHICLR 0x104 95170101Ssimokawa#define OHCI_AREQLO 0x108 96170101Ssimokawa#define OHCI_AREQLOCLR 0x10c 97170101Ssimokawa#define OHCI_PREQHI 0x110 98170101Ssimokawa#define OHCI_PREQHICLR 0x114 99170101Ssimokawa#define OHCI_PREQLO 0x118 100170101Ssimokawa#define OHCI_PREQLOCLR 0x11c 101170101Ssimokawa#define OHCI_PREQUPPER 0x120 102170101Ssimokawa 103170101Ssimokawa#define OHCI_SID_BUF 0x64 104170101Ssimokawa#define OHCI_SID_CNT 0x68 105261455Seadler#define OHCI_SID_ERR (1U << 31) 106170101Ssimokawa#define OHCI_SID_CNT_MASK 0xffc 107170101Ssimokawa 108170101Ssimokawa#define OHCI_IT_STAT 0x90 109170101Ssimokawa#define OHCI_IT_STATCLR 0x94 110170101Ssimokawa#define OHCI_IT_MASK 0x98 111170101Ssimokawa#define OHCI_IT_MASKCLR 0x9c 112170101Ssimokawa 113170101Ssimokawa#define OHCI_IR_STAT 0xa0 114170101Ssimokawa#define OHCI_IR_STATCLR 0xa4 115170101Ssimokawa#define OHCI_IR_MASK 0xa8 116170101Ssimokawa#define OHCI_IR_MASKCLR 0xac 117170101Ssimokawa 118170101Ssimokawa#define OHCI_LNKCTL 0xe0 119170101Ssimokawa#define OHCI_LNKCTLCLR 0xe4 120170101Ssimokawa 121170101Ssimokawa#define OHCI_PHYACCESS 0xec 122170101Ssimokawa#define OHCI_CYCLETIMER 0xf0 123170101Ssimokawa 124170101Ssimokawa#define OHCI_DMACTL(off) (off) 125170101Ssimokawa#define OHCI_DMACTLCLR(off) (off + 4) 126170101Ssimokawa#define OHCI_DMACMD(off) (off + 0xc) 127170101Ssimokawa#define OHCI_DMAMATCH(off) (off + 0x10) 128170101Ssimokawa 129170101Ssimokawa#define OHCI_ATQOFF 0x180 130170101Ssimokawa#define OHCI_ATQCTL OHCI_ATQOFF 131170101Ssimokawa#define OHCI_ATQCTLCLR (OHCI_ATQOFF + 4) 132170101Ssimokawa#define OHCI_ATQCMD (OHCI_ATQOFF + 0xc) 133170101Ssimokawa#define OHCI_ATQMATCH (OHCI_ATQOFF + 0x10) 134170101Ssimokawa 135170101Ssimokawa#define OHCI_ATSOFF 0x1a0 136170101Ssimokawa#define OHCI_ATSCTL OHCI_ATSOFF 137170101Ssimokawa#define OHCI_ATSCTLCLR (OHCI_ATSOFF + 4) 138170101Ssimokawa#define OHCI_ATSCMD (OHCI_ATSOFF + 0xc) 139170101Ssimokawa#define OHCI_ATSMATCH (OHCI_ATSOFF + 0x10) 140170101Ssimokawa 141170101Ssimokawa#define OHCI_ARQOFF 0x1c0 142170101Ssimokawa#define OHCI_ARQCTL OHCI_ARQOFF 143170101Ssimokawa#define OHCI_ARQCTLCLR (OHCI_ARQOFF + 4) 144170101Ssimokawa#define OHCI_ARQCMD (OHCI_ARQOFF + 0xc) 145170101Ssimokawa#define OHCI_ARQMATCH (OHCI_ARQOFF + 0x10) 146170101Ssimokawa 147170101Ssimokawa#define OHCI_ARSOFF 0x1e0 148170101Ssimokawa#define OHCI_ARSCTL OHCI_ARSOFF 149170101Ssimokawa#define OHCI_ARSCTLCLR (OHCI_ARSOFF + 4) 150170101Ssimokawa#define OHCI_ARSCMD (OHCI_ARSOFF + 0xc) 151170101Ssimokawa#define OHCI_ARSMATCH (OHCI_ARSOFF + 0x10) 152170101Ssimokawa 153170101Ssimokawa#define OHCI_ITOFF(CH) (0x200 + 0x10 * (CH)) 154170101Ssimokawa#define OHCI_ITCTL(CH) (OHCI_ITOFF(CH)) 155170101Ssimokawa#define OHCI_ITCTLCLR(CH) (OHCI_ITOFF(CH) + 4) 156170101Ssimokawa#define OHCI_ITCMD(CH) (OHCI_ITOFF(CH) + 0xc) 157170101Ssimokawa 158170101Ssimokawa#define OHCI_IROFF(CH) (0x400 + 0x20 * (CH)) 159170101Ssimokawa#define OHCI_IRCTL(CH) (OHCI_IROFF(CH)) 160170101Ssimokawa#define OHCI_IRCTLCLR(CH) (OHCI_IROFF(CH) + 4) 161170101Ssimokawa#define OHCI_IRCMD(CH) (OHCI_IROFF(CH) + 0xc) 162170101Ssimokawa#define OHCI_IRMATCH(CH) (OHCI_IROFF(CH) + 0x10) 163