1248557Sray/* 2248557Sray * Copyright (c) 2012 The FreeBSD Foundation 3248557Sray * All rights reserved. 4248557Sray * 5248557Sray * This software was developed by Semihalf under sponsorship from 6248557Sray * the FreeBSD Foundation. 7248557Sray * 8248557Sray * Redistribution and use in source and binary forms, with or without 9248557Sray * modification, are permitted provided that the following conditions 10248557Sray * are met: 11248557Sray * 1. Redistributions of source code must retain the above copyright 12248557Sray * notice, this list of conditions and the following disclaimer. 13248557Sray * 2. Redistributions in binary form must reproduce the above copyright 14248557Sray * notice, this list of conditions and the following disclaimer in the 15248557Sray * documentation and/or other materials provided with the distribution. 16248557Sray * 17248557Sray * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18248557Sray * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19248557Sray * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20248557Sray * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21248557Sray * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22248557Sray * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23248557Sray * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24248557Sray * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25248557Sray * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26248557Sray * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27248557Sray * SUCH DAMAGE. 28248557Sray * 29248557Sray * Freescale i.MX515 Device Tree Source. 30248557Sray * 31248557Sray * $FreeBSD$ 32248557Sray */ 33248557Sray 34248557Sray/ { 35248557Sray #address-cells = <1>; 36248557Sray #size-cells = <1>; 37248557Sray 38248557Sray aliases { 39248557Sray soc = &SOC; 40248557Sray }; 41248557Sray 42248557Sray 43248557Sray cpus { 44248557Sray #address-cells = <1>; 45248557Sray #size-cells = <0>; 46248557Sray 47248557Sray cpu@0 { 48248557Sray device_type = "cpu"; 49248557Sray compatible = "ARM,MCIMX515"; 50248557Sray reg = <0x0>; 51248557Sray d-cache-line-size = <32>; 52248557Sray i-cache-line-size = <32>; 53248557Sray d-cache-size = <0x8000>; 54248557Sray i-cache-size = <0x8000>; 55248557Sray /* TODO: describe L2 cache also */ 56248557Sray timebase-frequency = <0>; 57248557Sray bus-frequency = <0>; 58248557Sray clock-frequency = <0>; 59248557Sray }; 60248557Sray }; 61248557Sray 62248557Sray localbus@e0000000 { 63248557Sray compatible = "simple-bus"; 64248557Sray #address-cells = <1>; 65248557Sray #size-cells = <1>; 66248557Sray 67248557Sray /* This reflects CPU decode windows setup. */ 68248557Sray ranges; 69248557Sray 70248557Sray tzic: tz-interrupt-controller@e0000000 { 71248557Sray compatible = "fsl,imx51-tzic", "fsl,tzic"; 72248557Sray interrupt-controller; 73248557Sray #interrupt-cells = <1>; 74248557Sray reg = <0xe0000000 0x00004000>; 75248557Sray }; 76248557Sray /* 77248557Sray * 60000000 60000FFF 4K Debug ROM 78248557Sray * 60001000 60001FFF 4K ETB 79248557Sray * 60002000 60002FFF 4K ETM 80248557Sray * 60003000 60003FFF 4K TPIU 81248557Sray * 60004000 60004FFF 4K CTI0 82248557Sray * 60005000 60005FFF 4K CTI1 83248557Sray * 60006000 60006FFF 4K CTI2 84248557Sray * 60007000 60007FFF 4K CTI3 85248557Sray * 60008000 60008FFF 4K Cortex Debug Unit 86248557Sray * 87248557Sray * E0000000 E0003FFF 0x4000 TZIC 88248557Sray */ 89248557Sray }; 90248557Sray 91248557Sray SOC: soc@70000000 { 92248557Sray compatible = "simple-bus"; 93248557Sray #address-cells = <1>; 94248557Sray #size-cells = <1>; 95248557Sray interrupt-parent = <&tzic>; 96248557Sray ranges = <0x70000000 0x70000000 0x14000000>; 97248557Sray 98248557Sray aips@70000000 { /* AIPS1 */ 99248557Sray compatible = "fsl,aips-bus", "simple-bus"; 100248557Sray #address-cells = <1>; 101248557Sray #size-cells = <1>; 102248557Sray interrupt-parent = <&tzic>; 103248557Sray ranges; 104248557Sray 105248557Sray /* Required by many devices, so better to stay first */ 106248557Sray /* 73FD4000 0x4000 CCM */ 107248557Sray clock@73fd4000 { 108248557Sray compatible = "fsl,imx51-ccm"; 109248557Sray /* 83F80000 0x4000 DPLLIP1 */ 110248557Sray /* 83F84000 0x4000 DPLLIP2 */ 111248557Sray /* 83F88000 0x4000 DPLLIP3 */ 112248557Sray reg = <0x73fd4000 0x4000 113248557Sray 0x83F80000 0x4000 114248557Sray 0x83F84000 0x4000 115248557Sray 0x83F88000 0x4000>; 116248557Sray interrupt-parent = <&tzic>; 117248557Sray interrupts = <71 72>; 118248557Sray status = "disabled"; 119248557Sray }; 120248557Sray 121248557Sray /* 122248557Sray * GPIO modules moved up - to have it attached for 123248557Sray * drivers which rely on GPIO 124248557Sray */ 125248557Sray /* 73F84000 0x4000 GPIO1 */ 126248557Sray gpio1: gpio@73f84000 { 127248557Sray compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 128248557Sray reg = <0x73f84000 0x4000>; 129248557Sray interrupt-parent = <&tzic>; 130248557Sray interrupts = <50 51 42 43 44 45 46 47 48 49>; 131248557Sray /* TODO: use <> also */ 132248557Sray gpio-controller; 133248557Sray #gpio-cells = <2>; 134248557Sray interrupt-controller; 135248557Sray #interrupt-cells = <1>; 136248557Sray }; 137248557Sray 138248557Sray /* 73F88000 0x4000 GPIO2 */ 139248557Sray gpio2: gpio@73f88000 { 140248557Sray compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 141248557Sray reg = <0x73f88000 0x4000>; 142248557Sray interrupt-parent = <&tzic>; 143248557Sray interrupts = <52 53>; 144248557Sray gpio-controller; 145248557Sray #gpio-cells = <2>; 146248557Sray interrupt-controller; 147248557Sray #interrupt-cells = <1>; 148248557Sray }; 149248557Sray 150248557Sray /* 73F8C000 0x4000 GPIO3 */ 151248557Sray gpio3: gpio@73f8c000 { 152248557Sray compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 153248557Sray reg = <0x73f8c000 0x4000>; 154248557Sray interrupt-parent = <&tzic>; 155248557Sray interrupts = <54 55>; 156248557Sray gpio-controller; 157248557Sray #gpio-cells = <2>; 158248557Sray interrupt-controller; 159248557Sray #interrupt-cells = <1>; 160248557Sray }; 161248557Sray 162248557Sray /* 73F90000 0x4000 GPIO4 */ 163248557Sray gpio4: gpio@73f90000 { 164248557Sray compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 165248557Sray reg = <0x73f90000 0x4000>; 166248557Sray interrupt-parent = <&tzic>; 167248557Sray interrupts = <56 57>; 168248557Sray gpio-controller; 169248557Sray #gpio-cells = <2>; 170248557Sray interrupt-controller; 171248557Sray #interrupt-cells = <1>; 172248557Sray }; 173248557Sray 174248557Sray spba@70000000 { 175248557Sray compatible = "fsl,spba-bus", "simple-bus"; 176248557Sray #address-cells = <1>; 177248557Sray #size-cells = <1>; 178248557Sray interrupt-parent = <&tzic>; 179248557Sray ranges; 180248557Sray 181248557Sray /* 70004000 0x4000 ESDHC 1 */ 182248557Sray esdhc@70004000 { 183248557Sray compatible = "fsl,imx51-esdhc"; 184248557Sray reg = <0x70004000 0x4000>; 185248557Sray interrupt-parent = <&tzic>; interrupts = <1>; 186248557Sray status = "disabled"; 187248557Sray }; 188248557Sray 189248557Sray /* 70008000 0x4000 ESDHC 2 */ 190248557Sray esdhc@70008000 { 191248557Sray compatible = "fsl,imx51-esdhc"; 192248557Sray reg = <0x70008000 0x4000>; 193248557Sray interrupt-parent = <&tzic>; interrupts = <2>; 194248557Sray status = "disabled"; 195248557Sray }; 196248557Sray 197248557Sray /* 7000C000 0x4000 UART 3 */ 198248557Sray uart3: serial@7000c000 { 199248557Sray compatible = "fsl,imx51-uart", "fsl,imx-uart"; 200248557Sray reg = <0x7000c000 0x4000>; 201248557Sray interrupt-parent = <&tzic>; interrupts = <33>; 202248557Sray status = "disabled"; 203248557Sray }; 204248557Sray 205248557Sray /* 70010000 0x4000 eCSPI1 */ 206248557Sray ecspi@70010000 { 207248557Sray #address-cells = <1>; 208248557Sray #size-cells = <0>; 209248557Sray compatible = "fsl,imx51-ecspi"; 210248557Sray reg = <0x70010000 0x4000>; 211248557Sray interrupt-parent = <&tzic>; interrupts = <36>; 212248557Sray status = "disabled"; 213248557Sray }; 214248557Sray 215248557Sray /* 70014000 0x4000 SSI2 irq30 */ 216248557Sray SSI2: ssi@70014000 { 217248557Sray compatible = "fsl,imx51-ssi"; 218248557Sray reg = <0x70014000 0x4000>; 219248557Sray interrupt-parent = <&tzic>; interrupts = <30>; 220248557Sray status = "disabled"; 221248557Sray }; 222248557Sray 223248557Sray /* 70020000 0x4000 ESDHC 3 */ 224248557Sray esdhc@70020000 { 225248557Sray compatible = "fsl,imx51-esdhc"; 226248557Sray reg = <0x70020000 0x4000>; 227248557Sray interrupt-parent = <&tzic>; interrupts = <3>; 228248557Sray status = "disabled"; 229248557Sray }; 230248557Sray 231248557Sray /* 70024000 0x4000 ESDHC 4 */ 232248557Sray esdhc@70024000 { 233248557Sray compatible = "fsl,imx51-esdhc"; 234248557Sray reg = <0x70024000 0x4000>; 235248557Sray interrupt-parent = <&tzic>; interrupts = <4>; 236248557Sray status = "disabled"; 237248557Sray }; 238248557Sray 239248557Sray /* 70028000 0x4000 SPDIF */ 240248557Sray /* 91 SPDIF */ 241248557Sray 242248557Sray /* 70030000 0x4000 PATA (PORT UDMA) irq70 */ 243248557Sray 244248557Sray /* 70034000 0x4000 SLM */ 245248557Sray /* 70038000 0x4000 HSI2C */ /* 64 HS-I2C */ 246248557Sray /* 7003C000 0x4000 SPBA */ 247248557Sray }; 248248557Sray 249257393Sian usbphy0: usbphy@0 { 250257393Sian compatible = "usb-nop-xceiv"; 251257393Sian status = "okay"; 252248557Sray }; 253248557Sray 254257393Sian usbotg: usb@73f80000 { 255257393Sian compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 256257393Sian reg = <0x73f80000 0x0200>; 257257393Sian interrupts = <18>; 258257393Sian fsl,usbmisc = <&usbmisc 0>; 259257393Sian fsl,usbphy = <&usbphy0>; 260257393Sian status = "disabled"; 261257393Sian }; 262257393Sian 263257393Sian usbh1: usb@73f80200 { 264257393Sian compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 265257393Sian reg = <0x73f80200 0x0200>; 266257393Sian interrupts = <14>; 267257393Sian fsl,usbmisc = <&usbmisc 1>; 268257393Sian status = "disabled"; 269257393Sian }; 270257393Sian 271257393Sian usbh2: usb@73f80400 { 272257393Sian compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 273257393Sian reg = <0x73f80400 0x0200>; 274257393Sian interrupts = <16>; 275257393Sian fsl,usbmisc = <&usbmisc 2>; 276257393Sian status = "disabled"; 277257393Sian }; 278257393Sian 279257393Sian usbh3: usb@73f80600 { 280257393Sian compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 281257393Sian reg = <0x73f80600 0x0200>; 282257393Sian interrupts = <17>; 283257393Sian fsl,usbmisc = <&usbmisc 3>; 284257393Sian status = "disabled"; 285257393Sian }; 286257393Sian 287257393Sian usbmisc: usbmisc@73f80800 { 288257393Sian #index-cells = <1>; 289257393Sian compatible = "fsl,imx51-usbmisc"; 290257393Sian reg = <0x73f80800 0x200>; 291257393Sian }; 292257393Sian 293248557Sray /* 73F98000 0x4000 WDOG1 */ 294248557Sray wdog@73f98000 { 295248557Sray compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 296248557Sray reg = <0x73f98000 0x4000>; 297248557Sray interrupt-parent = <&tzic>; interrupts = <58>; 298248557Sray status = "disabled"; 299248557Sray }; 300248557Sray 301248557Sray /* 73F9C000 0x4000 WDOG2 (TZ) */ 302248557Sray wdog@73f9c000 { 303248557Sray compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 304248557Sray reg = <0x73f9c000 0x4000>; 305248557Sray interrupt-parent = <&tzic>; interrupts = <59>; 306248557Sray status = "disabled"; 307248557Sray }; 308248557Sray 309248557Sray /* 73F94000 0x4000 KPP */ 310248557Sray keyboard@73f94000 { 311248557Sray compatible = "fsl,imx51-kpp"; 312248557Sray reg = <0x73f94000 0x4000>; 313248557Sray interrupt-parent = <&tzic>; interrupts = <60>; 314248557Sray status = "disabled"; 315248557Sray }; 316248557Sray 317248557Sray /* 73FA0000 0x4000 GPT */ 318248557Sray timer@73fa0000 { 319248557Sray compatible = "fsl,imx51-gpt"; 320248557Sray reg = <0x73fa0000 0x4000>; 321248557Sray interrupt-parent = <&tzic>; interrupts = <39>; 322248557Sray status = "disabled"; 323248557Sray }; 324248557Sray 325248557Sray /* 73FA4000 0x4000 SRTC */ 326248557Sray 327248557Sray rtc@73fa4000 { 328248557Sray compatible = "fsl,imx51-srtc"; 329248557Sray reg = <0x73fa4000 0x4000>; 330248557Sray interrupt-parent = <&tzic>; interrupts = <24 25>; 331248557Sray status = "disabled"; 332248557Sray }; 333248557Sray 334248557Sray /* 73FA8000 0x4000 IOMUXC */ 335248557Sray iomux@73fa8000 { 336248557Sray compatible = "fsl,imx51-iomux"; 337248557Sray reg = <0x73fa8000 0x4000>; 338248557Sray interrupt-parent = <&tzic>; interrupts = <7>; 339248557Sray }; 340248557Sray 341248557Sray /* 73FAC000 0x4000 EPIT1 */ 342248557Sray epit1: timer@73fac000 { 343248557Sray compatible = "fsl,imx51-epit"; 344248557Sray reg = <0x73fac000 0x4000>; 345248557Sray interrupt-parent = <&tzic>; interrupts = <40>; 346248557Sray status = "disabled"; 347248557Sray }; 348248557Sray 349248557Sray /* 73FB0000 0x4000 EPIT2 */ 350248557Sray epit2: timer@73fb0000 { 351248557Sray compatible = "fsl,imx51-epit"; 352248557Sray reg = <0x73fb0000 0x4000>; 353248557Sray interrupt-parent = <&tzic>; interrupts = <41>; 354248557Sray status = "disabled"; 355248557Sray }; 356248557Sray 357248557Sray /* 73FB4000 0x4000 PWM1 */ 358248557Sray pwm@73fb4000 { 359248557Sray compatible = "fsl,imx51-pwm"; 360248557Sray reg = <0x73fb4000 0x4000>; 361248557Sray interrupt-parent = <&tzic>; interrupts = <61>; 362248557Sray status = "disabled"; 363248557Sray }; 364248557Sray 365248557Sray /* 73FB8000 0x4000 PWM2 */ 366248557Sray pwm@73fb8000 { 367248557Sray compatible = "fsl,imx51-pwm"; 368248557Sray reg = <0x73fb8000 0x4000>; 369248557Sray interrupt-parent = <&tzic>; interrupts = <94>; 370248557Sray status = "disabled"; 371248557Sray }; 372248557Sray 373248557Sray /* 73FBC000 0x4000 UART 1 */ 374248557Sray uart1: serial@73fbc000 { 375248557Sray compatible = "fsl,imx51-uart", "fsl,imx-uart"; 376248557Sray reg = <0x73fbc000 0x4000>; 377248557Sray interrupt-parent = <&tzic>; interrupts = <31>; 378248557Sray status = "disabled"; 379248557Sray }; 380248557Sray 381248557Sray /* 73FC0000 0x4000 UART 2 */ 382248557Sray uart2: serial@73fc0000 { 383248557Sray compatible = "fsl,imx51-uart", "fsl,imx-uart"; 384248557Sray reg = <0x73fc0000 0x4000>; 385248557Sray interrupt-parent = <&tzic>; interrupts = <32>; 386248557Sray status = "disabled"; 387248557Sray }; 388248557Sray 389248557Sray /* 73FC4000 0x4000 USBOH3 */ 390248557Sray /* NOTYET 391248557Sray usb@73fc4000 { 392248557Sray compatible = "fsl,imx51-otg"; 393248557Sray reg = <0x73fc4000 0x4000>; 394248557Sray interrupt-parent = <&tzic>; interrupts = <>; 395248557Sray status = "disabled"; 396248557Sray }; 397248557Sray */ 398248557Sray /* 73FD0000 0x4000 SRC */ 399248557Sray reset@73fd0000 { 400248557Sray compatible = "fsl,imx51-src"; 401248557Sray reg = <0x73fd0000 0x4000>; 402248557Sray interrupt-parent = <&tzic>; interrupts = <75>; 403248557Sray status = "disabled"; 404248557Sray }; 405248557Sray /* 73FD8000 0x4000 GPC */ 406248557Sray power@73fd8000 { 407248557Sray compatible = "fsl,imx51-gpc"; 408248557Sray reg = <0x73fd8000 0x4000>; 409248557Sray interrupt-parent = <&tzic>; interrupts = <73 74>; 410248557Sray status = "disabled"; 411248557Sray }; 412248557Sray 413248557Sray }; 414248557Sray 415248557Sray aips@80000000 { /* AIPS2 */ 416248557Sray compatible = "fsl,aips-bus", "simple-bus"; 417248557Sray #address-cells = <1>; 418248557Sray #size-cells = <1>; 419248557Sray interrupt-parent = <&tzic>; 420248557Sray ranges; 421248557Sray 422248557Sray /* 83F94000 0x4000 AHBMAX */ 423248557Sray /* 83F98000 0x4000 IIM */ 424248557Sray /* 425248557Sray * 69 IIM Interrupt request to the processor. 426248557Sray * Indicates to the processor that program or 427248557Sray * explicit. 428248557Sray */ 429248557Sray /* 83F9C000 0x4000 CSU */ 430248557Sray /* 431248557Sray * 27 CSU Interrupt Request 1. Indicates to the 432248557Sray * processor that one or more alarm inputs were. 433248557Sray */ 434248557Sray 435248557Sray /* 83FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */ 436248557Sray /* irq76 Neon Monitor Interrupt */ 437248557Sray /* irq77 Performance Unit Interrupt */ 438248557Sray /* irq78 CTI IRQ */ 439248557Sray /* irq79 Debug Interrupt, Cross-Trigger Interface 1 */ 440248557Sray /* irq80 Debug Interrupt, Cross-Trigger Interface 1 */ 441248557Sray /* irq89 Debug Interrupt, Cross-Trigger Interface 2 */ 442248557Sray /* irq98 Debug Interrupt, Cross-Trigger Interface 3 */ 443248557Sray 444248557Sray /* 83FA4000 0x4000 OWIRE irq88 */ 445248557Sray /* 83FA8000 0x4000 FIRI irq93 */ 446248557Sray /* 83FAC000 0x4000 eCSPI2 */ 447248557Sray ecspi@83fac000 { 448248557Sray #address-cells = <1>; 449248557Sray #size-cells = <0>; 450248557Sray compatible = "fsl,imx51-ecspi"; 451248557Sray reg = <0x83fac000 0x4000>; 452248557Sray interrupt-parent = <&tzic>; interrupts = <37>; 453248557Sray status = "disabled"; 454248557Sray }; 455248557Sray 456248557Sray /* 83FB0000 0x4000 SDMA */ 457248557Sray sdma@83fb0000 { 458248557Sray compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 459248557Sray reg = <0x83fb0000 0x4000>; 460248557Sray interrupt-parent = <&tzic>; interrupts = <6>; 461248557Sray }; 462248557Sray 463248557Sray /* 83FB4000 0x4000 SCC */ 464248557Sray /* 21 SCC Security Monitor High Priority Interrupt. */ 465248557Sray /* 22 SCC Secure (TrustZone) Interrupt. */ 466248557Sray /* 23 SCC Regular (Non-Secure) Interrupt. */ 467248557Sray 468248557Sray /* 83FB8000 0x4000 ROMCP */ 469248557Sray /* 83FBC000 0x4000 RTIC */ 470248557Sray /* 471248557Sray * 26 RTIC RTIC (Trust Zone) Interrupt Request. 472248557Sray * Indicates that the RTIC has completed hashing the 473248557Sray */ 474248557Sray 475248557Sray /* 83FC0000 0x4000 CSPI */ 476248557Sray cspi@83fc0000 { 477248557Sray #address-cells = <1>; 478248557Sray #size-cells = <0>; 479248557Sray compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; 480248557Sray reg = <0x83fc0000 0x4000>; 481248557Sray interrupt-parent = <&tzic>; interrupts = <38>; 482248557Sray status = "disabled"; 483248557Sray }; 484248557Sray 485248557Sray /* 83FC4000 0x4000 I2C2 */ 486248557Sray i2c@83fc4000 { 487248557Sray #address-cells = <1>; 488248557Sray #size-cells = <0>; 489248557Sray compatible = "fsl,imx51-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; 490248557Sray reg = <0x83fc4000 0x4000>; 491248557Sray interrupt-parent = <&tzic>; interrupts = <63>; 492248557Sray status = "disabled"; 493248557Sray }; 494248557Sray 495248557Sray /* 83FC8000 0x4000 I2C1 */ 496248557Sray i2c@83fc8000 { 497248557Sray #address-cells = <1>; 498248557Sray #size-cells = <0>; 499248557Sray compatible = "fsl,imx51-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; 500248557Sray reg = <0x83fc8000 0x4000>; 501248557Sray interrupt-parent = <&tzic>; interrupts = <62>; 502248557Sray status = "disabled"; 503248557Sray }; 504248557Sray 505248557Sray /* 83FCC000 0x4000 SSI1 */ 506248557Sray /* 29 SSI1 SSI-1 Interrupt Request */ 507248557Sray SSI1: ssi@83fcc000 { 508248557Sray compatible = "fsl,imx51-ssi"; 509248557Sray reg = <0x83fcc000 0x4000>; 510248557Sray interrupt-parent = <&tzic>; interrupts = <29>; 511248557Sray status = "disabled"; 512248557Sray }; 513248557Sray 514248557Sray /* 83FD0000 0x4000 AUDMUX */ 515248557Sray audmux@83fd4000 { 516248557Sray compatible = "fsl,imx51-audmux"; 517248557Sray reg = <0x83fd4000 0x4000>; 518248557Sray status = "disabled"; 519248557Sray }; 520248557Sray 521248557Sray /* 83FD8000 0x4000 EMI1 */ 522248557Sray /* 8 EMI (NFC) */ 523248557Sray /* 15 EMI */ 524248557Sray /* 97 EMI Boot sequence completed interrupt */ 525248557Sray /* 526248557Sray * 101 EMI Indicates all pages have been transferred 527248557Sray * to NFC during an auto program operation. 528248557Sray */ 529248557Sray 530248557Sray /* 83FE0000 0x4000 PATA (PORT PIO) */ 531248557Sray /* 70 PATA Parallel ATA host controller interrupt */ 532248557Sray ide@83fe0000 { 533248557Sray compatible = "fsl,imx51-ata"; 534248557Sray reg = <0x83fe0000 0x4000>; 535248557Sray interrupt-parent = <&tzic>; 536248557Sray interrupts = <70>; 537248557Sray status = "disabled"; 538248557Sray }; 539248557Sray 540248557Sray /* 83FE4000 0x4000 SIM */ 541248557Sray /* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */ 542248557Sray /* 68 SIM intr composed of tc, etc, tfe, and rdrf */ 543248557Sray 544248557Sray /* 83FE8000 0x4000 SSI3 */ 545248557Sray /* 96 SSI3 SSI-3 Interrupt Request */ 546248557Sray SSI3: ssi@83fe8000 { 547248557Sray compatible = "fsl,imx51-ssi"; 548248557Sray reg = <0x83fe8000 0x4000>; 549248557Sray interrupt-parent = <&tzic>; interrupts = <96>; 550248557Sray status = "disabled"; 551248557Sray }; 552248557Sray 553248557Sray /* 83FEC000 0x4000 FEC */ 554248557Sray ethernet@83fec000 { 555248557Sray compatible = "fsl,imx51-fec"; 556248557Sray reg = <0x83fec000 0x4000>; 557248557Sray interrupt-parent = <&tzic>; interrupts = <87>; 558248557Sray status = "disabled"; 559248557Sray }; 560248557Sray 561248557Sray /* 83FF0000 0x4000 TVE */ 562248557Sray /* 92 TVE */ 563248557Sray /* 83FF4000 0x4000 VPU */ 564248557Sray /* 9 VPU */ 565248557Sray /* 100 VPU Idle interrupt from VPU */ 566248557Sray 567248557Sray /* 83FF8000 0x4000 SAHARA Lite */ 568248557Sray /* 19 SAHARA SAHARA host 0 (TrustZone) Intr Lite */ 569248557Sray /* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr Lite */ 570248557Sray }; 571248557Sray }; 572248557Sray 573248557Sray localbus@5e000000 { 574248557Sray compatible = "simple-bus"; 575248557Sray #address-cells = <1>; 576248557Sray #size-cells = <1>; 577248557Sray 578248557Sray ranges; 579248557Sray 580248557Sray vga: ipu3@5e000000 { 581248557Sray compatible = "fsl,ipu3"; 582248557Sray reg = < 583248557Sray 0x5e000000 0x08000 /* CM */ 584248557Sray 0x5e008000 0x08000 /* IDMAC */ 585248557Sray 0x5e018000 0x08000 /* DP */ 586248557Sray 0x5e020000 0x08000 /* IC */ 587248557Sray 0x5e028000 0x08000 /* IRT */ 588248557Sray 0x5e030000 0x08000 /* CSI0 */ 589248557Sray 0x5e038000 0x08000 /* CSI1 */ 590248557Sray 0x5e040000 0x08000 /* DI0 */ 591248557Sray 0x5e048000 0x08000 /* DI1 */ 592248557Sray 0x5e050000 0x08000 /* SMFC */ 593248557Sray 0x5e058000 0x08000 /* DC */ 594248557Sray 0x5e060000 0x08000 /* DMFC */ 595248557Sray 0x5e068000 0x08000 /* VDI */ 596248557Sray 0x5f000000 0x20000 /* CPMEM */ 597248557Sray 0x5f020000 0x20000 /* LUT */ 598248557Sray 0x5f040000 0x20000 /* SRM */ 599248557Sray 0x5f060000 0x20000 /* TPM */ 600248557Sray 0x5f080000 0x20000 /* DCTMPL */ 601248557Sray >; 602248557Sray interrupt-parent = <&tzic>; 603248557Sray interrupts = < 604248557Sray 10 /* IPUEX Error */ 605248557Sray 11 /* IPUEX Sync */ 606248557Sray >; 607248557Sray status = "disabled"; 608248557Sray }; 609248557Sray }; 610248557Sray}; 611248557Sray 612248557Sray/* 613248557Sray 614248557SrayTODO: Not mapped interrupts 615248557Sray 616248557Sray5 DAP 617248557Sray84 GPU2D (OpenVG) general interrupt 618248557Sray85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility) 619248557Sray12 GPU3D 620248557Sray102 GPU3D Idle interrupt from GPU3D (for S/W power gating) 621248557Sray90 SJC 622248557Sray*/ 623