if_cpswreg.h revision 246276
138032Speter/*- 2261363Sgshapiro * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 364565Sgshapiro * All rights reserved. 438032Speter * 538032Speter * Redistribution and use in source and binary forms, with or without 638032Speter * modification, are permitted provided that the following conditions 738032Speter * are met: 838032Speter * 1. Redistributions of source code must retain the above copyright 938032Speter * notice, this list of conditions and the following disclaimer. 1038032Speter * 2. Redistributions in binary form must reproduce the above copyright 1138032Speter * notice, this list of conditions and the following disclaimer in the 1238032Speter * documentation and/or other materials provided with the distribution. 1338032Speter * 1490795Sgshapiro * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1538032Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16266692Sgshapiro * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1790795Sgshapiro * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1890795Sgshapiro * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1964565Sgshapiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2064565Sgshapiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2164565Sgshapiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2264565Sgshapiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2364565Sgshapiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2464565Sgshapiro * SUCH DAMAGE. 2564565Sgshapiro * 2664565Sgshapiro * $FreeBSD: head/sys/arm/ti/cpsw/if_cpswreg.h 246276 2013-02-03 01:08:01Z kientzle $ 2764565Sgshapiro */ 2838032Speter 2990795Sgshapiro#ifndef _IF_CPSWREG_H 3090795Sgshapiro#define _IF_CPSWREG_H 3190795Sgshapiro 3290795Sgshapiro#define CPSW_SS_OFFSET 0x0000 3390795Sgshapiro#define CPSW_SS_IDVER (CPSW_SS_OFFSET + 0x00) 3490795Sgshapiro#define CPSW_SS_SOFT_RESET (CPSW_SS_OFFSET + 0x08) 3590795Sgshapiro#define CPSW_SS_STAT_PORT_EN (CPSW_SS_OFFSET + 0x0C) 3690795Sgshapiro#define CPSW_SS_PTYPE (CPSW_SS_OFFSET + 0x10) 3790795Sgshapiro#define CPSW_SS_FLOW_CONTROL (CPSW_SS_OFFSET + 0x24) 3890795Sgshapiro 3990795Sgshapiro#define CPSW_PORT_OFFSET 0x0100 4090795Sgshapiro#define CPSW_PORT_P_MAX_BLKS(p) (CPSW_PORT_OFFSET + 0x08 + ((p) * 0x100)) 4190795Sgshapiro#define CPSW_PORT_P_BLK_CNT(p) (CPSW_PORT_OFFSET + 0x0C + ((p) * 0x100)) 4290795Sgshapiro#define CPSW_PORT_P_TX_PRI_MAP(p) (CPSW_PORT_OFFSET + 0x118 + ((p-1) * 0x100)) 4390795Sgshapiro#define CPSW_PORT_P0_CPDMA_TX_PRI_MAP (CPSW_PORT_OFFSET + 0x01C) 4490795Sgshapiro#define CPSW_PORT_P0_CPDMA_RX_CH_MAP (CPSW_PORT_OFFSET + 0x020) 4590795Sgshapiro#define CPSW_PORT_P_SA_LO(p) (CPSW_PORT_OFFSET + 0x120 + ((p-1) * 0x100)) 4690795Sgshapiro#define CPSW_PORT_P_SA_HI(p) (CPSW_PORT_OFFSET + 0x124 + ((p-1) * 0x100)) 4790795Sgshapiro 4890795Sgshapiro#define CPSW_CPDMA_OFFSET 0x0800 4990795Sgshapiro#define CPSW_CPDMA_TX_CONTROL (CPSW_CPDMA_OFFSET + 0x04) 5090795Sgshapiro#define CPSW_CPDMA_TX_TEARDOWN (CPSW_CPDMA_OFFSET + 0x08) 5190795Sgshapiro#define CPSW_CPDMA_RX_CONTROL (CPSW_CPDMA_OFFSET + 0x14) 5290795Sgshapiro#define CPSW_CPDMA_RX_TEARDOWN (CPSW_CPDMA_OFFSET + 0x18) 5390795Sgshapiro#define CPSW_CPDMA_SOFT_RESET (CPSW_CPDMA_OFFSET + 0x1c) 5490795Sgshapiro#define CPSW_CPDMA_DMACONTROL (CPSW_CPDMA_OFFSET + 0x20) 5590795Sgshapiro#define CPSW_CPDMA_DMASTATUS (CPSW_CPDMA_OFFSET + 0x24) 5690795Sgshapiro#define CPSW_CPDMA_RX_BUFFER_OFFSET (CPSW_CPDMA_OFFSET + 0x28) 5790795Sgshapiro#define CPSW_CPDMA_TX_INTSTAT_RAW (CPSW_CPDMA_OFFSET + 0x80) 5890795Sgshapiro#define CPSW_CPDMA_TX_INTSTAT_MASKED (CPSW_CPDMA_OFFSET + 0x84) 5990795Sgshapiro#define CPSW_CPDMA_TX_INTMASK_SET (CPSW_CPDMA_OFFSET + 0x88) 6090795Sgshapiro#define CPSW_CPDMA_TX_INTMASK_CLEAR (CPSW_CPDMA_OFFSET + 0x8C) 6190795Sgshapiro#define CPSW_CPDMA_CPDMA_EOI_VECTOR (CPSW_CPDMA_OFFSET + 0x94) 6290795Sgshapiro#define CPSW_CPDMA_RX_INTSTAT_RAW (CPSW_CPDMA_OFFSET + 0xA0) 6390795Sgshapiro#define CPSW_CPDMA_RX_INTSTAT_MASKED (CPSW_CPDMA_OFFSET + 0xA4) 6490795Sgshapiro#define CPSW_CPDMA_RX_INTMASK_SET (CPSW_CPDMA_OFFSET + 0xA8) 6590795Sgshapiro#define CPSW_CPDMA_RX_INTMASK_CLEAR (CPSW_CPDMA_OFFSET + 0xAc) 6690795Sgshapiro#define CPSW_CPDMA_DMA_INTSTAT_RAW (CPSW_CPDMA_OFFSET + 0xB0) 6790795Sgshapiro#define CPSW_CPDMA_DMA_INTSTAT_MASKED (CPSW_CPDMA_OFFSET + 0xB4) 6890795Sgshapiro#define CPSW_CPDMA_DMA_INTMASK_SET (CPSW_CPDMA_OFFSET + 0xB8) 6990795Sgshapiro#define CPSW_CPDMA_DMA_INTMASK_CLEAR (CPSW_CPDMA_OFFSET + 0xBC) 7090795Sgshapiro#define CPSW_CPDMA_RX_FREEBUFFER(p) (CPSW_CPDMA_OFFSET + 0x0e0 + ((p) * 0x04)) 7190795Sgshapiro 7290795Sgshapiro#define CPSW_STATS_OFFSET 0x0900 7390795Sgshapiro 7490795Sgshapiro#define CPSW_STATERAM_OFFSET 0x0A00 7590795Sgshapiro#define CPSW_CPDMA_TX_HDP(p) (CPSW_STATERAM_OFFSET + 0x00 + ((p) * 0x04)) 7690795Sgshapiro#define CPSW_CPDMA_RX_HDP(p) (CPSW_STATERAM_OFFSET + 0x20 + ((p) * 0x04)) 7790795Sgshapiro#define CPSW_CPDMA_TX_CP(p) (CPSW_STATERAM_OFFSET + 0x40 + ((p) * 0x04)) 7890795Sgshapiro#define CPSW_CPDMA_RX_CP(p) (CPSW_STATERAM_OFFSET + 0x60 + ((p) * 0x04)) 7990795Sgshapiro 8090795Sgshapiro#define CPSW_CPTS_OFFSET 0x0C00 8190795Sgshapiro 8238032Speter#define CPSW_ALE_OFFSET 0x0D00 8338032Speter#define CPSW_ALE_CONTROL (CPSW_ALE_OFFSET + 0x08) 8490795Sgshapiro#define CPSW_ALE_TBLCTL (CPSW_ALE_OFFSET + 0x20) 8538032Speter#define CPSW_ALE_TBLW2 (CPSW_ALE_OFFSET + 0x34) 8638032Speter#define CPSW_ALE_TBLW1 (CPSW_ALE_OFFSET + 0x38) 8738032Speter#define CPSW_ALE_TBLW0 (CPSW_ALE_OFFSET + 0x3C) 8838032Speter#define CPSW_ALE_PORTCTL(p) (CPSW_ALE_OFFSET + 0x40 + ((p) * 0x04)) 8938032Speter 9038032Speter/* SL1 is at 0x0D80, SL2 is at 0x0DC0 */ 9190795Sgshapiro#define CPSW_SL_OFFSET 0x0D80 9290795Sgshapiro#define CPSW_SL_MACCONTROL(p) (CPSW_SL_OFFSET + (0x40 * (p)) + 0x04) 9390795Sgshapiro#define CPSW_SL_MACSTATUS(p) (CPSW_SL_OFFSET + (0x40 * (p)) + 0x08) 9490795Sgshapiro#define CPSW_SL_SOFT_RESET(p) (CPSW_SL_OFFSET + (0x40 * (p)) + 0x0C) 9590795Sgshapiro#define CPSW_SL_RX_MAXLEN(p) (CPSW_SL_OFFSET + (0x40 * (p)) + 0x10) 9638032Speter#define CPSW_SL_RX_PAUSE(p) (CPSW_SL_OFFSET + (0x40 * (p)) + 0x18) 97285303Sgshapiro#define CPSW_SL_TX_PAUSE(p) (CPSW_SL_OFFSET + (0x40 * (p)) + 0x1C) 9890795Sgshapiro#define CPSW_SL_RX_PRI_MAP(p) (CPSW_SL_OFFSET + (0x40 * (p)) + 0x24) 9990795Sgshapiro 10038032Speter#define MDIO_OFFSET 0x1000 10138032Speter#define MDIOCONTROL (MDIO_OFFSET + 0x04) 10238032Speter#define MDIOUSERACCESS0 (MDIO_OFFSET + 0x80) 10338032Speter#define MDIOUSERPHYSEL0 (MDIO_OFFSET + 0x84) 10490795Sgshapiro 10538032Speter#define CPSW_WR_OFFSET 0x1200 10638032Speter#define CPSW_WR_SOFT_RESET (CPSW_WR_OFFSET + 0x04) 10738032Speter#define CPSW_WR_CONTROL (CPSW_WR_OFFSET + 0x08) 10838032Speter#define CPSW_WR_INT_CONTROL (CPSW_WR_OFFSET + 0x0c) 10938032Speter#define CPSW_WR_C_RX_THRESH_EN(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x10) 11038032Speter#define CPSW_WR_C_RX_EN(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x14) 11164565Sgshapiro#define CPSW_WR_C_TX_EN(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x18) 112168520Sgshapiro#define CPSW_WR_C_MISC_EN(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x1C) 11338032Speter#define CPSW_WR_C_RX_THRESH_STAT(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x40) 11438032Speter#define CPSW_WR_C_RX_STAT(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x44) 11538032Speter#define CPSW_WR_C_TX_STAT(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x48) 11664565Sgshapiro#define CPSW_WR_C_MISC_STAT(p) (CPSW_WR_OFFSET + (0x10 * (p)) + 0x4C) 11738032Speter 11838032Speter#define CPSW_CPPI_RAM_OFFSET 0x2000 11938032Speter#define CPSW_CPPI_RAM_SIZE 0x2000 12038032Speter 12138032Speter#define CPDMA_BD_SOP (1<<15) 12264565Sgshapiro#define CPDMA_BD_EOP (1<<14) 12338032Speter#define CPDMA_BD_OWNER (1<<13) 12438032Speter#define CPDMA_BD_EOQ (1<<12) 12538032Speter#define CPDMA_BD_TDOWNCMPLT (1<<11) 12664565Sgshapiro#define CPDMA_BD_PKT_ERR_MASK (3<< 4) 12738032Speter 12838032Speterstruct cpsw_cpdma_bd { 12964565Sgshapiro volatile uint32_t next; 130285303Sgshapiro volatile uint32_t bufptr; 13164565Sgshapiro volatile uint16_t buflen; 13264565Sgshapiro volatile uint16_t bufoff; 13364565Sgshapiro volatile uint16_t pktlen; 13438032Speter volatile uint16_t flags; 13538032Speter}; 13690795Sgshapiro 13738032Speter#endif /*_IF_CPSWREG_H */ 138285303Sgshapiro