1263426Sbr/*-
2263426Sbr * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3263426Sbr * All rights reserved.
4263426Sbr *
5263426Sbr * Redistribution and use in source and binary forms, with or without
6263426Sbr * modification, are permitted provided that the following conditions
7263426Sbr * are met:
8263426Sbr * 1. Redistributions of source code must retain the above copyright
9263426Sbr *    notice, this list of conditions and the following disclaimer.
10263426Sbr * 2. Redistributions in binary form must reproduce the above copyright
11263426Sbr *    notice, this list of conditions and the following disclaimer in the
12263426Sbr *    documentation and/or other materials provided with the distribution.
13263426Sbr *
14263426Sbr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15263426Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16263426Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17263426Sbr * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18263426Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19263426Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20263426Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21263426Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22263426Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23263426Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24263426Sbr * SUCH DAMAGE.
25263426Sbr */
26263426Sbr
27263426Sbr/*
28263426Sbr * Samsung Exynos 5 Display Controller
29263426Sbr * Chapter 15, Exynos 5 Dual User's Manual Public Rev 1.00
30263426Sbr */
31263426Sbr
32263426Sbr#include <sys/cdefs.h>
33263426Sbr__FBSDID("$FreeBSD$");
34263426Sbr
35263426Sbr#include <sys/param.h>
36263426Sbr#include <sys/systm.h>
37263426Sbr#include <sys/bus.h>
38263426Sbr#include <sys/kernel.h>
39263426Sbr#include <sys/module.h>
40263426Sbr#include <sys/malloc.h>
41263426Sbr#include <sys/rman.h>
42263426Sbr#include <sys/timeet.h>
43263426Sbr#include <sys/timetc.h>
44263426Sbr#include <sys/watchdog.h>
45263426Sbr#include <sys/fbio.h>
46263426Sbr#include <sys/consio.h>
47263426Sbr#include <sys/eventhandler.h>
48263426Sbr#include <sys/gpio.h>
49263426Sbr
50266341Sian#include <vm/vm.h>
51266341Sian#include <vm/vm_extern.h>
52266341Sian#include <vm/vm_kern.h>
53266341Sian
54263426Sbr#include <dev/fdt/fdt_common.h>
55263426Sbr#include <dev/ofw/openfirm.h>
56263426Sbr#include <dev/ofw/ofw_bus.h>
57263426Sbr#include <dev/ofw/ofw_bus_subr.h>
58263426Sbr
59263426Sbr#include <dev/vt/vt.h>
60263426Sbr#include <dev/vt/colors/vt_termcolors.h>
61263426Sbr
62263426Sbr#include <arm/samsung/exynos/exynos5_common.h>
63263426Sbr
64263426Sbr#include "gpio_if.h"
65263426Sbr
66263426Sbr#include <machine/bus.h>
67263426Sbr#include <machine/fdt.h>
68263426Sbr#include <machine/cpu.h>
69263426Sbr#include <machine/intr.h>
70263426Sbr
71263426Sbr#include "fb_if.h"
72263426Sbr
73263426Sbr#define	FIMDBYPASS_DISP1	(1 << 15)
74263426Sbr
75263426Sbr#define	VIDCON0		(0x0)
76263426Sbr#define	VIDCON0_ENVID	(1 << 1)
77263426Sbr#define	VIDCON0_ENVID_F	(1 << 0)
78263426Sbr#define	CLKVAL_F	0xb
79263426Sbr#define	CLKVAL_F_OFFSET	6
80263426Sbr
81263426Sbr#define	WINCON0		0x0020
82263426Sbr#define	WINCON1		0x0024
83263426Sbr#define	WINCON2		0x0028
84263426Sbr#define	WINCON3		0x002C
85263426Sbr#define	WINCON4		0x0030
86263426Sbr
87263426Sbr#define	ENLOCAL_F			(1 << 22)
88263426Sbr#define	BPPMODE_F_RGB_16BIT_565		0x5
89263426Sbr#define	BPPMODE_F_OFFSET		2
90263426Sbr#define	ENWIN_F_ENABLE			(1 << 0)
91263426Sbr#define	HALF_WORD_SWAP_EN		(1 << 16)
92263426Sbr
93263426Sbr#define	SHADOWCON	0x0034
94263426Sbr#define	CHANNEL0_EN	(1 << 0)
95263426Sbr
96263426Sbr#define	VIDOSD0A	0x0040
97263426Sbr#define	VIDOSD0B	0x0044
98263426Sbr#define	VIDOSD0C	0x0048
99263426Sbr
100263426Sbr#define	VIDW00ADD0B0	0x00A0
101263426Sbr#define	VIDW00ADD0B1	0x00A4
102263426Sbr#define	VIDW00ADD0B2	0x20A0
103263426Sbr#define	VIDW00ADD1B0	0x00D0
104263426Sbr#define	VIDW00ADD1B1	0x00D4
105263426Sbr#define	VIDW00ADD1B2	0x20D0
106263426Sbr
107263426Sbr#define	VIDW00ADD2	0x0100
108263426Sbr#define	VIDW01ADD2	0x0104
109263426Sbr#define	VIDW02ADD2	0x0108
110263426Sbr#define	VIDW03ADD2	0x010C
111263426Sbr#define	VIDW04ADD2	0x0110
112263426Sbr
113263426Sbr#define	VIDCON1		(0x04)
114263426Sbr#define	VIDTCON0	0x0010
115263426Sbr#define	VIDTCON1	0x0014
116263426Sbr#define	VIDTCON2	0x0018
117263426Sbr#define	VIDTCON3	0x001C
118263426Sbr
119263426Sbr#define	VIDINTCON0	0x0130
120263426Sbr#define	VIDINTCON1	0x0134
121263426Sbr
122263426Sbr#define	VSYNC_PULSE_WIDTH_VAL		0x3
123263426Sbr#define	VSYNC_PULSE_WIDTH_OFFSET	0
124263426Sbr#define	V_FRONT_PORCH_VAL		0x3
125263426Sbr#define	V_FRONT_PORCH_OFFSET		8
126263426Sbr#define	V_BACK_PORCH_VAL		0x3
127263426Sbr#define	V_BACK_PORCH_OFFSET		16
128263426Sbr
129263426Sbr#define	HSYNC_PULSE_WIDTH_VAL		0x3
130263426Sbr#define	HSYNC_PULSE_WIDTH_OFFSET	0
131263426Sbr#define	H_FRONT_PORCH_VAL		0x3
132263426Sbr#define	H_FRONT_PORCH_OFFSET		8
133263426Sbr#define	H_BACK_PORCH_VAL		0x3
134263426Sbr#define	H_BACK_PORCH_OFFSET		16
135263426Sbr
136263426Sbr#define	HOZVAL_OFFSET		0
137263426Sbr#define	LINEVAL_OFFSET		11
138263426Sbr
139263426Sbr#define	OSD_RIGHTBOTX_F_OFFSET		11
140263426Sbr#define	OSD_RIGHTBOTY_F_OFFSET		0
141263426Sbr
142263426Sbr#define	DPCLKCON	0x27c
143263426Sbr#define	DPCLKCON_EN	(1 << 1)
144263426Sbr
145263426Sbr#define	DREAD4(_sc, _reg)         \
146263426Sbr	bus_space_read_4(_sc->bst_disp, _sc->bsh_disp, _reg)
147263426Sbr#define	DWRITE4(_sc, _reg, _val)  \
148263426Sbr	bus_space_write_4(_sc->bst_disp, _sc->bsh_disp, _reg, _val)
149263426Sbr
150263426Sbrstruct panel_info {
151263426Sbr	uint32_t	width;
152263426Sbr	uint32_t	height;
153263426Sbr	uint32_t	h_back_porch;
154263426Sbr	uint32_t	h_pulse_width;
155263426Sbr	uint32_t	h_front_porch;
156263426Sbr	uint32_t	v_back_porch;
157263426Sbr	uint32_t	v_pulse_width;
158263426Sbr	uint32_t	v_front_porch;
159263426Sbr	uint32_t	clk_div;
160263426Sbr	uint32_t	backlight_pin;
161263426Sbr	uint32_t	fixvclk;
162263426Sbr	uint32_t	ivclk;
163263426Sbr	uint32_t	clkval_f;
164263426Sbr};
165263426Sbr
166263426Sbrstruct fimd_softc {
167263426Sbr	struct resource		*res[3];
168263426Sbr	bus_space_tag_t		bst;
169263426Sbr	bus_space_handle_t	bsh;
170263426Sbr	bus_space_tag_t		bst_disp;
171263426Sbr	bus_space_handle_t	bsh_disp;
172263426Sbr	bus_space_tag_t		bst_sysreg;
173263426Sbr	bus_space_handle_t	bsh_sysreg;
174263426Sbr
175263426Sbr	void			*ih;
176263426Sbr	device_t		dev;
177263426Sbr	device_t		sc_fbd;		/* fbd child */
178263426Sbr	struct fb_info		sc_info;
179263426Sbr	struct panel_info	*panel;
180263426Sbr};
181263426Sbr
182263426Sbrstatic struct resource_spec fimd_spec[] = {
183263426Sbr	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },	/* Timer registers */
184263426Sbr	{ SYS_RES_MEMORY,	1,	RF_ACTIVE },	/* FIMD */
185263426Sbr	{ SYS_RES_MEMORY,	2,	RF_ACTIVE },	/* DISP */
186263426Sbr	{ -1, 0 }
187263426Sbr};
188263426Sbr
189263426Sbrstatic int
190263426Sbrfimd_probe(device_t dev)
191263426Sbr{
192263426Sbr
193263426Sbr	if (!ofw_bus_status_okay(dev))
194263426Sbr		return (ENXIO);
195263426Sbr
196263426Sbr	if (!ofw_bus_is_compatible(dev, "exynos,fimd"))
197263426Sbr		return (ENXIO);
198263426Sbr
199263426Sbr	device_set_desc(dev, "Samsung Exynos 5 Display Controller");
200263426Sbr	return (BUS_PROBE_DEFAULT);
201263426Sbr}
202263426Sbr
203263426Sbrstatic int
204263426Sbrget_panel_info(struct fimd_softc *sc, struct panel_info *panel)
205263426Sbr{
206263426Sbr	phandle_t node;
207263426Sbr	pcell_t dts_value[3];
208263426Sbr	int len;
209263426Sbr
210263426Sbr	if ((node = ofw_bus_get_node(sc->dev)) == -1)
211263426Sbr		return (ENXIO);
212263426Sbr
213263426Sbr	/* panel size */
214263426Sbr	if ((len = OF_getproplen(node, "panel-size")) <= 0)
215263426Sbr		return (ENXIO);
216263426Sbr	OF_getprop(node, "panel-size", &dts_value, len);
217263426Sbr	panel->width = fdt32_to_cpu(dts_value[0]);
218263426Sbr	panel->height = fdt32_to_cpu(dts_value[1]);
219263426Sbr
220263426Sbr	/* hsync */
221263426Sbr	if ((len = OF_getproplen(node, "panel-hsync")) <= 0)
222263426Sbr		return (ENXIO);
223263426Sbr	OF_getprop(node, "panel-hsync", &dts_value, len);
224263426Sbr	panel->h_back_porch = fdt32_to_cpu(dts_value[0]);
225263426Sbr	panel->h_pulse_width = fdt32_to_cpu(dts_value[1]);
226263426Sbr	panel->h_front_porch = fdt32_to_cpu(dts_value[2]);
227263426Sbr
228263426Sbr	/* vsync */
229263426Sbr	if ((len = OF_getproplen(node, "panel-vsync")) <= 0)
230263426Sbr		return (ENXIO);
231263426Sbr	OF_getprop(node, "panel-vsync", &dts_value, len);
232263426Sbr	panel->v_back_porch = fdt32_to_cpu(dts_value[0]);
233263426Sbr	panel->v_pulse_width = fdt32_to_cpu(dts_value[1]);
234263426Sbr	panel->v_front_porch = fdt32_to_cpu(dts_value[2]);
235263426Sbr
236263426Sbr	/* clk divider */
237263426Sbr	if ((len = OF_getproplen(node, "panel-clk-div")) <= 0)
238263426Sbr		return (ENXIO);
239263426Sbr	OF_getprop(node, "panel-clk-div", &dts_value, len);
240263426Sbr	panel->clk_div = fdt32_to_cpu(dts_value[0]);
241263426Sbr
242263426Sbr	/* backlight pin */
243263426Sbr	if ((len = OF_getproplen(node, "panel-backlight-pin")) <= 0)
244263426Sbr		return (ENXIO);
245263426Sbr	OF_getprop(node, "panel-backlight-pin", &dts_value, len);
246263426Sbr	panel->backlight_pin = fdt32_to_cpu(dts_value[0]);
247263426Sbr
248263426Sbr	return (0);
249263426Sbr}
250263426Sbr
251263426Sbrstatic int
252263426Sbrfimd_init(struct fimd_softc *sc)
253263426Sbr{
254263426Sbr	struct panel_info *panel;
255263426Sbr	int reg;
256263426Sbr
257263426Sbr	panel = sc->panel;
258263426Sbr
259263426Sbr	/* fb_init */
260263426Sbr	reg = panel->ivclk | panel->fixvclk;
261263426Sbr	DWRITE4(sc,VIDCON1,reg);
262263426Sbr
263263426Sbr	reg = (VIDCON0_ENVID | VIDCON0_ENVID_F);
264263426Sbr	reg |= (panel->clkval_f << CLKVAL_F_OFFSET);
265263426Sbr	WRITE4(sc,VIDCON0,reg);
266263426Sbr
267263426Sbr	reg = (panel->v_pulse_width << VSYNC_PULSE_WIDTH_OFFSET);
268263426Sbr	reg |= (panel->v_front_porch << V_FRONT_PORCH_OFFSET);
269263426Sbr	reg |= (panel->v_back_porch << V_BACK_PORCH_OFFSET);
270263426Sbr	DWRITE4(sc,VIDTCON0,reg);
271263426Sbr
272263426Sbr	reg = (panel->h_pulse_width << HSYNC_PULSE_WIDTH_OFFSET);
273263426Sbr	reg |= (panel->h_front_porch << H_FRONT_PORCH_OFFSET);
274263426Sbr	reg |= (panel->h_back_porch << H_BACK_PORCH_OFFSET);
275263426Sbr	DWRITE4(sc,VIDTCON1,reg);
276263426Sbr
277263426Sbr	reg = ((panel->width - 1) << HOZVAL_OFFSET);
278263426Sbr	reg |= ((panel->height - 1) << LINEVAL_OFFSET);
279263426Sbr	DWRITE4(sc,VIDTCON2,reg);
280263426Sbr
281266358Sian	reg = sc->sc_info.fb_pbase;
282266358Sian	WRITE4(sc, VIDW00ADD0B0, reg);
283266358Sian	reg += (sc->sc_info.fb_stride * (sc->sc_info.fb_height + 1));
284266358Sian	WRITE4(sc, VIDW00ADD1B0, reg);
285266358Sian	WRITE4(sc, VIDW00ADD2, sc->sc_info.fb_stride);
286263426Sbr
287263426Sbr	reg = ((panel->width - 1) << OSD_RIGHTBOTX_F_OFFSET);
288263426Sbr	reg |= ((panel->height - 1) << OSD_RIGHTBOTY_F_OFFSET);
289263426Sbr	WRITE4(sc,VIDOSD0B,reg);
290263426Sbr
291263426Sbr	reg = panel->width * panel->height;
292263426Sbr	WRITE4(sc,VIDOSD0C,reg);
293263426Sbr
294263426Sbr	reg = READ4(sc, SHADOWCON);
295263426Sbr	reg |= CHANNEL0_EN;
296263426Sbr	reg &= ~(1 << 5); /* disable local path for channel0 */
297263426Sbr	WRITE4(sc,SHADOWCON,reg);
298263426Sbr
299263426Sbr	reg = BPPMODE_F_RGB_16BIT_565 << BPPMODE_F_OFFSET;
300263426Sbr	reg |= ENWIN_F_ENABLE | HALF_WORD_SWAP_EN; /* Note: swap=0 when ENLOCAL==1 */
301263426Sbr	reg &= ~ENLOCAL_F; /* use DMA */
302263426Sbr	WRITE4(sc,WINCON0,reg);
303263426Sbr
304263426Sbr	/* Enable DisplayPort Clk */
305263426Sbr	WRITE4(sc, DPCLKCON, DPCLKCON_EN);
306263426Sbr
307263426Sbr	return (0);
308263426Sbr}
309263426Sbr
310263426Sbrstatic int
311263426Sbrfimd_attach(device_t dev)
312263426Sbr{
313263426Sbr	struct panel_info panel;
314263426Sbr	struct fimd_softc *sc;
315263426Sbr	device_t gpio_dev;
316263426Sbr	int reg;
317263426Sbr
318263426Sbr	sc = device_get_softc(dev);
319263426Sbr	sc->dev = dev;
320263426Sbr
321263426Sbr	if (bus_alloc_resources(dev, fimd_spec, sc->res)) {
322263426Sbr		device_printf(dev, "could not allocate resources\n");
323263426Sbr		return (ENXIO);
324263426Sbr	}
325263426Sbr
326263426Sbr	/* Memory interface */
327263426Sbr	sc->bst = rman_get_bustag(sc->res[0]);
328263426Sbr	sc->bsh = rman_get_bushandle(sc->res[0]);
329263426Sbr	sc->bst_disp = rman_get_bustag(sc->res[1]);
330263426Sbr	sc->bsh_disp = rman_get_bushandle(sc->res[1]);
331263426Sbr	sc->bst_sysreg = rman_get_bustag(sc->res[2]);
332263426Sbr	sc->bsh_sysreg = rman_get_bushandle(sc->res[2]);
333263426Sbr
334263426Sbr	if (get_panel_info(sc, &panel)) {
335263426Sbr		device_printf(dev, "Can't get panel info\n");
336263426Sbr		return (ENXIO);
337263426Sbr	}
338263426Sbr
339263426Sbr	panel.fixvclk = 0;
340263426Sbr	panel.ivclk = 0;
341263426Sbr	panel.clkval_f = 2;
342263426Sbr
343263426Sbr	sc->panel = &panel;
344263426Sbr
345263426Sbr	/* Get the GPIO device, we need this to give power to USB */
346263426Sbr	gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
347263426Sbr	if (gpio_dev == NULL) {
348263426Sbr		/* TODO */
349263426Sbr	}
350263426Sbr
351263426Sbr	reg = bus_space_read_4(sc->bst_sysreg, sc->bsh_sysreg, 0x214);
352263426Sbr	reg |= FIMDBYPASS_DISP1;
353263426Sbr	bus_space_write_4(sc->bst_sysreg, sc->bsh_sysreg, 0x214, reg);
354263426Sbr
355263426Sbr	sc->sc_info.fb_width = panel.width;
356263426Sbr	sc->sc_info.fb_height = panel.height;
357263426Sbr	sc->sc_info.fb_stride = sc->sc_info.fb_width * 2;
358263426Sbr	sc->sc_info.fb_bpp = sc->sc_info.fb_depth = 16;
359263426Sbr	sc->sc_info.fb_size = sc->sc_info.fb_height * sc->sc_info.fb_stride;
360266341Sian	sc->sc_info.fb_vbase = (intptr_t)kmem_alloc_contig(kernel_arena,
361266341Sian	    sc->sc_info.fb_size, M_ZERO, 0, ~0, PAGE_SIZE, 0, VM_MEMATTR_UNCACHEABLE);
362263426Sbr	sc->sc_info.fb_pbase = (intptr_t)vtophys(sc->sc_info.fb_vbase);
363263426Sbr
364263426Sbr#if 0
365263426Sbr	printf("%dx%d [%d]\n", sc->sc_info.fb_width, sc->sc_info.fb_height,
366263426Sbr	    sc->sc_info.fb_stride);
367263426Sbr	printf("pbase == 0x%08x\n", sc->sc_info.fb_pbase);
368263426Sbr#endif
369263426Sbr
370263426Sbr	memset((int8_t *)sc->sc_info.fb_vbase, 0x0, sc->sc_info.fb_size);
371263426Sbr
372263426Sbr	fimd_init(sc);
373263426Sbr
374263426Sbr	sc->sc_info.fb_name = device_get_nameunit(dev);
375263426Sbr
376263426Sbr	/* Ask newbus to attach framebuffer device to me. */
377263426Sbr	sc->sc_fbd = device_add_child(dev, "fbd", device_get_unit(dev));
378263426Sbr	if (sc->sc_fbd == NULL)
379263426Sbr		device_printf(dev, "Can't attach fbd device\n");
380263426Sbr
381263426Sbr	if (device_probe_and_attach(sc->sc_fbd) != 0) {
382263426Sbr		device_printf(sc->dev, "Failed to attach fbd device\n");
383263426Sbr	}
384263426Sbr
385263426Sbr	return (0);
386263426Sbr}
387263426Sbr
388263426Sbrstatic struct fb_info *
389263426Sbrfimd_fb_getinfo(device_t dev)
390263426Sbr{
391263426Sbr	struct fimd_softc *sc = device_get_softc(dev);
392263426Sbr
393263426Sbr	return (&sc->sc_info);
394263426Sbr}
395263426Sbr
396263426Sbrstatic device_method_t fimd_methods[] = {
397263426Sbr	DEVMETHOD(device_probe,		fimd_probe),
398263426Sbr	DEVMETHOD(device_attach,	fimd_attach),
399263426Sbr
400263426Sbr	/* Framebuffer service methods */
401263426Sbr	DEVMETHOD(fb_getinfo,		fimd_fb_getinfo),
402263426Sbr	{ 0, 0 }
403263426Sbr};
404263426Sbr
405263426Sbrstatic driver_t fimd_driver = {
406263426Sbr	"fb",
407263426Sbr	fimd_methods,
408263426Sbr	sizeof(struct fimd_softc),
409263426Sbr};
410263426Sbr
411263426Sbrstatic devclass_t fimd_devclass;
412263426Sbr
413263426SbrDRIVER_MODULE(fb, simplebus, fimd_driver, fimd_devclass, 0, 0);
414