1239278Sgonzo/*-
2239278Sgonzo * Copyright (c) 1994-1998 Mark Brinicombe.
3239278Sgonzo * Copyright (c) 1994 Brini.
4239278Sgonzo * All rights reserved.
5239278Sgonzo *
6239278Sgonzo * This code is derived from software written for Brini by Mark Brinicombe
7239278Sgonzo *
8239278Sgonzo * Redistribution and use in source and binary forms, with or without
9239278Sgonzo * modification, are permitted provided that the following conditions
10239278Sgonzo * are met:
11239278Sgonzo * 1. Redistributions of source code must retain the above copyright
12239278Sgonzo *    notice, this list of conditions and the following disclaimer.
13239278Sgonzo * 2. Redistributions in binary form must reproduce the above copyright
14239278Sgonzo *    notice, this list of conditions and the following disclaimer in the
15239278Sgonzo *    documentation and/or other materials provided with the distribution.
16239278Sgonzo * 3. All advertising materials mentioning features or use of this software
17239278Sgonzo *    must display the following acknowledgement:
18239278Sgonzo *      This product includes software developed by Brini.
19239278Sgonzo * 4. The name of the company nor the name of the author may be used to
20239278Sgonzo *    endorse or promote products derived from this software without specific
21239278Sgonzo *    prior written permission.
22239278Sgonzo *
23239278Sgonzo * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24239278Sgonzo * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25239278Sgonzo * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26239278Sgonzo * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27239278Sgonzo * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28239278Sgonzo * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29239278Sgonzo * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30239278Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31239278Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32239278Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33239278Sgonzo * SUCH DAMAGE.
34239278Sgonzo *
35239278Sgonzo * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
36239278Sgonzo */
37239278Sgonzo
38239278Sgonzo#include "opt_ddb.h"
39239278Sgonzo#include "opt_platform.h"
40239278Sgonzo
41239278Sgonzo#include <sys/cdefs.h>
42239278Sgonzo__FBSDID("$FreeBSD$");
43239278Sgonzo
44239278Sgonzo#define _ARM32_BUS_DMA_PRIVATE
45239278Sgonzo#include <sys/param.h>
46239278Sgonzo#include <sys/systm.h>
47239278Sgonzo#include <sys/bus.h>
48239278Sgonzo
49239278Sgonzo#include <vm/vm.h>
50239278Sgonzo#include <vm/pmap.h>
51242531Sandrew
52239278Sgonzo#include <machine/bus.h>
53266084Sian#include <machine/fdt.h>
54259364Sian#include <machine/devmap.h>
55242531Sandrew#include <machine/machdep.h>
56239278Sgonzo
57242531Sandrew#include <arm/lpc/lpcreg.h>
58242531Sandrew#include <arm/lpc/lpcvar.h>
59239278Sgonzo
60242531Sandrew#include <dev/fdt/fdt_common.h>
61239278Sgonzo
62240956Sandrewvm_offset_t
63240956Sandrewinitarm_lastaddr(void)
64240956Sandrew{
65240956Sandrew
66266084Sian	return (arm_devmap_lastaddr());
67259365Sian}
68259365Sian
69259365Sianvoid
70259365Sianinitarm_early_init(void)
71259365Sian{
72240956Sandrew}
73240956Sandrew
74240956Sandrewvoid
75240956Sandrewinitarm_gpio_init(void)
76240956Sandrew{
77242343Sandrew
78242343Sandrew	/*
79242343Sandrew	 * Set initial values of GPIO output ports
80242343Sandrew	 */
81242343Sandrew	platform_gpio_init();
82240956Sandrew}
83240956Sandrew
84240956Sandrewvoid
85240956Sandrewinitarm_late_init(void)
86240956Sandrew{
87240956Sandrew}
88240956Sandrew
89239278Sgonzo/*
90266084Sian * Add a single static device mapping.
91266084Sian * The values used were taken from the ranges property of the SoC node in the
92266084Sian * dts file when this code was converted to arm_devmap_add_entry().
93239278Sgonzo */
94242531Sandrewint
95259365Sianinitarm_devmap_init(void)
96239278Sgonzo{
97239278Sgonzo
98266084Sian	arm_devmap_add_entry(LPC_DEV_PHYS_BASE, LPC_DEV_SIZE);
99239278Sgonzo	return (0);
100239278Sgonzo}
101239278Sgonzo
102239278Sgonzostruct arm32_dma_range *
103239278Sgonzobus_dma_get_range(void)
104239278Sgonzo{
105239278Sgonzo
106239278Sgonzo	return (NULL);
107239278Sgonzo}
108239278Sgonzo
109239278Sgonzoint
110239278Sgonzobus_dma_get_range_nb(void)
111239278Sgonzo{
112239278Sgonzo
113239278Sgonzo	return (0);
114239278Sgonzo}
115239278Sgonzo
116239278Sgonzovoid
117239278Sgonzocpu_reset(void)
118239278Sgonzo{
119266084Sian	bus_space_tag_t bst;
120266084Sian	bus_space_handle_t bsh;
121266084Sian
122266084Sian	bst = fdtbus_bs_tag;
123266084Sian
124239278Sgonzo	/* Enable WDT */
125266084Sian	bus_space_map(bst, LPC_CLKPWR_PHYS_BASE, LPC_CLKPWR_SIZE, 0, &bsh);
126266084Sian	bus_space_write_4(bst, bsh, LPC_CLKPWR_TIMCLK_CTRL,
127239278Sgonzo	    LPC_CLKPWR_TIMCLK_CTRL_WATCHDOG);
128266084Sian	bus_space_unmap(bst, bsh, LPC_CLKPWR_SIZE);
129239278Sgonzo
130239278Sgonzo	/* Instant assert of RESETOUT_N with pulse length 1ms */
131266084Sian	bus_space_map(bst, LPC_WDTIM_PHYS_BASE, LPC_WDTIM_SIZE, 0, &bsh);
132266084Sian	bus_space_write_4(bst, bsh, LPC_WDTIM_PULSE, 13000);
133266084Sian	bus_space_write_4(bst, bsh, LPC_WDTIM_MCTRL, 0x70);
134266084Sian	bus_space_unmap(bst, bsh, LPC_WDTIM_SIZE);
135239278Sgonzo
136266084Sian	for (;;)
137266084Sian		continue;
138239278Sgonzo}
139242531Sandrew
140