1248557Sray/*- 2250357Sray * Copyright (c) 2012, 2013 The FreeBSD Foundation 3248557Sray * All rights reserved. 4248557Sray * 5248557Sray * This software was developed by Oleksandr Rybalko under sponsorship 6248557Sray * from the FreeBSD Foundation. 7248557Sray * 8248557Sray * Redistribution and use in source and binary forms, with or without 9248557Sray * modification, are permitted provided that the following conditions 10248557Sray * are met: 11248557Sray * 1. Redistributions of source code must retain the above copyright 12248557Sray * notice, this list of conditions and the following disclaimer. 13248557Sray * 2. Redistributions in binary form must reproduce the above copyright 14248557Sray * notice, this list of conditions and the following disclaimer in the 15248557Sray * documentation and/or other materials provided with the distribution. 16248557Sray * 17248557Sray * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18248557Sray * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19248557Sray * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20248557Sray * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21248557Sray * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22248557Sray * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23248557Sray * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24248557Sray * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25248557Sray * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26248557Sray * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27248557Sray * SUCH DAMAGE. 28248557Sray */ 29248557Sray 30248557Sray/* 31248557Sray * Freescale i.MX515 GPIO driver. 32248557Sray */ 33248557Sray 34248557Sray#include <sys/cdefs.h> 35248557Sray__FBSDID("$FreeBSD$"); 36248557Sray 37248557Sray#include <sys/param.h> 38248557Sray#include <sys/systm.h> 39248557Sray#include <sys/bus.h> 40248557Sray 41248557Sray#include <sys/kernel.h> 42248557Sray#include <sys/module.h> 43248557Sray#include <sys/rman.h> 44248557Sray#include <sys/lock.h> 45248557Sray#include <sys/mutex.h> 46248557Sray#include <sys/gpio.h> 47248557Sray 48248557Sray#include <machine/bus.h> 49248557Sray#include <machine/resource.h> 50248557Sray 51248557Sray#include <dev/fdt/fdt_common.h> 52248557Sray#include <dev/ofw/openfirm.h> 53248557Sray#include <dev/ofw/ofw_bus.h> 54248557Sray#include <dev/ofw/ofw_bus_subr.h> 55248557Sray 56248557Sray#include "gpio_if.h" 57248557Sray 58248557Sray#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 59248557Sray#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 60248557Sray#define GPIO_LOCK_INIT(_sc) mtx_init(&_sc->sc_mtx, \ 61248557Sray device_get_nameunit(_sc->sc_dev), "imx_gpio", MTX_DEF) 62248557Sray#define GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 63248557Sray#define GPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 64248557Sray#define GPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 65248557Sray 66248557Sray#define WRITE4(_sc, _r, _v) \ 67248557Sray bus_space_write_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r), (_v)) 68248557Sray#define READ4(_sc, _r) \ 69248557Sray bus_space_read_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r)) 70248557Sray#define SET4(_sc, _r, _m) \ 71248557Sray WRITE4((_sc), (_r), READ4((_sc), (_r)) | (_m)) 72248557Sray#define CLEAR4(_sc, _r, _m) \ 73248557Sray WRITE4((_sc), (_r), READ4((_sc), (_r)) & ~(_m)) 74248557Sray 75248557Sray/* Registers definition for Freescale i.MX515 GPIO controller */ 76248557Sray 77248557Sray#define IMX_GPIO_DR_REG 0x000 /* Pin Data */ 78248557Sray#define IMX_GPIO_OE_REG 0x004 /* Set Pin Output */ 79248557Sray#define IMX_GPIO_PSR_REG 0x008 /* Pad Status */ 80248557Sray#define IMX_GPIO_ICR1_REG 0x00C /* Interrupt Configuration */ 81248557Sray#define IMX_GPIO_ICR2_REG 0x010 /* Interrupt Configuration */ 82248557Sray#define GPIO_ICR_COND_LOW 0 83248557Sray#define GPIO_ICR_COND_HIGH 1 84248557Sray#define GPIO_ICR_COND_RISE 2 85248557Sray#define GPIO_ICR_COND_FALL 3 86248557Sray#define IMX_GPIO_IMR_REG 0x014 /* Interrupt Mask Register */ 87248557Sray#define IMX_GPIO_ISR_REG 0x018 /* Interrupt Status Register */ 88248557Sray#define IMX_GPIO_EDGE_REG 0x01C /* Edge Detect Register */ 89248557Sray 90248557Sray#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT) 91248557Sray#define NGPIO 32 92248557Sray 93248557Sraystruct imx51_gpio_softc { 94248557Sray device_t dev; 95248557Sray struct mtx sc_mtx; 96248557Sray struct resource *sc_res[11]; /* 1 x mem, 2 x IRQ, 8 x IRQ */ 97248557Sray void *gpio_ih[11]; /* 1 ptr is not a big waste */ 98248557Sray int sc_l_irq; /* Last irq resource */ 99248557Sray bus_space_tag_t sc_iot; 100248557Sray bus_space_handle_t sc_ioh; 101248557Sray int gpio_npins; 102248557Sray struct gpio_pin gpio_pins[NGPIO]; 103248557Sray}; 104248557Sray 105248557Sraystatic struct resource_spec imx_gpio_spec[] = { 106248557Sray { SYS_RES_MEMORY, 0, RF_ACTIVE }, 107248557Sray { SYS_RES_IRQ, 0, RF_ACTIVE }, 108248557Sray { SYS_RES_IRQ, 1, RF_ACTIVE }, 109248557Sray { -1, 0 } 110248557Sray}; 111248557Sray 112248557Sraystatic struct resource_spec imx_gpio0irq_spec[] = { 113248557Sray { SYS_RES_IRQ, 2, RF_ACTIVE }, 114248557Sray { SYS_RES_IRQ, 3, RF_ACTIVE }, 115248557Sray { SYS_RES_IRQ, 4, RF_ACTIVE }, 116248557Sray { SYS_RES_IRQ, 5, RF_ACTIVE }, 117248557Sray { SYS_RES_IRQ, 6, RF_ACTIVE }, 118248557Sray { SYS_RES_IRQ, 7, RF_ACTIVE }, 119248557Sray { SYS_RES_IRQ, 8, RF_ACTIVE }, 120248557Sray { SYS_RES_IRQ, 9, RF_ACTIVE }, 121248557Sray { -1, 0 } 122248557Sray}; 123248557Sray 124248557Sray/* 125248557Sray * Helpers 126248557Sray */ 127248557Sraystatic void imx51_gpio_pin_configure(struct imx51_gpio_softc *, 128248557Sray struct gpio_pin *, uint32_t); 129248557Sray 130248557Sray/* 131248557Sray * Driver stuff 132248557Sray */ 133248557Sraystatic int imx51_gpio_probe(device_t); 134248557Sraystatic int imx51_gpio_attach(device_t); 135248557Sraystatic int imx51_gpio_detach(device_t); 136248557Sraystatic int imx51_gpio_intr(void *); 137248557Sray 138248557Sray/* 139248557Sray * GPIO interface 140248557Sray */ 141248557Sraystatic int imx51_gpio_pin_max(device_t, int *); 142248557Sraystatic int imx51_gpio_pin_getcaps(device_t, uint32_t, uint32_t *); 143248557Sraystatic int imx51_gpio_pin_getflags(device_t, uint32_t, uint32_t *); 144248557Sraystatic int imx51_gpio_pin_getname(device_t, uint32_t, char *); 145248557Sraystatic int imx51_gpio_pin_setflags(device_t, uint32_t, uint32_t); 146248557Sraystatic int imx51_gpio_pin_set(device_t, uint32_t, unsigned int); 147248557Sraystatic int imx51_gpio_pin_get(device_t, uint32_t, unsigned int *); 148248557Sraystatic int imx51_gpio_pin_toggle(device_t, uint32_t pin); 149248557Sray 150248557Sraystatic void 151248557Srayimx51_gpio_pin_configure(struct imx51_gpio_softc *sc, struct gpio_pin *pin, 152248557Sray unsigned int flags) 153248557Sray{ 154248557Sray 155248557Sray GPIO_LOCK(sc); 156248557Sray 157248557Sray /* 158248557Sray * Manage input/output 159248557Sray */ 160248557Sray if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { 161248557Sray pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); 162248557Sray if (flags & GPIO_PIN_OUTPUT) { 163248557Sray pin->gp_flags |= GPIO_PIN_OUTPUT; 164248557Sray SET4(sc, IMX_GPIO_OE_REG, (1 << pin->gp_pin)); 165248557Sray } 166248557Sray else { 167248557Sray pin->gp_flags |= GPIO_PIN_INPUT; 168248557Sray CLEAR4(sc, IMX_GPIO_OE_REG, (1 << pin->gp_pin)); 169248557Sray } 170248557Sray } 171248557Sray 172248557Sray GPIO_UNLOCK(sc); 173248557Sray} 174248557Sray 175248557Sraystatic int 176248557Srayimx51_gpio_pin_max(device_t dev, int *maxpin) 177248557Sray{ 178248557Sray 179248557Sray *maxpin = NGPIO - 1; 180248557Sray return (0); 181248557Sray} 182248557Sray 183248557Sraystatic int 184248557Srayimx51_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 185248557Sray{ 186248557Sray struct imx51_gpio_softc *sc; 187248557Sray int i; 188248557Sray 189248557Sray sc = device_get_softc(dev); 190248557Sray for (i = 0; i < sc->gpio_npins; i++) { 191248557Sray if (sc->gpio_pins[i].gp_pin == pin) 192248557Sray break; 193248557Sray } 194248557Sray 195248557Sray if (i >= sc->gpio_npins) 196248557Sray return (EINVAL); 197248557Sray 198248557Sray GPIO_LOCK(sc); 199248557Sray *caps = sc->gpio_pins[i].gp_caps; 200248557Sray GPIO_UNLOCK(sc); 201248557Sray 202248557Sray return (0); 203248557Sray} 204248557Sray 205248557Sraystatic int 206248557Srayimx51_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 207248557Sray{ 208248557Sray struct imx51_gpio_softc *sc; 209248557Sray int i; 210248557Sray 211248557Sray sc = device_get_softc(dev); 212248557Sray for (i = 0; i < sc->gpio_npins; i++) { 213248557Sray if (sc->gpio_pins[i].gp_pin == pin) 214248557Sray break; 215248557Sray } 216248557Sray 217248557Sray if (i >= sc->gpio_npins) 218248557Sray return (EINVAL); 219248557Sray 220248557Sray GPIO_LOCK(sc); 221248557Sray *flags = sc->gpio_pins[i].gp_flags; 222248557Sray GPIO_UNLOCK(sc); 223248557Sray 224248557Sray return (0); 225248557Sray} 226248557Sray 227248557Sraystatic int 228248557Srayimx51_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 229248557Sray{ 230248557Sray struct imx51_gpio_softc *sc; 231248557Sray int i; 232248557Sray 233248557Sray sc = device_get_softc(dev); 234248557Sray for (i = 0; i < sc->gpio_npins; i++) { 235248557Sray if (sc->gpio_pins[i].gp_pin == pin) 236248557Sray break; 237248557Sray } 238248557Sray 239248557Sray if (i >= sc->gpio_npins) 240248557Sray return (EINVAL); 241248557Sray 242248557Sray GPIO_LOCK(sc); 243248557Sray memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME); 244248557Sray GPIO_UNLOCK(sc); 245248557Sray 246248557Sray return (0); 247248557Sray} 248248557Sray 249248557Sraystatic int 250248557Srayimx51_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 251248557Sray{ 252248557Sray struct imx51_gpio_softc *sc; 253248557Sray int i; 254248557Sray 255248557Sray sc = device_get_softc(dev); 256248557Sray for (i = 0; i < sc->gpio_npins; i++) { 257248557Sray if (sc->gpio_pins[i].gp_pin == pin) 258248557Sray break; 259248557Sray } 260248557Sray 261248557Sray if (i >= sc->gpio_npins) 262248557Sray return (EINVAL); 263248557Sray 264249449Sdim /* Check for unwanted flags. */ 265249449Sdim if ((flags & sc->gpio_pins[i].gp_caps) != flags) 266248557Sray return (EINVAL); 267248557Sray 268248557Sray /* Can't mix input/output together */ 269248557Sray if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) == 270248557Sray (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) 271248557Sray return (EINVAL); 272248557Sray 273248557Sray imx51_gpio_pin_configure(sc, &sc->gpio_pins[i], flags); 274248557Sray 275248557Sray 276248557Sray return (0); 277248557Sray} 278248557Sray 279248557Sraystatic int 280248557Srayimx51_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) 281248557Sray{ 282248557Sray struct imx51_gpio_softc *sc; 283248557Sray int i; 284248557Sray 285248557Sray sc = device_get_softc(dev); 286248557Sray for (i = 0; i < sc->gpio_npins; i++) { 287248557Sray if (sc->gpio_pins[i].gp_pin == pin) 288248557Sray break; 289248557Sray } 290248557Sray 291248557Sray if (i >= sc->gpio_npins) 292248557Sray return (EINVAL); 293248557Sray 294248557Sray GPIO_LOCK(sc); 295248557Sray if (value) 296248557Sray SET4(sc, IMX_GPIO_DR_REG, (1 << i)); 297248557Sray else 298248557Sray CLEAR4(sc, IMX_GPIO_DR_REG, (1 << i)); 299248557Sray GPIO_UNLOCK(sc); 300248557Sray 301248557Sray return (0); 302248557Sray} 303248557Sray 304248557Sraystatic int 305248557Srayimx51_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 306248557Sray{ 307248557Sray struct imx51_gpio_softc *sc; 308248557Sray int i; 309248557Sray 310248557Sray sc = device_get_softc(dev); 311248557Sray for (i = 0; i < sc->gpio_npins; i++) { 312248557Sray if (sc->gpio_pins[i].gp_pin == pin) 313248557Sray break; 314248557Sray } 315248557Sray 316248557Sray if (i >= sc->gpio_npins) 317248557Sray return (EINVAL); 318248557Sray 319248557Sray GPIO_LOCK(sc); 320248557Sray *val = (READ4(sc, IMX_GPIO_DR_REG) >> i) & 1; 321248557Sray GPIO_UNLOCK(sc); 322248557Sray 323248557Sray return (0); 324248557Sray} 325248557Sray 326248557Sraystatic int 327248557Srayimx51_gpio_pin_toggle(device_t dev, uint32_t pin) 328248557Sray{ 329248557Sray struct imx51_gpio_softc *sc; 330248557Sray int i; 331248557Sray 332248557Sray sc = device_get_softc(dev); 333248557Sray for (i = 0; i < sc->gpio_npins; i++) { 334248557Sray if (sc->gpio_pins[i].gp_pin == pin) 335248557Sray break; 336248557Sray } 337248557Sray 338248557Sray if (i >= sc->gpio_npins) 339248557Sray return (EINVAL); 340248557Sray 341248557Sray GPIO_LOCK(sc); 342248557Sray WRITE4(sc, IMX_GPIO_DR_REG, 343248557Sray (READ4(sc, IMX_GPIO_DR_REG) ^ (1 << i))); 344248557Sray GPIO_UNLOCK(sc); 345248557Sray 346248557Sray return (0); 347248557Sray} 348248557Sray 349248557Sraystatic int 350248557Srayimx51_gpio_intr(void *arg) 351248557Sray{ 352248557Sray struct imx51_gpio_softc *sc; 353248557Sray uint32_t input, value; 354248557Sray 355248557Sray sc = arg; 356248557Sray input = READ4(sc, IMX_GPIO_ISR_REG); 357248557Sray value = input & READ4(sc, IMX_GPIO_IMR_REG); 358269104Sian WRITE4(sc, IMX_GPIO_ISR_REG, input); 359248557Sray 360248557Sray if (!value) 361248557Sray goto intr_done; 362248557Sray 363248557Sray /* TODO: interrupt handling */ 364248557Sray 365248557Srayintr_done: 366248557Sray return (FILTER_HANDLED); 367248557Sray} 368248557Sray 369248557Sraystatic int 370248557Srayimx51_gpio_probe(device_t dev) 371248557Sray{ 372248557Sray 373266152Sian if (!ofw_bus_status_okay(dev)) 374266152Sian return (ENXIO); 375266152Sian 376255130Srpaulo if (ofw_bus_is_compatible(dev, "fsl,imx51-gpio") || 377255130Srpaulo ofw_bus_is_compatible(dev, "fsl,imx53-gpio")) { 378248557Sray device_set_desc(dev, "i.MX515 GPIO Controller"); 379248557Sray return (BUS_PROBE_DEFAULT); 380248557Sray } 381248557Sray 382248557Sray return (ENXIO); 383248557Sray} 384248557Sray 385248557Sraystatic int 386248557Srayimx51_gpio_attach(device_t dev) 387248557Sray{ 388248557Sray struct imx51_gpio_softc *sc; 389248557Sray int i, irq; 390248557Sray 391248557Sray sc = device_get_softc(dev); 392248557Sray mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 393248557Sray 394248557Sray if (bus_alloc_resources(dev, imx_gpio_spec, sc->sc_res)) { 395248557Sray device_printf(dev, "could not allocate resources\n"); 396248557Sray return (ENXIO); 397248557Sray } 398248557Sray 399248557Sray sc->dev = dev; 400248557Sray sc->gpio_npins = NGPIO; 401248557Sray sc->sc_l_irq = 2; 402248557Sray sc->sc_iot = rman_get_bustag(sc->sc_res[0]); 403248557Sray sc->sc_ioh = rman_get_bushandle(sc->sc_res[0]); 404248557Sray 405248557Sray if (bus_alloc_resources(dev, imx_gpio0irq_spec, &sc->sc_res[3]) == 0) { 406248557Sray /* 407248557Sray * First GPIO unit able to serve +8 interrupts for 8 first 408248557Sray * pins. 409248557Sray */ 410248557Sray sc->sc_l_irq = 10; 411248557Sray } 412248557Sray 413248557Sray for (irq = 1; irq <= sc->sc_l_irq; irq ++) { 414248557Sray if ((bus_setup_intr(dev, sc->sc_res[irq], INTR_TYPE_MISC, 415248557Sray imx51_gpio_intr, NULL, sc, &sc->gpio_ih[irq]))) { 416248557Sray device_printf(dev, 417248557Sray "WARNING: unable to register interrupt handler\n"); 418248557Sray return (ENXIO); 419248557Sray } 420248557Sray } 421248557Sray 422248557Sray for (i = 0; i < sc->gpio_npins; i++) { 423248557Sray sc->gpio_pins[i].gp_pin = i; 424248557Sray sc->gpio_pins[i].gp_caps = DEFAULT_CAPS; 425248557Sray sc->gpio_pins[i].gp_flags = 426248557Sray (READ4(sc, IMX_GPIO_OE_REG) & (1 << i)) ? GPIO_PIN_OUTPUT: 427248557Sray GPIO_PIN_INPUT; 428248557Sray snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME, 429248557Sray "imx_gpio%d.%d", device_get_unit(dev), i); 430248557Sray } 431248557Sray 432248557Sray device_add_child(dev, "gpioc", device_get_unit(dev)); 433248557Sray device_add_child(dev, "gpiobus", device_get_unit(dev)); 434248557Sray 435248557Sray return (bus_generic_attach(dev)); 436248557Sray} 437248557Sray 438248557Sraystatic int 439248557Srayimx51_gpio_detach(device_t dev) 440248557Sray{ 441248557Sray struct imx51_gpio_softc *sc; 442248557Sray 443248557Sray sc = device_get_softc(dev); 444248557Sray 445248557Sray KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized")); 446248557Sray 447248557Sray bus_generic_detach(dev); 448248557Sray 449248557Sray if (sc->sc_res[3]) 450248557Sray bus_release_resources(dev, imx_gpio0irq_spec, &sc->sc_res[3]); 451248557Sray 452248557Sray if (sc->sc_res[0]) 453248557Sray bus_release_resources(dev, imx_gpio_spec, sc->sc_res); 454248557Sray 455248557Sray mtx_destroy(&sc->sc_mtx); 456248557Sray 457248557Sray return(0); 458248557Sray} 459248557Sray 460248557Sraystatic device_method_t imx51_gpio_methods[] = { 461248557Sray DEVMETHOD(device_probe, imx51_gpio_probe), 462248557Sray DEVMETHOD(device_attach, imx51_gpio_attach), 463248557Sray DEVMETHOD(device_detach, imx51_gpio_detach), 464248557Sray 465248557Sray /* GPIO protocol */ 466248557Sray DEVMETHOD(gpio_pin_max, imx51_gpio_pin_max), 467248557Sray DEVMETHOD(gpio_pin_getname, imx51_gpio_pin_getname), 468248557Sray DEVMETHOD(gpio_pin_getflags, imx51_gpio_pin_getflags), 469248557Sray DEVMETHOD(gpio_pin_getcaps, imx51_gpio_pin_getcaps), 470248557Sray DEVMETHOD(gpio_pin_setflags, imx51_gpio_pin_setflags), 471248557Sray DEVMETHOD(gpio_pin_get, imx51_gpio_pin_get), 472248557Sray DEVMETHOD(gpio_pin_set, imx51_gpio_pin_set), 473248557Sray DEVMETHOD(gpio_pin_toggle, imx51_gpio_pin_toggle), 474248557Sray {0, 0}, 475248557Sray}; 476248557Sray 477248557Sraystatic driver_t imx51_gpio_driver = { 478248557Sray "gpio", 479248557Sray imx51_gpio_methods, 480248557Sray sizeof(struct imx51_gpio_softc), 481248557Sray}; 482248557Sraystatic devclass_t imx51_gpio_devclass; 483248557Sray 484248557SrayDRIVER_MODULE(imx51_gpio, simplebus, imx51_gpio_driver, imx51_gpio_devclass, 485248557Sray 0, 0); 486