at91_smc.h revision 260884
1251876Speter/*- 2251876Speter * Copyright (c) 2014 M. Warner Losh. All rights reserved. 3251876Speter * 4251876Speter * Redistribution and use in source and binary forms, with or without 5251876Speter * modification, are permitted provided that the following conditions 6251876Speter * are met: 7251876Speter * 1. Redistributions of source code must retain the above copyright 8251876Speter * notice, this list of conditions and the following disclaimer. 9251876Speter * 2. Redistributions in binary form must reproduce the above copyright 10251876Speter * notice, this list of conditions and the following disclaimer in the 11251876Speter * documentation and/or other materials provided with the distribution. 12251876Speter * 13251876Speter * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14251876Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15251876Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16251876Speter * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17251876Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18251876Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19251876Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20251876Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21251876Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22251876Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23251876Speter * SUCH DAMAGE. 24251876Speter */ 25251876Speter 26251876Speter/* $FreeBSD: head/sys/arm/at91/at91_smc.h 260884 2014-01-19 17:45:13Z imp $ */ 27251876Speter 28251876Speter#ifndef ARM_AT91_AT91_SMC_H 29251876Speter#define ARM_AT91_AT91_SMC_H 30251876Speter 31251876Speter/* Registers */ 32251876Speter#define SMC_SETUP 0x00 33251876Speter#define SMC_PULSE 0x04 34251876Speter#define SMC_CYCLE 0x08 35251876Speter#define SMC_MODE 0x0C 36251876Speter 37251876Speter#define SMC_CS_OFF(cs) (0x10 * (cs)) 38251876Speter 39251876Speter/* Setup */ 40251876Speter#define SMC_SETUP_NCS_RD_SETUP(x) ((x) << 24) 41251876Speter#define SMC_SETUP_NRD_SETUP(x) ((x) << 16) 42251876Speter#define SMC_SETUP_NCS_WR_SETUP(x) ((x) << 8) 43251876Speter#define SMC_SETUP_NWE_SETUP(x) (x) 44251876Speter 45251876Speter/* Pulse */ 46251876Speter#define SMC_PULSE_NCS_RD_PULSE(x) ((x) << 24) 47251876Speter#define SMC_PULSE_NRD_PULSE(x) ((x) << 16) 48251876Speter#define SMC_PULSE_NCS_WR_PULSE(x) ((x) << 8) 49251876Speter#define SMC_PULSE_NWE_PULSE(x) (x) 50251876Speter 51251876Speter/* Cycle */ 52251876Speter#define SMC_CYCLE_NRD_CYCLE(x) ((x) << 16) 53251876Speter#define SMC_CYCLE_NWE_CYCLE(x) (x) 54251876Speter 55251876Speter/* Mode */ 56251876Speter#define SMC_MODE_READ (1 << 0) 57251876Speter#define SMC_MODE_WRITE (1 << 1) 58251876Speter#define SMC_MODE_EXNW_DISABLED (0 << 4) 59251876Speter#define SMC_MODE_EXNW_FROZEN_MODE (2 << 4) 60251876Speter#define SMC_MODE_EXNW_READY_MODE (3 << 4) 61251876Speter#define SMC_MODE_BAT (1 << 8) 62251876Speter#define SMC_MODE_DBW_8BIT (0 << 12) 63251876Speter#define SMC_MODE_DBW_16BIT (1 << 12) 64251876Speter#define SMC_MODE_DBW_32_BIT (2 << 12) 65251876Speter#define SMC_MODE_TDF_CYCLES(x) ((x) << 16) 66251876Speter#define SMC_MODE_TDF_MODE (1 << 20) 67251876Speter#define SMC_MODE_PMEN (1 << 24) 68251876Speter#define SMC_PS_4BYTE (0 << 28) 69251876Speter#define SMC_PS_8BYTE (1 << 28) 70251876Speter#define SMC_PS_16BYTE (2 << 28) 71251876Speter#define SMC_PS_32BYTE (3 << 28) 72251876Speter 73251876Speter/* 74251876Speter * structure to ease init. See the SMC chapter in the datasheet for 75251876Speter * the appropriate SoC you are using for details. 76251876Speter */ 77251876Speterstruct at91_smc_init 78251876Speter{ 79251876Speter /* Setup register */ 80251876Speter uint8_t ncs_rd_setup; 81251876Speter uint8_t nrd_setup; 82251876Speter uint8_t ncs_wr_setup; 83251876Speter uint8_t nwe_setup; 84251876Speter 85251876Speter /* Pulse register */ 86251876Speter uint8_t ncs_rd_pulse; 87251876Speter uint8_t nrd_pulse; 88251876Speter uint8_t ncs_wr_pulse; 89251876Speter uint8_t nwe_pulse; 90251876Speter 91251876Speter /* Cycle register */ 92251876Speter uint16_t nrd_cycle; 93251876Speter uint16_t nwe_cycle; 94251876Speter 95251876Speter /* Mode register */ 96251876Speter uint8_t mode; /* Combo of READ/WRITE/EXNW fields */ 97251876Speter uint8_t bat; 98251876Speter uint8_t dwb; 99251876Speter uint8_t tdf_cycles; 100251876Speter uint8_t tdf_mode; 101251876Speter uint8_t pmen; 102251876Speter uint8_t ps; 103251876Speter}; 104251876Speter 105251876Speter/* 106251876Speter * Convenience routine to fill in SMC registers for a given chip select. 107251876Speter */ 108251876Spetervoid at91_smc_setup(int id, int cs, const struct at91_smc_init *smc); 109251876Speter 110251876Speter/* 111251876Speter * Disable/Enable different External Bus Interfaces (EBI) 112251876Speter */ 113251876Spetervoid at91_ebi_enable(int cs); 114251876Spetervoid at91_ebi_disable(int cs); 115251876Speter 116251876Speter#endif /* ARM_AT91_AT91_SMC_H */ 117251876Speter