at91_pioreg.h revision 185265
1157089Simp/*- 2157089Simp * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3157089Simp * 4157089Simp * Redistribution and use in source and binary forms, with or without 5157089Simp * modification, are permitted provided that the following conditions 6157089Simp * are met: 7157089Simp * 1. Redistributions of source code must retain the above copyright 8157089Simp * notice, this list of conditions and the following disclaimer. 9157089Simp * 2. Redistributions in binary form must reproduce the above copyright 10157089Simp * notice, this list of conditions and the following disclaimer in the 11157089Simp * documentation and/or other materials provided with the distribution. 12157089Simp * 13185265Simp * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14185265Simp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15185265Simp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16185265Simp * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17185265Simp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18185265Simp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19185265Simp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20185265Simp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21185265Simp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22185265Simp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23185265Simp * SUCH DAMAGE. 24157089Simp */ 25157089Simp 26157089Simp/* $FreeBSD: head/sys/arm/at91/at91_pioreg.h 185265 2008-11-25 00:13:26Z imp $ */ 27157089Simp 28157089Simp#ifndef ARM_AT91_AT91_PIOREG_H 29157089Simp#define ARM_AT91_AT91_PIOREG_H 30157089Simp 31157089Simp/* Registers */ 32157089Simp#define PIO_PER 0x00 /* PIO Enable Register */ 33157089Simp#define PIO_PDR 0x04 /* PIO Disable Register */ 34157089Simp#define PIO_PSR 0x08 /* PIO Status Register */ 35157089Simp /* 0x0c reserved */ 36157089Simp#define PIO_OER 0x10 /* PIO Output Enable Register */ 37157089Simp#define PIO_ODR 0x14 /* PIO Output Disable Register */ 38157089Simp#define PIO_OSR 0x18 /* PIO Output Status Register */ 39157089Simp /* 0x1c reserved */ 40157089Simp#define PIO_IFER 0x20 /* PIO Glitch Input Enable Register */ 41157089Simp#define PIO_IFDR 0x24 /* PIO Glitch Input Disable Register */ 42157089Simp#define PIO_IFSR 0x28 /* PIO Glitch Input Status Register */ 43157089Simp /* 0x2c reserved */ 44157089Simp#define PIO_SODR 0x30 /* PIO Set Output Data Register */ 45157089Simp#define PIO_CODR 0x34 /* PIO Clear Output Data Register */ 46157089Simp#define PIO_ODSR 0x38 /* PIO Output Data Status Register */ 47157089Simp#define PIO_PDSR 0x3c /* PIO Pin Data Status Register */ 48157089Simp#define PIO_IER 0x40 /* PIO Interrupt Enable Register */ 49157089Simp#define PIO_IDR 0x44 /* PIO Interrupt Disable Register */ 50157089Simp#define PIO_IMR 0x48 /* PIO Interrupt Mask Register */ 51157089Simp#define PIO_ISR 0x4c /* PIO Interrupt Status Register */ 52157089Simp#define PIO_MDER 0x50 /* PIO Multi-Driver Enable Register */ 53157089Simp#define PIO_MDDR 0x54 /* PIO Multi-Driver Disable Register */ 54157089Simp#define PIO_MDSR 0x58 /* PIO Multi-Driver Status Register */ 55157089Simp /* 0x5c reserved */ 56165711Simp#define PIO_PUDR 0x60 /* PIO Pull-up Disable Register */ 57165711Simp#define PIO_PUER 0x64 /* PIO Pull-up Enable Register */ 58157089Simp#define PIO_PUSR 0x68 /* PIO Pull-up Status Register */ 59157089Simp /* 0x6c reserved */ 60157089Simp#define PIO_ASR 0x70 /* PIO Peripheral A Select Register */ 61157089Simp#define PIO_BSR 0x74 /* PIO Peripheral B Select Register */ 62157089Simp#define PIO_ABSR 0x78 /* PIO AB Status Register */ 63157089Simp /* 0x7c-0x9c reserved */ 64157089Simp#define PIO_OWER 0xa0 /* PIO Output Write Enable Register */ 65157089Simp#define PIO_OWDR 0xa4 /* PIO Output Write Disable Register */ 66157089Simp#define PIO_OWSR 0xa8 /* PIO Output Write Status Register */ 67157089Simp /* 0xac reserved */ 68157089Simp 69157089Simp#endif /* ARM_AT91_AT91_PIOREG_H */ 70