apicvar.h revision 122617 
1/*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 *    may be used to endorse or promote products derived from this software
15 *    without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD: head/sys/amd64/include/apicvar.h 122617 2003-11-13 16:41:07Z jhb $
30 */
31
32#ifndef _MACHINE_APICVAR_H_
33#define _MACHINE_APICVAR_H_
34
35/*
36 * Local && I/O APIC variable definitions.
37 */
38
39/*
40 * Layout of local APIC interrupt vectors:
41 *
42 *	0xff (255)  +-------------+
43 *                  |             | 15 (Spurious Vector)
44 *	0xf0 (240)  +-------------+
45 *                  |             | 14 (Interprocessor Interrupts)
46 *	0xe0 (224)  +-------------+
47 *                  |             | 13 (Local Interrupt (LINT[01]))
48 *	0xd0 (208)  +-------------+
49 *                  |             | 12 (Local Timer and Error Interrupts)
50 *	0xc0 (192)  +-------------+
51 *                  |             | 11 (I/O Interrupts)
52 *	0xb0 (176)  +-------------+
53 *                  |             | 10 (I/O Interrupts)
54 *	0xa0 (160)  +-------------+
55 *                  |             | 9 (I/O Interrupts)
56 *	0x90 (144)  +-------------+
57 *                  |             | 8 (I/O Interrupts / System Calls)
58 *	0x80 (128)  +-------------+
59 *                  |             | 7 (I/O Interrupts)
60 *	0x70 (112)  +-------------+
61 *                  |             | 6 (I/O Interrupts)
62 *	0x60 (96)   +-------------+
63 *                  |             | 5 (I/O Interrupts)
64 *	0x50 (80)   +-------------+
65 *                  |             | 4 (I/O Interrupts)
66 *	0x40 (64)   +-------------+
67 *                  |             | 3 (I/O Interrupts)
68 *	0x30 (48)   +-------------+
69 *                  |             | 2 (I/O Interrupts)
70 *	0x20 (32)   +-------------+
71 *                  |             | 1 (Exceptions, traps, faults, etc.)
72 *	0x10 (16)   +-------------+
73 *                  |             | 0 (Exceptions, traps, faults, etc.)
74 *	0x00 (0)    +-------------+
75 *
76 * Note: 0x80 needs to be handled specially and not allocated to an
77 * I/O device!
78 */
79
80#define	APIC_ID_ALL	0xff
81#define	APIC_NUM_IOINTS	160
82
83#define	APIC_LOCAL_INTS	(IDT_IO_INTS + APIC_NUM_IOINTS)
84#define	APIC_TIMER_INT	APIC_LOCAL_INTS
85#define	APIC_ERROR_INT	(APIC_LOCAL_INTS + 1)
86#define	APIC_THERMAL_INT (APIC_LOCAL_INTS + 2)
87
88#define	APIC_IPI_INTS	(APIC_LOCAL_INTS + 32)
89#define	IPI_AST		APIC_IPI_INTS		/* Generate software trap. */
90#define	IPI_INVLTLB	(APIC_IPI_INTS + 1)	/* TLB Shootdown IPIs */
91#define	IPI_INVLPG	(APIC_IPI_INTS + 2)
92#define	IPI_INVLRNG	(APIC_IPI_INTS + 3)
93#define	IPI_HARDCLOCK	(APIC_IPI_INTS + 8)	/* Inter-CPU clock handling. */
94#define	IPI_STATCLOCK	(APIC_IPI_INTS + 9)
95#define	IPI_RENDEZVOUS	(APIC_IPI_INTS + 10)	/* Inter-CPU rendezvous. */
96#define	IPI_LAZYPMAP	(APIC_IPI_INTS + 11)	/* Lazy pmap release. */
97#define	IPI_STOP	(APIC_IPI_INTS + 12)	/* Stop CPU until restarted. */
98
99#define	APIC_SPURIOUS_INT 255
100
101#define	LVT_LINT0	0
102#define	LVT_LINT1	1
103#define	LVT_TIMER	2
104#define	LVT_ERROR	3
105#define	LVT_PMC		4
106#define	LVT_THERMAL	5
107#define	LVT_MAX		LVT_THERMAL
108
109#ifndef LOCORE
110
111#define	APIC_IPI_DEST_SELF	-1
112#define	APIC_IPI_DEST_ALL	-2
113#define	APIC_IPI_DEST_OTHERS	-3
114
115/*
116 * An APIC enumerator is a psuedo bus driver that enumerates APIC's including
117 * CPU's and I/O APIC's.
118 */
119struct apic_enumerator {
120	const char *apic_name;
121	int (*apic_probe)(void);
122	int (*apic_probe_cpus)(void);
123	int (*apic_setup_local)(void);
124	int (*apic_setup_io)(void);
125	SLIST_ENTRY(apic_enumerator) apic_next;
126};
127
128inthand_t
129	IDTVEC(apic_isr1), IDTVEC(apic_isr2), IDTVEC(apic_isr3),
130	IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(spuriousint);
131
132u_int	apic_irq_to_idt(u_int irq);
133u_int	apic_idt_to_irq(u_int vector);
134void	apic_register_enumerator(struct apic_enumerator *enumerator);
135void	*ioapic_create(uintptr_t addr, int32_t id, int intbase);
136int	ioapic_disable_pin(void *cookie, u_int pin);
137int	ioapic_get_vector(void *cookie, u_int pin);
138int	ioapic_next_logical_cluster(void);
139void	ioapic_register(void *cookie);
140int	ioapic_remap_vector(void *cookie, u_int pin, int vector);
141int	ioapic_set_extint(void *cookie, u_int pin);
142int	ioapic_set_nmi(void *cookie, u_int pin);
143int	ioapic_set_polarity(void *cookie, u_int pin, char activehi);
144int	ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger);
145int	ioapic_set_smi(void *cookie, u_int pin);
146void	lapic_create(u_int apic_id, int boot_cpu);
147void	lapic_disable(void);
148void	lapic_dump(const char *str);
149void	lapic_enable_intr(u_int vector);
150void	lapic_eoi(void);
151int	lapic_id(void);
152void	lapic_init(uintptr_t addr);
153int	lapic_intr_pending(u_int vector);
154void	lapic_ipi_raw(register_t icrlo, u_int dest);
155void	lapic_ipi_vectored(u_int vector, int dest);
156int	lapic_ipi_wait(int delay);
157void	lapic_handle_intr(struct intrframe frame);
158void	lapic_set_logical_id(u_int apic_id, u_int cluster, u_int cluster_id);
159int	lapic_set_lvt_mask(u_int apic_id, u_int lvt, u_char masked);
160int	lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode);
161int	lapic_set_lvt_polarity(u_int apic_id, u_int lvt, u_char activehi);
162int	lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, u_char edgetrigger);
163void	lapic_setup(void);
164
165#endif /* !LOCORE */
166#endif /* _MACHINE_APICVAR_H_ */
167